1/* 2 * linux/arch/m68k/kernel/traps.c 3 * 4 * Copyright (C) 1993, 1994 by Hamish Macdonald 5 * 6 * 68040 fixes by Michael Rausch 7 * 68040 fixes by Martin Apel 8 * 68040 fixes and writeback by Richard Zidlicky 9 * 68060 fixes by Roman Hodek 10 * 68060 fixes by Jesper Skov 11 * 12 * This file is subject to the terms and conditions of the GNU General Public 13 * License. See the file COPYING in the main directory of this archive 14 * for more details. 15 */ 16 17/* 18 * Sets up all exception vectors 19 */ 20 21#include <linux/sched.h> 22#include <linux/signal.h> 23#include <linux/kernel.h> 24#include <linux/mm.h> 25#include <linux/module.h> 26#include <linux/user.h> 27#include <linux/string.h> 28#include <linux/linkage.h> 29#include <linux/init.h> 30#include <linux/ptrace.h> 31#include <linux/kallsyms.h> 32 33#include <asm/setup.h> 34#include <asm/fpu.h> 35#include <asm/uaccess.h> 36#include <asm/traps.h> 37#include <asm/pgalloc.h> 38#include <asm/machdep.h> 39#include <asm/siginfo.h> 40 41 42static const char *vec_names[] = { 43 [VEC_RESETSP] = "RESET SP", 44 [VEC_RESETPC] = "RESET PC", 45 [VEC_BUSERR] = "BUS ERROR", 46 [VEC_ADDRERR] = "ADDRESS ERROR", 47 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION", 48 [VEC_ZERODIV] = "ZERO DIVIDE", 49 [VEC_CHK] = "CHK", 50 [VEC_TRAP] = "TRAPcc", 51 [VEC_PRIV] = "PRIVILEGE VIOLATION", 52 [VEC_TRACE] = "TRACE", 53 [VEC_LINE10] = "LINE 1010", 54 [VEC_LINE11] = "LINE 1111", 55 [VEC_RESV12] = "UNASSIGNED RESERVED 12", 56 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION", 57 [VEC_FORMAT] = "FORMAT ERROR", 58 [VEC_UNINT] = "UNINITIALIZED INTERRUPT", 59 [VEC_RESV16] = "UNASSIGNED RESERVED 16", 60 [VEC_RESV17] = "UNASSIGNED RESERVED 17", 61 [VEC_RESV18] = "UNASSIGNED RESERVED 18", 62 [VEC_RESV19] = "UNASSIGNED RESERVED 19", 63 [VEC_RESV20] = "UNASSIGNED RESERVED 20", 64 [VEC_RESV21] = "UNASSIGNED RESERVED 21", 65 [VEC_RESV22] = "UNASSIGNED RESERVED 22", 66 [VEC_RESV23] = "UNASSIGNED RESERVED 23", 67 [VEC_SPUR] = "SPURIOUS INTERRUPT", 68 [VEC_INT1] = "LEVEL 1 INT", 69 [VEC_INT2] = "LEVEL 2 INT", 70 [VEC_INT3] = "LEVEL 3 INT", 71 [VEC_INT4] = "LEVEL 4 INT", 72 [VEC_INT5] = "LEVEL 5 INT", 73 [VEC_INT6] = "LEVEL 6 INT", 74 [VEC_INT7] = "LEVEL 7 INT", 75 [VEC_SYS] = "SYSCALL", 76 [VEC_TRAP1] = "TRAP #1", 77 [VEC_TRAP2] = "TRAP #2", 78 [VEC_TRAP3] = "TRAP #3", 79 [VEC_TRAP4] = "TRAP #4", 80 [VEC_TRAP5] = "TRAP #5", 81 [VEC_TRAP6] = "TRAP #6", 82 [VEC_TRAP7] = "TRAP #7", 83 [VEC_TRAP8] = "TRAP #8", 84 [VEC_TRAP9] = "TRAP #9", 85 [VEC_TRAP10] = "TRAP #10", 86 [VEC_TRAP11] = "TRAP #11", 87 [VEC_TRAP12] = "TRAP #12", 88 [VEC_TRAP13] = "TRAP #13", 89 [VEC_TRAP14] = "TRAP #14", 90 [VEC_TRAP15] = "TRAP #15", 91 [VEC_FPBRUC] = "FPCP BSUN", 92 [VEC_FPIR] = "FPCP INEXACT", 93 [VEC_FPDIVZ] = "FPCP DIV BY 0", 94 [VEC_FPUNDER] = "FPCP UNDERFLOW", 95 [VEC_FPOE] = "FPCP OPERAND ERROR", 96 [VEC_FPOVER] = "FPCP OVERFLOW", 97 [VEC_FPNAN] = "FPCP SNAN", 98 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION", 99 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR", 100 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR", 101 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR", 102 [VEC_RESV59] = "UNASSIGNED RESERVED 59", 103 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60", 104 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61", 105 [VEC_RESV62] = "UNASSIGNED RESERVED 62", 106 [VEC_RESV63] = "UNASSIGNED RESERVED 63", 107}; 108 109static const char *space_names[] = { 110 [0] = "Space 0", 111 [USER_DATA] = "User Data", 112 [USER_PROGRAM] = "User Program", 113#ifndef CONFIG_SUN3 114 [3] = "Space 3", 115#else 116 [FC_CONTROL] = "Control", 117#endif 118 [4] = "Space 4", 119 [SUPER_DATA] = "Super Data", 120 [SUPER_PROGRAM] = "Super Program", 121 [CPU_SPACE] = "CPU" 122}; 123 124void die_if_kernel(char *,struct pt_regs *,int); 125asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, 126 unsigned long error_code); 127int send_fault_sig(struct pt_regs *regs); 128 129asmlinkage void trap_c(struct frame *fp); 130 131#if defined (CONFIG_M68060) 132static inline void access_error060 (struct frame *fp) 133{ 134 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */ 135 136#ifdef DEBUG 137 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr); 138#endif 139 140 if (fslw & MMU060_BPE) { 141 /* branch prediction error -> clear branch cache */ 142 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t" 143 "orl #0x00400000,%/d0\n\t" 144 "movec %/d0,%/cacr" 145 : : : "d0" ); 146 /* return if there's no other error */ 147 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE)) 148 return; 149 } 150 151 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) { 152 unsigned long errorcode; 153 unsigned long addr = fp->un.fmt4.effaddr; 154 155 if (fslw & MMU060_MA) 156 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK; 157 158 errorcode = 1; 159 if (fslw & MMU060_DESC_ERR) { 160 __flush_tlb040_one(addr); 161 errorcode = 0; 162 } 163 if (fslw & MMU060_W) 164 errorcode |= 2; 165#ifdef DEBUG 166 printk("errorcode = %d\n", errorcode ); 167#endif 168 do_page_fault(&fp->ptregs, addr, errorcode); 169 } else if (fslw & (MMU060_SEE)){ 170 /* Software Emulation Error. 171 * fault during mem_read/mem_write in ifpsp060/os.S 172 */ 173 send_fault_sig(&fp->ptregs); 174 } else if (!(fslw & (MMU060_RE|MMU060_WE)) || 175 send_fault_sig(&fp->ptregs) > 0) { 176 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr); 177 printk( "68060 access error, fslw=%lx\n", fslw ); 178 trap_c( fp ); 179 } 180} 181#endif /* CONFIG_M68060 */ 182 183#if defined (CONFIG_M68040) 184static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs) 185{ 186 unsigned long mmusr; 187 mm_segment_t old_fs = get_fs(); 188 189 set_fs(MAKE_MM_SEG(wbs)); 190 191 if (iswrite) 192 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr)); 193 else 194 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr)); 195 196 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr)); 197 198 set_fs(old_fs); 199 200 return mmusr; 201} 202 203static inline int do_040writeback1(unsigned short wbs, unsigned long wba, 204 unsigned long wbd) 205{ 206 int res = 0; 207 mm_segment_t old_fs = get_fs(); 208 209 /* set_fs can not be moved, otherwise put_user() may oops */ 210 set_fs(MAKE_MM_SEG(wbs)); 211 212 switch (wbs & WBSIZ_040) { 213 case BA_SIZE_BYTE: 214 res = put_user(wbd & 0xff, (char __user *)wba); 215 break; 216 case BA_SIZE_WORD: 217 res = put_user(wbd & 0xffff, (short __user *)wba); 218 break; 219 case BA_SIZE_LONG: 220 res = put_user(wbd, (int __user *)wba); 221 break; 222 } 223 224 /* set_fs can not be moved, otherwise put_user() may oops */ 225 set_fs(old_fs); 226 227 228#ifdef DEBUG 229 printk("do_040writeback1, res=%d\n",res); 230#endif 231 232 return res; 233} 234 235/* after an exception in a writeback the stack frame corresponding 236 * to that exception is discarded, set a few bits in the old frame 237 * to simulate what it should look like 238 */ 239static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs) 240{ 241 fp->un.fmt7.faddr = wba; 242 fp->un.fmt7.ssw = wbs & 0xff; 243 if (wba != current->thread.faddr) 244 fp->un.fmt7.ssw |= MA_040; 245} 246 247static inline void do_040writebacks(struct frame *fp) 248{ 249 int res = 0; 250#if 0 251 if (fp->un.fmt7.wb1s & WBV_040) 252 printk("access_error040: cannot handle 1st writeback. oops.\n"); 253#endif 254 255 if ((fp->un.fmt7.wb2s & WBV_040) && 256 !(fp->un.fmt7.wb2s & WBTT_040)) { 257 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, 258 fp->un.fmt7.wb2d); 259 if (res) 260 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s); 261 else 262 fp->un.fmt7.wb2s = 0; 263 } 264 265 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */ 266 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) { 267 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, 268 fp->un.fmt7.wb3d); 269 if (res) 270 { 271 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s); 272 273 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s; 274 fp->un.fmt7.wb3s &= (~WBV_040); 275 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a; 276 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d; 277 } 278 else 279 fp->un.fmt7.wb3s = 0; 280 } 281 282 if (res) 283 send_fault_sig(&fp->ptregs); 284} 285 286/* 287 * called from sigreturn(), must ensure userspace code didn't 288 * manipulate exception frame to circumvent protection, then complete 289 * pending writebacks 290 * we just clear TM2 to turn it into a userspace access 291 */ 292asmlinkage void berr_040cleanup(struct frame *fp) 293{ 294 fp->un.fmt7.wb2s &= ~4; 295 fp->un.fmt7.wb3s &= ~4; 296 297 do_040writebacks(fp); 298} 299 300static inline void access_error040(struct frame *fp) 301{ 302 unsigned short ssw = fp->un.fmt7.ssw; 303 unsigned long mmusr; 304 305#ifdef DEBUG 306 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr); 307 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s, 308 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s); 309 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n", 310 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a, 311 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d); 312#endif 313 314 if (ssw & ATC_040) { 315 unsigned long addr = fp->un.fmt7.faddr; 316 unsigned long errorcode; 317 318 /* 319 * The MMU status has to be determined AFTER the address 320 * has been corrected if there was a misaligned access (MA). 321 */ 322 if (ssw & MA_040) 323 addr = (addr + 7) & -8; 324 325 /* MMU error, get the MMUSR info for this access */ 326 mmusr = probe040(!(ssw & RW_040), addr, ssw); 327#ifdef DEBUG 328 printk("mmusr = %lx\n", mmusr); 329#endif 330 errorcode = 1; 331 if (!(mmusr & MMU_R_040)) { 332 /* clear the invalid atc entry */ 333 __flush_tlb040_one(addr); 334 errorcode = 0; 335 } 336 337 /* despite what documentation seems to say, RMW 338 * accesses have always both the LK and RW bits set */ 339 if (!(ssw & RW_040) || (ssw & LK_040)) 340 errorcode |= 2; 341 342 if (do_page_fault(&fp->ptregs, addr, errorcode)) { 343#ifdef DEBUG 344 printk("do_page_fault() !=0\n"); 345#endif 346 if (user_mode(&fp->ptregs)){ 347 /* delay writebacks after signal delivery */ 348#ifdef DEBUG 349 printk(".. was usermode - return\n"); 350#endif 351 return; 352 } 353 /* disable writeback into user space from kernel 354 * (if do_page_fault didn't fix the mapping, 355 * the writeback won't do good) 356 */ 357disable_wb: 358#ifdef DEBUG 359 printk(".. disabling wb2\n"); 360#endif 361 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr) 362 fp->un.fmt7.wb2s &= ~WBV_040; 363 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr) 364 fp->un.fmt7.wb3s &= ~WBV_040; 365 } 366 } else { 367 /* In case of a bus error we either kill the process or expect 368 * the kernel to catch the fault, which then is also responsible 369 * for cleaning up the mess. 370 */ 371 current->thread.signo = SIGBUS; 372 current->thread.faddr = fp->un.fmt7.faddr; 373 if (send_fault_sig(&fp->ptregs) >= 0) 374 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw, 375 fp->un.fmt7.faddr); 376 goto disable_wb; 377 } 378 379 do_040writebacks(fp); 380} 381#endif /* CONFIG_M68040 */ 382 383#if defined(CONFIG_SUN3) 384#include <asm/sun3mmu.h> 385 386extern int mmu_emu_handle_fault (unsigned long, int, int); 387 388/* sun3 version of bus_error030 */ 389 390static inline void bus_error030 (struct frame *fp) 391{ 392 unsigned char buserr_type = sun3_get_buserr (); 393 unsigned long addr, errorcode; 394 unsigned short ssw = fp->un.fmtb.ssw; 395 extern unsigned long _sun3_map_test_start, _sun3_map_test_end; 396 397#ifdef DEBUG 398 if (ssw & (FC | FB)) 399 printk ("Instruction fault at %#010lx\n", 400 ssw & FC ? 401 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2 402 : 403 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 404 if (ssw & DF) 405 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 406 ssw & RW ? "read" : "write", 407 fp->un.fmtb.daddr, 408 space_names[ssw & DFC], fp->ptregs.pc); 409#endif 410 411 /* 412 * Check if this page should be demand-mapped. This needs to go before 413 * the testing for a bad kernel-space access (demand-mapping applies 414 * to kernel accesses too). 415 */ 416 417 if ((ssw & DF) 418 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) { 419 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0)) 420 return; 421 } 422 423 /* Check for kernel-space pagefault (BAD). */ 424 if (fp->ptregs.sr & PS_S) { 425 /* kernel fault must be a data fault to user space */ 426 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) { 427 // try checking the kernel mappings before surrender 428 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1)) 429 return; 430 /* instruction fault or kernel data fault! */ 431 if (ssw & (FC | FB)) 432 printk ("Instruction fault at %#010lx\n", 433 fp->ptregs.pc); 434 if (ssw & DF) { 435 /* was this fault incurred testing bus mappings? */ 436 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) && 437 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) { 438 send_fault_sig(&fp->ptregs); 439 return; 440 } 441 442 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 443 ssw & RW ? "read" : "write", 444 fp->un.fmtb.daddr, 445 space_names[ssw & DFC], fp->ptregs.pc); 446 } 447 printk ("BAD KERNEL BUSERR\n"); 448 449 die_if_kernel("Oops", &fp->ptregs,0); 450 force_sig(SIGKILL, current); 451 return; 452 } 453 } else { 454 /* user fault */ 455 if (!(ssw & (FC | FB)) && !(ssw & DF)) 456 /* not an instruction fault or data fault! BAD */ 457 panic ("USER BUSERR w/o instruction or data fault"); 458 } 459 460 461 /* First handle the data fault, if any. */ 462 if (ssw & DF) { 463 addr = fp->un.fmtb.daddr; 464 465// errorcode bit 0: 0 -> no page 1 -> protection fault 466// errorcode bit 1: 0 -> read fault 1 -> write fault 467 468// (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault 469// (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault 470 471 if (buserr_type & SUN3_BUSERR_PROTERR) 472 errorcode = 0x01; 473 else if (buserr_type & SUN3_BUSERR_INVALID) 474 errorcode = 0x00; 475 else { 476#ifdef DEBUG 477 printk ("*** unexpected busfault type=%#04x\n", buserr_type); 478 printk ("invalid %s access at %#lx from pc %#lx\n", 479 !(ssw & RW) ? "write" : "read", addr, 480 fp->ptregs.pc); 481#endif 482 die_if_kernel ("Oops", &fp->ptregs, buserr_type); 483 force_sig (SIGBUS, current); 484 return; 485 } 486 487//todo: wtf is RM bit? --m 488 if (!(ssw & RW) || ssw & RM) 489 errorcode |= 0x02; 490 491 /* Handle page fault. */ 492 do_page_fault (&fp->ptregs, addr, errorcode); 493 494 /* Retry the data fault now. */ 495 return; 496 } 497 498 /* Now handle the instruction fault. */ 499 500 /* Get the fault address. */ 501 if (fp->ptregs.format == 0xA) 502 addr = fp->ptregs.pc + 4; 503 else 504 addr = fp->un.fmtb.baddr; 505 if (ssw & FC) 506 addr -= 2; 507 508 if (buserr_type & SUN3_BUSERR_INVALID) { 509 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0)) 510 do_page_fault (&fp->ptregs, addr, 0); 511 } else { 512#ifdef DEBUG 513 printk ("protection fault on insn access (segv).\n"); 514#endif 515 force_sig (SIGSEGV, current); 516 } 517} 518#else 519#if defined(CPU_M68020_OR_M68030) 520static inline void bus_error030 (struct frame *fp) 521{ 522 volatile unsigned short temp; 523 unsigned short mmusr; 524 unsigned long addr, errorcode; 525 unsigned short ssw = fp->un.fmtb.ssw; 526#ifdef DEBUG 527 unsigned long desc; 528 529 printk ("pid = %x ", current->pid); 530 printk ("SSW=%#06x ", ssw); 531 532 if (ssw & (FC | FB)) 533 printk ("Instruction fault at %#010lx\n", 534 ssw & FC ? 535 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2 536 : 537 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 538 if (ssw & DF) 539 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 540 ssw & RW ? "read" : "write", 541 fp->un.fmtb.daddr, 542 space_names[ssw & DFC], fp->ptregs.pc); 543#endif 544 545 /* ++andreas: If a data fault and an instruction fault happen 546 at the same time map in both pages. */ 547 548 /* First handle the data fault, if any. */ 549 if (ssw & DF) { 550 addr = fp->un.fmtb.daddr; 551 552#ifdef DEBUG 553 asm volatile ("ptestr %3,%2@,#7,%0\n\t" 554 "pmove %%psr,%1" 555 : "=a&" (desc), "=m" (temp) 556 : "a" (addr), "d" (ssw)); 557#else 558 asm volatile ("ptestr %2,%1@,#7\n\t" 559 "pmove %%psr,%0" 560 : "=m" (temp) : "a" (addr), "d" (ssw)); 561#endif 562 mmusr = temp; 563 564#ifdef DEBUG 565 printk("mmusr is %#x for addr %#lx in task %p\n", 566 mmusr, addr, current); 567 printk("descriptor address is %#lx, contents %#lx\n", 568 __va(desc), *(unsigned long *)__va(desc)); 569#endif 570 571 errorcode = (mmusr & MMU_I) ? 0 : 1; 572 if (!(ssw & RW) || (ssw & RM)) 573 errorcode |= 2; 574 575 if (mmusr & (MMU_I | MMU_WP)) { 576 if (ssw & 4) { 577 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n", 578 ssw & RW ? "read" : "write", 579 fp->un.fmtb.daddr, 580 space_names[ssw & DFC], fp->ptregs.pc); 581 goto buserr; 582 } 583 /* Don't try to do anything further if an exception was 584 handled. */ 585 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0) 586 return; 587 } else if (!(mmusr & MMU_I)) { 588 /* probably a 020 cas fault */ 589 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0) 590 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr); 591 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) { 592 printk("invalid %s access at %#lx from pc %#lx\n", 593 !(ssw & RW) ? "write" : "read", addr, 594 fp->ptregs.pc); 595 die_if_kernel("Oops",&fp->ptregs,mmusr); 596 force_sig(SIGSEGV, current); 597 return; 598 } else { 599#if 0 600 static volatile long tlong; 601#endif 602 603 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n", 604 !(ssw & RW) ? "write" : "read", addr, 605 fp->ptregs.pc, ssw); 606 asm volatile ("ptestr #1,%1@,#0\n\t" 607 "pmove %%psr,%0" 608 : "=m" (temp) 609 : "a" (addr)); 610 mmusr = temp; 611 612 printk ("level 0 mmusr is %#x\n", mmusr); 613#if 0 614 asm volatile ("pmove %%tt0,%0" 615 : "=m" (tlong)); 616 printk("tt0 is %#lx, ", tlong); 617 asm volatile ("pmove %%tt1,%0" 618 : "=m" (tlong)); 619 printk("tt1 is %#lx\n", tlong); 620#endif 621#ifdef DEBUG 622 printk("Unknown SIGSEGV - 1\n"); 623#endif 624 die_if_kernel("Oops",&fp->ptregs,mmusr); 625 force_sig(SIGSEGV, current); 626 return; 627 } 628 629 /* setup an ATC entry for the access about to be retried */ 630 if (!(ssw & RW) || (ssw & RM)) 631 asm volatile ("ploadw %1,%0@" : /* no outputs */ 632 : "a" (addr), "d" (ssw)); 633 else 634 asm volatile ("ploadr %1,%0@" : /* no outputs */ 635 : "a" (addr), "d" (ssw)); 636 } 637 638 /* Now handle the instruction fault. */ 639 640 if (!(ssw & (FC|FB))) 641 return; 642 643 if (fp->ptregs.sr & PS_S) { 644 printk("Instruction fault at %#010lx\n", 645 fp->ptregs.pc); 646 buserr: 647 printk ("BAD KERNEL BUSERR\n"); 648 die_if_kernel("Oops",&fp->ptregs,0); 649 force_sig(SIGKILL, current); 650 return; 651 } 652 653 /* get the fault address */ 654 if (fp->ptregs.format == 10) 655 addr = fp->ptregs.pc + 4; 656 else 657 addr = fp->un.fmtb.baddr; 658 if (ssw & FC) 659 addr -= 2; 660 661 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0) 662 /* Insn fault on same page as data fault. But we 663 should still create the ATC entry. */ 664 goto create_atc_entry; 665 666#ifdef DEBUG 667 asm volatile ("ptestr #1,%2@,#7,%0\n\t" 668 "pmove %%psr,%1" 669 : "=a&" (desc), "=m" (temp) 670 : "a" (addr)); 671#else 672 asm volatile ("ptestr #1,%1@,#7\n\t" 673 "pmove %%psr,%0" 674 : "=m" (temp) : "a" (addr)); 675#endif 676 mmusr = temp; 677 678#ifdef DEBUG 679 printk ("mmusr is %#x for addr %#lx in task %p\n", 680 mmusr, addr, current); 681 printk ("descriptor address is %#lx, contents %#lx\n", 682 __va(desc), *(unsigned long *)__va(desc)); 683#endif 684 685 if (mmusr & MMU_I) 686 do_page_fault (&fp->ptregs, addr, 0); 687 else if (mmusr & (MMU_B|MMU_L|MMU_S)) { 688 printk ("invalid insn access at %#lx from pc %#lx\n", 689 addr, fp->ptregs.pc); 690#ifdef DEBUG 691 printk("Unknown SIGSEGV - 2\n"); 692#endif 693 die_if_kernel("Oops",&fp->ptregs,mmusr); 694 force_sig(SIGSEGV, current); 695 return; 696 } 697 698create_atc_entry: 699 /* setup an ATC entry for the access about to be retried */ 700 asm volatile ("ploadr #2,%0@" : /* no outputs */ 701 : "a" (addr)); 702} 703#endif /* CPU_M68020_OR_M68030 */ 704#endif /* !CONFIG_SUN3 */ 705 706#if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU) 707#include <asm/mcfmmu.h> 708 709/* 710 * The following table converts the FS encoding of a ColdFire 711 * exception stack frame into the error_code value needed by 712 * do_fault. 713*/ 714static const unsigned char fs_err_code[] = { 715 0, /* 0000 */ 716 0, /* 0001 */ 717 0, /* 0010 */ 718 0, /* 0011 */ 719 1, /* 0100 */ 720 0, /* 0101 */ 721 0, /* 0110 */ 722 0, /* 0111 */ 723 2, /* 1000 */ 724 3, /* 1001 */ 725 2, /* 1010 */ 726 0, /* 1011 */ 727 1, /* 1100 */ 728 1, /* 1101 */ 729 0, /* 1110 */ 730 0 /* 1111 */ 731}; 732 733static inline void access_errorcf(unsigned int fs, struct frame *fp) 734{ 735 unsigned long mmusr, addr; 736 unsigned int err_code; 737 int need_page_fault; 738 739 mmusr = mmu_read(MMUSR); 740 addr = mmu_read(MMUAR); 741 742 /* 743 * error_code: 744 * bit 0 == 0 means no page found, 1 means protection fault 745 * bit 1 == 0 means read, 1 means write 746 */ 747 switch (fs) { 748 case 5: /* 0101 TLB opword X miss */ 749 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0); 750 addr = fp->ptregs.pc; 751 break; 752 case 6: /* 0110 TLB extension word X miss */ 753 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1); 754 addr = fp->ptregs.pc + sizeof(long); 755 break; 756 case 10: /* 1010 TLB W miss */ 757 need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0); 758 break; 759 case 14: /* 1110 TLB R miss */ 760 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0); 761 break; 762 default: 763 /* 0000 Normal */ 764 /* 0001 Reserved */ 765 /* 0010 Interrupt during debug service routine */ 766 /* 0011 Reserved */ 767 /* 0100 X Protection */ 768 /* 0111 IFP in emulator mode */ 769 /* 1000 W Protection*/ 770 /* 1001 Write error*/ 771 /* 1011 Reserved*/ 772 /* 1100 R Protection*/ 773 /* 1101 R Protection*/ 774 /* 1111 OEP in emulator mode*/ 775 need_page_fault = 1; 776 break; 777 } 778 779 if (need_page_fault) { 780 err_code = fs_err_code[fs]; 781 if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */ 782 err_code |= 2; /* bit1 - write, bit0 - protection */ 783 do_page_fault(&fp->ptregs, addr, err_code); 784 } 785} 786#endif /* CONFIG_COLDFIRE CONFIG_MMU */ 787 788asmlinkage void buserr_c(struct frame *fp) 789{ 790 /* Only set esp0 if coming from user mode */ 791 if (user_mode(&fp->ptregs)) 792 current->thread.esp0 = (unsigned long) fp; 793 794#ifdef DEBUG 795 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format); 796#endif 797 798#if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU) 799 if (CPU_IS_COLDFIRE) { 800 unsigned int fs; 801 fs = (fp->ptregs.vector & 0x3) | 802 ((fp->ptregs.vector & 0xc00) >> 8); 803 switch (fs) { 804 case 0x5: 805 case 0x6: 806 case 0x7: 807 case 0x9: 808 case 0xa: 809 case 0xd: 810 case 0xe: 811 case 0xf: 812 access_errorcf(fs, fp); 813 return; 814 default: 815 break; 816 } 817 } 818#endif /* CONFIG_COLDFIRE && CONFIG_MMU */ 819 820 switch (fp->ptregs.format) { 821#if defined (CONFIG_M68060) 822 case 4: /* 68060 access error */ 823 access_error060 (fp); 824 break; 825#endif 826#if defined (CONFIG_M68040) 827 case 0x7: /* 68040 access error */ 828 access_error040 (fp); 829 break; 830#endif 831#if defined (CPU_M68020_OR_M68030) 832 case 0xa: 833 case 0xb: 834 bus_error030 (fp); 835 break; 836#endif 837 default: 838 die_if_kernel("bad frame format",&fp->ptregs,0); 839#ifdef DEBUG 840 printk("Unknown SIGSEGV - 4\n"); 841#endif 842 force_sig(SIGSEGV, current); 843 } 844} 845 846 847static int kstack_depth_to_print = 48; 848 849void show_trace(unsigned long *stack) 850{ 851 unsigned long *endstack; 852 unsigned long addr; 853 int i; 854 855 printk("Call Trace:"); 856 addr = (unsigned long)stack + THREAD_SIZE - 1; 857 endstack = (unsigned long *)(addr & -THREAD_SIZE); 858 i = 0; 859 while (stack + 1 <= endstack) { 860 addr = *stack++; 861 /* 862 * If the address is either in the text segment of the 863 * kernel, or in the region which contains vmalloc'ed 864 * memory, it *may* be the address of a calling 865 * routine; if so, print it so that someone tracing 866 * down the cause of the crash will be able to figure 867 * out the call path that was taken. 868 */ 869 if (__kernel_text_address(addr)) { 870#ifndef CONFIG_KALLSYMS 871 if (i % 5 == 0) 872 printk("\n "); 873#endif 874 printk(" [<%08lx>] %pS\n", addr, (void *)addr); 875 i++; 876 } 877 } 878 printk("\n"); 879} 880 881void show_registers(struct pt_regs *regs) 882{ 883 struct frame *fp = (struct frame *)regs; 884 mm_segment_t old_fs = get_fs(); 885 u16 c, *cp; 886 unsigned long addr; 887 int i; 888 889 print_modules(); 890 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc); 891 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2); 892 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", 893 regs->d0, regs->d1, regs->d2, regs->d3); 894 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", 895 regs->d4, regs->d5, regs->a0, regs->a1); 896 897 printk("Process %s (pid: %d, task=%p)\n", 898 current->comm, task_pid_nr(current), current); 899 addr = (unsigned long)&fp->un; 900 printk("Frame format=%X ", regs->format); 901 switch (regs->format) { 902 case 0x2: 903 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr); 904 addr += sizeof(fp->un.fmt2); 905 break; 906 case 0x3: 907 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr); 908 addr += sizeof(fp->un.fmt3); 909 break; 910 case 0x4: 911 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n" 912 : "eff addr=%08lx pc=%08lx\n"), 913 fp->un.fmt4.effaddr, fp->un.fmt4.pc); 914 addr += sizeof(fp->un.fmt4); 915 break; 916 case 0x7: 917 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n", 918 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr); 919 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n", 920 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0); 921 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n", 922 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d); 923 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n", 924 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d); 925 printk("push data: %08lx %08lx %08lx %08lx\n", 926 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2, 927 fp->un.fmt7.pd3); 928 addr += sizeof(fp->un.fmt7); 929 break; 930 case 0x9: 931 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr); 932 addr += sizeof(fp->un.fmt9); 933 break; 934 case 0xa: 935 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n", 936 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb, 937 fp->un.fmta.daddr, fp->un.fmta.dobuf); 938 addr += sizeof(fp->un.fmta); 939 break; 940 case 0xb: 941 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n", 942 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb, 943 fp->un.fmtb.daddr, fp->un.fmtb.dobuf); 944 printk("baddr=%08lx dibuf=%08lx ver=%x\n", 945 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver); 946 addr += sizeof(fp->un.fmtb); 947 break; 948 default: 949 printk("\n"); 950 } 951 show_stack(NULL, (unsigned long *)addr); 952 953 printk("Code:"); 954 set_fs(KERNEL_DS); 955 cp = (u16 *)regs->pc; 956 for (i = -8; i < 16; i++) { 957 if (get_user(c, cp + i) && i >= 0) { 958 printk(" Bad PC value."); 959 break; 960 } 961 printk(i ? " %04x" : " <%04x>", c); 962 } 963 set_fs(old_fs); 964 printk ("\n"); 965} 966 967void show_stack(struct task_struct *task, unsigned long *stack) 968{ 969 unsigned long *p; 970 unsigned long *endstack; 971 int i; 972 973 if (!stack) { 974 if (task) 975 stack = (unsigned long *)task->thread.esp0; 976 else 977 stack = (unsigned long *)&stack; 978 } 979 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE); 980 981 printk("Stack from %08lx:", (unsigned long)stack); 982 p = stack; 983 for (i = 0; i < kstack_depth_to_print; i++) { 984 if (p + 1 > endstack) 985 break; 986 if (i % 8 == 0) 987 printk("\n "); 988 printk(" %08lx", *p++); 989 } 990 printk("\n"); 991 show_trace(stack); 992} 993 994/* 995 * The architecture-independent backtrace generator 996 */ 997void dump_stack(void) 998{ 999 unsigned long stack; 1000 1001 show_trace(&stack); 1002} 1003 1004EXPORT_SYMBOL(dump_stack); 1005 1006/* 1007 * The vector number returned in the frame pointer may also contain 1008 * the "fs" (Fault Status) bits on ColdFire. These are in the bottom 1009 * 2 bits, and upper 2 bits. So we need to mask out the real vector 1010 * number before using it in comparisons. You don't need to do this on 1011 * real 68k parts, but it won't hurt either. 1012 */ 1013 1014void bad_super_trap (struct frame *fp) 1015{ 1016 int vector = (fp->ptregs.vector >> 2) & 0xff; 1017 1018 console_verbose(); 1019 if (vector < ARRAY_SIZE(vec_names)) 1020 printk ("*** %s *** FORMAT=%X\n", 1021 vec_names[vector], 1022 fp->ptregs.format); 1023 else 1024 printk ("*** Exception %d *** FORMAT=%X\n", 1025 vector, fp->ptregs.format); 1026 if (vector == VEC_ADDRERR && CPU_IS_020_OR_030) { 1027 unsigned short ssw = fp->un.fmtb.ssw; 1028 1029 printk ("SSW=%#06x ", ssw); 1030 1031 if (ssw & RC) 1032 printk ("Pipe stage C instruction fault at %#010lx\n", 1033 (fp->ptregs.format) == 0xA ? 1034 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2); 1035 if (ssw & RB) 1036 printk ("Pipe stage B instruction fault at %#010lx\n", 1037 (fp->ptregs.format) == 0xA ? 1038 fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 1039 if (ssw & DF) 1040 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 1041 ssw & RW ? "read" : "write", 1042 fp->un.fmtb.daddr, space_names[ssw & DFC], 1043 fp->ptregs.pc); 1044 } 1045 printk ("Current process id is %d\n", task_pid_nr(current)); 1046 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0); 1047} 1048 1049asmlinkage void trap_c(struct frame *fp) 1050{ 1051 int sig; 1052 int vector = (fp->ptregs.vector >> 2) & 0xff; 1053 siginfo_t info; 1054 1055 if (fp->ptregs.sr & PS_S) { 1056 if (vector == VEC_TRACE) { 1057 /* traced a trapping instruction on a 68020/30, 1058 * real exception will be executed afterwards. 1059 */ 1060 } else if (!handle_kernel_fault(&fp->ptregs)) 1061 bad_super_trap(fp); 1062 return; 1063 } 1064 1065 /* send the appropriate signal to the user program */ 1066 switch (vector) { 1067 case VEC_ADDRERR: 1068 info.si_code = BUS_ADRALN; 1069 sig = SIGBUS; 1070 break; 1071 case VEC_ILLEGAL: 1072 case VEC_LINE10: 1073 case VEC_LINE11: 1074 info.si_code = ILL_ILLOPC; 1075 sig = SIGILL; 1076 break; 1077 case VEC_PRIV: 1078 info.si_code = ILL_PRVOPC; 1079 sig = SIGILL; 1080 break; 1081 case VEC_COPROC: 1082 info.si_code = ILL_COPROC; 1083 sig = SIGILL; 1084 break; 1085 case VEC_TRAP1: 1086 case VEC_TRAP2: 1087 case VEC_TRAP3: 1088 case VEC_TRAP4: 1089 case VEC_TRAP5: 1090 case VEC_TRAP6: 1091 case VEC_TRAP7: 1092 case VEC_TRAP8: 1093 case VEC_TRAP9: 1094 case VEC_TRAP10: 1095 case VEC_TRAP11: 1096 case VEC_TRAP12: 1097 case VEC_TRAP13: 1098 case VEC_TRAP14: 1099 info.si_code = ILL_ILLTRP; 1100 sig = SIGILL; 1101 break; 1102 case VEC_FPBRUC: 1103 case VEC_FPOE: 1104 case VEC_FPNAN: 1105 info.si_code = FPE_FLTINV; 1106 sig = SIGFPE; 1107 break; 1108 case VEC_FPIR: 1109 info.si_code = FPE_FLTRES; 1110 sig = SIGFPE; 1111 break; 1112 case VEC_FPDIVZ: 1113 info.si_code = FPE_FLTDIV; 1114 sig = SIGFPE; 1115 break; 1116 case VEC_FPUNDER: 1117 info.si_code = FPE_FLTUND; 1118 sig = SIGFPE; 1119 break; 1120 case VEC_FPOVER: 1121 info.si_code = FPE_FLTOVF; 1122 sig = SIGFPE; 1123 break; 1124 case VEC_ZERODIV: 1125 info.si_code = FPE_INTDIV; 1126 sig = SIGFPE; 1127 break; 1128 case VEC_CHK: 1129 case VEC_TRAP: 1130 info.si_code = FPE_INTOVF; 1131 sig = SIGFPE; 1132 break; 1133 case VEC_TRACE: /* ptrace single step */ 1134 info.si_code = TRAP_TRACE; 1135 sig = SIGTRAP; 1136 break; 1137 case VEC_TRAP15: /* breakpoint */ 1138 info.si_code = TRAP_BRKPT; 1139 sig = SIGTRAP; 1140 break; 1141 default: 1142 info.si_code = ILL_ILLOPC; 1143 sig = SIGILL; 1144 break; 1145 } 1146 info.si_signo = sig; 1147 info.si_errno = 0; 1148 switch (fp->ptregs.format) { 1149 default: 1150 info.si_addr = (void *) fp->ptregs.pc; 1151 break; 1152 case 2: 1153 info.si_addr = (void *) fp->un.fmt2.iaddr; 1154 break; 1155 case 7: 1156 info.si_addr = (void *) fp->un.fmt7.effaddr; 1157 break; 1158 case 9: 1159 info.si_addr = (void *) fp->un.fmt9.iaddr; 1160 break; 1161 case 10: 1162 info.si_addr = (void *) fp->un.fmta.daddr; 1163 break; 1164 case 11: 1165 info.si_addr = (void *) fp->un.fmtb.daddr; 1166 break; 1167 } 1168 force_sig_info (sig, &info, current); 1169} 1170 1171void die_if_kernel (char *str, struct pt_regs *fp, int nr) 1172{ 1173 if (!(fp->sr & PS_S)) 1174 return; 1175 1176 console_verbose(); 1177 printk("%s: %08x\n",str,nr); 1178 show_registers(fp); 1179 add_taint(TAINT_DIE); 1180 do_exit(SIGSEGV); 1181} 1182 1183asmlinkage void set_esp0(unsigned long ssp) 1184{ 1185 current->thread.esp0 = ssp; 1186} 1187 1188/* 1189 * This function is called if an error occur while accessing 1190 * user-space from the fpsp040 code. 1191 */ 1192asmlinkage void fpsp040_die(void) 1193{ 1194 do_exit(SIGSEGV); 1195} 1196 1197#ifdef CONFIG_M68KFPU_EMU 1198asmlinkage void fpemu_signal(int signal, int code, void *addr) 1199{ 1200 siginfo_t info; 1201 1202 info.si_signo = signal; 1203 info.si_errno = 0; 1204 info.si_code = code; 1205 info.si_addr = addr; 1206 force_sig_info(signal, &info, current); 1207} 1208#endif 1209