eeh_cache.c revision 5d5a0936b3ad9e3d3f6eaf61f1a06c62ea0e7a59
1/* 2 * eeh_cache.c 3 * PCI address cache; allows the lookup of PCI devices based on I/O address 4 * 5 * Copyright (C) 2004 Linas Vepstas <linas@austin.ibm.com> IBM Corporation 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 22#include <linux/list.h> 23#include <linux/pci.h> 24#include <linux/rbtree.h> 25#include <linux/spinlock.h> 26#include <asm/atomic.h> 27#include <asm/pci-bridge.h> 28#include <asm/ppc-pci.h> 29#include <asm/systemcfg.h> 30 31#undef DEBUG 32 33/** 34 * The pci address cache subsystem. This subsystem places 35 * PCI device address resources into a red-black tree, sorted 36 * according to the address range, so that given only an i/o 37 * address, the corresponding PCI device can be **quickly** 38 * found. It is safe to perform an address lookup in an interrupt 39 * context; this ability is an important feature. 40 * 41 * Currently, the only customer of this code is the EEH subsystem; 42 * thus, this code has been somewhat tailored to suit EEH better. 43 * In particular, the cache does *not* hold the addresses of devices 44 * for which EEH is not enabled. 45 * 46 * (Implementation Note: The RB tree seems to be better/faster 47 * than any hash algo I could think of for this problem, even 48 * with the penalty of slow pointer chases for d-cache misses). 49 */ 50struct pci_io_addr_range 51{ 52 struct rb_node rb_node; 53 unsigned long addr_lo; 54 unsigned long addr_hi; 55 struct pci_dev *pcidev; 56 unsigned int flags; 57}; 58 59static struct pci_io_addr_cache 60{ 61 struct rb_root rb_root; 62 spinlock_t piar_lock; 63} pci_io_addr_cache_root; 64 65static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr) 66{ 67 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node; 68 69 while (n) { 70 struct pci_io_addr_range *piar; 71 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 72 73 if (addr < piar->addr_lo) { 74 n = n->rb_left; 75 } else { 76 if (addr > piar->addr_hi) { 77 n = n->rb_right; 78 } else { 79 pci_dev_get(piar->pcidev); 80 return piar->pcidev; 81 } 82 } 83 } 84 85 return NULL; 86} 87 88/** 89 * pci_get_device_by_addr - Get device, given only address 90 * @addr: mmio (PIO) phys address or i/o port number 91 * 92 * Given an mmio phys address, or a port number, find a pci device 93 * that implements this address. Be sure to pci_dev_put the device 94 * when finished. I/O port numbers are assumed to be offset 95 * from zero (that is, they do *not* have pci_io_addr added in). 96 * It is safe to call this function within an interrupt. 97 */ 98struct pci_dev *pci_get_device_by_addr(unsigned long addr) 99{ 100 struct pci_dev *dev; 101 unsigned long flags; 102 103 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 104 dev = __pci_get_device_by_addr(addr); 105 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 106 return dev; 107} 108 109#ifdef DEBUG 110/* 111 * Handy-dandy debug print routine, does nothing more 112 * than print out the contents of our addr cache. 113 */ 114static void pci_addr_cache_print(struct pci_io_addr_cache *cache) 115{ 116 struct rb_node *n; 117 int cnt = 0; 118 119 n = rb_first(&cache->rb_root); 120 while (n) { 121 struct pci_io_addr_range *piar; 122 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 123 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n", 124 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt, 125 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev)); 126 cnt++; 127 n = rb_next(n); 128 } 129} 130#endif 131 132/* Insert address range into the rb tree. */ 133static struct pci_io_addr_range * 134pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo, 135 unsigned long ahi, unsigned int flags) 136{ 137 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node; 138 struct rb_node *parent = NULL; 139 struct pci_io_addr_range *piar; 140 141 /* Walk tree, find a place to insert into tree */ 142 while (*p) { 143 parent = *p; 144 piar = rb_entry(parent, struct pci_io_addr_range, rb_node); 145 if (ahi < piar->addr_lo) { 146 p = &parent->rb_left; 147 } else if (alo > piar->addr_hi) { 148 p = &parent->rb_right; 149 } else { 150 if (dev != piar->pcidev || 151 alo != piar->addr_lo || ahi != piar->addr_hi) { 152 printk(KERN_WARNING "PIAR: overlapping address range\n"); 153 } 154 return piar; 155 } 156 } 157 piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC); 158 if (!piar) 159 return NULL; 160 161 piar->addr_lo = alo; 162 piar->addr_hi = ahi; 163 piar->pcidev = dev; 164 piar->flags = flags; 165 166#ifdef DEBUG 167 printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n", 168 alo, ahi, pci_name (dev)); 169#endif 170 171 rb_link_node(&piar->rb_node, parent, p); 172 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root); 173 174 return piar; 175} 176 177static void __pci_addr_cache_insert_device(struct pci_dev *dev) 178{ 179 struct device_node *dn; 180 struct pci_dn *pdn; 181 int i; 182 int inserted = 0; 183 184 dn = pci_device_to_OF_node(dev); 185 if (!dn) { 186 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev)); 187 return; 188 } 189 190 /* Skip any devices for which EEH is not enabled. */ 191 pdn = PCI_DN(dn); 192 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) || 193 pdn->eeh_mode & EEH_MODE_NOCHECK) { 194#ifdef DEBUG 195 printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n", 196 pci_name(dev), pdn->node->full_name); 197#endif 198 return; 199 } 200 201 /* The cache holds a reference to the device... */ 202 pci_dev_get(dev); 203 204 /* Walk resources on this device, poke them into the tree */ 205 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 206 unsigned long start = pci_resource_start(dev,i); 207 unsigned long end = pci_resource_end(dev,i); 208 unsigned int flags = pci_resource_flags(dev,i); 209 210 /* We are interested only bus addresses, not dma or other stuff */ 211 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM))) 212 continue; 213 if (start == 0 || ~start == 0 || end == 0 || ~end == 0) 214 continue; 215 pci_addr_cache_insert(dev, start, end, flags); 216 inserted = 1; 217 } 218 219 /* If there was nothing to add, the cache has no reference... */ 220 if (!inserted) 221 pci_dev_put(dev); 222} 223 224/** 225 * pci_addr_cache_insert_device - Add a device to the address cache 226 * @dev: PCI device whose I/O addresses we are interested in. 227 * 228 * In order to support the fast lookup of devices based on addresses, 229 * we maintain a cache of devices that can be quickly searched. 230 * This routine adds a device to that cache. 231 */ 232void pci_addr_cache_insert_device(struct pci_dev *dev) 233{ 234 unsigned long flags; 235 236 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 237 __pci_addr_cache_insert_device(dev); 238 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 239} 240 241static inline void __pci_addr_cache_remove_device(struct pci_dev *dev) 242{ 243 struct rb_node *n; 244 int removed = 0; 245 246restart: 247 n = rb_first(&pci_io_addr_cache_root.rb_root); 248 while (n) { 249 struct pci_io_addr_range *piar; 250 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 251 252 if (piar->pcidev == dev) { 253 rb_erase(n, &pci_io_addr_cache_root.rb_root); 254 removed = 1; 255 kfree(piar); 256 goto restart; 257 } 258 n = rb_next(n); 259 } 260 261 /* The cache no longer holds its reference to this device... */ 262 if (removed) 263 pci_dev_put(dev); 264} 265 266/** 267 * pci_addr_cache_remove_device - remove pci device from addr cache 268 * @dev: device to remove 269 * 270 * Remove a device from the addr-cache tree. 271 * This is potentially expensive, since it will walk 272 * the tree multiple times (once per resource). 273 * But so what; device removal doesn't need to be that fast. 274 */ 275void pci_addr_cache_remove_device(struct pci_dev *dev) 276{ 277 unsigned long flags; 278 279 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags); 280 __pci_addr_cache_remove_device(dev); 281 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags); 282} 283 284/** 285 * pci_addr_cache_build - Build a cache of I/O addresses 286 * 287 * Build a cache of pci i/o addresses. This cache will be used to 288 * find the pci device that corresponds to a given address. 289 * This routine scans all pci busses to build the cache. 290 * Must be run late in boot process, after the pci controllers 291 * have been scaned for devices (after all device resources are known). 292 */ 293void __init pci_addr_cache_build(void) 294{ 295 struct device_node *dn; 296 struct pci_dev *dev = NULL; 297 298 spin_lock_init(&pci_io_addr_cache_root.piar_lock); 299 300 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 301 /* Ignore PCI bridges */ 302 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) 303 continue; 304 305 pci_addr_cache_insert_device(dev); 306 307 /* Save the BAR's; firmware doesn't restore these after EEH reset */ 308 dn = pci_device_to_OF_node(dev); 309 eeh_save_bars(dev, PCI_DN(dn)); 310 } 311 312#ifdef DEBUG 313 /* Verify tree built up above, echo back the list of addrs. */ 314 pci_addr_cache_print(&pci_io_addr_cache_root); 315#endif 316} 317 318