1e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#ifndef __ASM_SH_CACHE_INSNS_32_H 2e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#define __ASM_SH_CACHE_INSNS_32_H 3e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells 4e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#include <linux/types.h> 5e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells 6e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#if defined(CONFIG_CPU_SH4A) 7e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr)) 8e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#else 9e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#define __icbi(addr) mb() 10e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#endif 11e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells 12e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr)) 13e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr)) 14e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr)) 15e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells 16e839ca528718e68cad32a307dc9aabf01ef3eb05David Howellsstatic inline reg_size_t register_align(void *val) 17e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells{ 18e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells return (unsigned long)(signed long)val; 19e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells} 20e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells 21e839ca528718e68cad32a307dc9aabf01ef3eb05David Howells#endif /* __ASM_SH_CACHE_INSNS_32_H */ 22