11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * arch/sh/mm/cache-sh4.c 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 5deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt * Copyright (C) 2001 - 2009 Paul Mundt 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 2003 Richard Curnow 709b5a10c1944214a6008712bfa92b29f00b84a1aChris Smith * Copyright (c) 2007 STMicroelectronics (R&D) Ltd. 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * License. See the file "COPYING" in the main directory of this archive 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * for more details. 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/init.h> 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/mm.h> 1552e27782e1c4afa1feca0fdf194d279595e0431cPaul Mundt#include <linux/io.h> 1652e27782e1c4afa1feca0fdf194d279595e0431cPaul Mundt#include <linux/mutex.h> 172277ab4a1df50e05bc732fe9488d4e902bb8399aPaul Mundt#include <linux/fs.h> 18deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt#include <linux/highmem.h> 19deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt#include <asm/pgtable.h> 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/mmu_context.h> 21f03c4866d31e913a8dbc84f7d1459abdaf0bd326Paul Mundt#include <asm/cache_insns.h> 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/cacheflush.h> 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2428ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt/* 2528ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * The maximum number of pages we support up to when doing ranged dcache 2628ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * flushing. Anything exceeding this will simply flush the dcache in its 2728ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * entirety. 2828ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt */ 2909b5a10c1944214a6008712bfa92b29f00b84a1aChris Smith#define MAX_ICACHE_PAGES 32 3028ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt 31a7a7c0e1d12bcfb4a96cae439951232b08c91841Valentin Sitdikovstatic void __flush_cache_one(unsigned long addr, unsigned long phys, 32a252710fc5b63b24934905ca47ecf661702d7f00Paul Mundt unsigned long exec_offset); 33b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 34b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow/* 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Write back the range of D-cache, and purge the I-cache. 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3709b5a10c1944214a6008712bfa92b29f00b84a1aChris Smith * Called from kernel/module.c:sys_init_module and routine for a.out format, 3809b5a10c1944214a6008712bfa92b29f00b84a1aChris Smith * signal handler code and kprobes code 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 402dc2f8e0c46864e2a3722c84eaa96513d4cf8b2fPaul Mundtstatic void sh4_flush_icache_range(void *args) 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 42f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt struct flusher_data *data = args; 43f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt unsigned long start, end; 44983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt unsigned long flags, v; 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 47f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt start = data->addr1; 48f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt end = data->addr2; 49f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt 50682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt /* If there are too many pages then just blow away the caches */ 51682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) { 52682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt local_flush_cache_all(NULL); 53682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt return; 54682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt } 55682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt 56682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt /* 57682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt * Selectively flush d-cache then invalidate the i-cache. 58682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt * This is inefficient, so only use this for small ranges. 59682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt */ 60682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt start &= ~(L1_CACHE_BYTES-1); 61682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt end += L1_CACHE_BYTES-1; 62682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt end &= ~(L1_CACHE_BYTES-1); 63983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt 64682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt local_irq_save(flags); 65682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt jump_to_uncached(); 66983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt 67682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt for (v = start; v < end; v += L1_CACHE_BYTES) { 68682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt unsigned long icacheaddr; 69a9d244a2ff163247b607c4bb64803230ca8f8acbMatt Fleming int j, n; 70983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt 71682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt __ocbwb(v); 72983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt 73682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt icacheaddr = CACHE_IC_ADDRESS_ARRAY | (v & 74682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt cpu_data->icache.entry_mask); 7509b5a10c1944214a6008712bfa92b29f00b84a1aChris Smith 76682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt /* Clear i-cache line valid-bit */ 77a9d244a2ff163247b607c4bb64803230ca8f8acbMatt Fleming n = boot_cpu_data.icache.n_aliases; 78682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt for (i = 0; i < cpu_data->icache.ways; i++) { 79a9d244a2ff163247b607c4bb64803230ca8f8acbMatt Fleming for (j = 0; j < n; j++) 80a9d244a2ff163247b607c4bb64803230ca8f8acbMatt Fleming __raw_writel(0, icacheaddr + (j * PAGE_SIZE)); 81682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt icacheaddr += cpu_data->icache.way_incr; 82682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt } 8309b5a10c1944214a6008712bfa92b29f00b84a1aChris Smith } 84682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt 85682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt back_to_cached(); 86682f88ab74e55dae55ea3bf30b46f56f71b793bdPaul Mundt local_irq_restore(flags); 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 89a7a7c0e1d12bcfb4a96cae439951232b08c91841Valentin Sitdikovstatic inline void flush_cache_one(unsigned long start, unsigned long phys) 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 91983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt unsigned long flags, exec_offset = 0; 9233573c0e3243aaa38b6ad96942de85a1b713c2ffPaul Mundt 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 941f69b6af9171f50135cce8023c84d82fbf42a8f5Matt Fleming * All types of SH-4 require PC to be uncached to operate on the I-cache. 951f69b6af9171f50135cce8023c84d82fbf42a8f5Matt Fleming * Some types of SH-4 require PC to be uncached to operate on the D-cache. 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 977ec9d6f8c0e6932d380da1964021fbebf2311f04Paul Mundt if ((boot_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) || 9833573c0e3243aaa38b6ad96942de85a1b713c2ffPaul Mundt (start < CACHE_OC_ADDRESS_ARRAY)) 991f69b6af9171f50135cce8023c84d82fbf42a8f5Matt Fleming exec_offset = cached_to_uncached; 10033573c0e3243aaa38b6ad96942de85a1b713c2ffPaul Mundt 101983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt local_irq_save(flags); 102a781d1e5ff6277f80ff3c9503775521bc64cf131Matt Fleming __flush_cache_one(start, phys, exec_offset); 103983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt local_irq_restore(flags); 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Write back & invalidate the D-cache of the page. 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (To avoid "alias" issues) 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 110e76a0136a3cf1859fbc07f122e42293d22229558Paul Mundtstatic void sh4_flush_dcache_page(void *arg) 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 112e76a0136a3cf1859fbc07f122e42293d22229558Paul Mundt struct page *page = arg; 113b4c892762373c5e59c7e8db35f5f9a7658602bdaMatt Fleming unsigned long addr = (unsigned long)page_address(page); 114c139a595878b0e8156476668e3d5c27b6aca7624Paul Mundt#ifndef CONFIG_SMP 1152277ab4a1df50e05bc732fe9488d4e902bb8399aPaul Mundt struct address_space *mapping = page_mapping(page); 1162277ab4a1df50e05bc732fe9488d4e902bb8399aPaul Mundt 1172277ab4a1df50e05bc732fe9488d4e902bb8399aPaul Mundt if (mapping && !mapping_mapped(mapping)) 11855661fc1f105ed75852e937bf8ea408270eb0ccaPaul Mundt clear_bit(PG_dcache_clean, &page->flags); 1192277ab4a1df50e05bc732fe9488d4e902bb8399aPaul Mundt else 1202277ab4a1df50e05bc732fe9488d4e902bb8399aPaul Mundt#endif 121b4c892762373c5e59c7e8db35f5f9a7658602bdaMatt Fleming flush_cache_one(CACHE_OC_ADDRESS_ARRAY | 122b4c892762373c5e59c7e8db35f5f9a7658602bdaMatt Fleming (addr & shm_align_mask), page_to_phys(page)); 123fdfc74f9fcebdda14609159d5010b758a9409acfPaul Mundt 124fdfc74f9fcebdda14609159d5010b758a9409acfPaul Mundt wmb(); 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12728ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt/* TODO: Selective icache invalidation through IC address array.. */ 1282dc2f8e0c46864e2a3722c84eaa96513d4cf8b2fPaul Mundtstatic void flush_icache_all(void) 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 130983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt unsigned long flags, ccr; 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 132983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt local_irq_save(flags); 133cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93Stuart Menefy jump_to_uncached(); 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Flush I-cache */ 1369d56dd3b083a3bec56e9da35ce07baca81030b03Paul Mundt ccr = __raw_readl(CCR); 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ccr |= CCR_CACHE_ICI; 1389d56dd3b083a3bec56e9da35ce07baca81030b03Paul Mundt __raw_writel(ccr, CCR); 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 140298476220d1f793ca0ac6c9e5dc817e1ad3e9851Paul Mundt /* 141cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93Stuart Menefy * back_to_cached() will take care of the barrier for us, don't add 142298476220d1f793ca0ac6c9e5dc817e1ad3e9851Paul Mundt * another one! 143298476220d1f793ca0ac6c9e5dc817e1ad3e9851Paul Mundt */ 144983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt 145cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93Stuart Menefy back_to_cached(); 146983f4c514c4c9ddac1077a2c805fd16cbe3f7487Paul Mundt local_irq_restore(flags); 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 149bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundtstatic void flush_dcache_all(void) 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 151bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt unsigned long addr, end_addr, entry_offset; 152bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt 153bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt end_addr = CACHE_OC_ADDRESS_ARRAY + 154bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt (current_cpu_data.dcache.sets << 155bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt current_cpu_data.dcache.entry_shift) * 156bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt current_cpu_data.dcache.ways; 157bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt 158bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt entry_offset = 1 << current_cpu_data.dcache.entry_shift; 159bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt 160bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt for (addr = CACHE_OC_ADDRESS_ARRAY; addr < end_addr; ) { 161bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt __raw_writel(0, addr); addr += entry_offset; 162bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt __raw_writel(0, addr); addr += entry_offset; 163bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt __raw_writel(0, addr); addr += entry_offset; 164bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt __raw_writel(0, addr); addr += entry_offset; 165bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt __raw_writel(0, addr); addr += entry_offset; 166bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt __raw_writel(0, addr); addr += entry_offset; 167bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt __raw_writel(0, addr); addr += entry_offset; 168bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt __raw_writel(0, addr); addr += entry_offset; 169bd6df57481b329dfeeb4889068848ee4f4761561Paul Mundt } 170a252710fc5b63b24934905ca47ecf661702d7f00Paul Mundt} 171a252710fc5b63b24934905ca47ecf661702d7f00Paul Mundt 172f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundtstatic void sh4_flush_cache_all(void *unused) 173a252710fc5b63b24934905ca47ecf661702d7f00Paul Mundt{ 174a252710fc5b63b24934905ca47ecf661702d7f00Paul Mundt flush_dcache_all(); 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_icache_all(); 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17828ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt/* 17928ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * Note : (RPC) since the caches are physically tagged, the only point 18028ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * of flush_cache_mm for SH-4 is to get rid of aliases from the 18128ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * D-cache. The assumption elsewhere, e.g. flush_cache_range, is that 18228ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * lines can stay resident so long as the virtual address they were 18328ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * accessed with (hence cache set) is in accord with the physical 184654d364e26c797e8a5f9e2a1393607e6ca0106ebPaul Mundt * address (i.e. tag). It's no different here. 18528ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * 18628ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt * Caller takes mm->mmap_sem. 18728ccf7f91b1ac42ee1f18480a69d2a7486b625cePaul Mundt */ 188f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundtstatic void sh4_flush_cache_mm(void *arg) 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 190f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt struct mm_struct *mm = arg; 191f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt 192e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT) 193e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt return; 194e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt 195654d364e26c797e8a5f9e2a1393607e6ca0106ebPaul Mundt flush_dcache_all(); 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Write back and invalidate I/D-caches for the page. 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * ADDR: Virtual Address (U0 address) 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PFN: Physical page number 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 204f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundtstatic void sh4_flush_cache_page(void *args) 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 206f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt struct flusher_data *data = args; 207f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt struct vm_area_struct *vma; 208deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt struct page *page; 209f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt unsigned long address, pfn, phys; 210deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt int map_coherent = 0; 211deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt pgd_t *pgd; 212deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt pud_t *pud; 213deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt pmd_t *pmd; 214deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt pte_t *pte; 215deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt void *vaddr; 216b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 217f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt vma = data->vma; 218abeaf33a4101764291ec79cf286e08c0966eb26ePaul Mundt address = data->addr1 & PAGE_MASK; 219f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt pfn = data->addr2; 220f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt phys = pfn << PAGE_SHIFT; 221deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt page = pfn_to_page(pfn); 222f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt 223e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT) 224e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt return; 225e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt 226deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt pgd = pgd_offset(vma->vm_mm, address); 227deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt pud = pud_offset(pgd, address); 228deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt pmd = pmd_offset(pud, address); 229deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt pte = pte_offset_kernel(pmd, address); 230deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt 231deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt /* If the page isn't present, there is nothing to do here. */ 232deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt if (!(pte_val(*pte) & _PAGE_PRESENT)) 233deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt return; 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 235deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt if ((vma->vm_mm == current->active_mm)) 236deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt vaddr = NULL; 237deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt else { 238b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow /* 239deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt * Use kmap_coherent or kmap_atomic to do flushes for 240deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt * another ASID than the current one. 241b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow */ 242deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt map_coherent = (current_cpu_data.dcache.n_aliases && 24355661fc1f105ed75852e937bf8ea408270eb0ccaPaul Mundt test_bit(PG_dcache_clean, &page->flags) && 244deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt page_mapped(page)); 245deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt if (map_coherent) 246deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt vaddr = kmap_coherent(page, address); 247deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt else 248bc3e11be88010e09692ed1d214407d56caa90075Cong Wang vaddr = kmap_atomic(page); 249deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt 250deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt address = (unsigned long)vaddr; 251deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt } 252deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt 253e717cc6c07f006be36e35189aacb28be4e30ad14Matt Fleming flush_cache_one(CACHE_OC_ADDRESS_ARRAY | 254deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt (address & shm_align_mask), phys); 255deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt 256deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt if (vma->vm_flags & VM_EXEC) 257deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt flush_icache_all(); 258deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt 259deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt if (vaddr) { 260deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt if (map_coherent) 261deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt kunmap_coherent(vaddr); 262deaef20e9789d93c06d2d3b5ffc99939814802caPaul Mundt else 263bc3e11be88010e09692ed1d214407d56caa90075Cong Wang kunmap_atomic(vaddr); 264b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow } 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Write back and invalidate D-caches. 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * START, END: Virtual Address (U0 address) 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * NOTE: We need to flush the _physical_ page entry. 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Flushing the cache lines for U0 only isn't enough. 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * We need to flush for P1 too, which may contain aliases. 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 276f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundtstatic void sh4_flush_cache_range(void *args) 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 278f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt struct flusher_data *data = args; 279f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt struct vm_area_struct *vma; 280f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt unsigned long start, end; 281f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt 282f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt vma = data->vma; 283f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt start = data->addr1; 284f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt end = data->addr2; 285f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt 286e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT) 287e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt return; 288e7b8b7f16edc9b363573eadf2ab2683473626071Paul Mundt 289b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow /* 290b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * If cache is only 4k-per-way, there are never any 'aliases'. Since 291b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * the cache is physically tagged, the data can just be left in there. 292b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow */ 2937ec9d6f8c0e6932d380da1964021fbebf2311f04Paul Mundt if (boot_cpu_data.dcache.n_aliases == 0) 294b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow return; 295b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 296654d364e26c797e8a5f9e2a1393607e6ca0106ebPaul Mundt flush_dcache_all(); 297b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 298654d364e26c797e8a5f9e2a1393607e6ca0106ebPaul Mundt if (vma->vm_flags & VM_EXEC) 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_icache_all(); 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 302b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow/** 303a7a7c0e1d12bcfb4a96cae439951232b08c91841Valentin Sitdikov * __flush_cache_one 304b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * 305b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * @addr: address in memory mapped cache array 306b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * @phys: P1 address to flush (has to match tags if addr has 'A' bit 307b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * set i.e. associative write) 308b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * @exec_offset: set to 0x20000000 if flush has to be executed from P2 309b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * region else 0x0 310b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * 311b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * The offset into the cache array implied by 'addr' selects the 312b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * 'colour' of the virtual address range that will be flushed. The 313b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * operation (purge/write-back) is selected by the lower 2 bits of 314b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * 'phys'. 315b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow */ 316a7a7c0e1d12bcfb4a96cae439951232b08c91841Valentin Sitdikovstatic void __flush_cache_one(unsigned long addr, unsigned long phys, 317b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow unsigned long exec_offset) 318b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow{ 319b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow int way_count; 320b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow unsigned long base_addr = addr; 321b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow struct cache_info *dcache; 322b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow unsigned long way_incr; 323b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow unsigned long a, ea, p; 324b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow unsigned long temp_pc; 325b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 3267ec9d6f8c0e6932d380da1964021fbebf2311f04Paul Mundt dcache = &boot_cpu_data.dcache; 327b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow /* Write this way for better assembly. */ 328b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow way_count = dcache->ways; 329b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow way_incr = dcache->way_incr; 330b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 331b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow /* 332b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * Apply exec_offset (i.e. branch to P2 if required.). 333b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * 334b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * FIXME: 335b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * 336b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * If I write "=r" for the (temp_pc), it puts this in r6 hence 337b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * trashing exec_offset before it's been added on - why? Hence 338b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * "=&r" as a 'workaround' 339b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow */ 340b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow asm volatile("mov.l 1f, %0\n\t" 341b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow "add %1, %0\n\t" 342b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow "jmp @%0\n\t" 343b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow "nop\n\t" 344b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow ".balign 4\n\t" 345b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow "1: .long 2f\n\t" 346b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow "2:\n" : "=&r" (temp_pc) : "r" (exec_offset)); 347b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 348b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow /* 349b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * We know there will be >=1 iteration, so write as do-while to avoid 350b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * pointless nead-of-loop check for 0 iterations. 351b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow */ 352b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow do { 353b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow ea = base_addr + PAGE_SIZE; 354b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow a = base_addr; 355b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow p = phys; 356b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 357b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow do { 358b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow *(volatile unsigned long *)a = p; 359b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow /* 360b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * Next line: intentionally not p+32, saves an add, p 361b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * will do since only the cache tag bits need to 362b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow * match. 363b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow */ 364b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow *(volatile unsigned long *)(a+32) = p; 365b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow a += 64; 366b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow p += 64; 367b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow } while (a < ea); 368b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 369b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow base_addr += way_incr; 370b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow } while (--way_count != 0); 371b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow} 372b638d0b921dc95229af0dfd09cd24850336a2f75Richard Curnow 37337443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundtextern void __weak sh4__flush_region_init(void); 37437443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt 37537443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt/* 37637443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt * SH-4 has virtually indexed and physically tagged cache. 37737443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt */ 37837443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundtvoid __init sh4_cache_init(void) 37937443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt{ 38037443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt printk("PVR=%08x CVR=%08x PRR=%08x\n", 3819d56dd3b083a3bec56e9da35ce07baca81030b03Paul Mundt __raw_readl(CCN_PVR), 3829d56dd3b083a3bec56e9da35ce07baca81030b03Paul Mundt __raw_readl(CCN_CVR), 3839d56dd3b083a3bec56e9da35ce07baca81030b03Paul Mundt __raw_readl(CCN_PRR)); 38437443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt 385f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt local_flush_icache_range = sh4_flush_icache_range; 386f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt local_flush_dcache_page = sh4_flush_dcache_page; 387f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt local_flush_cache_all = sh4_flush_cache_all; 388f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt local_flush_cache_mm = sh4_flush_cache_mm; 389f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt local_flush_cache_dup_mm = sh4_flush_cache_mm; 390f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt local_flush_cache_page = sh4_flush_cache_page; 391f26b2a562b46ab186c8383993ab1332673ac4a47Paul Mundt local_flush_cache_range = sh4_flush_cache_range; 39237443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt 39337443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt sh4__flush_region_init(); 39437443ef3f0406e855e169c87ae3f4ffb4b6ff635Paul Mundt} 395