1669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/* 2669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * pata_radisys.c - Intel PATA/SATA controllers 3669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 4ab77163008c596aad9624ceab190d840c0143fa8Alan Cox * (C) 2006 Red Hat <alan@lxorguk.ukuu.org.uk> 5669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 6669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Some parts based on ata_piix.c by Jeff Garzik and others. 7669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 8669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * A PIIX relative, this device has a single ATA channel and no 9669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * slave timings, SITRE or PPE. In that sense it is a close relative 10669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * of the original PIIX. It does however support UDMA 33/66 per channel 11669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * although no other modes/timings. Also lacking is 32bit I/O on the ATA 12669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * port. 13669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 14669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 15669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/kernel.h> 16669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/module.h> 17669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/pci.h> 18669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/init.h> 19669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/blkdev.h> 20669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/delay.h> 21669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/device.h> 22669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <scsi/scsi_host.h> 23669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/libata.h> 24669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#include <linux/ata.h> 25669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 26669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik#define DRV_NAME "pata_radisys" 27d36a76482c19c186aa638446def39ec643993955Alan Cox#define DRV_VERSION "0.4.4" 28669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 29669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 30669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * radisys_set_piomode - Initialize host controller PATA PIO timings 31d36a76482c19c186aa638446def39ec643993955Alan Cox * @ap: ATA port 32d36a76482c19c186aa638446def39ec643993955Alan Cox * @adev: Device whose timings we are configuring 33669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 34669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Set PIO mode for device, in host controller PCI config space. 35669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 36669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * LOCKING: 37669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * None (inherited from caller). 38669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 39669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 40669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev) 41669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 42669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik unsigned int pio = adev->pio_mode - XFER_PIO_0; 43669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct pci_dev *dev = to_pci_dev(ap->host->dev); 44669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u16 idetm_data; 45669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int control = 0; 46669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 47669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* 48669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * See Intel Document 298600-004 for the timing programing rules 49669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * for PIIX/ICH. Note that the early PIIX does not have the slave 50669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * timing port at 0x44. The Radisys is a relative of the PIIX 51669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * but not the same so be careful. 52669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 53669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 54669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik static const /* ISP RTC */ 55669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u8 timings[][2] = { { 0, 0 }, /* Check me */ 56669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 0, 0 }, 57669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 1, 1 }, 58669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 2, 2 }, 59669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 3, 3 }, }; 60669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 61669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (pio > 0) 62669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik control |= 1; /* TIME1 enable */ 63669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (ata_pio_need_iordy(adev)) 64669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik control |= 2; /* IE IORDY */ 65669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 66669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_read_config_word(dev, 0x40, &idetm_data); 67669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 68669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Enable IE and TIME as appropriate. Clear the other 69669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik drive timing bits */ 70669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik idetm_data &= 0xCCCC; 71669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik idetm_data |= (control << (4 * adev->devno)); 72669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik idetm_data |= (timings[pio][0] << 12) | 73669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik (timings[pio][1] << 8); 74669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_word(dev, 0x40, idetm_data); 75669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 76669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Track which port is configured */ 77669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ap->private_data = adev; 78669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 79669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 80669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 81669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * radisys_set_dmamode - Initialize host controller PATA DMA timings 82669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ap: Port whose timings we are configuring 83669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @adev: Device to program 84669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 85669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Set MWDMA mode for device, in host controller PCI config space. 86669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 87669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * LOCKING: 88669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * None (inherited from caller). 89669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 90669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 91669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev) 92669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 93669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct pci_dev *dev = to_pci_dev(ap->host->dev); 94669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u16 idetm_data; 95669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u8 udma_enable; 9685cd7251b9112e3dabeac9fd3b175601ca607241Jeff Garzik 97669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik static const /* ISP RTC */ 98669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u8 timings[][2] = { { 0, 0 }, 99669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 0, 0 }, 100669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 1, 1 }, 101669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 2, 2 }, 102669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { 3, 3 }, }; 103669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 104669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* 105669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * MWDMA is driven by the PIO timings. We must also enable 106669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * IORDY unconditionally. 107669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 108669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 109669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_read_config_word(dev, 0x40, &idetm_data); 110669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_read_config_byte(dev, 0x48, &udma_enable); 111669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 112669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 113669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; 114669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik const unsigned int needed_pio[3] = { 115669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 116669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }; 117669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int pio = needed_pio[mwdma] - XFER_PIO_0; 118669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik int control = 3; /* IORDY|TIME0 */ 119669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 120669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* If the drive MWDMA is faster than it can do PIO then 121669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik we must force PIO0 for PIO cycles. */ 122669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 123669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (adev->pio_mode < needed_pio[mwdma]) 124669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik control = 1; 125669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 126669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Mask out the relevant control and timing bits we will load. Also 127669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik clear the other drive TIME register as a precaution */ 12885cd7251b9112e3dabeac9fd3b175601ca607241Jeff Garzik 129669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik idetm_data &= 0xCCCC; 130669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik idetm_data |= control << (4 * adev->devno); 131669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8); 132669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 133669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik udma_enable &= ~(1 << adev->devno); 134669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } else { 135669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik u8 udma_mode; 13685cd7251b9112e3dabeac9fd3b175601ca607241Jeff Garzik 137669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */ 13885cd7251b9112e3dabeac9fd3b175601ca607241Jeff Garzik 139669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_read_config_byte(dev, 0x4A, &udma_mode); 14085cd7251b9112e3dabeac9fd3b175601ca607241Jeff Garzik 141669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (adev->xfer_mode == XFER_UDMA_2) 142dd4a43c979d5da7f2cd20e2751dbbd841116cdfeBartlomiej Zolnierkiewicz udma_mode &= ~(2 << (adev->devno * 4)); 143669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik else /* UDMA 4 */ 144dd4a43c979d5da7f2cd20e2751dbbd841116cdfeBartlomiej Zolnierkiewicz udma_mode |= (2 << (adev->devno * 4)); 14585cd7251b9112e3dabeac9fd3b175601ca607241Jeff Garzik 146669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(dev, 0x4A, udma_mode); 14785cd7251b9112e3dabeac9fd3b175601ca607241Jeff Garzik 148669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik udma_enable |= (1 << adev->devno); 149669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 150669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_word(dev, 0x40, idetm_data); 151669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_write_config_byte(dev, 0x48, udma_enable); 152669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 153669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* Track which port is configured */ 154669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik ap->private_data = adev; 155669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 156669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 157669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 1589363c3825ea9ad76561eb48a395349dd29211ed6Tejun Heo * radisys_qc_issue - command issue 159669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @qc: command pending 160669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 161669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Called when the libata layer is about to issue a command. We wrap 162669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * this interface so that we can load the correct ATA timings if 1633a4fa0a25da81600ea0bcd75692ae8ca6050d165Robert P. J. Day * necessary. Our logic also clears TIME0/TIME1 for the other device so 164669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * that, even if we get this wrong, cycles to the other device will 165669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * be made PIO0. 166669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 167669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 1689363c3825ea9ad76561eb48a395349dd29211ed6Tejun Heostatic unsigned int radisys_qc_issue(struct ata_queued_cmd *qc) 169669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 170669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct ata_port *ap = qc->ap; 171669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik struct ata_device *adev = qc->dev; 172669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 173669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (adev != ap->private_data) { 174669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik /* UDMA timing is not shared */ 175669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 176669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik if (adev->dma_mode) 177669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik radisys_set_dmamode(ap, adev); 178669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik else if (adev->pio_mode) 179669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik radisys_set_piomode(ap, adev); 180669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 181669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik } 182360ff7833098e944e5003618b03894251e937802Tejun Heo return ata_bmdma_qc_issue(qc); 183669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 184669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 185669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 186669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct scsi_host_template radisys_sht = { 18768d1d07b510bb57a504588adc2bd2758adea0965Tejun Heo ATA_BMDMA_SHT(DRV_NAME), 188669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 189669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 190029cfd6b74fc5c517865fad78cf4a3ea8d9b664aTejun Heostatic struct ata_port_operations radisys_pata_ops = { 191029cfd6b74fc5c517865fad78cf4a3ea8d9b664aTejun Heo .inherits = &ata_bmdma_port_ops, 1929363c3825ea9ad76561eb48a395349dd29211ed6Tejun Heo .qc_issue = radisys_qc_issue, 193029cfd6b74fc5c517865fad78cf4a3ea8d9b664aTejun Heo .cable_detect = ata_cable_unknown, 194669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_piomode = radisys_set_piomode, 195669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .set_dmamode = radisys_set_dmamode, 196669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 197669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 198669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 199669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik/** 200669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * radisys_init_one - Register PIIX ATA PCI device with kernel services 201669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @pdev: PCI device to register 202669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * @ent: Entry in radisys_pci_tbl matching with @pdev 203669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 204669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Called from kernel PCI layer. We probe for combined mode (sigh), 205669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * and then hand over control to libata, for it to do the rest. 206669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 207669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * LOCKING: 208669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Inherited from PCI layer (may sleep). 209669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * 210669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * RETURNS: 211669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik * Zero on success, or -ERRNO value. 212669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik */ 213669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 214669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 215669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 2161626aeb881236c8cb022b5e4ca594146a951d669Tejun Heo static const struct ata_port_info info = { 2171d2808fd3d2d5d2c0483796a0f443d1cb3f11367Jeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 21814bdef982caeda19afe34010482867c18217c641Erik Inge Bolsø .pio_mask = ATA_PIO4, 219aef37d8d80d8c027f03d362a97afe3f6a42bfbb4Erik Inge Bolsø .mwdma_mask = ATA_MWDMA12_ONLY, 22014bdef982caeda19afe34010482867c18217c641Erik Inge Bolsø .udma_mask = ATA_UDMA24_ONLY, 221669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .port_ops = &radisys_pata_ops, 222669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik }; 2231626aeb881236c8cb022b5e4ca594146a951d669Tejun Heo const struct ata_port_info *ppi[] = { &info, NULL }; 224669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 22506296a1e684bcd40b9a28d5d8030809e4295528bJoe Perches ata_print_version_once(&pdev->dev, DRV_VERSION); 226669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 2271c5afdf7a629d2e77de8dd043b97a33dcd7e6dfaTejun Heo return ata_pci_bmdma_init_one(pdev, ppi, &radisys_sht, NULL, 0); 228669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 229669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 230669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic const struct pci_device_id radisys_pci_tbl[] = { 2312d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik { PCI_VDEVICE(RADISYS, 0x8201), }, 2322d2744fc8be620a2dc469cf48349e3e704119f1bJeff Garzik 233669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik { } /* terminate list */ 234669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 235669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 236669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic struct pci_driver radisys_pci_driver = { 237669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .name = DRV_NAME, 238669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .id_table = radisys_pci_tbl, 239669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .probe = radisys_init_one, 240669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik .remove = ata_pci_remove_one, 241438ac6d5e3f8106a6bd1a5682c508d660294a85dTejun Heo#ifdef CONFIG_PM 24230ced0f0d211999f316930eff7287aa5a9995befAlan Cox .suspend = ata_pci_device_suspend, 24330ced0f0d211999f316930eff7287aa5a9995befAlan Cox .resume = ata_pci_device_resume, 244438ac6d5e3f8106a6bd1a5682c508d660294a85dTejun Heo#endif 245669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik}; 246669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 247669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic int __init radisys_init(void) 248669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 249669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik return pci_register_driver(&radisys_pci_driver); 250669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 251669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 252669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikstatic void __exit radisys_exit(void) 253669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik{ 254669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik pci_unregister_driver(&radisys_pci_driver); 255669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik} 256669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 257669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikmodule_init(radisys_init); 258669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzikmodule_exit(radisys_exit); 259669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 260669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_AUTHOR("Alan Cox"); 261669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers"); 262669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_LICENSE("GPL"); 263669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_DEVICE_TABLE(pci, radisys_pci_tbl); 264669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff GarzikMODULE_VERSION(DRV_VERSION); 265669a5db411d85a14f86cd92bc16bf7ab5b8aa235Jeff Garzik 266