sata_sil.c revision 24dc5f33ea4b504cfbd23fa159a4cacba8e4d800
11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * sata_sil.c - Silicon Image SATA 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Maintained by: Jeff Garzik <jgarzik@pobox.com> 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Please ALWAYS copy linux-ide@vger.kernel.org 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * on emails. 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 8af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * Copyright 2003-2005 Red Hat, Inc. 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright 2003 Benjamin Herrenschmidt 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 11af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * 12af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * This program is free software; you can redistribute it and/or modify 13af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * it under the terms of the GNU General Public License as published by 14af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * the Free Software Foundation; either version 2, or (at your option) 15af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * any later version. 16af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * 17af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * This program is distributed in the hope that it will be useful, 18af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * but WITHOUT ANY WARRANTY; without even the implied warranty of 19af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * GNU General Public License for more details. 21af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * 22af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * You should have received a copy of the GNU General Public License 23af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * along with this program; see the file COPYING. If not, write to 24af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * 26af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * 27af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * libata documentation is available via 'make {ps|pdf}docs', 28af36d7f0df56de3e3e4bbfb15d0915097ecb8cabJeff Garzik * as Documentation/DocBook/libata.* 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 30953d1137fc4aba16deace262e93974913596dcfeJeff Garzik * Documentation for SiI 3112: 31953d1137fc4aba16deace262e93974913596dcfeJeff Garzik * http://gkernel.sourceforge.net/specs/sii/3112A_SiI-DS-0095-B2.pdf.bz2 32953d1137fc4aba16deace262e93974913596dcfeJeff Garzik * 33953d1137fc4aba16deace262e93974913596dcfeJeff Garzik * Other errata and documentation available under NDA. 34953d1137fc4aba16deace262e93974913596dcfeJeff Garzik * 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/kernel.h> 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/module.h> 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/pci.h> 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/init.h> 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/blkdev.h> 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/delay.h> 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/interrupt.h> 44a9524a76f70f3343e4be27f95a7e92a8ba5f9009Jeff Garzik#include <linux/device.h> 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <scsi/scsi_host.h> 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/libata.h> 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DRV_NAME "sata_sil" 498676ce07d38a09e0f41497d178357a314c4620cfJeff Garzik#define DRV_VERSION "2.0" 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum { 52e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo /* 53e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo * host flags 54e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo */ 55201ce85946504ea0e6bd9a365de26684b437121eTejun Heo SIL_FLAG_NO_SATA_IRQ = (1 << 28), 56e4e10e3e7995f5bd481d2720bf30d3a661d110caTejun Heo SIL_FLAG_RERR_ON_DMA_ACT = (1 << 29), 57e4deec6304cbd5fd08bf573eccc68787945071c2Tejun Heo SIL_FLAG_MOD15WRITE = (1 << 30), 5820888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo 59cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik SIL_DFL_PORT_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 60e573890b00426189e1e223967a2c46fb758bf06eTejun Heo ATA_FLAG_MMIO | ATA_FLAG_HRST_TO_RESUME, 61e4deec6304cbd5fd08bf573eccc68787945071c2Tejun Heo 62e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo /* 63e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo * Controller IDs 64e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo */ 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sil_3112 = 0, 66201ce85946504ea0e6bd9a365de26684b437121eTejun Heo sil_3112_no_sata_irq = 1, 67201ce85946504ea0e6bd9a365de26684b437121eTejun Heo sil_3512 = 2, 68201ce85946504ea0e6bd9a365de26684b437121eTejun Heo sil_3114 = 3, 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 70e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo /* 71e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo * Register offsets 72e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo */ 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_SYSCFG = 0x48, 74e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo 75e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo /* 76e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo * Register bits 77e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo */ 78e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo /* SYSCFG */ 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_MASK_IDE0_INT = (1 << 22), 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_MASK_IDE1_INT = (1 << 23), 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_MASK_IDE2_INT = (1 << 24), 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_MASK_IDE3_INT = (1 << 25), 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_MASK_2PORT = SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT, 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_MASK_4PORT = SIL_MASK_2PORT | 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_MASK_IDE2_INT | SIL_MASK_IDE3_INT, 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 87e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo /* BMDMA/BMDMA2 */ 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_INTR_STEERING = (1 << 1), 89e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo 9020888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_ENABLE = (1 << 0), /* DMA run switch */ 9120888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_RDWR = (1 << 3), /* DMA Rd-Wr */ 9220888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_SATA_IRQ = (1 << 4), /* OR of all SATA IRQs */ 9320888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_ACTIVE = (1 << 16), /* DMA running */ 9420888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_ERROR = (1 << 17), /* PCI bus error */ 9520888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_COMPLETE = (1 << 18), /* cmd complete / IRQ pending */ 9620888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_N_SATA_IRQ = (1 << 6), /* SATA_IRQ for the next channel */ 9720888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_N_ACTIVE = (1 << 24), /* ACTIVE for the next channel */ 9820888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_N_ERROR = (1 << 25), /* ERROR for the next channel */ 9920888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_DMA_N_COMPLETE = (1 << 26), /* COMPLETE for the next channel */ 10020888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo 10120888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo /* SIEN */ 10220888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo SIL_SIEN_N = (1 << 16), /* triggered by SError.N */ 10320888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo 104e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo /* 105e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo * Others 106e653a1e6131d0a819288a2e2de654627233604e0Tejun Heo */ 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_QUIRK_MOD15WRITE = (1 << 0), 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIL_QUIRK_UDMA5MAX = (1 << 1), 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 112281d426c7e64286f433645e27862e7744b1e9310Alexey Dobriyan#ifdef CONFIG_PM 113afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heostatic int sil_pci_device_resume(struct pci_dev *pdev); 114281d426c7e64286f433645e27862e7744b1e9310Alexey Dobriyan#endif 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void sil_dev_config(struct ata_port *ap, struct ata_device *dev); 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg); 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void sil_post_set_mode (struct ata_port *ap); 1197d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic irqreturn_t sil_interrupt(int irq, void *dev_instance); 120f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heostatic void sil_freeze(struct ata_port *ap); 121f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heostatic void sil_thaw(struct ata_port *ap); 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 123374b1873571bf80dc0c1fcceaaad067980f3b9deJeff Garzik 1243b7d697dfb7d03edb87e50b743a7ecff029618e9Jeff Garzikstatic const struct pci_device_id sil_pci_tbl[] = { 12554bb3a94b192be09feb85993b664ff118d6433d0Jeff Garzik { PCI_VDEVICE(CMD, 0x3112), sil_3112 }, 12654bb3a94b192be09feb85993b664ff118d6433d0Jeff Garzik { PCI_VDEVICE(CMD, 0x0240), sil_3112 }, 12754bb3a94b192be09feb85993b664ff118d6433d0Jeff Garzik { PCI_VDEVICE(CMD, 0x3512), sil_3512 }, 12854bb3a94b192be09feb85993b664ff118d6433d0Jeff Garzik { PCI_VDEVICE(CMD, 0x3114), sil_3114 }, 12954bb3a94b192be09feb85993b664ff118d6433d0Jeff Garzik { PCI_VDEVICE(ATI, 0x436e), sil_3112 }, 13054bb3a94b192be09feb85993b664ff118d6433d0Jeff Garzik { PCI_VDEVICE(ATI, 0x4379), sil_3112_no_sata_irq }, 13154bb3a94b192be09feb85993b664ff118d6433d0Jeff Garzik { PCI_VDEVICE(ATI, 0x437a), sil_3112_no_sata_irq }, 13254bb3a94b192be09feb85993b664ff118d6433d0Jeff Garzik 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { } /* terminate list */ 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* TODO firmware versions should be added - eric */ 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic const struct sil_drivelist { 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds const char * product; 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int quirk; 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} sil_blacklist [] = { 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST320012AS", SIL_QUIRK_MOD15WRITE }, 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST330013AS", SIL_QUIRK_MOD15WRITE }, 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST340017AS", SIL_QUIRK_MOD15WRITE }, 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST360015AS", SIL_QUIRK_MOD15WRITE }, 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST380023AS", SIL_QUIRK_MOD15WRITE }, 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST3120023AS", SIL_QUIRK_MOD15WRITE }, 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST340014ASL", SIL_QUIRK_MOD15WRITE }, 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST360014ASL", SIL_QUIRK_MOD15WRITE }, 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST380011ASL", SIL_QUIRK_MOD15WRITE }, 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST3120022ASL", SIL_QUIRK_MOD15WRITE }, 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "ST3160021ASL", SIL_QUIRK_MOD15WRITE }, 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { "Maxtor 4D060H3", SIL_QUIRK_UDMA5MAX }, 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { } 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct pci_driver sil_pci_driver = { 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .name = DRV_NAME, 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .id_table = sil_pci_tbl, 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .probe = sil_init_one, 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .remove = ata_pci_remove_one, 162281d426c7e64286f433645e27862e7744b1e9310Alexey Dobriyan#ifdef CONFIG_PM 163afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo .suspend = ata_pci_device_suspend, 164afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo .resume = sil_pci_device_resume, 165281d426c7e64286f433645e27862e7744b1e9310Alexey Dobriyan#endif 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 168193515d51ccb363165d6b09e9ba5c21089e34badJeff Garzikstatic struct scsi_host_template sil_sht = { 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .module = THIS_MODULE, 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .name = DRV_NAME, 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .ioctl = ata_scsi_ioctl, 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .queuecommand = ata_scsi_queuecmd, 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .can_queue = ATA_DEF_QUEUE, 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .this_id = ATA_SHT_THIS_ID, 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .sg_tablesize = LIBATA_MAX_PRD, 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .emulated = ATA_SHT_EMULATED, 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .use_clustering = ATA_SHT_USE_CLUSTERING, 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .proc_name = DRV_NAME, 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .dma_boundary = ATA_DMA_BOUNDARY, 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .slave_configure = ata_scsi_slave_config, 182ccf68c3405fca11386004674377d951b9b18e756Tejun Heo .slave_destroy = ata_scsi_slave_destroy, 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .bios_param = ata_std_bios_param, 184afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo .suspend = ata_scsi_device_suspend, 185afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo .resume = ata_scsi_device_resume, 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 188057ace5e79da9ebf2aa82833cfea825533ac06fbJeff Garzikstatic const struct ata_port_operations sil_ops = { 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .port_disable = ata_port_disable, 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .dev_config = sil_dev_config, 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .tf_load = ata_tf_load, 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .tf_read = ata_tf_read, 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .check_status = ata_check_status, 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .exec_command = ata_exec_command, 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .dev_select = ata_std_dev_select, 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .post_set_mode = sil_post_set_mode, 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .bmdma_setup = ata_bmdma_setup, 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .bmdma_start = ata_bmdma_start, 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .bmdma_stop = ata_bmdma_stop, 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .bmdma_status = ata_bmdma_status, 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .qc_prep = ata_qc_prep, 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .qc_issue = ata_qc_issue_prot, 203a6b2c5d4754dc539a560fdf0d3fb78a14174394aAlan Cox .data_xfer = ata_mmio_data_xfer, 204f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo .freeze = sil_freeze, 205f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo .thaw = sil_thaw, 206f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo .error_handler = ata_bmdma_error_handler, 207f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo .post_internal_cmd = ata_bmdma_post_internal_cmd, 208cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo .irq_handler = sil_interrupt, 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .irq_clear = ata_bmdma_irq_clear, 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .scr_read = sil_scr_read, 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .scr_write = sil_scr_write, 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .port_start = ata_port_start, 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21598ac62defe529d04a192688f40d801a2d8fbcf98Arjan van de Venstatic const struct ata_port_info sil_port_info[] = { 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* sil_3112 */ 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .sht = &sil_sht, 219cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE, 220e4deec6304cbd5fd08bf573eccc68787945071c2Tejun Heo .pio_mask = 0x1f, /* pio0-4 */ 221e4deec6304cbd5fd08bf573eccc68787945071c2Tejun Heo .mwdma_mask = 0x07, /* mwdma0-2 */ 222e4deec6304cbd5fd08bf573eccc68787945071c2Tejun Heo .udma_mask = 0x3f, /* udma0-5 */ 223e4deec6304cbd5fd08bf573eccc68787945071c2Tejun Heo .port_ops = &sil_ops, 2240ee304d5802dc62746f13f12d4cb4ec4ed285f66Tejun Heo }, 225201ce85946504ea0e6bd9a365de26684b437121eTejun Heo /* sil_3112_no_sata_irq */ 226201ce85946504ea0e6bd9a365de26684b437121eTejun Heo { 227201ce85946504ea0e6bd9a365de26684b437121eTejun Heo .sht = &sil_sht, 228cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE | 229201ce85946504ea0e6bd9a365de26684b437121eTejun Heo SIL_FLAG_NO_SATA_IRQ, 230201ce85946504ea0e6bd9a365de26684b437121eTejun Heo .pio_mask = 0x1f, /* pio0-4 */ 231201ce85946504ea0e6bd9a365de26684b437121eTejun Heo .mwdma_mask = 0x07, /* mwdma0-2 */ 232201ce85946504ea0e6bd9a365de26684b437121eTejun Heo .udma_mask = 0x3f, /* udma0-5 */ 233201ce85946504ea0e6bd9a365de26684b437121eTejun Heo .port_ops = &sil_ops, 234201ce85946504ea0e6bd9a365de26684b437121eTejun Heo }, 2350ee304d5802dc62746f13f12d4cb4ec4ed285f66Tejun Heo /* sil_3512 */ 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .sht = &sil_sht, 238cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, 2390ee304d5802dc62746f13f12d4cb4ec4ed285f66Tejun Heo .pio_mask = 0x1f, /* pio0-4 */ 2400ee304d5802dc62746f13f12d4cb4ec4ed285f66Tejun Heo .mwdma_mask = 0x07, /* mwdma0-2 */ 2410ee304d5802dc62746f13f12d4cb4ec4ed285f66Tejun Heo .udma_mask = 0x3f, /* udma0-5 */ 2420ee304d5802dc62746f13f12d4cb4ec4ed285f66Tejun Heo .port_ops = &sil_ops, 2430ee304d5802dc62746f13f12d4cb4ec4ed285f66Tejun Heo }, 2440ee304d5802dc62746f13f12d4cb4ec4ed285f66Tejun Heo /* sil_3114 */ 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .sht = &sil_sht, 247cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .pio_mask = 0x1f, /* pio0-4 */ 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .mwdma_mask = 0x07, /* mwdma0-2 */ 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .udma_mask = 0x3f, /* udma0-5 */ 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .port_ops = &sil_ops, 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds }, 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* per-port register offsets */ 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* TODO: we can probably calculate rather than use a table */ 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic const struct { 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long tf; /* ATA taskfile register block */ 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long ctl; /* ATA control/altstatus register block */ 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long bmdma; /* DMA register block */ 26120888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo unsigned long bmdma2; /* DMA register block #2 */ 26248d4ef2a1df9867c67b515d66732ba028a73735dTejun Heo unsigned long fifo_cfg; /* FIFO Valid Byte Count and Control */ 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long scr; /* SATA control register block */ 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long sien; /* SATA Interrupt Enable register */ 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long xfer_mode;/* data transfer mode register */ 266e4e10e3e7995f5bd481d2720bf30d3a661d110caTejun Heo unsigned long sfis_cfg; /* SATA FIS reception config register */ 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} sil_port[] = { 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* port 0 ... */ 26920888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo { 0x80, 0x8A, 0x00, 0x10, 0x40, 0x100, 0x148, 0xb4, 0x14c }, 27020888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo { 0xC0, 0xCA, 0x08, 0x18, 0x44, 0x180, 0x1c8, 0xf4, 0x1cc }, 27120888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo { 0x280, 0x28A, 0x200, 0x210, 0x240, 0x300, 0x348, 0x2b4, 0x34c }, 27220888d83687d5cb374cdb5b0afa746ab79666f4eTejun Heo { 0x2C0, 0x2CA, 0x208, 0x218, 0x244, 0x380, 0x3c8, 0x2f4, 0x3cc }, 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* ... port 3 */ 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_AUTHOR("Jeff Garzik"); 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_DESCRIPTION("low-level driver for Silicon Image SATA controller"); 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_LICENSE("GPL"); 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_DEVICE_TABLE(pci, sil_pci_tbl); 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_VERSION(DRV_VERSION); 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 28251e9f2ff83df6b1c81c5c44f4486c68ed87aa20eJeff Garzikstatic int slow_down = 0; 28351e9f2ff83df6b1c81c5c44f4486c68ed87aa20eJeff Garzikmodule_param(slow_down, int, 0444); 28451e9f2ff83df6b1c81c5c44f4486c68ed87aa20eJeff GarzikMODULE_PARM_DESC(slow_down, "Sledgehammer used to work around random problems, by limiting commands to 15 sectors (0=off, 1=on)"); 28551e9f2ff83df6b1c81c5c44f4486c68ed87aa20eJeff Garzik 286374b1873571bf80dc0c1fcceaaad067980f3b9deJeff Garzik 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic unsigned char sil_get_device_cache_line(struct pci_dev *pdev) 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 cache_line = 0; 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line); 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return cache_line; 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void sil_post_set_mode (struct ata_port *ap) 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 296cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik struct ata_host *host = ap->host; 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct ata_device *dev; 298cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik void __iomem *addr = host->mmio_base + sil_port[ap->port_no].xfer_mode; 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 tmp, dev_mode[2]; 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int i; 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < 2; i++) { 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dev = &ap->device[i]; 304e1211e3fa7fd05ff0d4f597fd37e40de8acc6784Tejun Heo if (!ata_dev_enabled(dev)) 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dev_mode[i] = 0; /* PIO0/1/2 */ 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (dev->flags & ATA_DFLAG_PIO) 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dev_mode[i] = 1; /* PIO3/4 */ 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dev_mode[i] = 3; /* UDMA */ 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* value 2 indicates MDMA */ 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tmp = readl(addr); 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tmp &= ~((1<<5) | (1<<4) | (1<<1) | (1<<0)); 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tmp |= dev_mode[0]; 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tmp |= (dev_mode[1] << 4); 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(tmp, addr); 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(addr); /* flush */ 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned long sil_scr_addr(struct ata_port *ap, unsigned int sc_reg) 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long offset = ap->ioaddr.scr_addr; 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch (sc_reg) { 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case SCR_STATUS: 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return offset + 4; 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case SCR_ERROR: 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return offset + 8; 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case SCR_CONTROL: 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return offset; 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds default: 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* do nothing */ 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg) 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3429aa36e89b5677a98d951cf7bef6d99a0f93ea633Al Viro void __iomem *mmio = (void __iomem *) sil_scr_addr(ap, sc_reg); 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (mmio) 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return readl(mmio); 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0xffffffffU; 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 35004b1add1ab9121898b7d63570aad2a9c7ee9cfa3Al Viro void __iomem *mmio = (void __iomem *) sil_scr_addr(ap, sc_reg); 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (mmio) 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(val, mmio); 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 355cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heostatic void sil_host_intr(struct ata_port *ap, u32 bmdma2) 356cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo{ 357ea54763f8a7c51b9f8fcb14431812ae63fcbaf96Tejun Heo struct ata_eh_info *ehi = &ap->eh_info; 358cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag); 359cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo u8 status; 360cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 361e573890b00426189e1e223967a2c46fb758bf06eTejun Heo if (unlikely(bmdma2 & SIL_DMA_SATA_IRQ)) { 362d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo u32 serror; 363d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo 364d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo /* SIEN doesn't mask SATA IRQs on some 3112s. Those 365d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo * controllers continue to assert IRQ as long as 366d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo * SError bits are pending. Clear SError immediately. 367d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo */ 368d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo serror = sil_scr_read(ap, SCR_ERROR); 369d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo sil_scr_write(ap, SCR_ERROR, serror); 370d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo 371d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo /* Trigger hotplug and accumulate SError only if the 372d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo * port isn't already frozen. Otherwise, PHY events 373d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo * during hardreset makes controllers with broken SIEN 374d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo * repeat probing needlessly. 375d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo */ 376b51e9e5db0e36239f786692f1cac6e435ed30c66Tejun Heo if (!(ap->pflags & ATA_PFLAG_FROZEN)) { 377d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo ata_ehi_hotplugged(&ap->eh_info); 378d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo ap->eh_info.serror |= serror; 379d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo } 380d4c85325a817d3351e61c4be64b437116e8483b4Tejun Heo 381e573890b00426189e1e223967a2c46fb758bf06eTejun Heo goto freeze; 382e573890b00426189e1e223967a2c46fb758bf06eTejun Heo } 383e573890b00426189e1e223967a2c46fb758bf06eTejun Heo 384cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo if (unlikely(!qc || qc->tf.ctl & ATA_NIEN)) 385cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo goto freeze; 386cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 387cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo /* Check whether we are expecting interrupt in this state */ 388cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo switch (ap->hsm_task_state) { 389cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo case HSM_ST_FIRST: 390cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo /* Some pre-ATAPI-4 devices assert INTRQ 391cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo * at this state when ready to receive CDB. 392cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo */ 393cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 394cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo /* Check the ATA_DFLAG_CDB_INTR flag is enough here. 395cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo * The flag was turned on only for atapi devices. 396cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo * No need to check is_atapi_taskfile(&qc->tf) again. 397cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo */ 398cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 399cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo goto err_hsm; 400cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo break; 401cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo case HSM_ST_LAST: 402cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo if (qc->tf.protocol == ATA_PROT_DMA || 403cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo qc->tf.protocol == ATA_PROT_ATAPI_DMA) { 404cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo /* clear DMA-Start bit */ 405cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo ap->ops->bmdma_stop(qc); 406cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 407cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo if (bmdma2 & SIL_DMA_ERROR) { 408cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo qc->err_mask |= AC_ERR_HOST_BUS; 409cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo ap->hsm_task_state = HSM_ST_ERR; 410cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo } 411cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo } 412cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo break; 413cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo case HSM_ST: 414cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo break; 415cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo default: 416cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo goto err_hsm; 417cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo } 418cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 419cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo /* check main status, clearing INTRQ */ 420cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo status = ata_chk_status(ap); 421cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo if (unlikely(status & ATA_BUSY)) 422cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo goto err_hsm; 423cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 424cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo /* ack bmdma irq events */ 425cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo ata_bmdma_irq_clear(ap); 426cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 427cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo /* kick HSM in the ass */ 428cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo ata_hsm_move(ap, qc, status, 0); 429cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 430ea54763f8a7c51b9f8fcb14431812ae63fcbaf96Tejun Heo if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || 431ea54763f8a7c51b9f8fcb14431812ae63fcbaf96Tejun Heo qc->tf.protocol == ATA_PROT_ATAPI_DMA)) 432ea54763f8a7c51b9f8fcb14431812ae63fcbaf96Tejun Heo ata_ehi_push_desc(ehi, "BMDMA2 stat 0x%x", bmdma2); 433ea54763f8a7c51b9f8fcb14431812ae63fcbaf96Tejun Heo 434cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo return; 435cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 436cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo err_hsm: 437cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo qc->err_mask |= AC_ERR_HSM; 438cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo freeze: 439cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo ata_port_freeze(ap); 440cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo} 441cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 4427d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsstatic irqreturn_t sil_interrupt(int irq, void *dev_instance) 443cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo{ 444cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik struct ata_host *host = dev_instance; 445cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik void __iomem *mmio_base = host->mmio_base; 446cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo int handled = 0; 447cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo int i; 448cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 449cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik spin_lock(&host->lock); 450cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 451cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik for (i = 0; i < host->n_ports; i++) { 452cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik struct ata_port *ap = host->ports[i]; 453cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2); 454cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 455cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo if (unlikely(!ap || ap->flags & ATA_FLAG_DISABLED)) 456cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo continue; 457cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 458201ce85946504ea0e6bd9a365de26684b437121eTejun Heo /* turn off SATA_IRQ if not supported */ 459201ce85946504ea0e6bd9a365de26684b437121eTejun Heo if (ap->flags & SIL_FLAG_NO_SATA_IRQ) 460201ce85946504ea0e6bd9a365de26684b437121eTejun Heo bmdma2 &= ~SIL_DMA_SATA_IRQ; 461201ce85946504ea0e6bd9a365de26684b437121eTejun Heo 46223fa9618094975f803ed0c6a44604b16747b9637Tejun Heo if (bmdma2 == 0xffffffff || 46323fa9618094975f803ed0c6a44604b16747b9637Tejun Heo !(bmdma2 & (SIL_DMA_COMPLETE | SIL_DMA_SATA_IRQ))) 464cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo continue; 465cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 466cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo sil_host_intr(ap, bmdma2); 467cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo handled = 1; 468cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo } 469cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 470cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik spin_unlock(&host->lock); 471cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 472cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo return IRQ_RETVAL(handled); 473cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo} 474cbe88fbc72d9e1aa4a6f994cb6e19fa08ae5a0baTejun Heo 475f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heostatic void sil_freeze(struct ata_port *ap) 476f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo{ 477cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik void __iomem *mmio_base = ap->host->mmio_base; 478f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo u32 tmp; 479f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo 480e573890b00426189e1e223967a2c46fb758bf06eTejun Heo /* global IRQ mask doesn't block SATA IRQ, turn off explicitly */ 481e573890b00426189e1e223967a2c46fb758bf06eTejun Heo writel(0, mmio_base + sil_port[ap->port_no].sien); 482e573890b00426189e1e223967a2c46fb758bf06eTejun Heo 483f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo /* plug IRQ */ 484f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo tmp = readl(mmio_base + SIL_SYSCFG); 485f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo tmp |= SIL_MASK_IDE0_INT << ap->port_no; 486f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo writel(tmp, mmio_base + SIL_SYSCFG); 487f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo readl(mmio_base + SIL_SYSCFG); /* flush */ 488f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo} 489f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo 490f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heostatic void sil_thaw(struct ata_port *ap) 491f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo{ 492cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik void __iomem *mmio_base = ap->host->mmio_base; 493f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo u32 tmp; 494f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo 495f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo /* clear IRQ */ 496f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo ata_chk_status(ap); 497f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo ata_bmdma_irq_clear(ap); 498f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo 499201ce85946504ea0e6bd9a365de26684b437121eTejun Heo /* turn on SATA IRQ if supported */ 500201ce85946504ea0e6bd9a365de26684b437121eTejun Heo if (!(ap->flags & SIL_FLAG_NO_SATA_IRQ)) 501201ce85946504ea0e6bd9a365de26684b437121eTejun Heo writel(SIL_SIEN_N, mmio_base + sil_port[ap->port_no].sien); 502e573890b00426189e1e223967a2c46fb758bf06eTejun Heo 503f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo /* turn on IRQ */ 504f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo tmp = readl(mmio_base + SIL_SYSCFG); 505f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo tmp &= ~(SIL_MASK_IDE0_INT << ap->port_no); 506f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo writel(tmp, mmio_base + SIL_SYSCFG); 507f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo} 508f6aae27ed002ba9c0a98aff811dbde32ce749d28Tejun Heo 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/** 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * sil_dev_config - Apply device/host-specific errata fixups 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @ap: Port containing device to be examined 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @dev: Device to be examined 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * After the IDENTIFY [PACKET] DEVICE step is complete, and a 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * device is known to be present, this function is called. 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * We apply two errata fixups which are specific to Silicon Image, 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * a Seagate and a Maxtor fixup. 5181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * For certain Seagate devices, we must limit the maximum sectors 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * to under 8K. 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * For certain Maxtor devices, we must not program the drive 5231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * beyond udma5. 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Both fixups are unfairly pessimistic. As soon as I get more 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * information on these errata, I will create a more exhaustive 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * list, and apply the fixups to only the specific 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * devices/hosts/firmwares that need it. 5291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 20040111 - Seagate drives affected by the Mod15Write bug are blacklisted 5311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The Maxtor quirk is in the blacklist, but I'm keeping the original 5321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * pessimistic fix for the following reasons... 5331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * - There seems to be less info on it, only one device gleaned off the 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Windows driver, maybe only one is affected. More info would be greatly 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * appreciated. 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * - But then again UDMA5 is hardly anything to complain about 5371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void sil_dev_config(struct ata_port *ap, struct ata_device *dev) 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 540efdaedc443e935eda82e9e78a6e65d1f993d242fTejun Heo int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO; 5411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int n, quirks = 0; 542a0cf733b333eeeafb7324e2897448006c693c26cTejun Heo unsigned char model_num[ATA_ID_PROD_LEN + 1]; 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 544a0cf733b333eeeafb7324e2897448006c693c26cTejun Heo ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 5451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5468a60a07129fad60bba779a2a4038c7518b167fc7Jeff Garzik for (n = 0; sil_blacklist[n].product; n++) 5472e02671daa2cd69d93c828c40579bbe953f17210Tejun Heo if (!strcmp(sil_blacklist[n].product, model_num)) { 5481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds quirks = sil_blacklist[n].quirk; 5491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 5501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5518a60a07129fad60bba779a2a4038c7518b167fc7Jeff Garzik 5521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* limit requests to 15 sectors */ 55351e9f2ff83df6b1c81c5c44f4486c68ed87aa20eJeff Garzik if (slow_down || 55451e9f2ff83df6b1c81c5c44f4486c68ed87aa20eJeff Garzik ((ap->flags & SIL_FLAG_MOD15WRITE) && 55551e9f2ff83df6b1c81c5c44f4486c68ed87aa20eJeff Garzik (quirks & SIL_QUIRK_MOD15WRITE))) { 556efdaedc443e935eda82e9e78a6e65d1f993d242fTejun Heo if (print_info) 557efdaedc443e935eda82e9e78a6e65d1f993d242fTejun Heo ata_dev_printk(dev, KERN_INFO, "applying Seagate " 558efdaedc443e935eda82e9e78a6e65d1f993d242fTejun Heo "errata fix (mod15write workaround)\n"); 559b00eec1d58ee71131375bfeb86e64bceec3f5618Tejun Heo dev->max_sectors = 15; 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* limit to udma5 */ 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (quirks & SIL_QUIRK_UDMA5MAX) { 565efdaedc443e935eda82e9e78a6e65d1f993d242fTejun Heo if (print_info) 566efdaedc443e935eda82e9e78a6e65d1f993d242fTejun Heo ata_dev_printk(dev, KERN_INFO, "applying Maxtor " 567efdaedc443e935eda82e9e78a6e65d1f993d242fTejun Heo "errata fix %s\n", model_num); 5685a529139554f12cb265715117a2153c936286294Tejun Heo dev->udma_mask &= ATA_UDMA5; 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5733d8ec91352099b32a400f1952112dc076da28106Tejun Heostatic void sil_init_controller(struct pci_dev *pdev, 574cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik int n_ports, unsigned long port_flags, 5753d8ec91352099b32a400f1952112dc076da28106Tejun Heo void __iomem *mmio_base) 5763d8ec91352099b32a400f1952112dc076da28106Tejun Heo{ 5773d8ec91352099b32a400f1952112dc076da28106Tejun Heo u8 cls; 5783d8ec91352099b32a400f1952112dc076da28106Tejun Heo u32 tmp; 5793d8ec91352099b32a400f1952112dc076da28106Tejun Heo int i; 5803d8ec91352099b32a400f1952112dc076da28106Tejun Heo 5813d8ec91352099b32a400f1952112dc076da28106Tejun Heo /* Initialize FIFO PCI bus arbitration */ 5823d8ec91352099b32a400f1952112dc076da28106Tejun Heo cls = sil_get_device_cache_line(pdev); 5833d8ec91352099b32a400f1952112dc076da28106Tejun Heo if (cls) { 5843d8ec91352099b32a400f1952112dc076da28106Tejun Heo cls >>= 3; 5853d8ec91352099b32a400f1952112dc076da28106Tejun Heo cls++; /* cls = (line_size/8)+1 */ 5863d8ec91352099b32a400f1952112dc076da28106Tejun Heo for (i = 0; i < n_ports; i++) 5873d8ec91352099b32a400f1952112dc076da28106Tejun Heo writew(cls << 8 | cls, 5883d8ec91352099b32a400f1952112dc076da28106Tejun Heo mmio_base + sil_port[i].fifo_cfg); 5893d8ec91352099b32a400f1952112dc076da28106Tejun Heo } else 5903d8ec91352099b32a400f1952112dc076da28106Tejun Heo dev_printk(KERN_WARNING, &pdev->dev, 5913d8ec91352099b32a400f1952112dc076da28106Tejun Heo "cache line size not set. Driver may not function\n"); 5923d8ec91352099b32a400f1952112dc076da28106Tejun Heo 5933d8ec91352099b32a400f1952112dc076da28106Tejun Heo /* Apply R_ERR on DMA activate FIS errata workaround */ 594cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik if (port_flags & SIL_FLAG_RERR_ON_DMA_ACT) { 5953d8ec91352099b32a400f1952112dc076da28106Tejun Heo int cnt; 5963d8ec91352099b32a400f1952112dc076da28106Tejun Heo 5973d8ec91352099b32a400f1952112dc076da28106Tejun Heo for (i = 0, cnt = 0; i < n_ports; i++) { 5983d8ec91352099b32a400f1952112dc076da28106Tejun Heo tmp = readl(mmio_base + sil_port[i].sfis_cfg); 5993d8ec91352099b32a400f1952112dc076da28106Tejun Heo if ((tmp & 0x3) != 0x01) 6003d8ec91352099b32a400f1952112dc076da28106Tejun Heo continue; 6013d8ec91352099b32a400f1952112dc076da28106Tejun Heo if (!cnt) 6023d8ec91352099b32a400f1952112dc076da28106Tejun Heo dev_printk(KERN_INFO, &pdev->dev, 6033d8ec91352099b32a400f1952112dc076da28106Tejun Heo "Applying R_ERR on DMA activate " 6043d8ec91352099b32a400f1952112dc076da28106Tejun Heo "FIS errata fix\n"); 6053d8ec91352099b32a400f1952112dc076da28106Tejun Heo writel(tmp & ~0x3, mmio_base + sil_port[i].sfis_cfg); 6063d8ec91352099b32a400f1952112dc076da28106Tejun Heo cnt++; 6073d8ec91352099b32a400f1952112dc076da28106Tejun Heo } 6083d8ec91352099b32a400f1952112dc076da28106Tejun Heo } 6093d8ec91352099b32a400f1952112dc076da28106Tejun Heo 6103d8ec91352099b32a400f1952112dc076da28106Tejun Heo if (n_ports == 4) { 6113d8ec91352099b32a400f1952112dc076da28106Tejun Heo /* flip the magic "make 4 ports work" bit */ 6123d8ec91352099b32a400f1952112dc076da28106Tejun Heo tmp = readl(mmio_base + sil_port[2].bmdma); 6133d8ec91352099b32a400f1952112dc076da28106Tejun Heo if ((tmp & SIL_INTR_STEERING) == 0) 6143d8ec91352099b32a400f1952112dc076da28106Tejun Heo writel(tmp | SIL_INTR_STEERING, 6153d8ec91352099b32a400f1952112dc076da28106Tejun Heo mmio_base + sil_port[2].bmdma); 6163d8ec91352099b32a400f1952112dc076da28106Tejun Heo } 6173d8ec91352099b32a400f1952112dc076da28106Tejun Heo} 6183d8ec91352099b32a400f1952112dc076da28106Tejun Heo 6191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds static int printed_version; 62224dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo struct device *dev = &pdev->dev; 62324dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo struct ata_probe_ent *probe_ent; 6241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long base; 625ea6ba10bbb88e106f9e2db7dc253993bb3bbbe3bJeff Garzik void __iomem *mmio_base; 6261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 6271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int i; 6281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!printed_version++) 630a9524a76f70f3343e4be27f95a7e92a8ba5f9009Jeff Garzik dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 6311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 63224dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo rc = pcim_enable_device(pdev); 6331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (rc) 6341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 6351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = pci_request_regions(pdev, DRV_NAME); 6371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (rc) { 63824dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo pcim_pin_device(pdev); 63924dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo return rc; 6401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 6431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (rc) 64424dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo return rc; 6451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); 6461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (rc) 64724dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo return rc; 6481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 64924dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL); 65024dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo if (probe_ent == NULL) 65124dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo return -ENOMEM; 6521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds INIT_LIST_HEAD(&probe_ent->node); 6541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->dev = pci_dev_to_dev(pdev); 6551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->port_ops = sil_port_info[ent->driver_data].port_ops; 6561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->sht = sil_port_info[ent->driver_data].sht; 6571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->n_ports = (ent->driver_data == sil_3114) ? 4 : 2; 6581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->pio_mask = sil_port_info[ent->driver_data].pio_mask; 6591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->mwdma_mask = sil_port_info[ent->driver_data].mwdma_mask; 6601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->udma_mask = sil_port_info[ent->driver_data].udma_mask; 6611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->irq = pdev->irq; 6621d6f359a2e06296418481239f8054a878f36e819Thomas Gleixner probe_ent->irq_flags = IRQF_SHARED; 663cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik probe_ent->port_flags = sil_port_info[ent->driver_data].flags; 6641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 66524dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo mmio_base = pcim_iomap(pdev, 5, 0); 66624dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo if (mmio_base == NULL) 66724dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo return -ENOMEM; 6681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->mmio_base = mmio_base; 6701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds base = (unsigned long) mmio_base; 6721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < probe_ent->n_ports; i++) { 6741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->port[i].cmd_addr = base + sil_port[i].tf; 6751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->port[i].altstatus_addr = 6761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->port[i].ctl_addr = base + sil_port[i].ctl; 6771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->port[i].bmdma_addr = base + sil_port[i].bmdma; 6781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds probe_ent->port[i].scr_addr = base + sil_port[i].scr; 6791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ata_std_ports(&probe_ent->port[i]); 6801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 682cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik sil_init_controller(pdev, probe_ent->n_ports, probe_ent->port_flags, 6833d8ec91352099b32a400f1952112dc076da28106Tejun Heo mmio_base); 6841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pci_set_master(pdev); 6861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 68724dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo if (!ata_device_add(probe_ent)) 68824dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo return -ENODEV; 6891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 69024dc5f33ea4b504cfbd23fa159a4cacba8e4d800Tejun Heo devm_kfree(dev, probe_ent); 6911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 6921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 694281d426c7e64286f433645e27862e7744b1e9310Alexey Dobriyan#ifdef CONFIG_PM 695afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heostatic int sil_pci_device_resume(struct pci_dev *pdev) 696afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo{ 697cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik struct ata_host *host = dev_get_drvdata(&pdev->dev); 698553c4aa630af7bc885e056d0436e4eb7f238579bTejun Heo int rc; 699553c4aa630af7bc885e056d0436e4eb7f238579bTejun Heo 700553c4aa630af7bc885e056d0436e4eb7f238579bTejun Heo rc = ata_pci_device_do_resume(pdev); 701553c4aa630af7bc885e056d0436e4eb7f238579bTejun Heo if (rc) 702553c4aa630af7bc885e056d0436e4eb7f238579bTejun Heo return rc; 703afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo 704cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik sil_init_controller(pdev, host->n_ports, host->ports[0]->flags, 705cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik host->mmio_base); 706cca3974e48607c3775dc73b544a5700b2e37c21aJeff Garzik ata_host_resume(host); 707afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo 708afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo return 0; 709afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo} 710281d426c7e64286f433645e27862e7744b1e9310Alexey Dobriyan#endif 711afb5a7cb84b1ea8b6045945e3d288303e6b71336Tejun Heo 7121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int __init sil_init(void) 7131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 714b7887196e38da54ff893897b80875d632d1a1114Pavel Roskin return pci_register_driver(&sil_pci_driver); 7151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void __exit sil_exit(void) 7181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pci_unregister_driver(&sil_pci_driver); 7201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmodule_init(sil_init); 7241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmodule_exit(sil_exit); 725