1/*
2 * Broadcom specific AMBA
3 * Core ops
4 *
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
7
8#include "bcma_private.h"
9#include <linux/export.h>
10#include <linux/bcma/bcma.h>
11
12bool bcma_core_is_enabled(struct bcma_device *core)
13{
14	if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC))
15	    != BCMA_IOCTL_CLK)
16		return false;
17	if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
18		return false;
19	return true;
20}
21EXPORT_SYMBOL_GPL(bcma_core_is_enabled);
22
23void bcma_core_disable(struct bcma_device *core, u32 flags)
24{
25	if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
26		return;
27
28	bcma_awrite32(core, BCMA_IOCTL, flags);
29	bcma_aread32(core, BCMA_IOCTL);
30	udelay(10);
31
32	bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
33	udelay(1);
34}
35EXPORT_SYMBOL_GPL(bcma_core_disable);
36
37int bcma_core_enable(struct bcma_device *core, u32 flags)
38{
39	bcma_core_disable(core, flags);
40
41	bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags));
42	bcma_aread32(core, BCMA_IOCTL);
43
44	bcma_awrite32(core, BCMA_RESET_CTL, 0);
45	udelay(1);
46
47	bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags));
48	bcma_aread32(core, BCMA_IOCTL);
49	udelay(1);
50
51	return 0;
52}
53EXPORT_SYMBOL_GPL(bcma_core_enable);
54
55void bcma_core_set_clockmode(struct bcma_device *core,
56			     enum bcma_clkmode clkmode)
57{
58	u16 i;
59
60	WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON &&
61		core->id.id != BCMA_CORE_PCIE &&
62		core->id.id != BCMA_CORE_80211);
63
64	switch (clkmode) {
65	case BCMA_CLKMODE_FAST:
66		bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
67		udelay(64);
68		for (i = 0; i < 1500; i++) {
69			if (bcma_read32(core, BCMA_CLKCTLST) &
70			    BCMA_CLKCTLST_HAVEHT) {
71				i = 0;
72				break;
73			}
74			udelay(10);
75		}
76		if (i)
77			pr_err("HT force timeout\n");
78		break;
79	case BCMA_CLKMODE_DYNAMIC:
80		pr_warn("Dynamic clockmode not supported yet!\n");
81		break;
82	}
83}
84EXPORT_SYMBOL_GPL(bcma_core_set_clockmode);
85
86void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
87{
88	u16 i;
89
90	WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ);
91	WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST);
92
93	if (on) {
94		bcma_set32(core, BCMA_CLKCTLST, req);
95		for (i = 0; i < 10000; i++) {
96			if ((bcma_read32(core, BCMA_CLKCTLST) & status) ==
97			    status) {
98				i = 0;
99				break;
100			}
101			udelay(10);
102		}
103		if (i)
104			pr_err("PLL enable timeout\n");
105	} else {
106		pr_warn("Disabling PLL not supported yet!\n");
107	}
108}
109EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
110
111u32 bcma_core_dma_translation(struct bcma_device *core)
112{
113	switch (core->bus->hosttype) {
114	case BCMA_HOSTTYPE_SOC:
115		return 0;
116	case BCMA_HOSTTYPE_PCI:
117		if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
118			return BCMA_DMA_TRANSLATION_DMA64_CMT;
119		else
120			return BCMA_DMA_TRANSLATION_DMA32_CMT;
121	default:
122		pr_err("DMA translation unknown for host %d\n",
123		       core->bus->hosttype);
124	}
125	return BCMA_DMA_TRANSLATION_NONE;
126}
127EXPORT_SYMBOL(bcma_core_dma_translation);
128