scan.c revision 5f2d6171e1e70584b9819771443485750453fd16
1/*
2 * Broadcom specific AMBA
3 * Bus scanning
4 *
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
7
8#include "scan.h"
9#include "bcma_private.h"
10
11#include <linux/bcma/bcma.h>
12#include <linux/bcma/bcma_regs.h>
13#include <linux/pci.h>
14#include <linux/io.h>
15#include <linux/dma-mapping.h>
16#include <linux/slab.h>
17
18struct bcma_device_id_name {
19	u16 id;
20	const char *name;
21};
22struct bcma_device_id_name bcma_device_names[] = {
23	{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
24	{ BCMA_CORE_INVALID, "Invalid" },
25	{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
26	{ BCMA_CORE_ILINE20, "ILine 20" },
27	{ BCMA_CORE_SRAM, "SRAM" },
28	{ BCMA_CORE_SDRAM, "SDRAM" },
29	{ BCMA_CORE_PCI, "PCI" },
30	{ BCMA_CORE_MIPS, "MIPS" },
31	{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
32	{ BCMA_CORE_V90, "V90" },
33	{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
34	{ BCMA_CORE_ADSL, "ADSL" },
35	{ BCMA_CORE_ILINE100, "ILine 100" },
36	{ BCMA_CORE_IPSEC, "IPSEC" },
37	{ BCMA_CORE_UTOPIA, "UTOPIA" },
38	{ BCMA_CORE_PCMCIA, "PCMCIA" },
39	{ BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
40	{ BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
41	{ BCMA_CORE_OFDM, "OFDM" },
42	{ BCMA_CORE_EXTIF, "EXTIF" },
43	{ BCMA_CORE_80211, "IEEE 802.11" },
44	{ BCMA_CORE_PHY_A, "PHY A" },
45	{ BCMA_CORE_PHY_B, "PHY B" },
46	{ BCMA_CORE_PHY_G, "PHY G" },
47	{ BCMA_CORE_MIPS_3302, "MIPS 3302" },
48	{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
49	{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
50	{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
51	{ BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
52	{ BCMA_CORE_SDIO_HOST, "SDIO Host" },
53	{ BCMA_CORE_ROBOSWITCH, "Roboswitch" },
54	{ BCMA_CORE_PARA_ATA, "PATA" },
55	{ BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
56	{ BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
57	{ BCMA_CORE_PCIE, "PCIe" },
58	{ BCMA_CORE_PHY_N, "PHY N" },
59	{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
60	{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
61	{ BCMA_CORE_ARM_1176, "ARM 1176" },
62	{ BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
63	{ BCMA_CORE_PHY_LP, "PHY LP" },
64	{ BCMA_CORE_PMU, "PMU" },
65	{ BCMA_CORE_PHY_SSN, "PHY SSN" },
66	{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
67	{ BCMA_CORE_ARM_CM3, "ARM CM3" },
68	{ BCMA_CORE_PHY_HT, "PHY HT" },
69	{ BCMA_CORE_MIPS_74K, "MIPS 74K" },
70	{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
71	{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
72	{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
73	{ BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
74	{ BCMA_CORE_SHARED_COMMON, "Common Shared" },
75	{ BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
76	{ BCMA_CORE_SPI_HOST, "SPI Host" },
77	{ BCMA_CORE_I2S, "I2S" },
78	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
79	{ BCMA_CORE_SHIM, "SHIM" },
80	{ BCMA_CORE_DEFAULT, "Default" },
81};
82const char *bcma_device_name(struct bcma_device_id *id)
83{
84	int i;
85
86	if (id->manuf == BCMA_MANUF_BCM) {
87		for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
88			if (bcma_device_names[i].id == id->id)
89				return bcma_device_names[i].name;
90		}
91	}
92	return "UNKNOWN";
93}
94
95static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
96		       u16 offset)
97{
98	return readl(bus->mmio + offset);
99}
100
101static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
102{
103	if (bus->hosttype == BCMA_HOSTTYPE_PCI)
104		pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
105				       addr);
106}
107
108static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 **eromptr)
109{
110	u32 ent = readl(*eromptr);
111	(*eromptr)++;
112	return ent;
113}
114
115static void bcma_erom_push_ent(u32 **eromptr)
116{
117	(*eromptr)--;
118}
119
120static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 **eromptr)
121{
122	u32 ent = bcma_erom_get_ent(bus, eromptr);
123	if (!(ent & SCAN_ER_VALID))
124		return -ENOENT;
125	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
126		return -ENOENT;
127	return ent;
128}
129
130static bool bcma_erom_is_end(struct bcma_bus *bus, u32 **eromptr)
131{
132	u32 ent = bcma_erom_get_ent(bus, eromptr);
133	bcma_erom_push_ent(eromptr);
134	return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
135}
136
137static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr)
138{
139	u32 ent = bcma_erom_get_ent(bus, eromptr);
140	bcma_erom_push_ent(eromptr);
141	return (((ent & SCAN_ER_VALID)) &&
142		((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
143		((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
144}
145
146static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr)
147{
148	u32 ent;
149	while (1) {
150		ent = bcma_erom_get_ent(bus, eromptr);
151		if ((ent & SCAN_ER_VALID) &&
152		    ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
153			break;
154		if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
155			break;
156	}
157	bcma_erom_push_ent(eromptr);
158}
159
160static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr)
161{
162	u32 ent = bcma_erom_get_ent(bus, eromptr);
163	if (!(ent & SCAN_ER_VALID))
164		return -ENOENT;
165	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
166		return -ENOENT;
167	return ent;
168}
169
170static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
171				  u32 type, u8 port)
172{
173	u32 addrl, addrh, sizel, sizeh = 0;
174	u32 size;
175
176	u32 ent = bcma_erom_get_ent(bus, eromptr);
177	if ((!(ent & SCAN_ER_VALID)) ||
178	    ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
179	    ((ent & SCAN_ADDR_TYPE) != type) ||
180	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
181		bcma_erom_push_ent(eromptr);
182		return -EINVAL;
183	}
184
185	addrl = ent & SCAN_ADDR_ADDR;
186	if (ent & SCAN_ADDR_AG32)
187		addrh = bcma_erom_get_ent(bus, eromptr);
188	else
189		addrh = 0;
190
191	if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
192		size = bcma_erom_get_ent(bus, eromptr);
193		sizel = size & SCAN_SIZE_SZ;
194		if (size & SCAN_SIZE_SG32)
195			sizeh = bcma_erom_get_ent(bus, eromptr);
196	} else
197		sizel = SCAN_ADDR_SZ_BASE <<
198				((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
199
200	return addrl;
201}
202
203static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus,
204						   u16 index)
205{
206	struct bcma_device *core;
207
208	list_for_each_entry(core, &bus->cores, list) {
209		if (core->core_index == index)
210			return core;
211	}
212	return NULL;
213}
214
215static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid)
216{
217	struct bcma_device *core;
218
219	list_for_each_entry_reverse(core, &bus->cores, list) {
220		if (core->id.id == coreid)
221			return core;
222	}
223	return NULL;
224}
225
226static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
227			      struct bcma_device_id *match, int core_num,
228			      struct bcma_device *core)
229{
230	s32 tmp;
231	u8 i, j;
232	s32 cia, cib;
233	u8 ports[2], wrappers[2];
234
235	/* get CIs */
236	cia = bcma_erom_get_ci(bus, eromptr);
237	if (cia < 0) {
238		bcma_erom_push_ent(eromptr);
239		if (bcma_erom_is_end(bus, eromptr))
240			return -ESPIPE;
241		return -EILSEQ;
242	}
243	cib = bcma_erom_get_ci(bus, eromptr);
244	if (cib < 0)
245		return -EILSEQ;
246
247	/* parse CIs */
248	core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
249	core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
250	core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
251	ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
252	ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
253	wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
254	wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
255	core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
256
257	if (((core->id.manuf == BCMA_MANUF_ARM) &&
258	     (core->id.id == 0xFFF)) ||
259	    (ports[1] == 0)) {
260		bcma_erom_skip_component(bus, eromptr);
261		return -ENXIO;
262	}
263
264	/* check if component is a core at all */
265	if (wrappers[0] + wrappers[1] == 0) {
266		/* we could save addrl of the router
267		if (cid == BCMA_CORE_OOB_ROUTER)
268		 */
269		bcma_erom_skip_component(bus, eromptr);
270		return -ENXIO;
271	}
272
273	if (bcma_erom_is_bridge(bus, eromptr)) {
274		bcma_erom_skip_component(bus, eromptr);
275		return -ENXIO;
276	}
277
278	if (bcma_find_core_by_index(bus, core_num)) {
279		bcma_erom_skip_component(bus, eromptr);
280		return -ENODEV;
281	}
282
283	if (match && ((match->manuf != BCMA_ANY_MANUF &&
284	      match->manuf != core->id.manuf) ||
285	     (match->id != BCMA_ANY_ID && match->id != core->id.id) ||
286	     (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) ||
287	     (match->class != BCMA_ANY_CLASS && match->class != core->id.class)
288	    )) {
289		bcma_erom_skip_component(bus, eromptr);
290		return -ENODEV;
291	}
292
293	/* get & parse master ports */
294	for (i = 0; i < ports[0]; i++) {
295		s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
296		if (mst_port_d < 0)
297			return -EILSEQ;
298	}
299
300	/* get & parse slave ports */
301	for (i = 0; i < ports[1]; i++) {
302		for (j = 0; ; j++) {
303			tmp = bcma_erom_get_addr_desc(bus, eromptr,
304				SCAN_ADDR_TYPE_SLAVE, i);
305			if (tmp < 0) {
306				/* no more entries for port _i_ */
307				/* pr_debug("erom: slave port %d "
308				 * "has %d descriptors\n", i, j); */
309				break;
310			} else {
311				if (i == 0 && j == 0)
312					core->addr = tmp;
313			}
314		}
315	}
316
317	/* get & parse master wrappers */
318	for (i = 0; i < wrappers[0]; i++) {
319		for (j = 0; ; j++) {
320			tmp = bcma_erom_get_addr_desc(bus, eromptr,
321				SCAN_ADDR_TYPE_MWRAP, i);
322			if (tmp < 0) {
323				/* no more entries for port _i_ */
324				/* pr_debug("erom: master wrapper %d "
325				 * "has %d descriptors\n", i, j); */
326				break;
327			} else {
328				if (i == 0 && j == 0)
329					core->wrap = tmp;
330			}
331		}
332	}
333
334	/* get & parse slave wrappers */
335	for (i = 0; i < wrappers[1]; i++) {
336		u8 hack = (ports[1] == 1) ? 0 : 1;
337		for (j = 0; ; j++) {
338			tmp = bcma_erom_get_addr_desc(bus, eromptr,
339				SCAN_ADDR_TYPE_SWRAP, i + hack);
340			if (tmp < 0) {
341				/* no more entries for port _i_ */
342				/* pr_debug("erom: master wrapper %d "
343				 * has %d descriptors\n", i, j); */
344				break;
345			} else {
346				if (wrappers[0] == 0 && !i && !j)
347					core->wrap = tmp;
348			}
349		}
350	}
351	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
352		core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
353		if (!core->io_addr)
354			return -ENOMEM;
355		core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE);
356		if (!core->io_wrap) {
357			iounmap(core->io_addr);
358			return -ENOMEM;
359		}
360	}
361	return 0;
362}
363
364void bcma_init_bus(struct bcma_bus *bus)
365{
366	s32 tmp;
367
368	if (bus->init_done)
369		return;
370
371	INIT_LIST_HEAD(&bus->cores);
372	bus->nr_cores = 0;
373
374	bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
375
376	tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
377	bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
378	bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
379	bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
380	bus->init_done = true;
381}
382
383int bcma_bus_scan(struct bcma_bus *bus)
384{
385	u32 erombase;
386	u32 __iomem *eromptr, *eromend;
387
388	int err, core_num = 0;
389
390	bcma_init_bus(bus);
391
392	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
393	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
394		eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
395		if (!eromptr)
396			return -ENOMEM;
397	} else {
398		eromptr = bus->mmio;
399	}
400
401	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
402
403	bcma_scan_switch_core(bus, erombase);
404
405	while (eromptr < eromend) {
406		struct bcma_device *other_core;
407		struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
408		if (!core)
409			return -ENOMEM;
410		INIT_LIST_HEAD(&core->list);
411		core->bus = bus;
412
413		err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core);
414		if (err == -ENODEV) {
415			core_num++;
416			continue;
417		} else if (err == -ENXIO)
418			continue;
419		else if (err == -ESPIPE)
420			break;
421		else if (err < 0)
422			return err;
423
424		core->core_index = core_num++;
425		bus->nr_cores++;
426		other_core = bcma_find_core_reverse(bus, core->id.id);
427		core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
428
429		pr_info("Core %d found: %s "
430			"(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
431			core->core_index, bcma_device_name(&core->id),
432			core->id.manuf, core->id.id, core->id.rev,
433			core->id.class);
434
435		list_add(&core->list, &bus->cores);
436	}
437
438	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
439		iounmap(eromptr);
440
441	return 0;
442}
443
444int __init bcma_bus_scan_early(struct bcma_bus *bus,
445			       struct bcma_device_id *match,
446			       struct bcma_device *core)
447{
448	u32 erombase;
449	u32 __iomem *eromptr, *eromend;
450
451	int err = -ENODEV;
452	int core_num = 0;
453
454	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
455	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
456		eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
457		if (!eromptr)
458			return -ENOMEM;
459	} else {
460		eromptr = bus->mmio;
461	}
462
463	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
464
465	bcma_scan_switch_core(bus, erombase);
466
467	while (eromptr < eromend) {
468		memset(core, 0, sizeof(*core));
469		INIT_LIST_HEAD(&core->list);
470		core->bus = bus;
471
472		err = bcma_get_next_core(bus, &eromptr, match, core_num, core);
473		if (err == -ENODEV) {
474			core_num++;
475			continue;
476		} else if (err == -ENXIO)
477			continue;
478		else if (err == -ESPIPE)
479			break;
480		else if (err < 0)
481			return err;
482
483		core->core_index = core_num++;
484		bus->nr_cores++;
485		pr_info("Core %d found: %s "
486			"(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
487			core->core_index, bcma_device_name(&core->id),
488			core->id.manuf, core->id.id, core->id.rev,
489			core->id.class);
490
491		list_add(&core->list, &bus->cores);
492		err = 0;
493		break;
494	}
495
496	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
497		iounmap(eromptr);
498
499	return err;
500}
501