cciss.c revision 16011131ced8bdb317e1bf03324ca78a27fa0a1c
1/* 2 * Disk Array driver for HP Smart Array controllers. 3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 17 * 02111-1307, USA. 18 * 19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 20 * 21 */ 22 23#include <linux/module.h> 24#include <linux/interrupt.h> 25#include <linux/types.h> 26#include <linux/pci.h> 27#include <linux/kernel.h> 28#include <linux/slab.h> 29#include <linux/delay.h> 30#include <linux/major.h> 31#include <linux/fs.h> 32#include <linux/bio.h> 33#include <linux/blkpg.h> 34#include <linux/timer.h> 35#include <linux/proc_fs.h> 36#include <linux/seq_file.h> 37#include <linux/init.h> 38#include <linux/jiffies.h> 39#include <linux/hdreg.h> 40#include <linux/spinlock.h> 41#include <linux/compat.h> 42#include <linux/mutex.h> 43#include <asm/uaccess.h> 44#include <asm/io.h> 45 46#include <linux/dma-mapping.h> 47#include <linux/blkdev.h> 48#include <linux/genhd.h> 49#include <linux/completion.h> 50#include <scsi/scsi.h> 51#include <scsi/sg.h> 52#include <scsi/scsi_ioctl.h> 53#include <linux/cdrom.h> 54#include <linux/scatterlist.h> 55#include <linux/kthread.h> 56 57#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) 58#define DRIVER_NAME "HP CISS Driver (v 3.6.26)" 59#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26) 60 61/* Embedded module documentation macros - see modules.h */ 62MODULE_AUTHOR("Hewlett-Packard Company"); 63MODULE_DESCRIPTION("Driver for HP Smart Array Controllers"); 64MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 65MODULE_VERSION("3.6.26"); 66MODULE_LICENSE("GPL"); 67 68static DEFINE_MUTEX(cciss_mutex); 69static struct proc_dir_entry *proc_cciss; 70 71#include "cciss_cmd.h" 72#include "cciss.h" 73#include <linux/cciss_ioctl.h> 74 75/* define the PCI info for the cards we can control */ 76static const struct pci_device_id cciss_pci_device_id[] = { 77 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070}, 78 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080}, 79 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082}, 80 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083}, 81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091}, 82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A}, 83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B}, 84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C}, 85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D}, 86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225}, 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223}, 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234}, 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235}, 90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211}, 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212}, 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213}, 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D}, 97 {0,} 98}; 99 100MODULE_DEVICE_TABLE(pci, cciss_pci_device_id); 101 102/* board_id = Subsystem Device ID & Vendor ID 103 * product = Marketing Name for the board 104 * access = Address of the struct of function pointers 105 */ 106static struct board_type products[] = { 107 {0x40700E11, "Smart Array 5300", &SA5_access}, 108 {0x40800E11, "Smart Array 5i", &SA5B_access}, 109 {0x40820E11, "Smart Array 532", &SA5B_access}, 110 {0x40830E11, "Smart Array 5312", &SA5B_access}, 111 {0x409A0E11, "Smart Array 641", &SA5_access}, 112 {0x409B0E11, "Smart Array 642", &SA5_access}, 113 {0x409C0E11, "Smart Array 6400", &SA5_access}, 114 {0x409D0E11, "Smart Array 6400 EM", &SA5_access}, 115 {0x40910E11, "Smart Array 6i", &SA5_access}, 116 {0x3225103C, "Smart Array P600", &SA5_access}, 117 {0x3223103C, "Smart Array P800", &SA5_access}, 118 {0x3234103C, "Smart Array P400", &SA5_access}, 119 {0x3235103C, "Smart Array P400i", &SA5_access}, 120 {0x3211103C, "Smart Array E200i", &SA5_access}, 121 {0x3212103C, "Smart Array E200", &SA5_access}, 122 {0x3213103C, "Smart Array E200i", &SA5_access}, 123 {0x3214103C, "Smart Array E200i", &SA5_access}, 124 {0x3215103C, "Smart Array E200i", &SA5_access}, 125 {0x3237103C, "Smart Array E500", &SA5_access}, 126 {0x3223103C, "Smart Array P800", &SA5_access}, 127 {0x3234103C, "Smart Array P400", &SA5_access}, 128 {0x323D103C, "Smart Array P700m", &SA5_access}, 129}; 130 131/* How long to wait (in milliseconds) for board to go into simple mode */ 132#define MAX_CONFIG_WAIT 30000 133#define MAX_IOCTL_CONFIG_WAIT 1000 134 135/*define how many times we will try a command because of bus resets */ 136#define MAX_CMD_RETRIES 3 137 138#define MAX_CTLR 32 139 140/* Originally cciss driver only supports 8 major numbers */ 141#define MAX_CTLR_ORIG 8 142 143static ctlr_info_t *hba[MAX_CTLR]; 144 145static struct task_struct *cciss_scan_thread; 146static DEFINE_MUTEX(scan_mutex); 147static LIST_HEAD(scan_q); 148 149static void do_cciss_request(struct request_queue *q); 150static irqreturn_t do_cciss_intx(int irq, void *dev_id); 151static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id); 152static int cciss_open(struct block_device *bdev, fmode_t mode); 153static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode); 154static int cciss_release(struct gendisk *disk, fmode_t mode); 155static int do_ioctl(struct block_device *bdev, fmode_t mode, 156 unsigned int cmd, unsigned long arg); 157static int cciss_ioctl(struct block_device *bdev, fmode_t mode, 158 unsigned int cmd, unsigned long arg); 159static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo); 160 161static int cciss_revalidate(struct gendisk *disk); 162static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl); 163static int deregister_disk(ctlr_info_t *h, int drv_index, 164 int clear_all, int via_ioctl); 165 166static void cciss_read_capacity(ctlr_info_t *h, int logvol, 167 sector_t *total_size, unsigned int *block_size); 168static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, 169 sector_t *total_size, unsigned int *block_size); 170static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, 171 sector_t total_size, 172 unsigned int block_size, InquiryData_struct *inq_buff, 173 drive_info_struct *drv); 174static void __devinit cciss_interrupt_mode(ctlr_info_t *); 175static void start_io(ctlr_info_t *h); 176static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, 177 __u8 page_code, unsigned char scsi3addr[], 178 int cmd_type); 179static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, 180 int attempt_retry); 181static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c); 182 183static int add_to_scan_list(struct ctlr_info *h); 184static int scan_thread(void *data); 185static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c); 186static void cciss_hba_release(struct device *dev); 187static void cciss_device_release(struct device *dev); 188static void cciss_free_gendisk(ctlr_info_t *h, int drv_index); 189static void cciss_free_drive_info(ctlr_info_t *h, int drv_index); 190static inline u32 next_command(ctlr_info_t *h); 191static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, 192 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 193 u64 *cfg_offset); 194static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev, 195 unsigned long *memory_bar); 196static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag); 197 198/* performant mode helper functions */ 199static void calc_bucket_map(int *bucket, int num_buckets, int nsgs, 200 int *bucket_map); 201static void cciss_put_controller_into_performant_mode(ctlr_info_t *h); 202 203#ifdef CONFIG_PROC_FS 204static void cciss_procinit(ctlr_info_t *h); 205#else 206static void cciss_procinit(ctlr_info_t *h) 207{ 208} 209#endif /* CONFIG_PROC_FS */ 210 211#ifdef CONFIG_COMPAT 212static int cciss_compat_ioctl(struct block_device *, fmode_t, 213 unsigned, unsigned long); 214#endif 215 216static const struct block_device_operations cciss_fops = { 217 .owner = THIS_MODULE, 218 .open = cciss_unlocked_open, 219 .release = cciss_release, 220 .ioctl = do_ioctl, 221 .getgeo = cciss_getgeo, 222#ifdef CONFIG_COMPAT 223 .compat_ioctl = cciss_compat_ioctl, 224#endif 225 .revalidate_disk = cciss_revalidate, 226}; 227 228/* set_performant_mode: Modify the tag for cciss performant 229 * set bit 0 for pull model, bits 3-1 for block fetch 230 * register number 231 */ 232static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c) 233{ 234 if (likely(h->transMethod & CFGTBL_Trans_Performant)) 235 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 236} 237 238/* 239 * Enqueuing and dequeuing functions for cmdlists. 240 */ 241static inline void addQ(struct list_head *list, CommandList_struct *c) 242{ 243 list_add_tail(&c->list, list); 244} 245 246static inline void removeQ(CommandList_struct *c) 247{ 248 /* 249 * After kexec/dump some commands might still 250 * be in flight, which the firmware will try 251 * to complete. Resetting the firmware doesn't work 252 * with old fw revisions, so we have to mark 253 * them off as 'stale' to prevent the driver from 254 * falling over. 255 */ 256 if (WARN_ON(list_empty(&c->list))) { 257 c->cmd_type = CMD_MSG_STALE; 258 return; 259 } 260 261 list_del_init(&c->list); 262} 263 264static void enqueue_cmd_and_start_io(ctlr_info_t *h, 265 CommandList_struct *c) 266{ 267 unsigned long flags; 268 set_performant_mode(h, c); 269 spin_lock_irqsave(&h->lock, flags); 270 addQ(&h->reqQ, c); 271 h->Qdepth++; 272 if (h->Qdepth > h->maxQsinceinit) 273 h->maxQsinceinit = h->Qdepth; 274 start_io(h); 275 spin_unlock_irqrestore(&h->lock, flags); 276} 277 278static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list, 279 int nr_cmds) 280{ 281 int i; 282 283 if (!cmd_sg_list) 284 return; 285 for (i = 0; i < nr_cmds; i++) { 286 kfree(cmd_sg_list[i]); 287 cmd_sg_list[i] = NULL; 288 } 289 kfree(cmd_sg_list); 290} 291 292static SGDescriptor_struct **cciss_allocate_sg_chain_blocks( 293 ctlr_info_t *h, int chainsize, int nr_cmds) 294{ 295 int j; 296 SGDescriptor_struct **cmd_sg_list; 297 298 if (chainsize <= 0) 299 return NULL; 300 301 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL); 302 if (!cmd_sg_list) 303 return NULL; 304 305 /* Build up chain blocks for each command */ 306 for (j = 0; j < nr_cmds; j++) { 307 /* Need a block of chainsized s/g elements. */ 308 cmd_sg_list[j] = kmalloc((chainsize * 309 sizeof(*cmd_sg_list[j])), GFP_KERNEL); 310 if (!cmd_sg_list[j]) { 311 dev_err(&h->pdev->dev, "Cannot get memory " 312 "for s/g chains.\n"); 313 goto clean; 314 } 315 } 316 return cmd_sg_list; 317clean: 318 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds); 319 return NULL; 320} 321 322static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c) 323{ 324 SGDescriptor_struct *chain_sg; 325 u64bit temp64; 326 327 if (c->Header.SGTotal <= h->max_cmd_sgentries) 328 return; 329 330 chain_sg = &c->SG[h->max_cmd_sgentries - 1]; 331 temp64.val32.lower = chain_sg->Addr.lower; 332 temp64.val32.upper = chain_sg->Addr.upper; 333 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); 334} 335 336static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c, 337 SGDescriptor_struct *chain_block, int len) 338{ 339 SGDescriptor_struct *chain_sg; 340 u64bit temp64; 341 342 chain_sg = &c->SG[h->max_cmd_sgentries - 1]; 343 chain_sg->Ext = CCISS_SG_CHAIN; 344 chain_sg->Len = len; 345 temp64.val = pci_map_single(h->pdev, chain_block, len, 346 PCI_DMA_TODEVICE); 347 chain_sg->Addr.lower = temp64.val32.lower; 348 chain_sg->Addr.upper = temp64.val32.upper; 349} 350 351#include "cciss_scsi.c" /* For SCSI tape support */ 352 353static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 354 "UNKNOWN" 355}; 356#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1) 357 358#ifdef CONFIG_PROC_FS 359 360/* 361 * Report information about this controller. 362 */ 363#define ENG_GIG 1000000000 364#define ENG_GIG_FACTOR (ENG_GIG/512) 365#define ENGAGE_SCSI "engage scsi" 366 367static void cciss_seq_show_header(struct seq_file *seq) 368{ 369 ctlr_info_t *h = seq->private; 370 371 seq_printf(seq, "%s: HP %s Controller\n" 372 "Board ID: 0x%08lx\n" 373 "Firmware Version: %c%c%c%c\n" 374 "IRQ: %d\n" 375 "Logical drives: %d\n" 376 "Current Q depth: %d\n" 377 "Current # commands on controller: %d\n" 378 "Max Q depth since init: %d\n" 379 "Max # commands on controller since init: %d\n" 380 "Max SG entries since init: %d\n", 381 h->devname, 382 h->product_name, 383 (unsigned long)h->board_id, 384 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2], 385 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT], 386 h->num_luns, 387 h->Qdepth, h->commands_outstanding, 388 h->maxQsinceinit, h->max_outstanding, h->maxSG); 389 390#ifdef CONFIG_CISS_SCSI_TAPE 391 cciss_seq_tape_report(seq, h); 392#endif /* CONFIG_CISS_SCSI_TAPE */ 393} 394 395static void *cciss_seq_start(struct seq_file *seq, loff_t *pos) 396{ 397 ctlr_info_t *h = seq->private; 398 unsigned long flags; 399 400 /* prevent displaying bogus info during configuration 401 * or deconfiguration of a logical volume 402 */ 403 spin_lock_irqsave(&h->lock, flags); 404 if (h->busy_configuring) { 405 spin_unlock_irqrestore(&h->lock, flags); 406 return ERR_PTR(-EBUSY); 407 } 408 h->busy_configuring = 1; 409 spin_unlock_irqrestore(&h->lock, flags); 410 411 if (*pos == 0) 412 cciss_seq_show_header(seq); 413 414 return pos; 415} 416 417static int cciss_seq_show(struct seq_file *seq, void *v) 418{ 419 sector_t vol_sz, vol_sz_frac; 420 ctlr_info_t *h = seq->private; 421 unsigned ctlr = h->ctlr; 422 loff_t *pos = v; 423 drive_info_struct *drv = h->drv[*pos]; 424 425 if (*pos > h->highest_lun) 426 return 0; 427 428 if (drv == NULL) /* it's possible for h->drv[] to have holes. */ 429 return 0; 430 431 if (drv->heads == 0) 432 return 0; 433 434 vol_sz = drv->nr_blocks; 435 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR); 436 vol_sz_frac *= 100; 437 sector_div(vol_sz_frac, ENG_GIG_FACTOR); 438 439 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN) 440 drv->raid_level = RAID_UNKNOWN; 441 seq_printf(seq, "cciss/c%dd%d:" 442 "\t%4u.%02uGB\tRAID %s\n", 443 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac, 444 raid_label[drv->raid_level]); 445 return 0; 446} 447 448static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos) 449{ 450 ctlr_info_t *h = seq->private; 451 452 if (*pos > h->highest_lun) 453 return NULL; 454 *pos += 1; 455 456 return pos; 457} 458 459static void cciss_seq_stop(struct seq_file *seq, void *v) 460{ 461 ctlr_info_t *h = seq->private; 462 463 /* Only reset h->busy_configuring if we succeeded in setting 464 * it during cciss_seq_start. */ 465 if (v == ERR_PTR(-EBUSY)) 466 return; 467 468 h->busy_configuring = 0; 469} 470 471static const struct seq_operations cciss_seq_ops = { 472 .start = cciss_seq_start, 473 .show = cciss_seq_show, 474 .next = cciss_seq_next, 475 .stop = cciss_seq_stop, 476}; 477 478static int cciss_seq_open(struct inode *inode, struct file *file) 479{ 480 int ret = seq_open(file, &cciss_seq_ops); 481 struct seq_file *seq = file->private_data; 482 483 if (!ret) 484 seq->private = PDE(inode)->data; 485 486 return ret; 487} 488 489static ssize_t 490cciss_proc_write(struct file *file, const char __user *buf, 491 size_t length, loff_t *ppos) 492{ 493 int err; 494 char *buffer; 495 496#ifndef CONFIG_CISS_SCSI_TAPE 497 return -EINVAL; 498#endif 499 500 if (!buf || length > PAGE_SIZE - 1) 501 return -EINVAL; 502 503 buffer = (char *)__get_free_page(GFP_KERNEL); 504 if (!buffer) 505 return -ENOMEM; 506 507 err = -EFAULT; 508 if (copy_from_user(buffer, buf, length)) 509 goto out; 510 buffer[length] = '\0'; 511 512#ifdef CONFIG_CISS_SCSI_TAPE 513 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) { 514 struct seq_file *seq = file->private_data; 515 ctlr_info_t *h = seq->private; 516 517 err = cciss_engage_scsi(h); 518 if (err == 0) 519 err = length; 520 } else 521#endif /* CONFIG_CISS_SCSI_TAPE */ 522 err = -EINVAL; 523 /* might be nice to have "disengage" too, but it's not 524 safely possible. (only 1 module use count, lock issues.) */ 525 526out: 527 free_page((unsigned long)buffer); 528 return err; 529} 530 531static const struct file_operations cciss_proc_fops = { 532 .owner = THIS_MODULE, 533 .open = cciss_seq_open, 534 .read = seq_read, 535 .llseek = seq_lseek, 536 .release = seq_release, 537 .write = cciss_proc_write, 538}; 539 540static void __devinit cciss_procinit(ctlr_info_t *h) 541{ 542 struct proc_dir_entry *pde; 543 544 if (proc_cciss == NULL) 545 proc_cciss = proc_mkdir("driver/cciss", NULL); 546 if (!proc_cciss) 547 return; 548 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP | 549 S_IROTH, proc_cciss, 550 &cciss_proc_fops, h); 551} 552#endif /* CONFIG_PROC_FS */ 553 554#define MAX_PRODUCT_NAME_LEN 19 555 556#define to_hba(n) container_of(n, struct ctlr_info, dev) 557#define to_drv(n) container_of(n, drive_info_struct, dev) 558 559/* List of controllers which cannot be reset on kexec with reset_devices */ 560static u32 unresettable_controller[] = { 561 0x324a103C, /* Smart Array P712m */ 562 0x324b103C, /* SmartArray P711m */ 563 0x3223103C, /* Smart Array P800 */ 564 0x3234103C, /* Smart Array P400 */ 565 0x3235103C, /* Smart Array P400i */ 566 0x3211103C, /* Smart Array E200i */ 567 0x3212103C, /* Smart Array E200 */ 568 0x3213103C, /* Smart Array E200i */ 569 0x3214103C, /* Smart Array E200i */ 570 0x3215103C, /* Smart Array E200i */ 571 0x3237103C, /* Smart Array E500 */ 572 0x323D103C, /* Smart Array P700m */ 573 0x409C0E11, /* Smart Array 6400 */ 574 0x409D0E11, /* Smart Array 6400 EM */ 575}; 576 577static int ctlr_is_resettable(struct ctlr_info *h) 578{ 579 int i; 580 581 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 582 if (unresettable_controller[i] == h->board_id) 583 return 0; 584 return 1; 585} 586 587static ssize_t host_show_resettable(struct device *dev, 588 struct device_attribute *attr, 589 char *buf) 590{ 591 struct ctlr_info *h = to_hba(dev); 592 593 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h)); 594} 595static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL); 596 597static ssize_t host_store_rescan(struct device *dev, 598 struct device_attribute *attr, 599 const char *buf, size_t count) 600{ 601 struct ctlr_info *h = to_hba(dev); 602 603 add_to_scan_list(h); 604 wake_up_process(cciss_scan_thread); 605 wait_for_completion_interruptible(&h->scan_wait); 606 607 return count; 608} 609static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 610 611static ssize_t dev_show_unique_id(struct device *dev, 612 struct device_attribute *attr, 613 char *buf) 614{ 615 drive_info_struct *drv = to_drv(dev); 616 struct ctlr_info *h = to_hba(drv->dev.parent); 617 __u8 sn[16]; 618 unsigned long flags; 619 int ret = 0; 620 621 spin_lock_irqsave(&h->lock, flags); 622 if (h->busy_configuring) 623 ret = -EBUSY; 624 else 625 memcpy(sn, drv->serial_no, sizeof(sn)); 626 spin_unlock_irqrestore(&h->lock, flags); 627 628 if (ret) 629 return ret; 630 else 631 return snprintf(buf, 16 * 2 + 2, 632 "%02X%02X%02X%02X%02X%02X%02X%02X" 633 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 634 sn[0], sn[1], sn[2], sn[3], 635 sn[4], sn[5], sn[6], sn[7], 636 sn[8], sn[9], sn[10], sn[11], 637 sn[12], sn[13], sn[14], sn[15]); 638} 639static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL); 640 641static ssize_t dev_show_vendor(struct device *dev, 642 struct device_attribute *attr, 643 char *buf) 644{ 645 drive_info_struct *drv = to_drv(dev); 646 struct ctlr_info *h = to_hba(drv->dev.parent); 647 char vendor[VENDOR_LEN + 1]; 648 unsigned long flags; 649 int ret = 0; 650 651 spin_lock_irqsave(&h->lock, flags); 652 if (h->busy_configuring) 653 ret = -EBUSY; 654 else 655 memcpy(vendor, drv->vendor, VENDOR_LEN + 1); 656 spin_unlock_irqrestore(&h->lock, flags); 657 658 if (ret) 659 return ret; 660 else 661 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor); 662} 663static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL); 664 665static ssize_t dev_show_model(struct device *dev, 666 struct device_attribute *attr, 667 char *buf) 668{ 669 drive_info_struct *drv = to_drv(dev); 670 struct ctlr_info *h = to_hba(drv->dev.parent); 671 char model[MODEL_LEN + 1]; 672 unsigned long flags; 673 int ret = 0; 674 675 spin_lock_irqsave(&h->lock, flags); 676 if (h->busy_configuring) 677 ret = -EBUSY; 678 else 679 memcpy(model, drv->model, MODEL_LEN + 1); 680 spin_unlock_irqrestore(&h->lock, flags); 681 682 if (ret) 683 return ret; 684 else 685 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model); 686} 687static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL); 688 689static ssize_t dev_show_rev(struct device *dev, 690 struct device_attribute *attr, 691 char *buf) 692{ 693 drive_info_struct *drv = to_drv(dev); 694 struct ctlr_info *h = to_hba(drv->dev.parent); 695 char rev[REV_LEN + 1]; 696 unsigned long flags; 697 int ret = 0; 698 699 spin_lock_irqsave(&h->lock, flags); 700 if (h->busy_configuring) 701 ret = -EBUSY; 702 else 703 memcpy(rev, drv->rev, REV_LEN + 1); 704 spin_unlock_irqrestore(&h->lock, flags); 705 706 if (ret) 707 return ret; 708 else 709 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev); 710} 711static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL); 712 713static ssize_t cciss_show_lunid(struct device *dev, 714 struct device_attribute *attr, char *buf) 715{ 716 drive_info_struct *drv = to_drv(dev); 717 struct ctlr_info *h = to_hba(drv->dev.parent); 718 unsigned long flags; 719 unsigned char lunid[8]; 720 721 spin_lock_irqsave(&h->lock, flags); 722 if (h->busy_configuring) { 723 spin_unlock_irqrestore(&h->lock, flags); 724 return -EBUSY; 725 } 726 if (!drv->heads) { 727 spin_unlock_irqrestore(&h->lock, flags); 728 return -ENOTTY; 729 } 730 memcpy(lunid, drv->LunID, sizeof(lunid)); 731 spin_unlock_irqrestore(&h->lock, flags); 732 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 733 lunid[0], lunid[1], lunid[2], lunid[3], 734 lunid[4], lunid[5], lunid[6], lunid[7]); 735} 736static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL); 737 738static ssize_t cciss_show_raid_level(struct device *dev, 739 struct device_attribute *attr, char *buf) 740{ 741 drive_info_struct *drv = to_drv(dev); 742 struct ctlr_info *h = to_hba(drv->dev.parent); 743 int raid; 744 unsigned long flags; 745 746 spin_lock_irqsave(&h->lock, flags); 747 if (h->busy_configuring) { 748 spin_unlock_irqrestore(&h->lock, flags); 749 return -EBUSY; 750 } 751 raid = drv->raid_level; 752 spin_unlock_irqrestore(&h->lock, flags); 753 if (raid < 0 || raid > RAID_UNKNOWN) 754 raid = RAID_UNKNOWN; 755 756 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n", 757 raid_label[raid]); 758} 759static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL); 760 761static ssize_t cciss_show_usage_count(struct device *dev, 762 struct device_attribute *attr, char *buf) 763{ 764 drive_info_struct *drv = to_drv(dev); 765 struct ctlr_info *h = to_hba(drv->dev.parent); 766 unsigned long flags; 767 int count; 768 769 spin_lock_irqsave(&h->lock, flags); 770 if (h->busy_configuring) { 771 spin_unlock_irqrestore(&h->lock, flags); 772 return -EBUSY; 773 } 774 count = drv->usage_count; 775 spin_unlock_irqrestore(&h->lock, flags); 776 return snprintf(buf, 20, "%d\n", count); 777} 778static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL); 779 780static struct attribute *cciss_host_attrs[] = { 781 &dev_attr_rescan.attr, 782 &dev_attr_resettable.attr, 783 NULL 784}; 785 786static struct attribute_group cciss_host_attr_group = { 787 .attrs = cciss_host_attrs, 788}; 789 790static const struct attribute_group *cciss_host_attr_groups[] = { 791 &cciss_host_attr_group, 792 NULL 793}; 794 795static struct device_type cciss_host_type = { 796 .name = "cciss_host", 797 .groups = cciss_host_attr_groups, 798 .release = cciss_hba_release, 799}; 800 801static struct attribute *cciss_dev_attrs[] = { 802 &dev_attr_unique_id.attr, 803 &dev_attr_model.attr, 804 &dev_attr_vendor.attr, 805 &dev_attr_rev.attr, 806 &dev_attr_lunid.attr, 807 &dev_attr_raid_level.attr, 808 &dev_attr_usage_count.attr, 809 NULL 810}; 811 812static struct attribute_group cciss_dev_attr_group = { 813 .attrs = cciss_dev_attrs, 814}; 815 816static const struct attribute_group *cciss_dev_attr_groups[] = { 817 &cciss_dev_attr_group, 818 NULL 819}; 820 821static struct device_type cciss_dev_type = { 822 .name = "cciss_device", 823 .groups = cciss_dev_attr_groups, 824 .release = cciss_device_release, 825}; 826 827static struct bus_type cciss_bus_type = { 828 .name = "cciss", 829}; 830 831/* 832 * cciss_hba_release is called when the reference count 833 * of h->dev goes to zero. 834 */ 835static void cciss_hba_release(struct device *dev) 836{ 837 /* 838 * nothing to do, but need this to avoid a warning 839 * about not having a release handler from lib/kref.c. 840 */ 841} 842 843/* 844 * Initialize sysfs entry for each controller. This sets up and registers 845 * the 'cciss#' directory for each individual controller under 846 * /sys/bus/pci/devices/<dev>/. 847 */ 848static int cciss_create_hba_sysfs_entry(struct ctlr_info *h) 849{ 850 device_initialize(&h->dev); 851 h->dev.type = &cciss_host_type; 852 h->dev.bus = &cciss_bus_type; 853 dev_set_name(&h->dev, "%s", h->devname); 854 h->dev.parent = &h->pdev->dev; 855 856 return device_add(&h->dev); 857} 858 859/* 860 * Remove sysfs entries for an hba. 861 */ 862static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h) 863{ 864 device_del(&h->dev); 865 put_device(&h->dev); /* final put. */ 866} 867 868/* cciss_device_release is called when the reference count 869 * of h->drv[x]dev goes to zero. 870 */ 871static void cciss_device_release(struct device *dev) 872{ 873 drive_info_struct *drv = to_drv(dev); 874 kfree(drv); 875} 876 877/* 878 * Initialize sysfs for each logical drive. This sets up and registers 879 * the 'c#d#' directory for each individual logical drive under 880 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from 881 * /sys/block/cciss!c#d# to this entry. 882 */ 883static long cciss_create_ld_sysfs_entry(struct ctlr_info *h, 884 int drv_index) 885{ 886 struct device *dev; 887 888 if (h->drv[drv_index]->device_initialized) 889 return 0; 890 891 dev = &h->drv[drv_index]->dev; 892 device_initialize(dev); 893 dev->type = &cciss_dev_type; 894 dev->bus = &cciss_bus_type; 895 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index); 896 dev->parent = &h->dev; 897 h->drv[drv_index]->device_initialized = 1; 898 return device_add(dev); 899} 900 901/* 902 * Remove sysfs entries for a logical drive. 903 */ 904static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index, 905 int ctlr_exiting) 906{ 907 struct device *dev = &h->drv[drv_index]->dev; 908 909 /* special case for c*d0, we only destroy it on controller exit */ 910 if (drv_index == 0 && !ctlr_exiting) 911 return; 912 913 device_del(dev); 914 put_device(dev); /* the "final" put. */ 915 h->drv[drv_index] = NULL; 916} 917 918/* 919 * For operations that cannot sleep, a command block is allocated at init, 920 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 921 * which ones are free or in use. 922 */ 923static CommandList_struct *cmd_alloc(ctlr_info_t *h) 924{ 925 CommandList_struct *c; 926 int i; 927 u64bit temp64; 928 dma_addr_t cmd_dma_handle, err_dma_handle; 929 930 do { 931 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 932 if (i == h->nr_cmds) 933 return NULL; 934 } while (test_and_set_bit(i & (BITS_PER_LONG - 1), 935 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); 936 c = h->cmd_pool + i; 937 memset(c, 0, sizeof(CommandList_struct)); 938 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct); 939 c->err_info = h->errinfo_pool + i; 940 memset(c->err_info, 0, sizeof(ErrorInfo_struct)); 941 err_dma_handle = h->errinfo_pool_dhandle 942 + i * sizeof(ErrorInfo_struct); 943 h->nr_allocs++; 944 945 c->cmdindex = i; 946 947 INIT_LIST_HEAD(&c->list); 948 c->busaddr = (__u32) cmd_dma_handle; 949 temp64.val = (__u64) err_dma_handle; 950 c->ErrDesc.Addr.lower = temp64.val32.lower; 951 c->ErrDesc.Addr.upper = temp64.val32.upper; 952 c->ErrDesc.Len = sizeof(ErrorInfo_struct); 953 954 c->ctlr = h->ctlr; 955 return c; 956} 957 958/* allocate a command using pci_alloc_consistent, used for ioctls, 959 * etc., not for the main i/o path. 960 */ 961static CommandList_struct *cmd_special_alloc(ctlr_info_t *h) 962{ 963 CommandList_struct *c; 964 u64bit temp64; 965 dma_addr_t cmd_dma_handle, err_dma_handle; 966 967 c = (CommandList_struct *) pci_alloc_consistent(h->pdev, 968 sizeof(CommandList_struct), &cmd_dma_handle); 969 if (c == NULL) 970 return NULL; 971 memset(c, 0, sizeof(CommandList_struct)); 972 973 c->cmdindex = -1; 974 975 c->err_info = (ErrorInfo_struct *) 976 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct), 977 &err_dma_handle); 978 979 if (c->err_info == NULL) { 980 pci_free_consistent(h->pdev, 981 sizeof(CommandList_struct), c, cmd_dma_handle); 982 return NULL; 983 } 984 memset(c->err_info, 0, sizeof(ErrorInfo_struct)); 985 986 INIT_LIST_HEAD(&c->list); 987 c->busaddr = (__u32) cmd_dma_handle; 988 temp64.val = (__u64) err_dma_handle; 989 c->ErrDesc.Addr.lower = temp64.val32.lower; 990 c->ErrDesc.Addr.upper = temp64.val32.upper; 991 c->ErrDesc.Len = sizeof(ErrorInfo_struct); 992 993 c->ctlr = h->ctlr; 994 return c; 995} 996 997static void cmd_free(ctlr_info_t *h, CommandList_struct *c) 998{ 999 int i; 1000 1001 i = c - h->cmd_pool; 1002 clear_bit(i & (BITS_PER_LONG - 1), 1003 h->cmd_pool_bits + (i / BITS_PER_LONG)); 1004 h->nr_frees++; 1005} 1006 1007static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c) 1008{ 1009 u64bit temp64; 1010 1011 temp64.val32.lower = c->ErrDesc.Addr.lower; 1012 temp64.val32.upper = c->ErrDesc.Addr.upper; 1013 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct), 1014 c->err_info, (dma_addr_t) temp64.val); 1015 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c, 1016 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr)); 1017} 1018 1019static inline ctlr_info_t *get_host(struct gendisk *disk) 1020{ 1021 return disk->queue->queuedata; 1022} 1023 1024static inline drive_info_struct *get_drv(struct gendisk *disk) 1025{ 1026 return disk->private_data; 1027} 1028 1029/* 1030 * Open. Make sure the device is really there. 1031 */ 1032static int cciss_open(struct block_device *bdev, fmode_t mode) 1033{ 1034 ctlr_info_t *h = get_host(bdev->bd_disk); 1035 drive_info_struct *drv = get_drv(bdev->bd_disk); 1036 1037 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name); 1038 if (drv->busy_configuring) 1039 return -EBUSY; 1040 /* 1041 * Root is allowed to open raw volume zero even if it's not configured 1042 * so array config can still work. Root is also allowed to open any 1043 * volume that has a LUN ID, so it can issue IOCTL to reread the 1044 * disk information. I don't think I really like this 1045 * but I'm already using way to many device nodes to claim another one 1046 * for "raw controller". 1047 */ 1048 if (drv->heads == 0) { 1049 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */ 1050 /* if not node 0 make sure it is a partition = 0 */ 1051 if (MINOR(bdev->bd_dev) & 0x0f) { 1052 return -ENXIO; 1053 /* if it is, make sure we have a LUN ID */ 1054 } else if (memcmp(drv->LunID, CTLR_LUNID, 1055 sizeof(drv->LunID))) { 1056 return -ENXIO; 1057 } 1058 } 1059 if (!capable(CAP_SYS_ADMIN)) 1060 return -EPERM; 1061 } 1062 drv->usage_count++; 1063 h->usage_count++; 1064 return 0; 1065} 1066 1067static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode) 1068{ 1069 int ret; 1070 1071 mutex_lock(&cciss_mutex); 1072 ret = cciss_open(bdev, mode); 1073 mutex_unlock(&cciss_mutex); 1074 1075 return ret; 1076} 1077 1078/* 1079 * Close. Sync first. 1080 */ 1081static int cciss_release(struct gendisk *disk, fmode_t mode) 1082{ 1083 ctlr_info_t *h; 1084 drive_info_struct *drv; 1085 1086 mutex_lock(&cciss_mutex); 1087 h = get_host(disk); 1088 drv = get_drv(disk); 1089 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name); 1090 drv->usage_count--; 1091 h->usage_count--; 1092 mutex_unlock(&cciss_mutex); 1093 return 0; 1094} 1095 1096static int do_ioctl(struct block_device *bdev, fmode_t mode, 1097 unsigned cmd, unsigned long arg) 1098{ 1099 int ret; 1100 mutex_lock(&cciss_mutex); 1101 ret = cciss_ioctl(bdev, mode, cmd, arg); 1102 mutex_unlock(&cciss_mutex); 1103 return ret; 1104} 1105 1106#ifdef CONFIG_COMPAT 1107 1108static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, 1109 unsigned cmd, unsigned long arg); 1110static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, 1111 unsigned cmd, unsigned long arg); 1112 1113static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode, 1114 unsigned cmd, unsigned long arg) 1115{ 1116 switch (cmd) { 1117 case CCISS_GETPCIINFO: 1118 case CCISS_GETINTINFO: 1119 case CCISS_SETINTINFO: 1120 case CCISS_GETNODENAME: 1121 case CCISS_SETNODENAME: 1122 case CCISS_GETHEARTBEAT: 1123 case CCISS_GETBUSTYPES: 1124 case CCISS_GETFIRMVER: 1125 case CCISS_GETDRIVVER: 1126 case CCISS_REVALIDVOLS: 1127 case CCISS_DEREGDISK: 1128 case CCISS_REGNEWDISK: 1129 case CCISS_REGNEWD: 1130 case CCISS_RESCANDISK: 1131 case CCISS_GETLUNINFO: 1132 return do_ioctl(bdev, mode, cmd, arg); 1133 1134 case CCISS_PASSTHRU32: 1135 return cciss_ioctl32_passthru(bdev, mode, cmd, arg); 1136 case CCISS_BIG_PASSTHRU32: 1137 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg); 1138 1139 default: 1140 return -ENOIOCTLCMD; 1141 } 1142} 1143 1144static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, 1145 unsigned cmd, unsigned long arg) 1146{ 1147 IOCTL32_Command_struct __user *arg32 = 1148 (IOCTL32_Command_struct __user *) arg; 1149 IOCTL_Command_struct arg64; 1150 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 1151 int err; 1152 u32 cp; 1153 1154 err = 0; 1155 err |= 1156 copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 1157 sizeof(arg64.LUN_info)); 1158 err |= 1159 copy_from_user(&arg64.Request, &arg32->Request, 1160 sizeof(arg64.Request)); 1161 err |= 1162 copy_from_user(&arg64.error_info, &arg32->error_info, 1163 sizeof(arg64.error_info)); 1164 err |= get_user(arg64.buf_size, &arg32->buf_size); 1165 err |= get_user(cp, &arg32->buf); 1166 arg64.buf = compat_ptr(cp); 1167 err |= copy_to_user(p, &arg64, sizeof(arg64)); 1168 1169 if (err) 1170 return -EFAULT; 1171 1172 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p); 1173 if (err) 1174 return err; 1175 err |= 1176 copy_in_user(&arg32->error_info, &p->error_info, 1177 sizeof(arg32->error_info)); 1178 if (err) 1179 return -EFAULT; 1180 return err; 1181} 1182 1183static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, 1184 unsigned cmd, unsigned long arg) 1185{ 1186 BIG_IOCTL32_Command_struct __user *arg32 = 1187 (BIG_IOCTL32_Command_struct __user *) arg; 1188 BIG_IOCTL_Command_struct arg64; 1189 BIG_IOCTL_Command_struct __user *p = 1190 compat_alloc_user_space(sizeof(arg64)); 1191 int err; 1192 u32 cp; 1193 1194 memset(&arg64, 0, sizeof(arg64)); 1195 err = 0; 1196 err |= 1197 copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 1198 sizeof(arg64.LUN_info)); 1199 err |= 1200 copy_from_user(&arg64.Request, &arg32->Request, 1201 sizeof(arg64.Request)); 1202 err |= 1203 copy_from_user(&arg64.error_info, &arg32->error_info, 1204 sizeof(arg64.error_info)); 1205 err |= get_user(arg64.buf_size, &arg32->buf_size); 1206 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 1207 err |= get_user(cp, &arg32->buf); 1208 arg64.buf = compat_ptr(cp); 1209 err |= copy_to_user(p, &arg64, sizeof(arg64)); 1210 1211 if (err) 1212 return -EFAULT; 1213 1214 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p); 1215 if (err) 1216 return err; 1217 err |= 1218 copy_in_user(&arg32->error_info, &p->error_info, 1219 sizeof(arg32->error_info)); 1220 if (err) 1221 return -EFAULT; 1222 return err; 1223} 1224#endif 1225 1226static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1227{ 1228 drive_info_struct *drv = get_drv(bdev->bd_disk); 1229 1230 if (!drv->cylinders) 1231 return -ENXIO; 1232 1233 geo->heads = drv->heads; 1234 geo->sectors = drv->sectors; 1235 geo->cylinders = drv->cylinders; 1236 return 0; 1237} 1238 1239static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c) 1240{ 1241 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 1242 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 1243 (void)check_for_unit_attention(h, c); 1244} 1245 1246static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp) 1247{ 1248 cciss_pci_info_struct pciinfo; 1249 1250 if (!argp) 1251 return -EINVAL; 1252 pciinfo.domain = pci_domain_nr(h->pdev->bus); 1253 pciinfo.bus = h->pdev->bus->number; 1254 pciinfo.dev_fn = h->pdev->devfn; 1255 pciinfo.board_id = h->board_id; 1256 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct))) 1257 return -EFAULT; 1258 return 0; 1259} 1260 1261static int cciss_getintinfo(ctlr_info_t *h, void __user *argp) 1262{ 1263 cciss_coalint_struct intinfo; 1264 1265 if (!argp) 1266 return -EINVAL; 1267 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay); 1268 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount); 1269 if (copy_to_user 1270 (argp, &intinfo, sizeof(cciss_coalint_struct))) 1271 return -EFAULT; 1272 return 0; 1273} 1274 1275static int cciss_setintinfo(ctlr_info_t *h, void __user *argp) 1276{ 1277 cciss_coalint_struct intinfo; 1278 unsigned long flags; 1279 int i; 1280 1281 if (!argp) 1282 return -EINVAL; 1283 if (!capable(CAP_SYS_ADMIN)) 1284 return -EPERM; 1285 if (copy_from_user(&intinfo, argp, sizeof(intinfo))) 1286 return -EFAULT; 1287 if ((intinfo.delay == 0) && (intinfo.count == 0)) 1288 return -EINVAL; 1289 spin_lock_irqsave(&h->lock, flags); 1290 /* Update the field, and then ring the doorbell */ 1291 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay)); 1292 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount)); 1293 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 1294 1295 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { 1296 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) 1297 break; 1298 udelay(1000); /* delay and try again */ 1299 } 1300 spin_unlock_irqrestore(&h->lock, flags); 1301 if (i >= MAX_IOCTL_CONFIG_WAIT) 1302 return -EAGAIN; 1303 return 0; 1304} 1305 1306static int cciss_getnodename(ctlr_info_t *h, void __user *argp) 1307{ 1308 NodeName_type NodeName; 1309 int i; 1310 1311 if (!argp) 1312 return -EINVAL; 1313 for (i = 0; i < 16; i++) 1314 NodeName[i] = readb(&h->cfgtable->ServerName[i]); 1315 if (copy_to_user(argp, NodeName, sizeof(NodeName_type))) 1316 return -EFAULT; 1317 return 0; 1318} 1319 1320static int cciss_setnodename(ctlr_info_t *h, void __user *argp) 1321{ 1322 NodeName_type NodeName; 1323 unsigned long flags; 1324 int i; 1325 1326 if (!argp) 1327 return -EINVAL; 1328 if (!capable(CAP_SYS_ADMIN)) 1329 return -EPERM; 1330 if (copy_from_user(NodeName, argp, sizeof(NodeName_type))) 1331 return -EFAULT; 1332 spin_lock_irqsave(&h->lock, flags); 1333 /* Update the field, and then ring the doorbell */ 1334 for (i = 0; i < 16; i++) 1335 writeb(NodeName[i], &h->cfgtable->ServerName[i]); 1336 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 1337 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { 1338 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) 1339 break; 1340 udelay(1000); /* delay and try again */ 1341 } 1342 spin_unlock_irqrestore(&h->lock, flags); 1343 if (i >= MAX_IOCTL_CONFIG_WAIT) 1344 return -EAGAIN; 1345 return 0; 1346} 1347 1348static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp) 1349{ 1350 Heartbeat_type heartbeat; 1351 1352 if (!argp) 1353 return -EINVAL; 1354 heartbeat = readl(&h->cfgtable->HeartBeat); 1355 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type))) 1356 return -EFAULT; 1357 return 0; 1358} 1359 1360static int cciss_getbustypes(ctlr_info_t *h, void __user *argp) 1361{ 1362 BusTypes_type BusTypes; 1363 1364 if (!argp) 1365 return -EINVAL; 1366 BusTypes = readl(&h->cfgtable->BusTypes); 1367 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type))) 1368 return -EFAULT; 1369 return 0; 1370} 1371 1372static int cciss_getfirmver(ctlr_info_t *h, void __user *argp) 1373{ 1374 FirmwareVer_type firmware; 1375 1376 if (!argp) 1377 return -EINVAL; 1378 memcpy(firmware, h->firm_ver, 4); 1379 1380 if (copy_to_user 1381 (argp, firmware, sizeof(FirmwareVer_type))) 1382 return -EFAULT; 1383 return 0; 1384} 1385 1386static int cciss_getdrivver(ctlr_info_t *h, void __user *argp) 1387{ 1388 DriverVer_type DriverVer = DRIVER_VERSION; 1389 1390 if (!argp) 1391 return -EINVAL; 1392 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 1393 return -EFAULT; 1394 return 0; 1395} 1396 1397static int cciss_getluninfo(ctlr_info_t *h, 1398 struct gendisk *disk, void __user *argp) 1399{ 1400 LogvolInfo_struct luninfo; 1401 drive_info_struct *drv = get_drv(disk); 1402 1403 if (!argp) 1404 return -EINVAL; 1405 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID)); 1406 luninfo.num_opens = drv->usage_count; 1407 luninfo.num_parts = 0; 1408 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct))) 1409 return -EFAULT; 1410 return 0; 1411} 1412 1413static int cciss_passthru(ctlr_info_t *h, void __user *argp) 1414{ 1415 IOCTL_Command_struct iocommand; 1416 CommandList_struct *c; 1417 char *buff = NULL; 1418 u64bit temp64; 1419 DECLARE_COMPLETION_ONSTACK(wait); 1420 1421 if (!argp) 1422 return -EINVAL; 1423 1424 if (!capable(CAP_SYS_RAWIO)) 1425 return -EPERM; 1426 1427 if (copy_from_user 1428 (&iocommand, argp, sizeof(IOCTL_Command_struct))) 1429 return -EFAULT; 1430 if ((iocommand.buf_size < 1) && 1431 (iocommand.Request.Type.Direction != XFER_NONE)) { 1432 return -EINVAL; 1433 } 1434 if (iocommand.buf_size > 0) { 1435 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 1436 if (buff == NULL) 1437 return -EFAULT; 1438 } 1439 if (iocommand.Request.Type.Direction == XFER_WRITE) { 1440 /* Copy the data into the buffer we created */ 1441 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) { 1442 kfree(buff); 1443 return -EFAULT; 1444 } 1445 } else { 1446 memset(buff, 0, iocommand.buf_size); 1447 } 1448 c = cmd_special_alloc(h); 1449 if (!c) { 1450 kfree(buff); 1451 return -ENOMEM; 1452 } 1453 /* Fill in the command type */ 1454 c->cmd_type = CMD_IOCTL_PEND; 1455 /* Fill in Command Header */ 1456 c->Header.ReplyQueue = 0; /* unused in simple mode */ 1457 if (iocommand.buf_size > 0) { /* buffer to fill */ 1458 c->Header.SGList = 1; 1459 c->Header.SGTotal = 1; 1460 } else { /* no buffers to fill */ 1461 c->Header.SGList = 0; 1462 c->Header.SGTotal = 0; 1463 } 1464 c->Header.LUN = iocommand.LUN_info; 1465 /* use the kernel address the cmd block for tag */ 1466 c->Header.Tag.lower = c->busaddr; 1467 1468 /* Fill in Request block */ 1469 c->Request = iocommand.Request; 1470 1471 /* Fill in the scatter gather information */ 1472 if (iocommand.buf_size > 0) { 1473 temp64.val = pci_map_single(h->pdev, buff, 1474 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 1475 c->SG[0].Addr.lower = temp64.val32.lower; 1476 c->SG[0].Addr.upper = temp64.val32.upper; 1477 c->SG[0].Len = iocommand.buf_size; 1478 c->SG[0].Ext = 0; /* we are not chaining */ 1479 } 1480 c->waiting = &wait; 1481 1482 enqueue_cmd_and_start_io(h, c); 1483 wait_for_completion(&wait); 1484 1485 /* unlock the buffers from DMA */ 1486 temp64.val32.lower = c->SG[0].Addr.lower; 1487 temp64.val32.upper = c->SG[0].Addr.upper; 1488 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size, 1489 PCI_DMA_BIDIRECTIONAL); 1490 check_ioctl_unit_attention(h, c); 1491 1492 /* Copy the error information out */ 1493 iocommand.error_info = *(c->err_info); 1494 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) { 1495 kfree(buff); 1496 cmd_special_free(h, c); 1497 return -EFAULT; 1498 } 1499 1500 if (iocommand.Request.Type.Direction == XFER_READ) { 1501 /* Copy the data out of the buffer we created */ 1502 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 1503 kfree(buff); 1504 cmd_special_free(h, c); 1505 return -EFAULT; 1506 } 1507 } 1508 kfree(buff); 1509 cmd_special_free(h, c); 1510 return 0; 1511} 1512 1513static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp) 1514{ 1515 BIG_IOCTL_Command_struct *ioc; 1516 CommandList_struct *c; 1517 unsigned char **buff = NULL; 1518 int *buff_size = NULL; 1519 u64bit temp64; 1520 BYTE sg_used = 0; 1521 int status = 0; 1522 int i; 1523 DECLARE_COMPLETION_ONSTACK(wait); 1524 __u32 left; 1525 __u32 sz; 1526 BYTE __user *data_ptr; 1527 1528 if (!argp) 1529 return -EINVAL; 1530 if (!capable(CAP_SYS_RAWIO)) 1531 return -EPERM; 1532 ioc = (BIG_IOCTL_Command_struct *) 1533 kmalloc(sizeof(*ioc), GFP_KERNEL); 1534 if (!ioc) { 1535 status = -ENOMEM; 1536 goto cleanup1; 1537 } 1538 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 1539 status = -EFAULT; 1540 goto cleanup1; 1541 } 1542 if ((ioc->buf_size < 1) && 1543 (ioc->Request.Type.Direction != XFER_NONE)) { 1544 status = -EINVAL; 1545 goto cleanup1; 1546 } 1547 /* Check kmalloc limits using all SGs */ 1548 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 1549 status = -EINVAL; 1550 goto cleanup1; 1551 } 1552 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) { 1553 status = -EINVAL; 1554 goto cleanup1; 1555 } 1556 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL); 1557 if (!buff) { 1558 status = -ENOMEM; 1559 goto cleanup1; 1560 } 1561 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL); 1562 if (!buff_size) { 1563 status = -ENOMEM; 1564 goto cleanup1; 1565 } 1566 left = ioc->buf_size; 1567 data_ptr = ioc->buf; 1568 while (left) { 1569 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 1570 buff_size[sg_used] = sz; 1571 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 1572 if (buff[sg_used] == NULL) { 1573 status = -ENOMEM; 1574 goto cleanup1; 1575 } 1576 if (ioc->Request.Type.Direction == XFER_WRITE) { 1577 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 1578 status = -EFAULT; 1579 goto cleanup1; 1580 } 1581 } else { 1582 memset(buff[sg_used], 0, sz); 1583 } 1584 left -= sz; 1585 data_ptr += sz; 1586 sg_used++; 1587 } 1588 c = cmd_special_alloc(h); 1589 if (!c) { 1590 status = -ENOMEM; 1591 goto cleanup1; 1592 } 1593 c->cmd_type = CMD_IOCTL_PEND; 1594 c->Header.ReplyQueue = 0; 1595 c->Header.SGList = sg_used; 1596 c->Header.SGTotal = sg_used; 1597 c->Header.LUN = ioc->LUN_info; 1598 c->Header.Tag.lower = c->busaddr; 1599 1600 c->Request = ioc->Request; 1601 for (i = 0; i < sg_used; i++) { 1602 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i], 1603 PCI_DMA_BIDIRECTIONAL); 1604 c->SG[i].Addr.lower = temp64.val32.lower; 1605 c->SG[i].Addr.upper = temp64.val32.upper; 1606 c->SG[i].Len = buff_size[i]; 1607 c->SG[i].Ext = 0; /* we are not chaining */ 1608 } 1609 c->waiting = &wait; 1610 enqueue_cmd_and_start_io(h, c); 1611 wait_for_completion(&wait); 1612 /* unlock the buffers from DMA */ 1613 for (i = 0; i < sg_used; i++) { 1614 temp64.val32.lower = c->SG[i].Addr.lower; 1615 temp64.val32.upper = c->SG[i].Addr.upper; 1616 pci_unmap_single(h->pdev, 1617 (dma_addr_t) temp64.val, buff_size[i], 1618 PCI_DMA_BIDIRECTIONAL); 1619 } 1620 check_ioctl_unit_attention(h, c); 1621 /* Copy the error information out */ 1622 ioc->error_info = *(c->err_info); 1623 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 1624 cmd_special_free(h, c); 1625 status = -EFAULT; 1626 goto cleanup1; 1627 } 1628 if (ioc->Request.Type.Direction == XFER_READ) { 1629 /* Copy the data out of the buffer we created */ 1630 BYTE __user *ptr = ioc->buf; 1631 for (i = 0; i < sg_used; i++) { 1632 if (copy_to_user(ptr, buff[i], buff_size[i])) { 1633 cmd_special_free(h, c); 1634 status = -EFAULT; 1635 goto cleanup1; 1636 } 1637 ptr += buff_size[i]; 1638 } 1639 } 1640 cmd_special_free(h, c); 1641 status = 0; 1642cleanup1: 1643 if (buff) { 1644 for (i = 0; i < sg_used; i++) 1645 kfree(buff[i]); 1646 kfree(buff); 1647 } 1648 kfree(buff_size); 1649 kfree(ioc); 1650 return status; 1651} 1652 1653static int cciss_ioctl(struct block_device *bdev, fmode_t mode, 1654 unsigned int cmd, unsigned long arg) 1655{ 1656 struct gendisk *disk = bdev->bd_disk; 1657 ctlr_info_t *h = get_host(disk); 1658 void __user *argp = (void __user *)arg; 1659 1660 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n", 1661 cmd, arg); 1662 switch (cmd) { 1663 case CCISS_GETPCIINFO: 1664 return cciss_getpciinfo(h, argp); 1665 case CCISS_GETINTINFO: 1666 return cciss_getintinfo(h, argp); 1667 case CCISS_SETINTINFO: 1668 return cciss_setintinfo(h, argp); 1669 case CCISS_GETNODENAME: 1670 return cciss_getnodename(h, argp); 1671 case CCISS_SETNODENAME: 1672 return cciss_setnodename(h, argp); 1673 case CCISS_GETHEARTBEAT: 1674 return cciss_getheartbeat(h, argp); 1675 case CCISS_GETBUSTYPES: 1676 return cciss_getbustypes(h, argp); 1677 case CCISS_GETFIRMVER: 1678 return cciss_getfirmver(h, argp); 1679 case CCISS_GETDRIVVER: 1680 return cciss_getdrivver(h, argp); 1681 case CCISS_DEREGDISK: 1682 case CCISS_REGNEWD: 1683 case CCISS_REVALIDVOLS: 1684 return rebuild_lun_table(h, 0, 1); 1685 case CCISS_GETLUNINFO: 1686 return cciss_getluninfo(h, disk, argp); 1687 case CCISS_PASSTHRU: 1688 return cciss_passthru(h, argp); 1689 case CCISS_BIG_PASSTHRU: 1690 return cciss_bigpassthru(h, argp); 1691 1692 /* scsi_cmd_ioctl handles these, below, though some are not */ 1693 /* very meaningful for cciss. SG_IO is the main one people want. */ 1694 1695 case SG_GET_VERSION_NUM: 1696 case SG_SET_TIMEOUT: 1697 case SG_GET_TIMEOUT: 1698 case SG_GET_RESERVED_SIZE: 1699 case SG_SET_RESERVED_SIZE: 1700 case SG_EMULATED_HOST: 1701 case SG_IO: 1702 case SCSI_IOCTL_SEND_COMMAND: 1703 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp); 1704 1705 /* scsi_cmd_ioctl would normally handle these, below, but */ 1706 /* they aren't a good fit for cciss, as CD-ROMs are */ 1707 /* not supported, and we don't have any bus/target/lun */ 1708 /* which we present to the kernel. */ 1709 1710 case CDROM_SEND_PACKET: 1711 case CDROMCLOSETRAY: 1712 case CDROMEJECT: 1713 case SCSI_IOCTL_GET_IDLUN: 1714 case SCSI_IOCTL_GET_BUS_NUMBER: 1715 default: 1716 return -ENOTTY; 1717 } 1718} 1719 1720static void cciss_check_queues(ctlr_info_t *h) 1721{ 1722 int start_queue = h->next_to_run; 1723 int i; 1724 1725 /* check to see if we have maxed out the number of commands that can 1726 * be placed on the queue. If so then exit. We do this check here 1727 * in case the interrupt we serviced was from an ioctl and did not 1728 * free any new commands. 1729 */ 1730 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) 1731 return; 1732 1733 /* We have room on the queue for more commands. Now we need to queue 1734 * them up. We will also keep track of the next queue to run so 1735 * that every queue gets a chance to be started first. 1736 */ 1737 for (i = 0; i < h->highest_lun + 1; i++) { 1738 int curr_queue = (start_queue + i) % (h->highest_lun + 1); 1739 /* make sure the disk has been added and the drive is real 1740 * because this can be called from the middle of init_one. 1741 */ 1742 if (!h->drv[curr_queue]) 1743 continue; 1744 if (!(h->drv[curr_queue]->queue) || 1745 !(h->drv[curr_queue]->heads)) 1746 continue; 1747 blk_start_queue(h->gendisk[curr_queue]->queue); 1748 1749 /* check to see if we have maxed out the number of commands 1750 * that can be placed on the queue. 1751 */ 1752 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) { 1753 if (curr_queue == start_queue) { 1754 h->next_to_run = 1755 (start_queue + 1) % (h->highest_lun + 1); 1756 break; 1757 } else { 1758 h->next_to_run = curr_queue; 1759 break; 1760 } 1761 } 1762 } 1763} 1764 1765static void cciss_softirq_done(struct request *rq) 1766{ 1767 CommandList_struct *c = rq->completion_data; 1768 ctlr_info_t *h = hba[c->ctlr]; 1769 SGDescriptor_struct *curr_sg = c->SG; 1770 u64bit temp64; 1771 unsigned long flags; 1772 int i, ddir; 1773 int sg_index = 0; 1774 1775 if (c->Request.Type.Direction == XFER_READ) 1776 ddir = PCI_DMA_FROMDEVICE; 1777 else 1778 ddir = PCI_DMA_TODEVICE; 1779 1780 /* command did not need to be retried */ 1781 /* unmap the DMA mapping for all the scatter gather elements */ 1782 for (i = 0; i < c->Header.SGList; i++) { 1783 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) { 1784 cciss_unmap_sg_chain_block(h, c); 1785 /* Point to the next block */ 1786 curr_sg = h->cmd_sg_list[c->cmdindex]; 1787 sg_index = 0; 1788 } 1789 temp64.val32.lower = curr_sg[sg_index].Addr.lower; 1790 temp64.val32.upper = curr_sg[sg_index].Addr.upper; 1791 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len, 1792 ddir); 1793 ++sg_index; 1794 } 1795 1796 dev_dbg(&h->pdev->dev, "Done with %p\n", rq); 1797 1798 /* set the residual count for pc requests */ 1799 if (rq->cmd_type == REQ_TYPE_BLOCK_PC) 1800 rq->resid_len = c->err_info->ResidualCnt; 1801 1802 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO); 1803 1804 spin_lock_irqsave(&h->lock, flags); 1805 cmd_free(h, c); 1806 cciss_check_queues(h); 1807 spin_unlock_irqrestore(&h->lock, flags); 1808} 1809 1810static inline void log_unit_to_scsi3addr(ctlr_info_t *h, 1811 unsigned char scsi3addr[], uint32_t log_unit) 1812{ 1813 memcpy(scsi3addr, h->drv[log_unit]->LunID, 1814 sizeof(h->drv[log_unit]->LunID)); 1815} 1816 1817/* This function gets the SCSI vendor, model, and revision of a logical drive 1818 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if 1819 * they cannot be read. 1820 */ 1821static void cciss_get_device_descr(ctlr_info_t *h, int logvol, 1822 char *vendor, char *model, char *rev) 1823{ 1824 int rc; 1825 InquiryData_struct *inq_buf; 1826 unsigned char scsi3addr[8]; 1827 1828 *vendor = '\0'; 1829 *model = '\0'; 1830 *rev = '\0'; 1831 1832 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); 1833 if (!inq_buf) 1834 return; 1835 1836 log_unit_to_scsi3addr(h, scsi3addr, logvol); 1837 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0, 1838 scsi3addr, TYPE_CMD); 1839 if (rc == IO_OK) { 1840 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN); 1841 vendor[VENDOR_LEN] = '\0'; 1842 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN); 1843 model[MODEL_LEN] = '\0'; 1844 memcpy(rev, &inq_buf->data_byte[32], REV_LEN); 1845 rev[REV_LEN] = '\0'; 1846 } 1847 1848 kfree(inq_buf); 1849 return; 1850} 1851 1852/* This function gets the serial number of a logical drive via 1853 * inquiry page 0x83. Serial no. is 16 bytes. If the serial 1854 * number cannot be had, for whatever reason, 16 bytes of 0xff 1855 * are returned instead. 1856 */ 1857static void cciss_get_serial_no(ctlr_info_t *h, int logvol, 1858 unsigned char *serial_no, int buflen) 1859{ 1860#define PAGE_83_INQ_BYTES 64 1861 int rc; 1862 unsigned char *buf; 1863 unsigned char scsi3addr[8]; 1864 1865 if (buflen > 16) 1866 buflen = 16; 1867 memset(serial_no, 0xff, buflen); 1868 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL); 1869 if (!buf) 1870 return; 1871 memset(serial_no, 0, buflen); 1872 log_unit_to_scsi3addr(h, scsi3addr, logvol); 1873 rc = sendcmd_withirq(h, CISS_INQUIRY, buf, 1874 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD); 1875 if (rc == IO_OK) 1876 memcpy(serial_no, &buf[8], buflen); 1877 kfree(buf); 1878 return; 1879} 1880 1881/* 1882 * cciss_add_disk sets up the block device queue for a logical drive 1883 */ 1884static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk, 1885 int drv_index) 1886{ 1887 disk->queue = blk_init_queue(do_cciss_request, &h->lock); 1888 if (!disk->queue) 1889 goto init_queue_failure; 1890 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index); 1891 disk->major = h->major; 1892 disk->first_minor = drv_index << NWD_SHIFT; 1893 disk->fops = &cciss_fops; 1894 if (cciss_create_ld_sysfs_entry(h, drv_index)) 1895 goto cleanup_queue; 1896 disk->private_data = h->drv[drv_index]; 1897 disk->driverfs_dev = &h->drv[drv_index]->dev; 1898 1899 /* Set up queue information */ 1900 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask); 1901 1902 /* This is a hardware imposed limit. */ 1903 blk_queue_max_segments(disk->queue, h->maxsgentries); 1904 1905 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors); 1906 1907 blk_queue_softirq_done(disk->queue, cciss_softirq_done); 1908 1909 disk->queue->queuedata = h; 1910 1911 blk_queue_logical_block_size(disk->queue, 1912 h->drv[drv_index]->block_size); 1913 1914 /* Make sure all queue data is written out before */ 1915 /* setting h->drv[drv_index]->queue, as setting this */ 1916 /* allows the interrupt handler to start the queue */ 1917 wmb(); 1918 h->drv[drv_index]->queue = disk->queue; 1919 add_disk(disk); 1920 return 0; 1921 1922cleanup_queue: 1923 blk_cleanup_queue(disk->queue); 1924 disk->queue = NULL; 1925init_queue_failure: 1926 return -1; 1927} 1928 1929/* This function will check the usage_count of the drive to be updated/added. 1930 * If the usage_count is zero and it is a heretofore unknown drive, or, 1931 * the drive's capacity, geometry, or serial number has changed, 1932 * then the drive information will be updated and the disk will be 1933 * re-registered with the kernel. If these conditions don't hold, 1934 * then it will be left alone for the next reboot. The exception to this 1935 * is disk 0 which will always be left registered with the kernel since it 1936 * is also the controller node. Any changes to disk 0 will show up on 1937 * the next reboot. 1938 */ 1939static void cciss_update_drive_info(ctlr_info_t *h, int drv_index, 1940 int first_time, int via_ioctl) 1941{ 1942 struct gendisk *disk; 1943 InquiryData_struct *inq_buff = NULL; 1944 unsigned int block_size; 1945 sector_t total_size; 1946 unsigned long flags = 0; 1947 int ret = 0; 1948 drive_info_struct *drvinfo; 1949 1950 /* Get information about the disk and modify the driver structure */ 1951 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); 1952 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL); 1953 if (inq_buff == NULL || drvinfo == NULL) 1954 goto mem_msg; 1955 1956 /* testing to see if 16-byte CDBs are already being used */ 1957 if (h->cciss_read == CCISS_READ_16) { 1958 cciss_read_capacity_16(h, drv_index, 1959 &total_size, &block_size); 1960 1961 } else { 1962 cciss_read_capacity(h, drv_index, &total_size, &block_size); 1963 /* if read_capacity returns all F's this volume is >2TB */ 1964 /* in size so we switch to 16-byte CDB's for all */ 1965 /* read/write ops */ 1966 if (total_size == 0xFFFFFFFFULL) { 1967 cciss_read_capacity_16(h, drv_index, 1968 &total_size, &block_size); 1969 h->cciss_read = CCISS_READ_16; 1970 h->cciss_write = CCISS_WRITE_16; 1971 } else { 1972 h->cciss_read = CCISS_READ_10; 1973 h->cciss_write = CCISS_WRITE_10; 1974 } 1975 } 1976 1977 cciss_geometry_inquiry(h, drv_index, total_size, block_size, 1978 inq_buff, drvinfo); 1979 drvinfo->block_size = block_size; 1980 drvinfo->nr_blocks = total_size + 1; 1981 1982 cciss_get_device_descr(h, drv_index, drvinfo->vendor, 1983 drvinfo->model, drvinfo->rev); 1984 cciss_get_serial_no(h, drv_index, drvinfo->serial_no, 1985 sizeof(drvinfo->serial_no)); 1986 /* Save the lunid in case we deregister the disk, below. */ 1987 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID, 1988 sizeof(drvinfo->LunID)); 1989 1990 /* Is it the same disk we already know, and nothing's changed? */ 1991 if (h->drv[drv_index]->raid_level != -1 && 1992 ((memcmp(drvinfo->serial_no, 1993 h->drv[drv_index]->serial_no, 16) == 0) && 1994 drvinfo->block_size == h->drv[drv_index]->block_size && 1995 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks && 1996 drvinfo->heads == h->drv[drv_index]->heads && 1997 drvinfo->sectors == h->drv[drv_index]->sectors && 1998 drvinfo->cylinders == h->drv[drv_index]->cylinders)) 1999 /* The disk is unchanged, nothing to update */ 2000 goto freeret; 2001 2002 /* If we get here it's not the same disk, or something's changed, 2003 * so we need to * deregister it, and re-register it, if it's not 2004 * in use. 2005 * If the disk already exists then deregister it before proceeding 2006 * (unless it's the first disk (for the controller node). 2007 */ 2008 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) { 2009 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index); 2010 spin_lock_irqsave(&h->lock, flags); 2011 h->drv[drv_index]->busy_configuring = 1; 2012 spin_unlock_irqrestore(&h->lock, flags); 2013 2014 /* deregister_disk sets h->drv[drv_index]->queue = NULL 2015 * which keeps the interrupt handler from starting 2016 * the queue. 2017 */ 2018 ret = deregister_disk(h, drv_index, 0, via_ioctl); 2019 } 2020 2021 /* If the disk is in use return */ 2022 if (ret) 2023 goto freeret; 2024 2025 /* Save the new information from cciss_geometry_inquiry 2026 * and serial number inquiry. If the disk was deregistered 2027 * above, then h->drv[drv_index] will be NULL. 2028 */ 2029 if (h->drv[drv_index] == NULL) { 2030 drvinfo->device_initialized = 0; 2031 h->drv[drv_index] = drvinfo; 2032 drvinfo = NULL; /* so it won't be freed below. */ 2033 } else { 2034 /* special case for cxd0 */ 2035 h->drv[drv_index]->block_size = drvinfo->block_size; 2036 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks; 2037 h->drv[drv_index]->heads = drvinfo->heads; 2038 h->drv[drv_index]->sectors = drvinfo->sectors; 2039 h->drv[drv_index]->cylinders = drvinfo->cylinders; 2040 h->drv[drv_index]->raid_level = drvinfo->raid_level; 2041 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16); 2042 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor, 2043 VENDOR_LEN + 1); 2044 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1); 2045 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1); 2046 } 2047 2048 ++h->num_luns; 2049 disk = h->gendisk[drv_index]; 2050 set_capacity(disk, h->drv[drv_index]->nr_blocks); 2051 2052 /* If it's not disk 0 (drv_index != 0) 2053 * or if it was disk 0, but there was previously 2054 * no actual corresponding configured logical drive 2055 * (raid_leve == -1) then we want to update the 2056 * logical drive's information. 2057 */ 2058 if (drv_index || first_time) { 2059 if (cciss_add_disk(h, disk, drv_index) != 0) { 2060 cciss_free_gendisk(h, drv_index); 2061 cciss_free_drive_info(h, drv_index); 2062 dev_warn(&h->pdev->dev, "could not update disk %d\n", 2063 drv_index); 2064 --h->num_luns; 2065 } 2066 } 2067 2068freeret: 2069 kfree(inq_buff); 2070 kfree(drvinfo); 2071 return; 2072mem_msg: 2073 dev_err(&h->pdev->dev, "out of memory\n"); 2074 goto freeret; 2075} 2076 2077/* This function will find the first index of the controllers drive array 2078 * that has a null drv pointer and allocate the drive info struct and 2079 * will return that index This is where new drives will be added. 2080 * If the index to be returned is greater than the highest_lun index for 2081 * the controller then highest_lun is set * to this new index. 2082 * If there are no available indexes or if tha allocation fails, then -1 2083 * is returned. * "controller_node" is used to know if this is a real 2084 * logical drive, or just the controller node, which determines if this 2085 * counts towards highest_lun. 2086 */ 2087static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node) 2088{ 2089 int i; 2090 drive_info_struct *drv; 2091 2092 /* Search for an empty slot for our drive info */ 2093 for (i = 0; i < CISS_MAX_LUN; i++) { 2094 2095 /* if not cxd0 case, and it's occupied, skip it. */ 2096 if (h->drv[i] && i != 0) 2097 continue; 2098 /* 2099 * If it's cxd0 case, and drv is alloc'ed already, and a 2100 * disk is configured there, skip it. 2101 */ 2102 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1) 2103 continue; 2104 2105 /* 2106 * We've found an empty slot. Update highest_lun 2107 * provided this isn't just the fake cxd0 controller node. 2108 */ 2109 if (i > h->highest_lun && !controller_node) 2110 h->highest_lun = i; 2111 2112 /* If adding a real disk at cxd0, and it's already alloc'ed */ 2113 if (i == 0 && h->drv[i] != NULL) 2114 return i; 2115 2116 /* 2117 * Found an empty slot, not already alloc'ed. Allocate it. 2118 * Mark it with raid_level == -1, so we know it's new later on. 2119 */ 2120 drv = kzalloc(sizeof(*drv), GFP_KERNEL); 2121 if (!drv) 2122 return -1; 2123 drv->raid_level = -1; /* so we know it's new */ 2124 h->drv[i] = drv; 2125 return i; 2126 } 2127 return -1; 2128} 2129 2130static void cciss_free_drive_info(ctlr_info_t *h, int drv_index) 2131{ 2132 kfree(h->drv[drv_index]); 2133 h->drv[drv_index] = NULL; 2134} 2135 2136static void cciss_free_gendisk(ctlr_info_t *h, int drv_index) 2137{ 2138 put_disk(h->gendisk[drv_index]); 2139 h->gendisk[drv_index] = NULL; 2140} 2141 2142/* cciss_add_gendisk finds a free hba[]->drv structure 2143 * and allocates a gendisk if needed, and sets the lunid 2144 * in the drvinfo structure. It returns the index into 2145 * the ->drv[] array, or -1 if none are free. 2146 * is_controller_node indicates whether highest_lun should 2147 * count this disk, or if it's only being added to provide 2148 * a means to talk to the controller in case no logical 2149 * drives have yet been configured. 2150 */ 2151static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[], 2152 int controller_node) 2153{ 2154 int drv_index; 2155 2156 drv_index = cciss_alloc_drive_info(h, controller_node); 2157 if (drv_index == -1) 2158 return -1; 2159 2160 /*Check if the gendisk needs to be allocated */ 2161 if (!h->gendisk[drv_index]) { 2162 h->gendisk[drv_index] = 2163 alloc_disk(1 << NWD_SHIFT); 2164 if (!h->gendisk[drv_index]) { 2165 dev_err(&h->pdev->dev, 2166 "could not allocate a new disk %d\n", 2167 drv_index); 2168 goto err_free_drive_info; 2169 } 2170 } 2171 memcpy(h->drv[drv_index]->LunID, lunid, 2172 sizeof(h->drv[drv_index]->LunID)); 2173 if (cciss_create_ld_sysfs_entry(h, drv_index)) 2174 goto err_free_disk; 2175 /* Don't need to mark this busy because nobody */ 2176 /* else knows about this disk yet to contend */ 2177 /* for access to it. */ 2178 h->drv[drv_index]->busy_configuring = 0; 2179 wmb(); 2180 return drv_index; 2181 2182err_free_disk: 2183 cciss_free_gendisk(h, drv_index); 2184err_free_drive_info: 2185 cciss_free_drive_info(h, drv_index); 2186 return -1; 2187} 2188 2189/* This is for the special case of a controller which 2190 * has no logical drives. In this case, we still need 2191 * to register a disk so the controller can be accessed 2192 * by the Array Config Utility. 2193 */ 2194static void cciss_add_controller_node(ctlr_info_t *h) 2195{ 2196 struct gendisk *disk; 2197 int drv_index; 2198 2199 if (h->gendisk[0] != NULL) /* already did this? Then bail. */ 2200 return; 2201 2202 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1); 2203 if (drv_index == -1) 2204 goto error; 2205 h->drv[drv_index]->block_size = 512; 2206 h->drv[drv_index]->nr_blocks = 0; 2207 h->drv[drv_index]->heads = 0; 2208 h->drv[drv_index]->sectors = 0; 2209 h->drv[drv_index]->cylinders = 0; 2210 h->drv[drv_index]->raid_level = -1; 2211 memset(h->drv[drv_index]->serial_no, 0, 16); 2212 disk = h->gendisk[drv_index]; 2213 if (cciss_add_disk(h, disk, drv_index) == 0) 2214 return; 2215 cciss_free_gendisk(h, drv_index); 2216 cciss_free_drive_info(h, drv_index); 2217error: 2218 dev_warn(&h->pdev->dev, "could not add disk 0.\n"); 2219 return; 2220} 2221 2222/* This function will add and remove logical drives from the Logical 2223 * drive array of the controller and maintain persistency of ordering 2224 * so that mount points are preserved until the next reboot. This allows 2225 * for the removal of logical drives in the middle of the drive array 2226 * without a re-ordering of those drives. 2227 * INPUT 2228 * h = The controller to perform the operations on 2229 */ 2230static int rebuild_lun_table(ctlr_info_t *h, int first_time, 2231 int via_ioctl) 2232{ 2233 int num_luns; 2234 ReportLunData_struct *ld_buff = NULL; 2235 int return_code; 2236 int listlength = 0; 2237 int i; 2238 int drv_found; 2239 int drv_index = 0; 2240 unsigned char lunid[8] = CTLR_LUNID; 2241 unsigned long flags; 2242 2243 if (!capable(CAP_SYS_RAWIO)) 2244 return -EPERM; 2245 2246 /* Set busy_configuring flag for this operation */ 2247 spin_lock_irqsave(&h->lock, flags); 2248 if (h->busy_configuring) { 2249 spin_unlock_irqrestore(&h->lock, flags); 2250 return -EBUSY; 2251 } 2252 h->busy_configuring = 1; 2253 spin_unlock_irqrestore(&h->lock, flags); 2254 2255 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL); 2256 if (ld_buff == NULL) 2257 goto mem_msg; 2258 2259 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff, 2260 sizeof(ReportLunData_struct), 2261 0, CTLR_LUNID, TYPE_CMD); 2262 2263 if (return_code == IO_OK) 2264 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength); 2265 else { /* reading number of logical volumes failed */ 2266 dev_warn(&h->pdev->dev, 2267 "report logical volume command failed\n"); 2268 listlength = 0; 2269 goto freeret; 2270 } 2271 2272 num_luns = listlength / 8; /* 8 bytes per entry */ 2273 if (num_luns > CISS_MAX_LUN) { 2274 num_luns = CISS_MAX_LUN; 2275 dev_warn(&h->pdev->dev, "more luns configured" 2276 " on controller than can be handled by" 2277 " this driver.\n"); 2278 } 2279 2280 if (num_luns == 0) 2281 cciss_add_controller_node(h); 2282 2283 /* Compare controller drive array to driver's drive array 2284 * to see if any drives are missing on the controller due 2285 * to action of Array Config Utility (user deletes drive) 2286 * and deregister logical drives which have disappeared. 2287 */ 2288 for (i = 0; i <= h->highest_lun; i++) { 2289 int j; 2290 drv_found = 0; 2291 2292 /* skip holes in the array from already deleted drives */ 2293 if (h->drv[i] == NULL) 2294 continue; 2295 2296 for (j = 0; j < num_luns; j++) { 2297 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid)); 2298 if (memcmp(h->drv[i]->LunID, lunid, 2299 sizeof(lunid)) == 0) { 2300 drv_found = 1; 2301 break; 2302 } 2303 } 2304 if (!drv_found) { 2305 /* Deregister it from the OS, it's gone. */ 2306 spin_lock_irqsave(&h->lock, flags); 2307 h->drv[i]->busy_configuring = 1; 2308 spin_unlock_irqrestore(&h->lock, flags); 2309 return_code = deregister_disk(h, i, 1, via_ioctl); 2310 if (h->drv[i] != NULL) 2311 h->drv[i]->busy_configuring = 0; 2312 } 2313 } 2314 2315 /* Compare controller drive array to driver's drive array. 2316 * Check for updates in the drive information and any new drives 2317 * on the controller due to ACU adding logical drives, or changing 2318 * a logical drive's size, etc. Reregister any new/changed drives 2319 */ 2320 for (i = 0; i < num_luns; i++) { 2321 int j; 2322 2323 drv_found = 0; 2324 2325 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid)); 2326 /* Find if the LUN is already in the drive array 2327 * of the driver. If so then update its info 2328 * if not in use. If it does not exist then find 2329 * the first free index and add it. 2330 */ 2331 for (j = 0; j <= h->highest_lun; j++) { 2332 if (h->drv[j] != NULL && 2333 memcmp(h->drv[j]->LunID, lunid, 2334 sizeof(h->drv[j]->LunID)) == 0) { 2335 drv_index = j; 2336 drv_found = 1; 2337 break; 2338 } 2339 } 2340 2341 /* check if the drive was found already in the array */ 2342 if (!drv_found) { 2343 drv_index = cciss_add_gendisk(h, lunid, 0); 2344 if (drv_index == -1) 2345 goto freeret; 2346 } 2347 cciss_update_drive_info(h, drv_index, first_time, via_ioctl); 2348 } /* end for */ 2349 2350freeret: 2351 kfree(ld_buff); 2352 h->busy_configuring = 0; 2353 /* We return -1 here to tell the ACU that we have registered/updated 2354 * all of the drives that we can and to keep it from calling us 2355 * additional times. 2356 */ 2357 return -1; 2358mem_msg: 2359 dev_err(&h->pdev->dev, "out of memory\n"); 2360 h->busy_configuring = 0; 2361 goto freeret; 2362} 2363 2364static void cciss_clear_drive_info(drive_info_struct *drive_info) 2365{ 2366 /* zero out the disk size info */ 2367 drive_info->nr_blocks = 0; 2368 drive_info->block_size = 0; 2369 drive_info->heads = 0; 2370 drive_info->sectors = 0; 2371 drive_info->cylinders = 0; 2372 drive_info->raid_level = -1; 2373 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no)); 2374 memset(drive_info->model, 0, sizeof(drive_info->model)); 2375 memset(drive_info->rev, 0, sizeof(drive_info->rev)); 2376 memset(drive_info->vendor, 0, sizeof(drive_info->vendor)); 2377 /* 2378 * don't clear the LUNID though, we need to remember which 2379 * one this one is. 2380 */ 2381} 2382 2383/* This function will deregister the disk and it's queue from the 2384 * kernel. It must be called with the controller lock held and the 2385 * drv structures busy_configuring flag set. It's parameters are: 2386 * 2387 * disk = This is the disk to be deregistered 2388 * drv = This is the drive_info_struct associated with the disk to be 2389 * deregistered. It contains information about the disk used 2390 * by the driver. 2391 * clear_all = This flag determines whether or not the disk information 2392 * is going to be completely cleared out and the highest_lun 2393 * reset. Sometimes we want to clear out information about 2394 * the disk in preparation for re-adding it. In this case 2395 * the highest_lun should be left unchanged and the LunID 2396 * should not be cleared. 2397 * via_ioctl 2398 * This indicates whether we've reached this path via ioctl. 2399 * This affects the maximum usage count allowed for c0d0 to be messed with. 2400 * If this path is reached via ioctl(), then the max_usage_count will 2401 * be 1, as the process calling ioctl() has got to have the device open. 2402 * If we get here via sysfs, then the max usage count will be zero. 2403*/ 2404static int deregister_disk(ctlr_info_t *h, int drv_index, 2405 int clear_all, int via_ioctl) 2406{ 2407 int i; 2408 struct gendisk *disk; 2409 drive_info_struct *drv; 2410 int recalculate_highest_lun; 2411 2412 if (!capable(CAP_SYS_RAWIO)) 2413 return -EPERM; 2414 2415 drv = h->drv[drv_index]; 2416 disk = h->gendisk[drv_index]; 2417 2418 /* make sure logical volume is NOT is use */ 2419 if (clear_all || (h->gendisk[0] == disk)) { 2420 if (drv->usage_count > via_ioctl) 2421 return -EBUSY; 2422 } else if (drv->usage_count > 0) 2423 return -EBUSY; 2424 2425 recalculate_highest_lun = (drv == h->drv[h->highest_lun]); 2426 2427 /* invalidate the devices and deregister the disk. If it is disk 2428 * zero do not deregister it but just zero out it's values. This 2429 * allows us to delete disk zero but keep the controller registered. 2430 */ 2431 if (h->gendisk[0] != disk) { 2432 struct request_queue *q = disk->queue; 2433 if (disk->flags & GENHD_FL_UP) { 2434 cciss_destroy_ld_sysfs_entry(h, drv_index, 0); 2435 del_gendisk(disk); 2436 } 2437 if (q) 2438 blk_cleanup_queue(q); 2439 /* If clear_all is set then we are deleting the logical 2440 * drive, not just refreshing its info. For drives 2441 * other than disk 0 we will call put_disk. We do not 2442 * do this for disk 0 as we need it to be able to 2443 * configure the controller. 2444 */ 2445 if (clear_all){ 2446 /* This isn't pretty, but we need to find the 2447 * disk in our array and NULL our the pointer. 2448 * This is so that we will call alloc_disk if 2449 * this index is used again later. 2450 */ 2451 for (i=0; i < CISS_MAX_LUN; i++){ 2452 if (h->gendisk[i] == disk) { 2453 h->gendisk[i] = NULL; 2454 break; 2455 } 2456 } 2457 put_disk(disk); 2458 } 2459 } else { 2460 set_capacity(disk, 0); 2461 cciss_clear_drive_info(drv); 2462 } 2463 2464 --h->num_luns; 2465 2466 /* if it was the last disk, find the new hightest lun */ 2467 if (clear_all && recalculate_highest_lun) { 2468 int newhighest = -1; 2469 for (i = 0; i <= h->highest_lun; i++) { 2470 /* if the disk has size > 0, it is available */ 2471 if (h->drv[i] && h->drv[i]->heads) 2472 newhighest = i; 2473 } 2474 h->highest_lun = newhighest; 2475 } 2476 return 0; 2477} 2478 2479static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff, 2480 size_t size, __u8 page_code, unsigned char *scsi3addr, 2481 int cmd_type) 2482{ 2483 u64bit buff_dma_handle; 2484 int status = IO_OK; 2485 2486 c->cmd_type = CMD_IOCTL_PEND; 2487 c->Header.ReplyQueue = 0; 2488 if (buff != NULL) { 2489 c->Header.SGList = 1; 2490 c->Header.SGTotal = 1; 2491 } else { 2492 c->Header.SGList = 0; 2493 c->Header.SGTotal = 0; 2494 } 2495 c->Header.Tag.lower = c->busaddr; 2496 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 2497 2498 c->Request.Type.Type = cmd_type; 2499 if (cmd_type == TYPE_CMD) { 2500 switch (cmd) { 2501 case CISS_INQUIRY: 2502 /* are we trying to read a vital product page */ 2503 if (page_code != 0) { 2504 c->Request.CDB[1] = 0x01; 2505 c->Request.CDB[2] = page_code; 2506 } 2507 c->Request.CDBLen = 6; 2508 c->Request.Type.Attribute = ATTR_SIMPLE; 2509 c->Request.Type.Direction = XFER_READ; 2510 c->Request.Timeout = 0; 2511 c->Request.CDB[0] = CISS_INQUIRY; 2512 c->Request.CDB[4] = size & 0xFF; 2513 break; 2514 case CISS_REPORT_LOG: 2515 case CISS_REPORT_PHYS: 2516 /* Talking to controller so It's a physical command 2517 mode = 00 target = 0. Nothing to write. 2518 */ 2519 c->Request.CDBLen = 12; 2520 c->Request.Type.Attribute = ATTR_SIMPLE; 2521 c->Request.Type.Direction = XFER_READ; 2522 c->Request.Timeout = 0; 2523 c->Request.CDB[0] = cmd; 2524 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 2525 c->Request.CDB[7] = (size >> 16) & 0xFF; 2526 c->Request.CDB[8] = (size >> 8) & 0xFF; 2527 c->Request.CDB[9] = size & 0xFF; 2528 break; 2529 2530 case CCISS_READ_CAPACITY: 2531 c->Request.CDBLen = 10; 2532 c->Request.Type.Attribute = ATTR_SIMPLE; 2533 c->Request.Type.Direction = XFER_READ; 2534 c->Request.Timeout = 0; 2535 c->Request.CDB[0] = cmd; 2536 break; 2537 case CCISS_READ_CAPACITY_16: 2538 c->Request.CDBLen = 16; 2539 c->Request.Type.Attribute = ATTR_SIMPLE; 2540 c->Request.Type.Direction = XFER_READ; 2541 c->Request.Timeout = 0; 2542 c->Request.CDB[0] = cmd; 2543 c->Request.CDB[1] = 0x10; 2544 c->Request.CDB[10] = (size >> 24) & 0xFF; 2545 c->Request.CDB[11] = (size >> 16) & 0xFF; 2546 c->Request.CDB[12] = (size >> 8) & 0xFF; 2547 c->Request.CDB[13] = size & 0xFF; 2548 c->Request.Timeout = 0; 2549 c->Request.CDB[0] = cmd; 2550 break; 2551 case CCISS_CACHE_FLUSH: 2552 c->Request.CDBLen = 12; 2553 c->Request.Type.Attribute = ATTR_SIMPLE; 2554 c->Request.Type.Direction = XFER_WRITE; 2555 c->Request.Timeout = 0; 2556 c->Request.CDB[0] = BMIC_WRITE; 2557 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 2558 break; 2559 case TEST_UNIT_READY: 2560 c->Request.CDBLen = 6; 2561 c->Request.Type.Attribute = ATTR_SIMPLE; 2562 c->Request.Type.Direction = XFER_NONE; 2563 c->Request.Timeout = 0; 2564 break; 2565 default: 2566 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd); 2567 return IO_ERROR; 2568 } 2569 } else if (cmd_type == TYPE_MSG) { 2570 switch (cmd) { 2571 case 0: /* ABORT message */ 2572 c->Request.CDBLen = 12; 2573 c->Request.Type.Attribute = ATTR_SIMPLE; 2574 c->Request.Type.Direction = XFER_WRITE; 2575 c->Request.Timeout = 0; 2576 c->Request.CDB[0] = cmd; /* abort */ 2577 c->Request.CDB[1] = 0; /* abort a command */ 2578 /* buff contains the tag of the command to abort */ 2579 memcpy(&c->Request.CDB[4], buff, 8); 2580 break; 2581 case 1: /* RESET message */ 2582 c->Request.CDBLen = 16; 2583 c->Request.Type.Attribute = ATTR_SIMPLE; 2584 c->Request.Type.Direction = XFER_NONE; 2585 c->Request.Timeout = 0; 2586 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 2587 c->Request.CDB[0] = cmd; /* reset */ 2588 c->Request.CDB[1] = 0x03; /* reset a target */ 2589 break; 2590 case 3: /* No-Op message */ 2591 c->Request.CDBLen = 1; 2592 c->Request.Type.Attribute = ATTR_SIMPLE; 2593 c->Request.Type.Direction = XFER_WRITE; 2594 c->Request.Timeout = 0; 2595 c->Request.CDB[0] = cmd; 2596 break; 2597 default: 2598 dev_warn(&h->pdev->dev, 2599 "unknown message type %d\n", cmd); 2600 return IO_ERROR; 2601 } 2602 } else { 2603 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 2604 return IO_ERROR; 2605 } 2606 /* Fill in the scatter gather information */ 2607 if (size > 0) { 2608 buff_dma_handle.val = (__u64) pci_map_single(h->pdev, 2609 buff, size, 2610 PCI_DMA_BIDIRECTIONAL); 2611 c->SG[0].Addr.lower = buff_dma_handle.val32.lower; 2612 c->SG[0].Addr.upper = buff_dma_handle.val32.upper; 2613 c->SG[0].Len = size; 2614 c->SG[0].Ext = 0; /* we are not chaining */ 2615 } 2616 return status; 2617} 2618 2619static int check_target_status(ctlr_info_t *h, CommandList_struct *c) 2620{ 2621 switch (c->err_info->ScsiStatus) { 2622 case SAM_STAT_GOOD: 2623 return IO_OK; 2624 case SAM_STAT_CHECK_CONDITION: 2625 switch (0xf & c->err_info->SenseInfo[2]) { 2626 case 0: return IO_OK; /* no sense */ 2627 case 1: return IO_OK; /* recovered error */ 2628 default: 2629 if (check_for_unit_attention(h, c)) 2630 return IO_NEEDS_RETRY; 2631 dev_warn(&h->pdev->dev, "cmd 0x%02x " 2632 "check condition, sense key = 0x%02x\n", 2633 c->Request.CDB[0], c->err_info->SenseInfo[2]); 2634 } 2635 break; 2636 default: 2637 dev_warn(&h->pdev->dev, "cmd 0x%02x" 2638 "scsi status = 0x%02x\n", 2639 c->Request.CDB[0], c->err_info->ScsiStatus); 2640 break; 2641 } 2642 return IO_ERROR; 2643} 2644 2645static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c) 2646{ 2647 int return_status = IO_OK; 2648 2649 if (c->err_info->CommandStatus == CMD_SUCCESS) 2650 return IO_OK; 2651 2652 switch (c->err_info->CommandStatus) { 2653 case CMD_TARGET_STATUS: 2654 return_status = check_target_status(h, c); 2655 break; 2656 case CMD_DATA_UNDERRUN: 2657 case CMD_DATA_OVERRUN: 2658 /* expected for inquiry and report lun commands */ 2659 break; 2660 case CMD_INVALID: 2661 dev_warn(&h->pdev->dev, "cmd 0x%02x is " 2662 "reported invalid\n", c->Request.CDB[0]); 2663 return_status = IO_ERROR; 2664 break; 2665 case CMD_PROTOCOL_ERR: 2666 dev_warn(&h->pdev->dev, "cmd 0x%02x has " 2667 "protocol error\n", c->Request.CDB[0]); 2668 return_status = IO_ERROR; 2669 break; 2670 case CMD_HARDWARE_ERR: 2671 dev_warn(&h->pdev->dev, "cmd 0x%02x had " 2672 " hardware error\n", c->Request.CDB[0]); 2673 return_status = IO_ERROR; 2674 break; 2675 case CMD_CONNECTION_LOST: 2676 dev_warn(&h->pdev->dev, "cmd 0x%02x had " 2677 "connection lost\n", c->Request.CDB[0]); 2678 return_status = IO_ERROR; 2679 break; 2680 case CMD_ABORTED: 2681 dev_warn(&h->pdev->dev, "cmd 0x%02x was " 2682 "aborted\n", c->Request.CDB[0]); 2683 return_status = IO_ERROR; 2684 break; 2685 case CMD_ABORT_FAILED: 2686 dev_warn(&h->pdev->dev, "cmd 0x%02x reports " 2687 "abort failed\n", c->Request.CDB[0]); 2688 return_status = IO_ERROR; 2689 break; 2690 case CMD_UNSOLICITED_ABORT: 2691 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n", 2692 c->Request.CDB[0]); 2693 return_status = IO_NEEDS_RETRY; 2694 break; 2695 default: 2696 dev_warn(&h->pdev->dev, "cmd 0x%02x returned " 2697 "unknown status %x\n", c->Request.CDB[0], 2698 c->err_info->CommandStatus); 2699 return_status = IO_ERROR; 2700 } 2701 return return_status; 2702} 2703 2704static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, 2705 int attempt_retry) 2706{ 2707 DECLARE_COMPLETION_ONSTACK(wait); 2708 u64bit buff_dma_handle; 2709 int return_status = IO_OK; 2710 2711resend_cmd2: 2712 c->waiting = &wait; 2713 enqueue_cmd_and_start_io(h, c); 2714 2715 wait_for_completion(&wait); 2716 2717 if (c->err_info->CommandStatus == 0 || !attempt_retry) 2718 goto command_done; 2719 2720 return_status = process_sendcmd_error(h, c); 2721 2722 if (return_status == IO_NEEDS_RETRY && 2723 c->retry_count < MAX_CMD_RETRIES) { 2724 dev_warn(&h->pdev->dev, "retrying 0x%02x\n", 2725 c->Request.CDB[0]); 2726 c->retry_count++; 2727 /* erase the old error information */ 2728 memset(c->err_info, 0, sizeof(ErrorInfo_struct)); 2729 return_status = IO_OK; 2730 INIT_COMPLETION(wait); 2731 goto resend_cmd2; 2732 } 2733 2734command_done: 2735 /* unlock the buffers from DMA */ 2736 buff_dma_handle.val32.lower = c->SG[0].Addr.lower; 2737 buff_dma_handle.val32.upper = c->SG[0].Addr.upper; 2738 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val, 2739 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL); 2740 return return_status; 2741} 2742 2743static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, 2744 __u8 page_code, unsigned char scsi3addr[], 2745 int cmd_type) 2746{ 2747 CommandList_struct *c; 2748 int return_status; 2749 2750 c = cmd_special_alloc(h); 2751 if (!c) 2752 return -ENOMEM; 2753 return_status = fill_cmd(h, c, cmd, buff, size, page_code, 2754 scsi3addr, cmd_type); 2755 if (return_status == IO_OK) 2756 return_status = sendcmd_withirq_core(h, c, 1); 2757 2758 cmd_special_free(h, c); 2759 return return_status; 2760} 2761 2762static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, 2763 sector_t total_size, 2764 unsigned int block_size, 2765 InquiryData_struct *inq_buff, 2766 drive_info_struct *drv) 2767{ 2768 int return_code; 2769 unsigned long t; 2770 unsigned char scsi3addr[8]; 2771 2772 memset(inq_buff, 0, sizeof(InquiryData_struct)); 2773 log_unit_to_scsi3addr(h, scsi3addr, logvol); 2774 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, 2775 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD); 2776 if (return_code == IO_OK) { 2777 if (inq_buff->data_byte[8] == 0xFF) { 2778 dev_warn(&h->pdev->dev, 2779 "reading geometry failed, volume " 2780 "does not support reading geometry\n"); 2781 drv->heads = 255; 2782 drv->sectors = 32; /* Sectors per track */ 2783 drv->cylinders = total_size + 1; 2784 drv->raid_level = RAID_UNKNOWN; 2785 } else { 2786 drv->heads = inq_buff->data_byte[6]; 2787 drv->sectors = inq_buff->data_byte[7]; 2788 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8; 2789 drv->cylinders += inq_buff->data_byte[5]; 2790 drv->raid_level = inq_buff->data_byte[8]; 2791 } 2792 drv->block_size = block_size; 2793 drv->nr_blocks = total_size + 1; 2794 t = drv->heads * drv->sectors; 2795 if (t > 1) { 2796 sector_t real_size = total_size + 1; 2797 unsigned long rem = sector_div(real_size, t); 2798 if (rem) 2799 real_size++; 2800 drv->cylinders = real_size; 2801 } 2802 } else { /* Get geometry failed */ 2803 dev_warn(&h->pdev->dev, "reading geometry failed\n"); 2804 } 2805} 2806 2807static void 2808cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size, 2809 unsigned int *block_size) 2810{ 2811 ReadCapdata_struct *buf; 2812 int return_code; 2813 unsigned char scsi3addr[8]; 2814 2815 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL); 2816 if (!buf) { 2817 dev_warn(&h->pdev->dev, "out of memory\n"); 2818 return; 2819 } 2820 2821 log_unit_to_scsi3addr(h, scsi3addr, logvol); 2822 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf, 2823 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD); 2824 if (return_code == IO_OK) { 2825 *total_size = be32_to_cpu(*(__be32 *) buf->total_size); 2826 *block_size = be32_to_cpu(*(__be32 *) buf->block_size); 2827 } else { /* read capacity command failed */ 2828 dev_warn(&h->pdev->dev, "read capacity failed\n"); 2829 *total_size = 0; 2830 *block_size = BLOCK_SIZE; 2831 } 2832 kfree(buf); 2833} 2834 2835static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, 2836 sector_t *total_size, unsigned int *block_size) 2837{ 2838 ReadCapdata_struct_16 *buf; 2839 int return_code; 2840 unsigned char scsi3addr[8]; 2841 2842 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL); 2843 if (!buf) { 2844 dev_warn(&h->pdev->dev, "out of memory\n"); 2845 return; 2846 } 2847 2848 log_unit_to_scsi3addr(h, scsi3addr, logvol); 2849 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16, 2850 buf, sizeof(ReadCapdata_struct_16), 2851 0, scsi3addr, TYPE_CMD); 2852 if (return_code == IO_OK) { 2853 *total_size = be64_to_cpu(*(__be64 *) buf->total_size); 2854 *block_size = be32_to_cpu(*(__be32 *) buf->block_size); 2855 } else { /* read capacity command failed */ 2856 dev_warn(&h->pdev->dev, "read capacity failed\n"); 2857 *total_size = 0; 2858 *block_size = BLOCK_SIZE; 2859 } 2860 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n", 2861 (unsigned long long)*total_size+1, *block_size); 2862 kfree(buf); 2863} 2864 2865static int cciss_revalidate(struct gendisk *disk) 2866{ 2867 ctlr_info_t *h = get_host(disk); 2868 drive_info_struct *drv = get_drv(disk); 2869 int logvol; 2870 int FOUND = 0; 2871 unsigned int block_size; 2872 sector_t total_size; 2873 InquiryData_struct *inq_buff = NULL; 2874 2875 for (logvol = 0; logvol <= h->highest_lun; logvol++) { 2876 if (!h->drv[logvol]) 2877 continue; 2878 if (memcmp(h->drv[logvol]->LunID, drv->LunID, 2879 sizeof(drv->LunID)) == 0) { 2880 FOUND = 1; 2881 break; 2882 } 2883 } 2884 2885 if (!FOUND) 2886 return 1; 2887 2888 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); 2889 if (inq_buff == NULL) { 2890 dev_warn(&h->pdev->dev, "out of memory\n"); 2891 return 1; 2892 } 2893 if (h->cciss_read == CCISS_READ_10) { 2894 cciss_read_capacity(h, logvol, 2895 &total_size, &block_size); 2896 } else { 2897 cciss_read_capacity_16(h, logvol, 2898 &total_size, &block_size); 2899 } 2900 cciss_geometry_inquiry(h, logvol, total_size, block_size, 2901 inq_buff, drv); 2902 2903 blk_queue_logical_block_size(drv->queue, drv->block_size); 2904 set_capacity(disk, drv->nr_blocks); 2905 2906 kfree(inq_buff); 2907 return 0; 2908} 2909 2910/* 2911 * Map (physical) PCI mem into (virtual) kernel space 2912 */ 2913static void __iomem *remap_pci_mem(ulong base, ulong size) 2914{ 2915 ulong page_base = ((ulong) base) & PAGE_MASK; 2916 ulong page_offs = ((ulong) base) - page_base; 2917 void __iomem *page_remapped = ioremap(page_base, page_offs + size); 2918 2919 return page_remapped ? (page_remapped + page_offs) : NULL; 2920} 2921 2922/* 2923 * Takes jobs of the Q and sends them to the hardware, then puts it on 2924 * the Q to wait for completion. 2925 */ 2926static void start_io(ctlr_info_t *h) 2927{ 2928 CommandList_struct *c; 2929 2930 while (!list_empty(&h->reqQ)) { 2931 c = list_entry(h->reqQ.next, CommandList_struct, list); 2932 /* can't do anything if fifo is full */ 2933 if ((h->access.fifo_full(h))) { 2934 dev_warn(&h->pdev->dev, "fifo full\n"); 2935 break; 2936 } 2937 2938 /* Get the first entry from the Request Q */ 2939 removeQ(c); 2940 h->Qdepth--; 2941 2942 /* Tell the controller execute command */ 2943 h->access.submit_command(h, c); 2944 2945 /* Put job onto the completed Q */ 2946 addQ(&h->cmpQ, c); 2947 } 2948} 2949 2950/* Assumes that h->lock is held. */ 2951/* Zeros out the error record and then resends the command back */ 2952/* to the controller */ 2953static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c) 2954{ 2955 /* erase the old error information */ 2956 memset(c->err_info, 0, sizeof(ErrorInfo_struct)); 2957 2958 /* add it to software queue and then send it to the controller */ 2959 addQ(&h->reqQ, c); 2960 h->Qdepth++; 2961 if (h->Qdepth > h->maxQsinceinit) 2962 h->maxQsinceinit = h->Qdepth; 2963 2964 start_io(h); 2965} 2966 2967static inline unsigned int make_status_bytes(unsigned int scsi_status_byte, 2968 unsigned int msg_byte, unsigned int host_byte, 2969 unsigned int driver_byte) 2970{ 2971 /* inverse of macros in scsi.h */ 2972 return (scsi_status_byte & 0xff) | 2973 ((msg_byte & 0xff) << 8) | 2974 ((host_byte & 0xff) << 16) | 2975 ((driver_byte & 0xff) << 24); 2976} 2977 2978static inline int evaluate_target_status(ctlr_info_t *h, 2979 CommandList_struct *cmd, int *retry_cmd) 2980{ 2981 unsigned char sense_key; 2982 unsigned char status_byte, msg_byte, host_byte, driver_byte; 2983 int error_value; 2984 2985 *retry_cmd = 0; 2986 /* If we get in here, it means we got "target status", that is, scsi status */ 2987 status_byte = cmd->err_info->ScsiStatus; 2988 driver_byte = DRIVER_OK; 2989 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */ 2990 2991 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) 2992 host_byte = DID_PASSTHROUGH; 2993 else 2994 host_byte = DID_OK; 2995 2996 error_value = make_status_bytes(status_byte, msg_byte, 2997 host_byte, driver_byte); 2998 2999 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) { 3000 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) 3001 dev_warn(&h->pdev->dev, "cmd %p " 3002 "has SCSI Status 0x%x\n", 3003 cmd, cmd->err_info->ScsiStatus); 3004 return error_value; 3005 } 3006 3007 /* check the sense key */ 3008 sense_key = 0xf & cmd->err_info->SenseInfo[2]; 3009 /* no status or recovered error */ 3010 if (((sense_key == 0x0) || (sense_key == 0x1)) && 3011 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)) 3012 error_value = 0; 3013 3014 if (check_for_unit_attention(h, cmd)) { 3015 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC); 3016 return 0; 3017 } 3018 3019 /* Not SG_IO or similar? */ 3020 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) { 3021 if (error_value != 0) 3022 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION" 3023 " sense key = 0x%x\n", cmd, sense_key); 3024 return error_value; 3025 } 3026 3027 /* SG_IO or similar, copy sense data back */ 3028 if (cmd->rq->sense) { 3029 if (cmd->rq->sense_len > cmd->err_info->SenseLen) 3030 cmd->rq->sense_len = cmd->err_info->SenseLen; 3031 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo, 3032 cmd->rq->sense_len); 3033 } else 3034 cmd->rq->sense_len = 0; 3035 3036 return error_value; 3037} 3038 3039/* checks the status of the job and calls complete buffers to mark all 3040 * buffers for the completed job. Note that this function does not need 3041 * to hold the hba/queue lock. 3042 */ 3043static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd, 3044 int timeout) 3045{ 3046 int retry_cmd = 0; 3047 struct request *rq = cmd->rq; 3048 3049 rq->errors = 0; 3050 3051 if (timeout) 3052 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT); 3053 3054 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */ 3055 goto after_error_processing; 3056 3057 switch (cmd->err_info->CommandStatus) { 3058 case CMD_TARGET_STATUS: 3059 rq->errors = evaluate_target_status(h, cmd, &retry_cmd); 3060 break; 3061 case CMD_DATA_UNDERRUN: 3062 if (cmd->rq->cmd_type == REQ_TYPE_FS) { 3063 dev_warn(&h->pdev->dev, "cmd %p has" 3064 " completed with data underrun " 3065 "reported\n", cmd); 3066 cmd->rq->resid_len = cmd->err_info->ResidualCnt; 3067 } 3068 break; 3069 case CMD_DATA_OVERRUN: 3070 if (cmd->rq->cmd_type == REQ_TYPE_FS) 3071 dev_warn(&h->pdev->dev, "cciss: cmd %p has" 3072 " completed with data overrun " 3073 "reported\n", cmd); 3074 break; 3075 case CMD_INVALID: 3076 dev_warn(&h->pdev->dev, "cciss: cmd %p is " 3077 "reported invalid\n", cmd); 3078 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3079 cmd->err_info->CommandStatus, DRIVER_OK, 3080 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3081 DID_PASSTHROUGH : DID_ERROR); 3082 break; 3083 case CMD_PROTOCOL_ERR: 3084 dev_warn(&h->pdev->dev, "cciss: cmd %p has " 3085 "protocol error\n", cmd); 3086 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3087 cmd->err_info->CommandStatus, DRIVER_OK, 3088 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3089 DID_PASSTHROUGH : DID_ERROR); 3090 break; 3091 case CMD_HARDWARE_ERR: 3092 dev_warn(&h->pdev->dev, "cciss: cmd %p had " 3093 " hardware error\n", cmd); 3094 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3095 cmd->err_info->CommandStatus, DRIVER_OK, 3096 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3097 DID_PASSTHROUGH : DID_ERROR); 3098 break; 3099 case CMD_CONNECTION_LOST: 3100 dev_warn(&h->pdev->dev, "cciss: cmd %p had " 3101 "connection lost\n", cmd); 3102 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3103 cmd->err_info->CommandStatus, DRIVER_OK, 3104 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3105 DID_PASSTHROUGH : DID_ERROR); 3106 break; 3107 case CMD_ABORTED: 3108 dev_warn(&h->pdev->dev, "cciss: cmd %p was " 3109 "aborted\n", cmd); 3110 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3111 cmd->err_info->CommandStatus, DRIVER_OK, 3112 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3113 DID_PASSTHROUGH : DID_ABORT); 3114 break; 3115 case CMD_ABORT_FAILED: 3116 dev_warn(&h->pdev->dev, "cciss: cmd %p reports " 3117 "abort failed\n", cmd); 3118 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3119 cmd->err_info->CommandStatus, DRIVER_OK, 3120 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3121 DID_PASSTHROUGH : DID_ERROR); 3122 break; 3123 case CMD_UNSOLICITED_ABORT: 3124 dev_warn(&h->pdev->dev, "cciss%d: unsolicited " 3125 "abort %p\n", h->ctlr, cmd); 3126 if (cmd->retry_count < MAX_CMD_RETRIES) { 3127 retry_cmd = 1; 3128 dev_warn(&h->pdev->dev, "retrying %p\n", cmd); 3129 cmd->retry_count++; 3130 } else 3131 dev_warn(&h->pdev->dev, 3132 "%p retried too many times\n", cmd); 3133 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3134 cmd->err_info->CommandStatus, DRIVER_OK, 3135 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3136 DID_PASSTHROUGH : DID_ABORT); 3137 break; 3138 case CMD_TIMEOUT: 3139 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd); 3140 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3141 cmd->err_info->CommandStatus, DRIVER_OK, 3142 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3143 DID_PASSTHROUGH : DID_ERROR); 3144 break; 3145 default: 3146 dev_warn(&h->pdev->dev, "cmd %p returned " 3147 "unknown status %x\n", cmd, 3148 cmd->err_info->CommandStatus); 3149 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3150 cmd->err_info->CommandStatus, DRIVER_OK, 3151 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3152 DID_PASSTHROUGH : DID_ERROR); 3153 } 3154 3155after_error_processing: 3156 3157 /* We need to return this command */ 3158 if (retry_cmd) { 3159 resend_cciss_cmd(h, cmd); 3160 return; 3161 } 3162 cmd->rq->completion_data = cmd; 3163 blk_complete_request(cmd->rq); 3164} 3165 3166static inline u32 cciss_tag_contains_index(u32 tag) 3167{ 3168#define DIRECT_LOOKUP_BIT 0x10 3169 return tag & DIRECT_LOOKUP_BIT; 3170} 3171 3172static inline u32 cciss_tag_to_index(u32 tag) 3173{ 3174#define DIRECT_LOOKUP_SHIFT 5 3175 return tag >> DIRECT_LOOKUP_SHIFT; 3176} 3177 3178static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag) 3179{ 3180#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 3181#define CCISS_SIMPLE_ERROR_BITS 0x03 3182 if (likely(h->transMethod & CFGTBL_Trans_Performant)) 3183 return tag & ~CCISS_PERF_ERROR_BITS; 3184 return tag & ~CCISS_SIMPLE_ERROR_BITS; 3185} 3186 3187static inline void cciss_mark_tag_indexed(u32 *tag) 3188{ 3189 *tag |= DIRECT_LOOKUP_BIT; 3190} 3191 3192static inline void cciss_set_tag_index(u32 *tag, u32 index) 3193{ 3194 *tag |= (index << DIRECT_LOOKUP_SHIFT); 3195} 3196 3197/* 3198 * Get a request and submit it to the controller. 3199 */ 3200static void do_cciss_request(struct request_queue *q) 3201{ 3202 ctlr_info_t *h = q->queuedata; 3203 CommandList_struct *c; 3204 sector_t start_blk; 3205 int seg; 3206 struct request *creq; 3207 u64bit temp64; 3208 struct scatterlist *tmp_sg; 3209 SGDescriptor_struct *curr_sg; 3210 drive_info_struct *drv; 3211 int i, dir; 3212 int sg_index = 0; 3213 int chained = 0; 3214 3215 queue: 3216 creq = blk_peek_request(q); 3217 if (!creq) 3218 goto startio; 3219 3220 BUG_ON(creq->nr_phys_segments > h->maxsgentries); 3221 3222 c = cmd_alloc(h); 3223 if (!c) 3224 goto full; 3225 3226 blk_start_request(creq); 3227 3228 tmp_sg = h->scatter_list[c->cmdindex]; 3229 spin_unlock_irq(q->queue_lock); 3230 3231 c->cmd_type = CMD_RWREQ; 3232 c->rq = creq; 3233 3234 /* fill in the request */ 3235 drv = creq->rq_disk->private_data; 3236 c->Header.ReplyQueue = 0; /* unused in simple mode */ 3237 /* got command from pool, so use the command block index instead */ 3238 /* for direct lookups. */ 3239 /* The first 2 bits are reserved for controller error reporting. */ 3240 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex); 3241 cciss_mark_tag_indexed(&c->Header.Tag.lower); 3242 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID)); 3243 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */ 3244 c->Request.Type.Type = TYPE_CMD; /* It is a command. */ 3245 c->Request.Type.Attribute = ATTR_SIMPLE; 3246 c->Request.Type.Direction = 3247 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE; 3248 c->Request.Timeout = 0; /* Don't time out */ 3249 c->Request.CDB[0] = 3250 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write; 3251 start_blk = blk_rq_pos(creq); 3252 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n", 3253 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq)); 3254 sg_init_table(tmp_sg, h->maxsgentries); 3255 seg = blk_rq_map_sg(q, creq, tmp_sg); 3256 3257 /* get the DMA records for the setup */ 3258 if (c->Request.Type.Direction == XFER_READ) 3259 dir = PCI_DMA_FROMDEVICE; 3260 else 3261 dir = PCI_DMA_TODEVICE; 3262 3263 curr_sg = c->SG; 3264 sg_index = 0; 3265 chained = 0; 3266 3267 for (i = 0; i < seg; i++) { 3268 if (((sg_index+1) == (h->max_cmd_sgentries)) && 3269 !chained && ((seg - i) > 1)) { 3270 /* Point to next chain block. */ 3271 curr_sg = h->cmd_sg_list[c->cmdindex]; 3272 sg_index = 0; 3273 chained = 1; 3274 } 3275 curr_sg[sg_index].Len = tmp_sg[i].length; 3276 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]), 3277 tmp_sg[i].offset, 3278 tmp_sg[i].length, dir); 3279 curr_sg[sg_index].Addr.lower = temp64.val32.lower; 3280 curr_sg[sg_index].Addr.upper = temp64.val32.upper; 3281 curr_sg[sg_index].Ext = 0; /* we are not chaining */ 3282 ++sg_index; 3283 } 3284 if (chained) 3285 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex], 3286 (seg - (h->max_cmd_sgentries - 1)) * 3287 sizeof(SGDescriptor_struct)); 3288 3289 /* track how many SG entries we are using */ 3290 if (seg > h->maxSG) 3291 h->maxSG = seg; 3292 3293 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments " 3294 "chained[%d]\n", 3295 blk_rq_sectors(creq), seg, chained); 3296 3297 c->Header.SGTotal = seg + chained; 3298 if (seg <= h->max_cmd_sgentries) 3299 c->Header.SGList = c->Header.SGTotal; 3300 else 3301 c->Header.SGList = h->max_cmd_sgentries; 3302 set_performant_mode(h, c); 3303 3304 if (likely(creq->cmd_type == REQ_TYPE_FS)) { 3305 if(h->cciss_read == CCISS_READ_10) { 3306 c->Request.CDB[1] = 0; 3307 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */ 3308 c->Request.CDB[3] = (start_blk >> 16) & 0xff; 3309 c->Request.CDB[4] = (start_blk >> 8) & 0xff; 3310 c->Request.CDB[5] = start_blk & 0xff; 3311 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */ 3312 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff; 3313 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff; 3314 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0; 3315 } else { 3316 u32 upper32 = upper_32_bits(start_blk); 3317 3318 c->Request.CDBLen = 16; 3319 c->Request.CDB[1]= 0; 3320 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */ 3321 c->Request.CDB[3]= (upper32 >> 16) & 0xff; 3322 c->Request.CDB[4]= (upper32 >> 8) & 0xff; 3323 c->Request.CDB[5]= upper32 & 0xff; 3324 c->Request.CDB[6]= (start_blk >> 24) & 0xff; 3325 c->Request.CDB[7]= (start_blk >> 16) & 0xff; 3326 c->Request.CDB[8]= (start_blk >> 8) & 0xff; 3327 c->Request.CDB[9]= start_blk & 0xff; 3328 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff; 3329 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff; 3330 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff; 3331 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff; 3332 c->Request.CDB[14] = c->Request.CDB[15] = 0; 3333 } 3334 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) { 3335 c->Request.CDBLen = creq->cmd_len; 3336 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB); 3337 } else { 3338 dev_warn(&h->pdev->dev, "bad request type %d\n", 3339 creq->cmd_type); 3340 BUG(); 3341 } 3342 3343 spin_lock_irq(q->queue_lock); 3344 3345 addQ(&h->reqQ, c); 3346 h->Qdepth++; 3347 if (h->Qdepth > h->maxQsinceinit) 3348 h->maxQsinceinit = h->Qdepth; 3349 3350 goto queue; 3351full: 3352 blk_stop_queue(q); 3353startio: 3354 /* We will already have the driver lock here so not need 3355 * to lock it. 3356 */ 3357 start_io(h); 3358} 3359 3360static inline unsigned long get_next_completion(ctlr_info_t *h) 3361{ 3362 return h->access.command_completed(h); 3363} 3364 3365static inline int interrupt_pending(ctlr_info_t *h) 3366{ 3367 return h->access.intr_pending(h); 3368} 3369 3370static inline long interrupt_not_for_us(ctlr_info_t *h) 3371{ 3372 return ((h->access.intr_pending(h) == 0) || 3373 (h->interrupts_enabled == 0)); 3374} 3375 3376static inline int bad_tag(ctlr_info_t *h, u32 tag_index, 3377 u32 raw_tag) 3378{ 3379 if (unlikely(tag_index >= h->nr_cmds)) { 3380 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 3381 return 1; 3382 } 3383 return 0; 3384} 3385 3386static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c, 3387 u32 raw_tag) 3388{ 3389 removeQ(c); 3390 if (likely(c->cmd_type == CMD_RWREQ)) 3391 complete_command(h, c, 0); 3392 else if (c->cmd_type == CMD_IOCTL_PEND) 3393 complete(c->waiting); 3394#ifdef CONFIG_CISS_SCSI_TAPE 3395 else if (c->cmd_type == CMD_SCSI) 3396 complete_scsi_command(c, 0, raw_tag); 3397#endif 3398} 3399 3400static inline u32 next_command(ctlr_info_t *h) 3401{ 3402 u32 a; 3403 3404 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 3405 return h->access.command_completed(h); 3406 3407 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { 3408 a = *(h->reply_pool_head); /* Next cmd in ring buffer */ 3409 (h->reply_pool_head)++; 3410 h->commands_outstanding--; 3411 } else { 3412 a = FIFO_EMPTY; 3413 } 3414 /* Check for wraparound */ 3415 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { 3416 h->reply_pool_head = h->reply_pool; 3417 h->reply_pool_wraparound ^= 1; 3418 } 3419 return a; 3420} 3421 3422/* process completion of an indexed ("direct lookup") command */ 3423static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag) 3424{ 3425 u32 tag_index; 3426 CommandList_struct *c; 3427 3428 tag_index = cciss_tag_to_index(raw_tag); 3429 if (bad_tag(h, tag_index, raw_tag)) 3430 return next_command(h); 3431 c = h->cmd_pool + tag_index; 3432 finish_cmd(h, c, raw_tag); 3433 return next_command(h); 3434} 3435 3436/* process completion of a non-indexed command */ 3437static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag) 3438{ 3439 CommandList_struct *c = NULL; 3440 __u32 busaddr_masked, tag_masked; 3441 3442 tag_masked = cciss_tag_discard_error_bits(h, raw_tag); 3443 list_for_each_entry(c, &h->cmpQ, list) { 3444 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr); 3445 if (busaddr_masked == tag_masked) { 3446 finish_cmd(h, c, raw_tag); 3447 return next_command(h); 3448 } 3449 } 3450 bad_tag(h, h->nr_cmds + 1, raw_tag); 3451 return next_command(h); 3452} 3453 3454static irqreturn_t do_cciss_intx(int irq, void *dev_id) 3455{ 3456 ctlr_info_t *h = dev_id; 3457 unsigned long flags; 3458 u32 raw_tag; 3459 3460 if (interrupt_not_for_us(h)) 3461 return IRQ_NONE; 3462 spin_lock_irqsave(&h->lock, flags); 3463 while (interrupt_pending(h)) { 3464 raw_tag = get_next_completion(h); 3465 while (raw_tag != FIFO_EMPTY) { 3466 if (cciss_tag_contains_index(raw_tag)) 3467 raw_tag = process_indexed_cmd(h, raw_tag); 3468 else 3469 raw_tag = process_nonindexed_cmd(h, raw_tag); 3470 } 3471 } 3472 spin_unlock_irqrestore(&h->lock, flags); 3473 return IRQ_HANDLED; 3474} 3475 3476/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never 3477 * check the interrupt pending register because it is not set. 3478 */ 3479static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id) 3480{ 3481 ctlr_info_t *h = dev_id; 3482 unsigned long flags; 3483 u32 raw_tag; 3484 3485 spin_lock_irqsave(&h->lock, flags); 3486 raw_tag = get_next_completion(h); 3487 while (raw_tag != FIFO_EMPTY) { 3488 if (cciss_tag_contains_index(raw_tag)) 3489 raw_tag = process_indexed_cmd(h, raw_tag); 3490 else 3491 raw_tag = process_nonindexed_cmd(h, raw_tag); 3492 } 3493 spin_unlock_irqrestore(&h->lock, flags); 3494 return IRQ_HANDLED; 3495} 3496 3497/** 3498 * add_to_scan_list() - add controller to rescan queue 3499 * @h: Pointer to the controller. 3500 * 3501 * Adds the controller to the rescan queue if not already on the queue. 3502 * 3503 * returns 1 if added to the queue, 0 if skipped (could be on the 3504 * queue already, or the controller could be initializing or shutting 3505 * down). 3506 **/ 3507static int add_to_scan_list(struct ctlr_info *h) 3508{ 3509 struct ctlr_info *test_h; 3510 int found = 0; 3511 int ret = 0; 3512 3513 if (h->busy_initializing) 3514 return 0; 3515 3516 if (!mutex_trylock(&h->busy_shutting_down)) 3517 return 0; 3518 3519 mutex_lock(&scan_mutex); 3520 list_for_each_entry(test_h, &scan_q, scan_list) { 3521 if (test_h == h) { 3522 found = 1; 3523 break; 3524 } 3525 } 3526 if (!found && !h->busy_scanning) { 3527 INIT_COMPLETION(h->scan_wait); 3528 list_add_tail(&h->scan_list, &scan_q); 3529 ret = 1; 3530 } 3531 mutex_unlock(&scan_mutex); 3532 mutex_unlock(&h->busy_shutting_down); 3533 3534 return ret; 3535} 3536 3537/** 3538 * remove_from_scan_list() - remove controller from rescan queue 3539 * @h: Pointer to the controller. 3540 * 3541 * Removes the controller from the rescan queue if present. Blocks if 3542 * the controller is currently conducting a rescan. The controller 3543 * can be in one of three states: 3544 * 1. Doesn't need a scan 3545 * 2. On the scan list, but not scanning yet (we remove it) 3546 * 3. Busy scanning (and not on the list). In this case we want to wait for 3547 * the scan to complete to make sure the scanning thread for this 3548 * controller is completely idle. 3549 **/ 3550static void remove_from_scan_list(struct ctlr_info *h) 3551{ 3552 struct ctlr_info *test_h, *tmp_h; 3553 3554 mutex_lock(&scan_mutex); 3555 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) { 3556 if (test_h == h) { /* state 2. */ 3557 list_del(&h->scan_list); 3558 complete_all(&h->scan_wait); 3559 mutex_unlock(&scan_mutex); 3560 return; 3561 } 3562 } 3563 if (h->busy_scanning) { /* state 3. */ 3564 mutex_unlock(&scan_mutex); 3565 wait_for_completion(&h->scan_wait); 3566 } else { /* state 1, nothing to do. */ 3567 mutex_unlock(&scan_mutex); 3568 } 3569} 3570 3571/** 3572 * scan_thread() - kernel thread used to rescan controllers 3573 * @data: Ignored. 3574 * 3575 * A kernel thread used scan for drive topology changes on 3576 * controllers. The thread processes only one controller at a time 3577 * using a queue. Controllers are added to the queue using 3578 * add_to_scan_list() and removed from the queue either after done 3579 * processing or using remove_from_scan_list(). 3580 * 3581 * returns 0. 3582 **/ 3583static int scan_thread(void *data) 3584{ 3585 struct ctlr_info *h; 3586 3587 while (1) { 3588 set_current_state(TASK_INTERRUPTIBLE); 3589 schedule(); 3590 if (kthread_should_stop()) 3591 break; 3592 3593 while (1) { 3594 mutex_lock(&scan_mutex); 3595 if (list_empty(&scan_q)) { 3596 mutex_unlock(&scan_mutex); 3597 break; 3598 } 3599 3600 h = list_entry(scan_q.next, 3601 struct ctlr_info, 3602 scan_list); 3603 list_del(&h->scan_list); 3604 h->busy_scanning = 1; 3605 mutex_unlock(&scan_mutex); 3606 3607 rebuild_lun_table(h, 0, 0); 3608 complete_all(&h->scan_wait); 3609 mutex_lock(&scan_mutex); 3610 h->busy_scanning = 0; 3611 mutex_unlock(&scan_mutex); 3612 } 3613 } 3614 3615 return 0; 3616} 3617 3618static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c) 3619{ 3620 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 3621 return 0; 3622 3623 switch (c->err_info->SenseInfo[12]) { 3624 case STATE_CHANGED: 3625 dev_warn(&h->pdev->dev, "a state change " 3626 "detected, command retried\n"); 3627 return 1; 3628 break; 3629 case LUN_FAILED: 3630 dev_warn(&h->pdev->dev, "LUN failure " 3631 "detected, action required\n"); 3632 return 1; 3633 break; 3634 case REPORT_LUNS_CHANGED: 3635 dev_warn(&h->pdev->dev, "report LUN data changed\n"); 3636 /* 3637 * Here, we could call add_to_scan_list and wake up the scan thread, 3638 * except that it's quite likely that we will get more than one 3639 * REPORT_LUNS_CHANGED condition in quick succession, which means 3640 * that those which occur after the first one will likely happen 3641 * *during* the scan_thread's rescan. And the rescan code is not 3642 * robust enough to restart in the middle, undoing what it has already 3643 * done, and it's not clear that it's even possible to do this, since 3644 * part of what it does is notify the block layer, which starts 3645 * doing it's own i/o to read partition tables and so on, and the 3646 * driver doesn't have visibility to know what might need undoing. 3647 * In any event, if possible, it is horribly complicated to get right 3648 * so we just don't do it for now. 3649 * 3650 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. 3651 */ 3652 return 1; 3653 break; 3654 case POWER_OR_RESET: 3655 dev_warn(&h->pdev->dev, 3656 "a power on or device reset detected\n"); 3657 return 1; 3658 break; 3659 case UNIT_ATTENTION_CLEARED: 3660 dev_warn(&h->pdev->dev, 3661 "unit attention cleared by another initiator\n"); 3662 return 1; 3663 break; 3664 default: 3665 dev_warn(&h->pdev->dev, "unknown unit attention detected\n"); 3666 return 1; 3667 } 3668} 3669 3670/* 3671 * We cannot read the structure directly, for portability we must use 3672 * the io functions. 3673 * This is for debug only. 3674 */ 3675static void print_cfg_table(ctlr_info_t *h) 3676{ 3677 int i; 3678 char temp_name[17]; 3679 CfgTable_struct *tb = h->cfgtable; 3680 3681 dev_dbg(&h->pdev->dev, "Controller Configuration information\n"); 3682 dev_dbg(&h->pdev->dev, "------------------------------------\n"); 3683 for (i = 0; i < 4; i++) 3684 temp_name[i] = readb(&(tb->Signature[i])); 3685 temp_name[4] = '\0'; 3686 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name); 3687 dev_dbg(&h->pdev->dev, " Spec Number = %d\n", 3688 readl(&(tb->SpecValence))); 3689 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n", 3690 readl(&(tb->TransportSupport))); 3691 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n", 3692 readl(&(tb->TransportActive))); 3693 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n", 3694 readl(&(tb->HostWrite.TransportRequest))); 3695 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n", 3696 readl(&(tb->HostWrite.CoalIntDelay))); 3697 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n", 3698 readl(&(tb->HostWrite.CoalIntCount))); 3699 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n", 3700 readl(&(tb->CmdsOutMax))); 3701 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n", 3702 readl(&(tb->BusTypes))); 3703 for (i = 0; i < 16; i++) 3704 temp_name[i] = readb(&(tb->ServerName[i])); 3705 temp_name[16] = '\0'; 3706 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name); 3707 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n", 3708 readl(&(tb->HeartBeat))); 3709} 3710 3711static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 3712{ 3713 int i, offset, mem_type, bar_type; 3714 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 3715 return 0; 3716 offset = 0; 3717 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 3718 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 3719 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 3720 offset += 4; 3721 else { 3722 mem_type = pci_resource_flags(pdev, i) & 3723 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 3724 switch (mem_type) { 3725 case PCI_BASE_ADDRESS_MEM_TYPE_32: 3726 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 3727 offset += 4; /* 32 bit */ 3728 break; 3729 case PCI_BASE_ADDRESS_MEM_TYPE_64: 3730 offset += 8; 3731 break; 3732 default: /* reserved in PCI 2.2 */ 3733 dev_warn(&pdev->dev, 3734 "Base address is invalid\n"); 3735 return -1; 3736 break; 3737 } 3738 } 3739 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 3740 return i + 1; 3741 } 3742 return -1; 3743} 3744 3745/* Fill in bucket_map[], given nsgs (the max number of 3746 * scatter gather elements supported) and bucket[], 3747 * which is an array of 8 integers. The bucket[] array 3748 * contains 8 different DMA transfer sizes (in 16 3749 * byte increments) which the controller uses to fetch 3750 * commands. This function fills in bucket_map[], which 3751 * maps a given number of scatter gather elements to one of 3752 * the 8 DMA transfer sizes. The point of it is to allow the 3753 * controller to only do as much DMA as needed to fetch the 3754 * command, with the DMA transfer size encoded in the lower 3755 * bits of the command address. 3756 */ 3757static void calc_bucket_map(int bucket[], int num_buckets, 3758 int nsgs, int *bucket_map) 3759{ 3760 int i, j, b, size; 3761 3762 /* even a command with 0 SGs requires 4 blocks */ 3763#define MINIMUM_TRANSFER_BLOCKS 4 3764#define NUM_BUCKETS 8 3765 /* Note, bucket_map must have nsgs+1 entries. */ 3766 for (i = 0; i <= nsgs; i++) { 3767 /* Compute size of a command with i SG entries */ 3768 size = i + MINIMUM_TRANSFER_BLOCKS; 3769 b = num_buckets; /* Assume the biggest bucket */ 3770 /* Find the bucket that is just big enough */ 3771 for (j = 0; j < 8; j++) { 3772 if (bucket[j] >= size) { 3773 b = j; 3774 break; 3775 } 3776 } 3777 /* for a command with i SG entries, use bucket b. */ 3778 bucket_map[i] = b; 3779 } 3780} 3781 3782static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h) 3783{ 3784 int i; 3785 3786 /* under certain very rare conditions, this can take awhile. 3787 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 3788 * as we enter this code.) */ 3789 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 3790 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) 3791 break; 3792 usleep_range(10000, 20000); 3793 } 3794} 3795 3796static __devinit void cciss_enter_performant_mode(ctlr_info_t *h, 3797 u32 use_short_tags) 3798{ 3799 /* This is a bit complicated. There are 8 registers on 3800 * the controller which we write to to tell it 8 different 3801 * sizes of commands which there may be. It's a way of 3802 * reducing the DMA done to fetch each command. Encoded into 3803 * each command's tag are 3 bits which communicate to the controller 3804 * which of the eight sizes that command fits within. The size of 3805 * each command depends on how many scatter gather entries there are. 3806 * Each SG entry requires 16 bytes. The eight registers are programmed 3807 * with the number of 16-byte blocks a command of that size requires. 3808 * The smallest command possible requires 5 such 16 byte blocks. 3809 * the largest command possible requires MAXSGENTRIES + 4 16-byte 3810 * blocks. Note, this only extends to the SG entries contained 3811 * within the command block, and does not extend to chained blocks 3812 * of SG elements. bft[] contains the eight values we write to 3813 * the registers. They are not evenly distributed, but have more 3814 * sizes for small commands, and fewer sizes for larger commands. 3815 */ 3816 __u32 trans_offset; 3817 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4}; 3818 /* 3819 * 5 = 1 s/g entry or 4k 3820 * 6 = 2 s/g entry or 8k 3821 * 8 = 4 s/g entry or 16k 3822 * 10 = 6 s/g entry or 24k 3823 */ 3824 unsigned long register_value; 3825 BUILD_BUG_ON(28 > MAXSGENTRIES + 4); 3826 3827 h->reply_pool_wraparound = 1; /* spec: init to 1 */ 3828 3829 /* Controller spec: zero out this buffer. */ 3830 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64)); 3831 h->reply_pool_head = h->reply_pool; 3832 3833 trans_offset = readl(&(h->cfgtable->TransMethodOffset)); 3834 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries, 3835 h->blockFetchTable); 3836 writel(bft[0], &h->transtable->BlockFetch0); 3837 writel(bft[1], &h->transtable->BlockFetch1); 3838 writel(bft[2], &h->transtable->BlockFetch2); 3839 writel(bft[3], &h->transtable->BlockFetch3); 3840 writel(bft[4], &h->transtable->BlockFetch4); 3841 writel(bft[5], &h->transtable->BlockFetch5); 3842 writel(bft[6], &h->transtable->BlockFetch6); 3843 writel(bft[7], &h->transtable->BlockFetch7); 3844 3845 /* size of controller ring buffer */ 3846 writel(h->max_commands, &h->transtable->RepQSize); 3847 writel(1, &h->transtable->RepQCount); 3848 writel(0, &h->transtable->RepQCtrAddrLow32); 3849 writel(0, &h->transtable->RepQCtrAddrHigh32); 3850 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); 3851 writel(0, &h->transtable->RepQAddr0High32); 3852 writel(CFGTBL_Trans_Performant | use_short_tags, 3853 &(h->cfgtable->HostWrite.TransportRequest)); 3854 3855 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 3856 cciss_wait_for_mode_change_ack(h); 3857 register_value = readl(&(h->cfgtable->TransportActive)); 3858 if (!(register_value & CFGTBL_Trans_Performant)) 3859 dev_warn(&h->pdev->dev, "cciss: unable to get board into" 3860 " performant mode\n"); 3861} 3862 3863static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h) 3864{ 3865 __u32 trans_support; 3866 3867 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n"); 3868 /* Attempt to put controller into performant mode if supported */ 3869 /* Does board support performant mode? */ 3870 trans_support = readl(&(h->cfgtable->TransportSupport)); 3871 if (!(trans_support & PERFORMANT_MODE)) 3872 return; 3873 3874 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n"); 3875 /* Performant mode demands commands on a 32 byte boundary 3876 * pci_alloc_consistent aligns on page boundarys already. 3877 * Just need to check if divisible by 32 3878 */ 3879 if ((sizeof(CommandList_struct) % 32) != 0) { 3880 dev_warn(&h->pdev->dev, "%s %d %s\n", 3881 "cciss info: command size[", 3882 (int)sizeof(CommandList_struct), 3883 "] not divisible by 32, no performant mode..\n"); 3884 return; 3885 } 3886 3887 /* Performant mode ring buffer and supporting data structures */ 3888 h->reply_pool = (__u64 *)pci_alloc_consistent( 3889 h->pdev, h->max_commands * sizeof(__u64), 3890 &(h->reply_pool_dhandle)); 3891 3892 /* Need a block fetch table for performant mode */ 3893 h->blockFetchTable = kmalloc(((h->maxsgentries+1) * 3894 sizeof(__u32)), GFP_KERNEL); 3895 3896 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL)) 3897 goto clean_up; 3898 3899 cciss_enter_performant_mode(h, 3900 trans_support & CFGTBL_Trans_use_short_tags); 3901 3902 /* Change the access methods to the performant access methods */ 3903 h->access = SA5_performant_access; 3904 h->transMethod = CFGTBL_Trans_Performant; 3905 3906 return; 3907clean_up: 3908 kfree(h->blockFetchTable); 3909 if (h->reply_pool) 3910 pci_free_consistent(h->pdev, 3911 h->max_commands * sizeof(__u64), 3912 h->reply_pool, 3913 h->reply_pool_dhandle); 3914 return; 3915 3916} /* cciss_put_controller_into_performant_mode */ 3917 3918/* If MSI/MSI-X is supported by the kernel we will try to enable it on 3919 * controllers that are capable. If not, we use IO-APIC mode. 3920 */ 3921 3922static void __devinit cciss_interrupt_mode(ctlr_info_t *h) 3923{ 3924#ifdef CONFIG_PCI_MSI 3925 int err; 3926 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1}, 3927 {0, 2}, {0, 3} 3928 }; 3929 3930 /* Some boards advertise MSI but don't really support it */ 3931 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 3932 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 3933 goto default_int_mode; 3934 3935 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 3936 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4); 3937 if (!err) { 3938 h->intr[0] = cciss_msix_entries[0].vector; 3939 h->intr[1] = cciss_msix_entries[1].vector; 3940 h->intr[2] = cciss_msix_entries[2].vector; 3941 h->intr[3] = cciss_msix_entries[3].vector; 3942 h->msix_vector = 1; 3943 return; 3944 } 3945 if (err > 0) { 3946 dev_warn(&h->pdev->dev, 3947 "only %d MSI-X vectors available\n", err); 3948 goto default_int_mode; 3949 } else { 3950 dev_warn(&h->pdev->dev, 3951 "MSI-X init failed %d\n", err); 3952 goto default_int_mode; 3953 } 3954 } 3955 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 3956 if (!pci_enable_msi(h->pdev)) 3957 h->msi_vector = 1; 3958 else 3959 dev_warn(&h->pdev->dev, "MSI init failed\n"); 3960 } 3961default_int_mode: 3962#endif /* CONFIG_PCI_MSI */ 3963 /* if we get here we're going to use the default interrupt mode */ 3964 h->intr[PERF_MODE_INT] = h->pdev->irq; 3965 return; 3966} 3967 3968static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 3969{ 3970 int i; 3971 u32 subsystem_vendor_id, subsystem_device_id; 3972 3973 subsystem_vendor_id = pdev->subsystem_vendor; 3974 subsystem_device_id = pdev->subsystem_device; 3975 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 3976 subsystem_vendor_id; 3977 3978 for (i = 0; i < ARRAY_SIZE(products); i++) 3979 if (*board_id == products[i].board_id) 3980 return i; 3981 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n", 3982 *board_id); 3983 return -ENODEV; 3984} 3985 3986static inline bool cciss_board_disabled(ctlr_info_t *h) 3987{ 3988 u16 command; 3989 3990 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command); 3991 return ((command & PCI_COMMAND_MEMORY) == 0); 3992} 3993 3994static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev, 3995 unsigned long *memory_bar) 3996{ 3997 int i; 3998 3999 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 4000 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 4001 /* addressing mode bits already removed */ 4002 *memory_bar = pci_resource_start(pdev, i); 4003 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 4004 *memory_bar); 4005 return 0; 4006 } 4007 dev_warn(&pdev->dev, "no memory BAR found\n"); 4008 return -ENODEV; 4009} 4010 4011static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev, 4012 void __iomem *vaddr, int wait_for_ready) 4013#define BOARD_READY 1 4014#define BOARD_NOT_READY 0 4015{ 4016 int i, iterations; 4017 u32 scratchpad; 4018 4019 if (wait_for_ready) 4020 iterations = CCISS_BOARD_READY_ITERATIONS; 4021 else 4022 iterations = CCISS_BOARD_NOT_READY_ITERATIONS; 4023 4024 for (i = 0; i < iterations; i++) { 4025 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 4026 if (wait_for_ready) { 4027 if (scratchpad == CCISS_FIRMWARE_READY) 4028 return 0; 4029 } else { 4030 if (scratchpad != CCISS_FIRMWARE_READY) 4031 return 0; 4032 } 4033 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS); 4034 } 4035 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 4036 return -ENODEV; 4037} 4038 4039static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, 4040 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 4041 u64 *cfg_offset) 4042{ 4043 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 4044 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 4045 *cfg_base_addr &= (u32) 0x0000ffff; 4046 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 4047 if (*cfg_base_addr_index == -1) { 4048 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, " 4049 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr); 4050 return -ENODEV; 4051 } 4052 return 0; 4053} 4054 4055static int __devinit cciss_find_cfgtables(ctlr_info_t *h) 4056{ 4057 u64 cfg_offset; 4058 u32 cfg_base_addr; 4059 u64 cfg_base_addr_index; 4060 u32 trans_offset; 4061 int rc; 4062 4063 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 4064 &cfg_base_addr_index, &cfg_offset); 4065 if (rc) 4066 return rc; 4067 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 4068 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable)); 4069 if (!h->cfgtable) 4070 return -ENOMEM; 4071 /* Find performant mode table. */ 4072 trans_offset = readl(&h->cfgtable->TransMethodOffset); 4073 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 4074 cfg_base_addr_index)+cfg_offset+trans_offset, 4075 sizeof(*h->transtable)); 4076 if (!h->transtable) 4077 return -ENOMEM; 4078 return 0; 4079} 4080 4081static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h) 4082{ 4083 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 4084 4085 /* Limit commands in memory limited kdump scenario. */ 4086 if (reset_devices && h->max_commands > 32) 4087 h->max_commands = 32; 4088 4089 if (h->max_commands < 16) { 4090 dev_warn(&h->pdev->dev, "Controller reports " 4091 "max supported commands of %d, an obvious lie. " 4092 "Using 16. Ensure that firmware is up to date.\n", 4093 h->max_commands); 4094 h->max_commands = 16; 4095 } 4096} 4097 4098/* Interrogate the hardware for some limits: 4099 * max commands, max SG elements without chaining, and with chaining, 4100 * SG chain block size, etc. 4101 */ 4102static void __devinit cciss_find_board_params(ctlr_info_t *h) 4103{ 4104 cciss_get_max_perf_mode_cmds(h); 4105 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ 4106 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements)); 4107 /* 4108 * Limit in-command s/g elements to 32 save dma'able memory. 4109 * Howvever spec says if 0, use 31 4110 */ 4111 h->max_cmd_sgentries = 31; 4112 if (h->maxsgentries > 512) { 4113 h->max_cmd_sgentries = 32; 4114 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1; 4115 h->maxsgentries--; /* save one for chain pointer */ 4116 } else { 4117 h->maxsgentries = 31; /* default to traditional values */ 4118 h->chainsize = 0; 4119 } 4120} 4121 4122static inline bool CISS_signature_present(ctlr_info_t *h) 4123{ 4124 if ((readb(&h->cfgtable->Signature[0]) != 'C') || 4125 (readb(&h->cfgtable->Signature[1]) != 'I') || 4126 (readb(&h->cfgtable->Signature[2]) != 'S') || 4127 (readb(&h->cfgtable->Signature[3]) != 'S')) { 4128 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 4129 return false; 4130 } 4131 return true; 4132} 4133 4134/* Need to enable prefetch in the SCSI core for 6400 in x86 */ 4135static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h) 4136{ 4137#ifdef CONFIG_X86 4138 u32 prefetch; 4139 4140 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 4141 prefetch |= 0x100; 4142 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 4143#endif 4144} 4145 4146/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 4147 * in a prefetch beyond physical memory. 4148 */ 4149static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h) 4150{ 4151 u32 dma_prefetch; 4152 __u32 dma_refetch; 4153 4154 if (h->board_id != 0x3225103C) 4155 return; 4156 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 4157 dma_prefetch |= 0x8000; 4158 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 4159 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch); 4160 dma_refetch |= 0x1; 4161 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch); 4162} 4163 4164static int __devinit cciss_pci_init(ctlr_info_t *h) 4165{ 4166 int prod_index, err; 4167 4168 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id); 4169 if (prod_index < 0) 4170 return -ENODEV; 4171 h->product_name = products[prod_index].product_name; 4172 h->access = *(products[prod_index].access); 4173 4174 if (cciss_board_disabled(h)) { 4175 dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); 4176 return -ENODEV; 4177 } 4178 err = pci_enable_device(h->pdev); 4179 if (err) { 4180 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n"); 4181 return err; 4182 } 4183 4184 err = pci_request_regions(h->pdev, "cciss"); 4185 if (err) { 4186 dev_warn(&h->pdev->dev, 4187 "Cannot obtain PCI resources, aborting\n"); 4188 return err; 4189 } 4190 4191 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq); 4192 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id); 4193 4194/* If the kernel supports MSI/MSI-X we will try to enable that functionality, 4195 * else we use the IO-APIC interrupt assigned to us by system ROM. 4196 */ 4197 cciss_interrupt_mode(h); 4198 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr); 4199 if (err) 4200 goto err_out_free_res; 4201 h->vaddr = remap_pci_mem(h->paddr, 0x250); 4202 if (!h->vaddr) { 4203 err = -ENOMEM; 4204 goto err_out_free_res; 4205 } 4206 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 4207 if (err) 4208 goto err_out_free_res; 4209 err = cciss_find_cfgtables(h); 4210 if (err) 4211 goto err_out_free_res; 4212 print_cfg_table(h); 4213 cciss_find_board_params(h); 4214 4215 if (!CISS_signature_present(h)) { 4216 err = -ENODEV; 4217 goto err_out_free_res; 4218 } 4219 cciss_enable_scsi_prefetch(h); 4220 cciss_p600_dma_prefetch_quirk(h); 4221 cciss_put_controller_into_performant_mode(h); 4222 return 0; 4223 4224err_out_free_res: 4225 /* 4226 * Deliberately omit pci_disable_device(): it does something nasty to 4227 * Smart Array controllers that pci_enable_device does not undo 4228 */ 4229 if (h->transtable) 4230 iounmap(h->transtable); 4231 if (h->cfgtable) 4232 iounmap(h->cfgtable); 4233 if (h->vaddr) 4234 iounmap(h->vaddr); 4235 pci_release_regions(h->pdev); 4236 return err; 4237} 4238 4239/* Function to find the first free pointer into our hba[] array 4240 * Returns -1 if no free entries are left. 4241 */ 4242static int alloc_cciss_hba(struct pci_dev *pdev) 4243{ 4244 int i; 4245 4246 for (i = 0; i < MAX_CTLR; i++) { 4247 if (!hba[i]) { 4248 ctlr_info_t *h; 4249 4250 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL); 4251 if (!h) 4252 goto Enomem; 4253 hba[i] = h; 4254 return i; 4255 } 4256 } 4257 dev_warn(&pdev->dev, "This driver supports a maximum" 4258 " of %d controllers.\n", MAX_CTLR); 4259 return -1; 4260Enomem: 4261 dev_warn(&pdev->dev, "out of memory.\n"); 4262 return -1; 4263} 4264 4265static void free_hba(ctlr_info_t *h) 4266{ 4267 int i; 4268 4269 hba[h->ctlr] = NULL; 4270 for (i = 0; i < h->highest_lun + 1; i++) 4271 if (h->gendisk[i] != NULL) 4272 put_disk(h->gendisk[i]); 4273 kfree(h); 4274} 4275 4276/* Send a message CDB to the firmware. */ 4277static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type) 4278{ 4279 typedef struct { 4280 CommandListHeader_struct CommandHeader; 4281 RequestBlock_struct Request; 4282 ErrDescriptor_struct ErrorDescriptor; 4283 } Command; 4284 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct); 4285 Command *cmd; 4286 dma_addr_t paddr64; 4287 uint32_t paddr32, tag; 4288 void __iomem *vaddr; 4289 int i, err; 4290 4291 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 4292 if (vaddr == NULL) 4293 return -ENOMEM; 4294 4295 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 4296 CCISS commands, so they must be allocated from the lower 4GiB of 4297 memory. */ 4298 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 4299 if (err) { 4300 iounmap(vaddr); 4301 return -ENOMEM; 4302 } 4303 4304 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 4305 if (cmd == NULL) { 4306 iounmap(vaddr); 4307 return -ENOMEM; 4308 } 4309 4310 /* This must fit, because of the 32-bit consistent DMA mask. Also, 4311 although there's no guarantee, we assume that the address is at 4312 least 4-byte aligned (most likely, it's page-aligned). */ 4313 paddr32 = paddr64; 4314 4315 cmd->CommandHeader.ReplyQueue = 0; 4316 cmd->CommandHeader.SGList = 0; 4317 cmd->CommandHeader.SGTotal = 0; 4318 cmd->CommandHeader.Tag.lower = paddr32; 4319 cmd->CommandHeader.Tag.upper = 0; 4320 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 4321 4322 cmd->Request.CDBLen = 16; 4323 cmd->Request.Type.Type = TYPE_MSG; 4324 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; 4325 cmd->Request.Type.Direction = XFER_NONE; 4326 cmd->Request.Timeout = 0; /* Don't time out */ 4327 cmd->Request.CDB[0] = opcode; 4328 cmd->Request.CDB[1] = type; 4329 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */ 4330 4331 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command); 4332 cmd->ErrorDescriptor.Addr.upper = 0; 4333 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct); 4334 4335 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 4336 4337 for (i = 0; i < 10; i++) { 4338 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 4339 if ((tag & ~3) == paddr32) 4340 break; 4341 schedule_timeout_uninterruptible(HZ); 4342 } 4343 4344 iounmap(vaddr); 4345 4346 /* we leak the DMA buffer here ... no choice since the controller could 4347 still complete the command. */ 4348 if (i == 10) { 4349 dev_err(&pdev->dev, 4350 "controller message %02x:%02x timed out\n", 4351 opcode, type); 4352 return -ETIMEDOUT; 4353 } 4354 4355 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 4356 4357 if (tag & 2) { 4358 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 4359 opcode, type); 4360 return -EIO; 4361 } 4362 4363 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 4364 opcode, type); 4365 return 0; 4366} 4367 4368#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0) 4369#define cciss_noop(p) cciss_message(p, 3, 0) 4370 4371static int cciss_controller_hard_reset(struct pci_dev *pdev, 4372 void * __iomem vaddr, bool use_doorbell) 4373{ 4374 u16 pmcsr; 4375 int pos; 4376 4377 if (use_doorbell) { 4378 /* For everything after the P600, the PCI power state method 4379 * of resetting the controller doesn't work, so we have this 4380 * other way using the doorbell register. 4381 */ 4382 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 4383 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL); 4384 msleep(1000); 4385 } else { /* Try to do it the PCI power state way */ 4386 4387 /* Quoting from the Open CISS Specification: "The Power 4388 * Management Control/Status Register (CSR) controls the power 4389 * state of the device. The normal operating state is D0, 4390 * CSR=00h. The software off state is D3, CSR=03h. To reset 4391 * the controller, place the interface device in D3 then to D0, 4392 * this causes a secondary PCI reset which will reset the 4393 * controller." */ 4394 4395 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 4396 if (pos == 0) { 4397 dev_err(&pdev->dev, 4398 "cciss_controller_hard_reset: " 4399 "PCI PM not supported\n"); 4400 return -ENODEV; 4401 } 4402 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 4403 /* enter the D3hot power management state */ 4404 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 4405 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 4406 pmcsr |= PCI_D3hot; 4407 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 4408 4409 msleep(500); 4410 4411 /* enter the D0 power management state */ 4412 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 4413 pmcsr |= PCI_D0; 4414 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 4415 4416 msleep(500); 4417 } 4418 return 0; 4419} 4420 4421/* This does a hard reset of the controller using PCI power management 4422 * states or using the doorbell register. */ 4423static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev) 4424{ 4425 u64 cfg_offset; 4426 u32 cfg_base_addr; 4427 u64 cfg_base_addr_index; 4428 void __iomem *vaddr; 4429 unsigned long paddr; 4430 u32 misc_fw_support, active_transport; 4431 int rc; 4432 CfgTable_struct __iomem *cfgtable; 4433 bool use_doorbell; 4434 u32 board_id; 4435 u16 command_register; 4436 4437 /* For controllers as old a the p600, this is very nearly 4438 * the same thing as 4439 * 4440 * pci_save_state(pci_dev); 4441 * pci_set_power_state(pci_dev, PCI_D3hot); 4442 * pci_set_power_state(pci_dev, PCI_D0); 4443 * pci_restore_state(pci_dev); 4444 * 4445 * For controllers newer than the P600, the pci power state 4446 * method of resetting doesn't work so we have another way 4447 * using the doorbell register. 4448 */ 4449 4450 /* Exclude 640x boards. These are two pci devices in one slot 4451 * which share a battery backed cache module. One controls the 4452 * cache, the other accesses the cache through the one that controls 4453 * it. If we reset the one controlling the cache, the other will 4454 * likely not be happy. Just forbid resetting this conjoined mess. 4455 */ 4456 cciss_lookup_board_id(pdev, &board_id); 4457 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) { 4458 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x " 4459 "due to shared cache module."); 4460 return -ENODEV; 4461 } 4462 4463 /* Save the PCI command register */ 4464 pci_read_config_word(pdev, 4, &command_register); 4465 /* Turn the board off. This is so that later pci_restore_state() 4466 * won't turn the board on before the rest of config space is ready. 4467 */ 4468 pci_disable_device(pdev); 4469 pci_save_state(pdev); 4470 4471 /* find the first memory BAR, so we can find the cfg table */ 4472 rc = cciss_pci_find_memory_BAR(pdev, &paddr); 4473 if (rc) 4474 return rc; 4475 vaddr = remap_pci_mem(paddr, 0x250); 4476 if (!vaddr) 4477 return -ENOMEM; 4478 4479 /* find cfgtable in order to check if reset via doorbell is supported */ 4480 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 4481 &cfg_base_addr_index, &cfg_offset); 4482 if (rc) 4483 goto unmap_vaddr; 4484 cfgtable = remap_pci_mem(pci_resource_start(pdev, 4485 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 4486 if (!cfgtable) { 4487 rc = -ENOMEM; 4488 goto unmap_vaddr; 4489 } 4490 4491 /* If reset via doorbell register is supported, use that. */ 4492 misc_fw_support = readl(&cfgtable->misc_fw_support); 4493 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 4494 4495 /* The doorbell reset seems to cause lockups on some Smart 4496 * Arrays (e.g. P410, P410i, maybe others). Until this is 4497 * fixed or at least isolated, avoid the doorbell reset. 4498 */ 4499 use_doorbell = 0; 4500 4501 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell); 4502 if (rc) 4503 goto unmap_cfgtable; 4504 pci_restore_state(pdev); 4505 rc = pci_enable_device(pdev); 4506 if (rc) { 4507 dev_warn(&pdev->dev, "failed to enable device.\n"); 4508 goto unmap_cfgtable; 4509 } 4510 pci_write_config_word(pdev, 4, command_register); 4511 4512 /* Some devices (notably the HP Smart Array 5i Controller) 4513 need a little pause here */ 4514 msleep(CCISS_POST_RESET_PAUSE_MSECS); 4515 4516 /* Wait for board to become not ready, then ready. */ 4517 dev_info(&pdev->dev, "Waiting for board to become ready.\n"); 4518 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); 4519 if (rc) /* Don't bail, might be E500, etc. which can't be reset */ 4520 dev_warn(&pdev->dev, 4521 "failed waiting for board to become not ready\n"); 4522 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY); 4523 if (rc) { 4524 dev_warn(&pdev->dev, 4525 "failed waiting for board to become ready\n"); 4526 goto unmap_cfgtable; 4527 } 4528 dev_info(&pdev->dev, "board ready.\n"); 4529 4530 /* Controller should be in simple mode at this point. If it's not, 4531 * It means we're on one of those controllers which doesn't support 4532 * the doorbell reset method and on which the PCI power management reset 4533 * method doesn't work (P800, for example.) 4534 * In those cases, don't try to proceed, as it generally doesn't work. 4535 */ 4536 active_transport = readl(&cfgtable->TransportActive); 4537 if (active_transport & PERFORMANT_MODE) { 4538 dev_warn(&pdev->dev, "Unable to successfully reset controller," 4539 " Ignoring controller.\n"); 4540 rc = -ENODEV; 4541 } 4542 4543unmap_cfgtable: 4544 iounmap(cfgtable); 4545 4546unmap_vaddr: 4547 iounmap(vaddr); 4548 return rc; 4549} 4550 4551static __devinit int cciss_init_reset_devices(struct pci_dev *pdev) 4552{ 4553 int rc, i; 4554 4555 if (!reset_devices) 4556 return 0; 4557 4558 /* Reset the controller with a PCI power-cycle or via doorbell */ 4559 rc = cciss_kdump_hard_reset_controller(pdev); 4560 4561 /* -ENOTSUPP here means we cannot reset the controller 4562 * but it's already (and still) up and running in 4563 * "performant mode". Or, it might be 640x, which can't reset 4564 * due to concerns about shared bbwc between 6402/6404 pair. 4565 */ 4566 if (rc == -ENOTSUPP) 4567 return 0; /* just try to do the kdump anyhow. */ 4568 if (rc) 4569 return -ENODEV; 4570 4571 /* Now try to get the controller to respond to a no-op */ 4572 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) { 4573 if (cciss_noop(pdev) == 0) 4574 break; 4575 else 4576 dev_warn(&pdev->dev, "no-op failed%s\n", 4577 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ? 4578 "; re-trying" : "")); 4579 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS); 4580 } 4581 return 0; 4582} 4583 4584/* 4585 * This is it. Find all the controllers and register them. I really hate 4586 * stealing all these major device numbers. 4587 * returns the number of block devices registered. 4588 */ 4589static int __devinit cciss_init_one(struct pci_dev *pdev, 4590 const struct pci_device_id *ent) 4591{ 4592 int i; 4593 int j = 0; 4594 int k = 0; 4595 int rc; 4596 int dac, return_code; 4597 InquiryData_struct *inq_buff; 4598 ctlr_info_t *h; 4599 4600 rc = cciss_init_reset_devices(pdev); 4601 if (rc) 4602 return rc; 4603 i = alloc_cciss_hba(pdev); 4604 if (i < 0) 4605 return -1; 4606 4607 h = hba[i]; 4608 h->pdev = pdev; 4609 h->busy_initializing = 1; 4610 INIT_LIST_HEAD(&h->cmpQ); 4611 INIT_LIST_HEAD(&h->reqQ); 4612 mutex_init(&h->busy_shutting_down); 4613 4614 if (cciss_pci_init(h) != 0) 4615 goto clean_no_release_regions; 4616 4617 sprintf(h->devname, "cciss%d", i); 4618 h->ctlr = i; 4619 4620 init_completion(&h->scan_wait); 4621 4622 if (cciss_create_hba_sysfs_entry(h)) 4623 goto clean0; 4624 4625 /* configure PCI DMA stuff */ 4626 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) 4627 dac = 1; 4628 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) 4629 dac = 0; 4630 else { 4631 dev_err(&h->pdev->dev, "no suitable DMA available\n"); 4632 goto clean1; 4633 } 4634 4635 /* 4636 * register with the major number, or get a dynamic major number 4637 * by passing 0 as argument. This is done for greater than 4638 * 8 controller support. 4639 */ 4640 if (i < MAX_CTLR_ORIG) 4641 h->major = COMPAQ_CISS_MAJOR + i; 4642 rc = register_blkdev(h->major, h->devname); 4643 if (rc == -EBUSY || rc == -EINVAL) { 4644 dev_err(&h->pdev->dev, 4645 "Unable to get major number %d for %s " 4646 "on hba %d\n", h->major, h->devname, i); 4647 goto clean1; 4648 } else { 4649 if (i >= MAX_CTLR_ORIG) 4650 h->major = rc; 4651 } 4652 4653 /* make sure the board interrupts are off */ 4654 h->access.set_intr_mask(h, CCISS_INTR_OFF); 4655 if (h->msi_vector || h->msix_vector) { 4656 if (request_irq(h->intr[PERF_MODE_INT], 4657 do_cciss_msix_intr, 4658 IRQF_DISABLED, h->devname, h)) { 4659 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", 4660 h->intr[PERF_MODE_INT], h->devname); 4661 goto clean2; 4662 } 4663 } else { 4664 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx, 4665 IRQF_DISABLED, h->devname, h)) { 4666 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", 4667 h->intr[PERF_MODE_INT], h->devname); 4668 goto clean2; 4669 } 4670 } 4671 4672 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n", 4673 h->devname, pdev->device, pci_name(pdev), 4674 h->intr[PERF_MODE_INT], dac ? "" : " not"); 4675 4676 h->cmd_pool_bits = 4677 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) 4678 * sizeof(unsigned long), GFP_KERNEL); 4679 h->cmd_pool = (CommandList_struct *) 4680 pci_alloc_consistent(h->pdev, 4681 h->nr_cmds * sizeof(CommandList_struct), 4682 &(h->cmd_pool_dhandle)); 4683 h->errinfo_pool = (ErrorInfo_struct *) 4684 pci_alloc_consistent(h->pdev, 4685 h->nr_cmds * sizeof(ErrorInfo_struct), 4686 &(h->errinfo_pool_dhandle)); 4687 if ((h->cmd_pool_bits == NULL) 4688 || (h->cmd_pool == NULL) 4689 || (h->errinfo_pool == NULL)) { 4690 dev_err(&h->pdev->dev, "out of memory"); 4691 goto clean4; 4692 } 4693 4694 /* Need space for temp scatter list */ 4695 h->scatter_list = kmalloc(h->max_commands * 4696 sizeof(struct scatterlist *), 4697 GFP_KERNEL); 4698 if (!h->scatter_list) 4699 goto clean4; 4700 4701 for (k = 0; k < h->nr_cmds; k++) { 4702 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) * 4703 h->maxsgentries, 4704 GFP_KERNEL); 4705 if (h->scatter_list[k] == NULL) { 4706 dev_err(&h->pdev->dev, 4707 "could not allocate s/g lists\n"); 4708 goto clean4; 4709 } 4710 } 4711 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h, 4712 h->chainsize, h->nr_cmds); 4713 if (!h->cmd_sg_list && h->chainsize > 0) 4714 goto clean4; 4715 4716 spin_lock_init(&h->lock); 4717 4718 /* Initialize the pdev driver private data. 4719 have it point to h. */ 4720 pci_set_drvdata(pdev, h); 4721 /* command and error info recs zeroed out before 4722 they are used */ 4723 memset(h->cmd_pool_bits, 0, 4724 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) 4725 * sizeof(unsigned long)); 4726 4727 h->num_luns = 0; 4728 h->highest_lun = -1; 4729 for (j = 0; j < CISS_MAX_LUN; j++) { 4730 h->drv[j] = NULL; 4731 h->gendisk[j] = NULL; 4732 } 4733 4734 cciss_scsi_setup(h); 4735 4736 /* Turn the interrupts on so we can service requests */ 4737 h->access.set_intr_mask(h, CCISS_INTR_ON); 4738 4739 /* Get the firmware version */ 4740 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); 4741 if (inq_buff == NULL) { 4742 dev_err(&h->pdev->dev, "out of memory\n"); 4743 goto clean4; 4744 } 4745 4746 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, 4747 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD); 4748 if (return_code == IO_OK) { 4749 h->firm_ver[0] = inq_buff->data_byte[32]; 4750 h->firm_ver[1] = inq_buff->data_byte[33]; 4751 h->firm_ver[2] = inq_buff->data_byte[34]; 4752 h->firm_ver[3] = inq_buff->data_byte[35]; 4753 } else { /* send command failed */ 4754 dev_warn(&h->pdev->dev, "unable to determine firmware" 4755 " version of controller\n"); 4756 } 4757 kfree(inq_buff); 4758 4759 cciss_procinit(h); 4760 4761 h->cciss_max_sectors = 8192; 4762 4763 rebuild_lun_table(h, 1, 0); 4764 h->busy_initializing = 0; 4765 return 1; 4766 4767clean4: 4768 kfree(h->cmd_pool_bits); 4769 /* Free up sg elements */ 4770 for (k-- ; k >= 0; k--) 4771 kfree(h->scatter_list[k]); 4772 kfree(h->scatter_list); 4773 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); 4774 if (h->cmd_pool) 4775 pci_free_consistent(h->pdev, 4776 h->nr_cmds * sizeof(CommandList_struct), 4777 h->cmd_pool, h->cmd_pool_dhandle); 4778 if (h->errinfo_pool) 4779 pci_free_consistent(h->pdev, 4780 h->nr_cmds * sizeof(ErrorInfo_struct), 4781 h->errinfo_pool, 4782 h->errinfo_pool_dhandle); 4783 free_irq(h->intr[PERF_MODE_INT], h); 4784clean2: 4785 unregister_blkdev(h->major, h->devname); 4786clean1: 4787 cciss_destroy_hba_sysfs_entry(h); 4788clean0: 4789 pci_release_regions(pdev); 4790clean_no_release_regions: 4791 h->busy_initializing = 0; 4792 4793 /* 4794 * Deliberately omit pci_disable_device(): it does something nasty to 4795 * Smart Array controllers that pci_enable_device does not undo 4796 */ 4797 pci_set_drvdata(pdev, NULL); 4798 free_hba(h); 4799 return -1; 4800} 4801 4802static void cciss_shutdown(struct pci_dev *pdev) 4803{ 4804 ctlr_info_t *h; 4805 char *flush_buf; 4806 int return_code; 4807 4808 h = pci_get_drvdata(pdev); 4809 flush_buf = kzalloc(4, GFP_KERNEL); 4810 if (!flush_buf) { 4811 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n"); 4812 return; 4813 } 4814 /* write all data in the battery backed cache to disk */ 4815 memset(flush_buf, 0, 4); 4816 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf, 4817 4, 0, CTLR_LUNID, TYPE_CMD); 4818 kfree(flush_buf); 4819 if (return_code != IO_OK) 4820 dev_warn(&h->pdev->dev, "Error flushing cache\n"); 4821 h->access.set_intr_mask(h, CCISS_INTR_OFF); 4822 free_irq(h->intr[PERF_MODE_INT], h); 4823} 4824 4825static void __devexit cciss_remove_one(struct pci_dev *pdev) 4826{ 4827 ctlr_info_t *h; 4828 int i, j; 4829 4830 if (pci_get_drvdata(pdev) == NULL) { 4831 dev_err(&pdev->dev, "Unable to remove device\n"); 4832 return; 4833 } 4834 4835 h = pci_get_drvdata(pdev); 4836 i = h->ctlr; 4837 if (hba[i] == NULL) { 4838 dev_err(&pdev->dev, "device appears to already be removed\n"); 4839 return; 4840 } 4841 4842 mutex_lock(&h->busy_shutting_down); 4843 4844 remove_from_scan_list(h); 4845 remove_proc_entry(h->devname, proc_cciss); 4846 unregister_blkdev(h->major, h->devname); 4847 4848 /* remove it from the disk list */ 4849 for (j = 0; j < CISS_MAX_LUN; j++) { 4850 struct gendisk *disk = h->gendisk[j]; 4851 if (disk) { 4852 struct request_queue *q = disk->queue; 4853 4854 if (disk->flags & GENHD_FL_UP) { 4855 cciss_destroy_ld_sysfs_entry(h, j, 1); 4856 del_gendisk(disk); 4857 } 4858 if (q) 4859 blk_cleanup_queue(q); 4860 } 4861 } 4862 4863#ifdef CONFIG_CISS_SCSI_TAPE 4864 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */ 4865#endif 4866 4867 cciss_shutdown(pdev); 4868 4869#ifdef CONFIG_PCI_MSI 4870 if (h->msix_vector) 4871 pci_disable_msix(h->pdev); 4872 else if (h->msi_vector) 4873 pci_disable_msi(h->pdev); 4874#endif /* CONFIG_PCI_MSI */ 4875 4876 iounmap(h->transtable); 4877 iounmap(h->cfgtable); 4878 iounmap(h->vaddr); 4879 4880 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct), 4881 h->cmd_pool, h->cmd_pool_dhandle); 4882 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct), 4883 h->errinfo_pool, h->errinfo_pool_dhandle); 4884 kfree(h->cmd_pool_bits); 4885 /* Free up sg elements */ 4886 for (j = 0; j < h->nr_cmds; j++) 4887 kfree(h->scatter_list[j]); 4888 kfree(h->scatter_list); 4889 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); 4890 /* 4891 * Deliberately omit pci_disable_device(): it does something nasty to 4892 * Smart Array controllers that pci_enable_device does not undo 4893 */ 4894 pci_release_regions(pdev); 4895 pci_set_drvdata(pdev, NULL); 4896 cciss_destroy_hba_sysfs_entry(h); 4897 mutex_unlock(&h->busy_shutting_down); 4898 free_hba(h); 4899} 4900 4901static struct pci_driver cciss_pci_driver = { 4902 .name = "cciss", 4903 .probe = cciss_init_one, 4904 .remove = __devexit_p(cciss_remove_one), 4905 .id_table = cciss_pci_device_id, /* id_table */ 4906 .shutdown = cciss_shutdown, 4907}; 4908 4909/* 4910 * This is it. Register the PCI driver information for the cards we control 4911 * the OS will call our registered routines when it finds one of our cards. 4912 */ 4913static int __init cciss_init(void) 4914{ 4915 int err; 4916 4917 /* 4918 * The hardware requires that commands are aligned on a 64-bit 4919 * boundary. Given that we use pci_alloc_consistent() to allocate an 4920 * array of them, the size must be a multiple of 8 bytes. 4921 */ 4922 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT); 4923 printk(KERN_INFO DRIVER_NAME "\n"); 4924 4925 err = bus_register(&cciss_bus_type); 4926 if (err) 4927 return err; 4928 4929 /* Start the scan thread */ 4930 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan"); 4931 if (IS_ERR(cciss_scan_thread)) { 4932 err = PTR_ERR(cciss_scan_thread); 4933 goto err_bus_unregister; 4934 } 4935 4936 /* Register for our PCI devices */ 4937 err = pci_register_driver(&cciss_pci_driver); 4938 if (err) 4939 goto err_thread_stop; 4940 4941 return err; 4942 4943err_thread_stop: 4944 kthread_stop(cciss_scan_thread); 4945err_bus_unregister: 4946 bus_unregister(&cciss_bus_type); 4947 4948 return err; 4949} 4950 4951static void __exit cciss_cleanup(void) 4952{ 4953 int i; 4954 4955 pci_unregister_driver(&cciss_pci_driver); 4956 /* double check that all controller entrys have been removed */ 4957 for (i = 0; i < MAX_CTLR; i++) { 4958 if (hba[i] != NULL) { 4959 dev_warn(&hba[i]->pdev->dev, 4960 "had to remove controller\n"); 4961 cciss_remove_one(hba[i]->pdev); 4962 } 4963 } 4964 kthread_stop(cciss_scan_thread); 4965 if (proc_cciss) 4966 remove_proc_entry("driver/cciss", NULL); 4967 bus_unregister(&cciss_bus_type); 4968} 4969 4970module_init(cciss_init); 4971module_exit(cciss_cleanup); 4972