11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef CCISS_H 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CCISS_H 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/genhd.h> 5b368c9dd65984d1860b97bff77644c0e3e46df96Andrew Patterson#include <linux/mutex.h> 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "cciss_cmd.h" 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define NWD_SHIFT 4 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_PART (1 << NWD_SHIFT) 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IO_OK 0 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IO_ERROR 1 15789a424ad1352b335960e7c56494d0410577fa61scameron@beardog.cca.cpqcorp.net#define IO_NEEDS_RETRY 3 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 177fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson#define VENDOR_LEN 8 187fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson#define MODEL_LEN 16 197fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson#define REV_LEN 4 207fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct ctlr_info; 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct ctlr_info ctlr_info_t; 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct access_method { 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void (*submit_command)(ctlr_info_t *h, CommandList_struct *c); 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void (*set_intr_mask)(ctlr_info_t *h, unsigned long val); 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long (*fifo_full)(ctlr_info_t *h); 281d1414419f034702bf587accdf2a9ac53245e000Mike Miller bool (*intr_pending)(ctlr_info_t *h); 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long (*command_completed)(ctlr_info_t *h); 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct _drive_info_struct 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3339ccf9a645dbca7f9866317380912327570787c0Stephen M. Cameron unsigned char LunID[8]; 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int usage_count; 35ad2b93123d2b3cb4ba9a98dd5f62acb6d6b50391Mike Miller struct request_queue *queue; 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sector_t nr_blocks; 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int block_size; 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int heads; 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int sectors; 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int cylinders; 41ddd474420a0b0dfeda38b6b5f83c7af751235cc3Mike Miller int raid_level; /* set to -1 to indicate that 42ddd474420a0b0dfeda38b6b5f83c7af751235cc3Mike Miller * the drive is not in use/configured 437fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson */ 447fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson int busy_configuring; /* This is set when a drive is being removed 457fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson * to prevent it from being opened or it's 467fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson * queue from being started. 477fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson */ 489cef0d2f4f68a5a2c6ea0495f958a074d21fbd07Stephen M. Cameron struct device dev; 497fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson __u8 serial_no[16]; /* from inquiry page 0x83, 507fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson * not necc. null terminated. 517fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson */ 527fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson char vendor[VENDOR_LEN + 1]; /* SCSI vendor string */ 537fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson char model[MODEL_LEN + 1]; /* SCSI model string */ 547fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson char rev[REV_LEN + 1]; /* SCSI revision string */ 559cef0d2f4f68a5a2c6ea0495f958a074d21fbd07Stephen M. Cameron char device_initialized; /* indicates whether dev is initialized */ 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} drive_info_struct; 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 585c07a311a80adb0138fc08e8279c60255d88d0b8Don Bracestruct ctlr_info 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int ctlr; 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char devname[8]; 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char *product_name; 63b028461d66a4dc2754d4e5dab1b3974c44798c5ddann frazier char firm_ver[4]; /* Firmware version */ 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct pci_dev *pdev; 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 board_id; 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void __iomem *vaddr; 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long paddr; 68f880632f963c3611d096d9373d16663c076310c7Mike Miller int nr_cmds; /* Number of commands allowed on this controller */ 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CfgTable_struct __iomem *cfgtable; 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int interrupts_enabled; 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int major; 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int max_commands; 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int commands_outstanding; 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int max_outstanding; /* Debug */ 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int num_luns; 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int highest_lun; 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int usage_count; /* number of opens all all minor devices */ 785c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace /* Need space for temp sg list 795c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace * number of scatter/gathers supported 805c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace * number of scatter/gathers in chained block 815c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace */ 825c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace struct scatterlist **scatter_list; 835c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace int maxsgentries; 845c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace int chainsize; 855c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace int max_cmd_sgentries; 86dccc9b563e455b91f7247b1ca6b0face40323538Stephen M. Cameron SGDescriptor_struct **cmd_sg_list; 875c07a311a80adb0138fc08e8279c60255d88d0b8Don Brace 885e216153c34ac21781110795284a784037f808e3Mike Miller# define PERF_MODE_INT 0 895e216153c34ac21781110795284a784037f808e3Mike Miller# define DOORBELL_INT 1 90fb86a35b9ded8a7e53a432cbf28df603cdd4849cMike Miller# define SIMPLE_MODE_INT 2 91fb86a35b9ded8a7e53a432cbf28df603cdd4849cMike Miller# define MEMQ_MODE_INT 3 92fb86a35b9ded8a7e53a432cbf28df603cdd4849cMike Miller unsigned int intr[4]; 93fb86a35b9ded8a7e53a432cbf28df603cdd4849cMike Miller unsigned int msix_vector; 94fb86a35b9ded8a7e53a432cbf28df603cdd4849cMike Miller unsigned int msi_vector; 9513049537007dee73a76f0a30fcbc24d02c6fa9e4Joseph Handzik int intr_mode; 9692c4231aef720bd5e1d634d2f7335f31277318daMike Miller int cciss_max_sectors; 9700988a3514bbc0cce781c067cf52559741d88b80Mike Miller (OS Dev) BYTE cciss_read; 9800988a3514bbc0cce781c067cf52559741d88b80Mike Miller (OS Dev) BYTE cciss_write; 9900988a3514bbc0cce781c067cf52559741d88b80Mike Miller (OS Dev) BYTE cciss_read_capacity; 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 101b028461d66a4dc2754d4e5dab1b3974c44798c5ddann frazier /* information about each logical volume */ 1029cef0d2f4f68a5a2c6ea0495f958a074d21fbd07Stephen M. Cameron drive_info_struct *drv[CISS_MAX_LUN]; 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct access_method access; 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* queue and queue Info */ 107e6e1ee936d61d697735d17517678a626b7701ce4Jens Axboe struct list_head reqQ; 108e6e1ee936d61d697735d17517678a626b7701ce4Jens Axboe struct list_head cmpQ; 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int Qdepth; 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int maxQsinceinit; 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int maxSG; 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spinlock_t lock; 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 114b028461d66a4dc2754d4e5dab1b3974c44798c5ddann frazier /* pointers to command and error info pool */ 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CommandList_struct *cmd_pool; 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_addr_t cmd_pool_dhandle; 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ErrorInfo_struct *errinfo_pool; 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_addr_t errinfo_pool_dhandle; 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long *cmd_pool_bits; 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int nr_allocs; 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int nr_frees; 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int busy_configuring; 1231f8ef3806c40e74733f45f436d44b3d8e9a2fa48Mike Miller int busy_initializing; 124b368c9dd65984d1860b97bff77644c0e3e46df96Andrew Patterson int busy_scanning; 125b368c9dd65984d1860b97bff77644c0e3e46df96Andrew Patterson struct mutex busy_shutting_down; 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* This element holds the zero based queue number of the last 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * queue to be started. It is used for fairness. 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int next_to_run; 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 132b028461d66a4dc2754d4e5dab1b3974c44798c5ddann frazier /* Disk structures we need to pass back */ 133799202cbd0ef6a201446d99fcbd78b9f0bda6ae5Mike Miller struct gendisk *gendisk[CISS_MAX_LUN]; 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_CISS_SCSI_TAPE 135aad9fb6f2c5beafe76a724c90a4bd0d695ab8b42Stephen M. Cameron struct cciss_scsi_adapter_data_t *scsi_ctlr; 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 13733079b21978f478865068ee6a3c5807b6c6ecdbeMike Miller unsigned char alive; 138b368c9dd65984d1860b97bff77644c0e3e46df96Andrew Patterson struct list_head scan_list; 139b368c9dd65984d1860b97bff77644c0e3e46df96Andrew Patterson struct completion scan_wait; 1407fe063268e73681cdca1a6496a25f93d3332f517Andrew Patterson struct device dev; 1415e216153c34ac21781110795284a784037f808e3Mike Miller /* 1425e216153c34ac21781110795284a784037f808e3Mike Miller * Performant mode tables. 1435e216153c34ac21781110795284a784037f808e3Mike Miller */ 1445e216153c34ac21781110795284a784037f808e3Mike Miller u32 trans_support; 1455e216153c34ac21781110795284a784037f808e3Mike Miller u32 trans_offset; 1465e216153c34ac21781110795284a784037f808e3Mike Miller struct TransTable_struct *transtable; 1475e216153c34ac21781110795284a784037f808e3Mike Miller unsigned long transMethod; 1485e216153c34ac21781110795284a784037f808e3Mike Miller 1495e216153c34ac21781110795284a784037f808e3Mike Miller /* 1505e216153c34ac21781110795284a784037f808e3Mike Miller * Performant mode completion buffer 1515e216153c34ac21781110795284a784037f808e3Mike Miller */ 1525e216153c34ac21781110795284a784037f808e3Mike Miller u64 *reply_pool; 1535e216153c34ac21781110795284a784037f808e3Mike Miller dma_addr_t reply_pool_dhandle; 1545e216153c34ac21781110795284a784037f808e3Mike Miller u64 *reply_pool_head; 1555e216153c34ac21781110795284a784037f808e3Mike Miller size_t reply_pool_size; 1565e216153c34ac21781110795284a784037f808e3Mike Miller unsigned char reply_pool_wraparound; 1575e216153c34ac21781110795284a784037f808e3Mike Miller u32 *blockFetchTable; 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1605e216153c34ac21781110795284a784037f808e3Mike Miller/* Defining the diffent access_methods 1615e216153c34ac21781110795284a784037f808e3Mike Miller * 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Memory mapped FIFO interface (SMART 53xx cards) 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_DOORBELL 0x20 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_REQUEST_PORT_OFFSET 0x40 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_REPLY_INTR_MASK_OFFSET 0x34 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_REPLY_PORT_OFFSET 0x44 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_INTR_STATUS 0x30 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_SCRATCHPAD_OFFSET 0xB0 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_CTCFG_OFFSET 0xB4 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_CTMEM_OFFSET 0xB8 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_INTR_OFF 0x08 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5B_INTR_OFF 0x04 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5_INTR_PENDING 0x08 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA5B_INTR_PENDING 0x04 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FIFO_EMPTY 0xffffffff 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */ 1805e216153c34ac21781110795284a784037f808e3Mike Miller/* Perf. mode flags */ 1815e216153c34ac21781110795284a784037f808e3Mike Miller#define SA5_PERF_INTR_PENDING 0x04 1825e216153c34ac21781110795284a784037f808e3Mike Miller#define SA5_PERF_INTR_OFF 0x05 1835e216153c34ac21781110795284a784037f808e3Mike Miller#define SA5_OUTDB_STATUS_PERF_BIT 0x01 1845e216153c34ac21781110795284a784037f808e3Mike Miller#define SA5_OUTDB_CLEAR_PERF_BIT 0x01 1855e216153c34ac21781110795284a784037f808e3Mike Miller#define SA5_OUTDB_CLEAR 0xA0 1865e216153c34ac21781110795284a784037f808e3Mike Miller#define SA5_OUTDB_CLEAR_PERF_BIT 0x01 1875e216153c34ac21781110795284a784037f808e3Mike Miller#define SA5_OUTDB_STATUS 0x9C 1885e216153c34ac21781110795284a784037f808e3Mike Miller 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CISS_ERROR_BIT 0x02 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CCISS_INTR_ON 1 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CCISS_INTR_OFF 0 194e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron 195e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron 196e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron/* CCISS_BOARD_READY_WAIT_SECS is how long to wait for a board 197e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron * to become ready, in seconds, before giving up on it. 198e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron * CCISS_BOARD_READY_POLL_INTERVAL_MSECS * is how long to wait 199e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron * between polling the board to see if it is ready, in 200e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron * milliseconds. CCISS_BOARD_READY_ITERATIONS is derived 201e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron * the above. 202e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron */ 203e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron#define CCISS_BOARD_READY_WAIT_SECS (120) 20419adbb9254cbd46224376fcb3a773a2272e0845eStephen M. Cameron#define CCISS_BOARD_NOT_READY_WAIT_SECS (100) 205e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron#define CCISS_BOARD_READY_POLL_INTERVAL_MSECS (100) 206e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron#define CCISS_BOARD_READY_ITERATIONS \ 207e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron ((CCISS_BOARD_READY_WAIT_SECS * 1000) / \ 208e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron CCISS_BOARD_READY_POLL_INTERVAL_MSECS) 209afa842fa641e11a025725883b04d1e144e6bad39Stephen M. Cameron#define CCISS_BOARD_NOT_READY_ITERATIONS \ 210afa842fa641e11a025725883b04d1e144e6bad39Stephen M. Cameron ((CCISS_BOARD_NOT_READY_WAIT_SECS * 1000) / \ 211afa842fa641e11a025725883b04d1e144e6bad39Stephen M. Cameron CCISS_BOARD_READY_POLL_INTERVAL_MSECS) 21283123cb11b5a5205233c59357da2c8d9a8dc9d24Stephen M. Cameron#define CCISS_POST_RESET_PAUSE_MSECS (3000) 2133e28601fdfdec75ce8f6aaaf58540fdd0883fb58Stephen M. Cameron#define CCISS_POST_RESET_NOOP_INTERVAL_MSECS (4000) 21483123cb11b5a5205233c59357da2c8d9a8dc9d24Stephen M. Cameron#define CCISS_POST_RESET_NOOP_RETRIES (12) 2153e28601fdfdec75ce8f6aaaf58540fdd0883fb58Stephen M. Cameron#define CCISS_POST_RESET_NOOP_TIMEOUT_MSECS (10000) 216e99ba1362723df14bbe36da6eeaadf81d95782e6Stephen M. Cameron 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Send the command to the hardware 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c) 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CCISS_DEBUG 2235e216153c34ac21781110795284a784037f808e3Mike Miller printk(KERN_WARNING "cciss%d: Sending %08x - down to controller\n", 2245e216153c34ac21781110795284a784037f808e3Mike Miller h->ctlr, c->busaddr); 2255e216153c34ac21781110795284a784037f808e3Mike Miller#endif /* CCISS_DEBUG */ 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 22707d0c38e7d84f911c72058a124c7f17b3c779a65Stephen M. Cameron readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->commands_outstanding++; 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ( h->commands_outstanding > h->max_outstanding) 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->max_outstanding = h->commands_outstanding; 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This card is the opposite of the other cards. 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0 turns interrupts on... 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0x08 turns them off... 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void SA5_intr_mask(ctlr_info_t *h, unsigned long val) 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (val) 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { /* Turn interrupts on */ 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->interrupts_enabled = 1; 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2449bd3c20487b7c13d397dc11dd51e30256bf4c9b3Stephen M. Cameron (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else /* Turn them off */ 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->interrupts_enabled = 0; 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel( SA5_INTR_OFF, 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2509bd3c20487b7c13d397dc11dd51e30256bf4c9b3Stephen M. Cameron (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This card is the opposite of the other cards. 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0 turns interrupts on... 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 0x04 turns them off... 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void SA5B_intr_mask(ctlr_info_t *h, unsigned long val) 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (val) 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { /* Turn interrupts on */ 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->interrupts_enabled = 1; 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2649bd3c20487b7c13d397dc11dd51e30256bf4c9b3Stephen M. Cameron (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else /* Turn them off */ 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->interrupts_enabled = 0; 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel( SA5B_INTR_OFF, 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2709bd3c20487b7c13d397dc11dd51e30256bf4c9b3Stephen M. Cameron (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2735e216153c34ac21781110795284a784037f808e3Mike Miller 2745e216153c34ac21781110795284a784037f808e3Mike Miller/* Performant mode intr_mask */ 2755e216153c34ac21781110795284a784037f808e3Mike Millerstatic void SA5_performant_intr_mask(ctlr_info_t *h, unsigned long val) 2765e216153c34ac21781110795284a784037f808e3Mike Miller{ 2775e216153c34ac21781110795284a784037f808e3Mike Miller if (val) { /* turn on interrupts */ 2785e216153c34ac21781110795284a784037f808e3Mike Miller h->interrupts_enabled = 1; 2795e216153c34ac21781110795284a784037f808e3Mike Miller writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2809bd3c20487b7c13d397dc11dd51e30256bf4c9b3Stephen M. Cameron (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2815e216153c34ac21781110795284a784037f808e3Mike Miller } else { 2825e216153c34ac21781110795284a784037f808e3Mike Miller h->interrupts_enabled = 0; 2835e216153c34ac21781110795284a784037f808e3Mike Miller writel(SA5_PERF_INTR_OFF, 2845e216153c34ac21781110795284a784037f808e3Mike Miller h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2859bd3c20487b7c13d397dc11dd51e30256bf4c9b3Stephen M. Cameron (void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); 2865e216153c34ac21781110795284a784037f808e3Mike Miller } 2875e216153c34ac21781110795284a784037f808e3Mike Miller} 2885e216153c34ac21781110795284a784037f808e3Mike Miller 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Returns true if fifo is full. 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic unsigned long SA5_fifo_full(ctlr_info_t *h) 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if( h->commands_outstanding >= h->max_commands) 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return(1); 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return(0); 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * returns value read from hardware. 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * returns FIFO_EMPTY if there is nothing to read 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic unsigned long SA5_completed(ctlr_info_t *h) 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long register_value 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds = readl(h->vaddr + SA5_REPLY_PORT_OFFSET); 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if(register_value != FIFO_EMPTY) 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds h->commands_outstanding--; 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CCISS_DEBUG 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("cciss: Read %lx back from board\n", register_value); 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* CCISS_DEBUG */ 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CCISS_DEBUG 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("cciss: FIFO Empty read\n"); 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return ( register_value); 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3255e216153c34ac21781110795284a784037f808e3Mike Miller 3265e216153c34ac21781110795284a784037f808e3Mike Miller/* Performant mode command completed */ 3275e216153c34ac21781110795284a784037f808e3Mike Millerstatic unsigned long SA5_performant_completed(ctlr_info_t *h) 3285e216153c34ac21781110795284a784037f808e3Mike Miller{ 3295e216153c34ac21781110795284a784037f808e3Mike Miller unsigned long register_value = FIFO_EMPTY; 3305e216153c34ac21781110795284a784037f808e3Mike Miller 3315e216153c34ac21781110795284a784037f808e3Mike Miller /* flush the controller write of the reply queue by reading 3325e216153c34ac21781110795284a784037f808e3Mike Miller * outbound doorbell status register. 3335e216153c34ac21781110795284a784037f808e3Mike Miller */ 3345e216153c34ac21781110795284a784037f808e3Mike Miller register_value = readl(h->vaddr + SA5_OUTDB_STATUS); 3355e216153c34ac21781110795284a784037f808e3Mike Miller /* msi auto clears the interrupt pending bit. */ 3365e216153c34ac21781110795284a784037f808e3Mike Miller if (!(h->msi_vector || h->msix_vector)) { 3375e216153c34ac21781110795284a784037f808e3Mike Miller writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR); 3385e216153c34ac21781110795284a784037f808e3Mike Miller /* Do a read in order to flush the write to the controller 3395e216153c34ac21781110795284a784037f808e3Mike Miller * (as per spec.) 3405e216153c34ac21781110795284a784037f808e3Mike Miller */ 3415e216153c34ac21781110795284a784037f808e3Mike Miller register_value = readl(h->vaddr + SA5_OUTDB_STATUS); 3425e216153c34ac21781110795284a784037f808e3Mike Miller } 3435e216153c34ac21781110795284a784037f808e3Mike Miller 3445e216153c34ac21781110795284a784037f808e3Mike Miller if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { 3455e216153c34ac21781110795284a784037f808e3Mike Miller register_value = *(h->reply_pool_head); 3465e216153c34ac21781110795284a784037f808e3Mike Miller (h->reply_pool_head)++; 3475e216153c34ac21781110795284a784037f808e3Mike Miller h->commands_outstanding--; 3485e216153c34ac21781110795284a784037f808e3Mike Miller } else { 3495e216153c34ac21781110795284a784037f808e3Mike Miller register_value = FIFO_EMPTY; 3505e216153c34ac21781110795284a784037f808e3Mike Miller } 3515e216153c34ac21781110795284a784037f808e3Mike Miller /* Check for wraparound */ 3525e216153c34ac21781110795284a784037f808e3Mike Miller if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { 3535e216153c34ac21781110795284a784037f808e3Mike Miller h->reply_pool_head = h->reply_pool; 3545e216153c34ac21781110795284a784037f808e3Mike Miller h->reply_pool_wraparound ^= 1; 3555e216153c34ac21781110795284a784037f808e3Mike Miller } 3565e216153c34ac21781110795284a784037f808e3Mike Miller 3575e216153c34ac21781110795284a784037f808e3Mike Miller return register_value; 3585e216153c34ac21781110795284a784037f808e3Mike Miller} 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Returns true if an interrupt is pending.. 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3621d1414419f034702bf587accdf2a9ac53245e000Mike Millerstatic bool SA5_intr_pending(ctlr_info_t *h) 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long register_value = 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(h->vaddr + SA5_INTR_STATUS); 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CCISS_DEBUG 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("cciss: intr_pending %lx\n", register_value); 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* CCISS_DEBUG */ 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if( register_value & SA5_INTR_PENDING) 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 1; 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0 ; 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Returns true if an interrupt is pending.. 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3771d1414419f034702bf587accdf2a9ac53245e000Mike Millerstatic bool SA5B_intr_pending(ctlr_info_t *h) 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long register_value = 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(h->vaddr + SA5_INTR_STATUS); 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CCISS_DEBUG 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("cciss: intr_pending %lx\n", register_value); 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* CCISS_DEBUG */ 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if( register_value & SA5B_INTR_PENDING) 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 1; 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0 ; 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3895e216153c34ac21781110795284a784037f808e3Mike Millerstatic bool SA5_performant_intr_pending(ctlr_info_t *h) 3905e216153c34ac21781110795284a784037f808e3Mike Miller{ 3915e216153c34ac21781110795284a784037f808e3Mike Miller unsigned long register_value = readl(h->vaddr + SA5_INTR_STATUS); 3925e216153c34ac21781110795284a784037f808e3Mike Miller 3935e216153c34ac21781110795284a784037f808e3Mike Miller if (!register_value) 3945e216153c34ac21781110795284a784037f808e3Mike Miller return false; 3955e216153c34ac21781110795284a784037f808e3Mike Miller 3965e216153c34ac21781110795284a784037f808e3Mike Miller if (h->msi_vector || h->msix_vector) 3975e216153c34ac21781110795284a784037f808e3Mike Miller return true; 3985e216153c34ac21781110795284a784037f808e3Mike Miller 3995e216153c34ac21781110795284a784037f808e3Mike Miller /* Read outbound doorbell to flush */ 4005e216153c34ac21781110795284a784037f808e3Mike Miller register_value = readl(h->vaddr + SA5_OUTDB_STATUS); 4015e216153c34ac21781110795284a784037f808e3Mike Miller return register_value & SA5_OUTDB_STATUS_PERF_BIT; 4025e216153c34ac21781110795284a784037f808e3Mike Miller} 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct access_method SA5_access = { 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5_submit_command, 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5_intr_mask, 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5_fifo_full, 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5_intr_pending, 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5_completed, 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct access_method SA5B_access = { 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5_submit_command, 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5B_intr_mask, 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5_fifo_full, 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5B_intr_pending, 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SA5_completed, 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4205e216153c34ac21781110795284a784037f808e3Mike Millerstatic struct access_method SA5_performant_access = { 4215e216153c34ac21781110795284a784037f808e3Mike Miller SA5_submit_command, 4225e216153c34ac21781110795284a784037f808e3Mike Miller SA5_performant_intr_mask, 4235e216153c34ac21781110795284a784037f808e3Mike Miller SA5_fifo_full, 4245e216153c34ac21781110795284a784037f808e3Mike Miller SA5_performant_intr_pending, 4255e216153c34ac21781110795284a784037f808e3Mike Miller SA5_performant_completed, 4265e216153c34ac21781110795284a784037f808e3Mike Miller}; 4275e216153c34ac21781110795284a784037f808e3Mike Miller 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct board_type { 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 board_id; 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char *product_name; 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct access_method *access; 432f880632f963c3611d096d9373d16663c076310c7Mike Miller int nr_cmds; /* Max cmds this kind of ctlr can handle. */ 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* CCISS_H */ 436