15efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles/* 25efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * Copyright (c) 2010-2011 Picochip Ltd., Jamie Iles 35efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * 45efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * This program is free software; you can redistribute it and/or modify 55efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * it under the terms of the GNU General Public License version 2 as 65efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * published by the Free Software Foundation. 75efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * 85efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * All enquiries to support@picochip.com 95efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles */ 105efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#include <linux/clk.h> 115efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#include <linux/delay.h> 125efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#include <linux/err.h> 135efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#include <linux/hw_random.h> 145efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#include <linux/io.h> 155efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#include <linux/kernel.h> 165efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#include <linux/module.h> 175efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#include <linux/platform_device.h> 185efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 195efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#define DATA_REG_OFFSET 0x0200 205efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#define CSR_REG_OFFSET 0x0278 215efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#define CSR_OUT_EMPTY_MASK (1 << 24) 225efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#define CSR_FAULT_MASK (1 << 1) 235efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#define TRNG_BLOCK_RESET_MASK (1 << 0) 245efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#define TAI_REG_OFFSET 0x0380 255efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 265efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles/* 275efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * The maximum amount of time in microseconds to spend waiting for data if the 285efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * core wants us to wait. The TRNG should generate 32 bits every 320ns so a 295efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * timeout of 20us seems reasonable. The TRNG does builtin tests of the data 305efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * for randomness so we can't always assume there is data present. 315efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles */ 325efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#define PICO_TRNG_TIMEOUT 20 335efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 345efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic void __iomem *rng_base; 355efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic struct clk *rng_clk; 365efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstruct device *rng_dev; 375efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 385efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic inline u32 picoxcell_trng_read_csr(void) 395efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 405efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return __raw_readl(rng_base + CSR_REG_OFFSET); 415efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 425efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 435efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic inline bool picoxcell_trng_is_empty(void) 445efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 455efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return picoxcell_trng_read_csr() & CSR_OUT_EMPTY_MASK; 465efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 475efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 485efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles/* 495efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * Take the random number generator out of reset and make sure the interrupts 505efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * are masked. We shouldn't need to get large amounts of random bytes so just 515efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * poll the status register. The hardware generates 32 bits every 320ns so we 525efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * shouldn't have to wait long enough to warrant waiting for an IRQ. 535efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles */ 545efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic void picoxcell_trng_start(void) 555efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 565efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles __raw_writel(0, rng_base + TAI_REG_OFFSET); 575efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles __raw_writel(0, rng_base + CSR_REG_OFFSET); 585efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 595efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 605efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic void picoxcell_trng_reset(void) 615efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 625efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles __raw_writel(TRNG_BLOCK_RESET_MASK, rng_base + CSR_REG_OFFSET); 635efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles __raw_writel(TRNG_BLOCK_RESET_MASK, rng_base + TAI_REG_OFFSET); 645efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles picoxcell_trng_start(); 655efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 665efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 675efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles/* 685efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * Get some random data from the random number generator. The hw_random core 695efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles * layer provides us with locking. 705efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles */ 715efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic int picoxcell_trng_read(struct hwrng *rng, void *buf, size_t max, 725efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles bool wait) 735efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 745efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles int i; 755efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 765efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles /* Wait for some data to become available. */ 775efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles for (i = 0; i < PICO_TRNG_TIMEOUT && picoxcell_trng_is_empty(); ++i) { 785efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (!wait) 795efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return 0; 805efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 815efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles udelay(1); 825efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles } 835efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 845efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (picoxcell_trng_read_csr() & CSR_FAULT_MASK) { 855efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles dev_err(rng_dev, "fault detected, resetting TRNG\n"); 865efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles picoxcell_trng_reset(); 875efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return -EIO; 885efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles } 895efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 905efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (i == PICO_TRNG_TIMEOUT) 915efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return 0; 925efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 935efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles *(u32 *)buf = __raw_readl(rng_base + DATA_REG_OFFSET); 945efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return sizeof(u32); 955efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 965efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 975efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic struct hwrng picoxcell_trng = { 985efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .name = "picoxcell", 995efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .read = picoxcell_trng_read, 1005efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles}; 1015efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1025efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic int picoxcell_trng_probe(struct platform_device *pdev) 1035efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 1045efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles int ret; 1055efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1065efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1075efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (!mem) { 1085efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles dev_warn(&pdev->dev, "no memory resource\n"); 1095efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return -ENOMEM; 1105efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles } 1115efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1125efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem), 1135efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles "picoxcell_trng")) { 1145efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles dev_warn(&pdev->dev, "unable to request io mem\n"); 1155efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return -EBUSY; 1165efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles } 1175efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1185efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles rng_base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); 1195efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (!rng_base) { 1205efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles dev_warn(&pdev->dev, "unable to remap io mem\n"); 1215efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return -ENOMEM; 1225efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles } 1235efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1245efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles rng_clk = clk_get(&pdev->dev, NULL); 1255efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (IS_ERR(rng_clk)) { 1265efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles dev_warn(&pdev->dev, "no clk\n"); 1275efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return PTR_ERR(rng_clk); 1285efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles } 1295efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1305efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles ret = clk_enable(rng_clk); 1315efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (ret) { 1325efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles dev_warn(&pdev->dev, "unable to enable clk\n"); 1335efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles goto err_enable; 1345efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles } 1355efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1365efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles picoxcell_trng_start(); 1375efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles ret = hwrng_register(&picoxcell_trng); 1385efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles if (ret) 1395efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles goto err_register; 1405efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1415efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles rng_dev = &pdev->dev; 1425efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles dev_info(&pdev->dev, "pixoxcell random number generator active\n"); 1435efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1445efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return 0; 1455efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1465efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ileserr_register: 1475efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles clk_disable(rng_clk); 1485efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ileserr_enable: 1495efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles clk_put(rng_clk); 1505efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1515efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return ret; 1525efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 1535efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1545efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic int __devexit picoxcell_trng_remove(struct platform_device *pdev) 1555efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 1565efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles hwrng_unregister(&picoxcell_trng); 1575efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles clk_disable(rng_clk); 1585efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles clk_put(rng_clk); 1595efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1605efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return 0; 1615efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 1625efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1635efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#ifdef CONFIG_PM 1645efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic int picoxcell_trng_suspend(struct device *dev) 1655efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 1665efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles clk_disable(rng_clk); 1675efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1685efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return 0; 1695efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 1705efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1715efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic int picoxcell_trng_resume(struct device *dev) 1725efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles{ 1735efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles return clk_enable(rng_clk); 1745efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles} 1755efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1765efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic const struct dev_pm_ops picoxcell_trng_pm_ops = { 1775efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .suspend = picoxcell_trng_suspend, 1785efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .resume = picoxcell_trng_resume, 1795efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles}; 1805efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#endif /* CONFIG_PM */ 1815efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1825efb94ee144c1c7290652495a0f4f29cae845a62Jamie Ilesstatic struct platform_driver picoxcell_trng_driver = { 1835efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .probe = picoxcell_trng_probe, 1845efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .remove = __devexit_p(picoxcell_trng_remove), 1855efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .driver = { 1865efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .name = "picoxcell-trng", 1875efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .owner = THIS_MODULE, 1885efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#ifdef CONFIG_PM 1895efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles .pm = &picoxcell_trng_pm_ops, 1905efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles#endif /* CONFIG_PM */ 1915efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles }, 1925efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles}; 1935efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 194b21cb324f141d16833137ef0355f686efb9bd84fAxel Linmodule_platform_driver(picoxcell_trng_driver); 1955efb94ee144c1c7290652495a0f4f29cae845a62Jamie Iles 1965efb94ee144c1c7290652495a0f4f29cae845a62Jamie IlesMODULE_LICENSE("GPL"); 1975efb94ee144c1c7290652495a0f4f29cae845a62Jamie IlesMODULE_AUTHOR("Jamie Iles"); 1985efb94ee144c1c7290652495a0f4f29cae845a62Jamie IlesMODULE_DESCRIPTION("Picochip picoXcell TRNG driver"); 199