tpm_tis.c revision 20b87bbfada971ae917cc2ff9dbc9dae05b94d25
1/* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * 4 * Authors: 5 * Leendert van Doorn <leendert@watson.ibm.com> 6 * Kylene Hall <kjhall@us.ibm.com> 7 * 8 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 9 * 10 * Device driver for TCG/TCPA TPM (trusted platform module). 11 * Specifications at www.trustedcomputinggroup.org 12 * 13 * This device driver implements the TPM interface as defined in 14 * the TCG TPM Interface Spec version 1.2, revision 1.0. 15 * 16 * This program is free software; you can redistribute it and/or 17 * modify it under the terms of the GNU General Public License as 18 * published by the Free Software Foundation, version 2 of the 19 * License. 20 */ 21#include <linux/init.h> 22#include <linux/module.h> 23#include <linux/moduleparam.h> 24#include <linux/pnp.h> 25#include <linux/slab.h> 26#include <linux/interrupt.h> 27#include <linux/wait.h> 28#include <linux/acpi.h> 29#include <linux/freezer.h> 30#include "tpm.h" 31 32#define TPM_HEADER_SIZE 10 33 34enum tis_access { 35 TPM_ACCESS_VALID = 0x80, 36 TPM_ACCESS_ACTIVE_LOCALITY = 0x20, 37 TPM_ACCESS_REQUEST_PENDING = 0x04, 38 TPM_ACCESS_REQUEST_USE = 0x02, 39}; 40 41enum tis_status { 42 TPM_STS_VALID = 0x80, 43 TPM_STS_COMMAND_READY = 0x40, 44 TPM_STS_GO = 0x20, 45 TPM_STS_DATA_AVAIL = 0x10, 46 TPM_STS_DATA_EXPECT = 0x08, 47}; 48 49enum tis_int_flags { 50 TPM_GLOBAL_INT_ENABLE = 0x80000000, 51 TPM_INTF_BURST_COUNT_STATIC = 0x100, 52 TPM_INTF_CMD_READY_INT = 0x080, 53 TPM_INTF_INT_EDGE_FALLING = 0x040, 54 TPM_INTF_INT_EDGE_RISING = 0x020, 55 TPM_INTF_INT_LEVEL_LOW = 0x010, 56 TPM_INTF_INT_LEVEL_HIGH = 0x008, 57 TPM_INTF_LOCALITY_CHANGE_INT = 0x004, 58 TPM_INTF_STS_VALID_INT = 0x002, 59 TPM_INTF_DATA_AVAIL_INT = 0x001, 60}; 61 62enum tis_defaults { 63 TIS_MEM_BASE = 0xFED40000, 64 TIS_MEM_LEN = 0x5000, 65 TIS_SHORT_TIMEOUT = 750, /* ms */ 66 TIS_LONG_TIMEOUT = 2000, /* 2 sec */ 67}; 68 69#define TPM_ACCESS(l) (0x0000 | ((l) << 12)) 70#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) 71#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) 72#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) 73#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) 74#define TPM_STS(l) (0x0018 | ((l) << 12)) 75#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) 76 77#define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) 78#define TPM_RID(l) (0x0F04 | ((l) << 12)) 79 80static LIST_HEAD(tis_chips); 81static DEFINE_SPINLOCK(tis_lock); 82 83#ifdef CONFIG_ACPI 84static int is_itpm(struct pnp_dev *dev) 85{ 86 struct acpi_device *acpi = pnp_acpi_device(dev); 87 struct acpi_hardware_id *id; 88 89 list_for_each_entry(id, &acpi->pnp.ids, list) { 90 if (!strcmp("INTC0102", id->id)) 91 return 1; 92 } 93 94 return 0; 95} 96#else 97static int is_itpm(struct pnp_dev *dev) 98{ 99 return 0; 100} 101#endif 102 103static int check_locality(struct tpm_chip *chip, int l) 104{ 105 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 106 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 107 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) 108 return chip->vendor.locality = l; 109 110 return -1; 111} 112 113static void release_locality(struct tpm_chip *chip, int l, int force) 114{ 115 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 116 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == 117 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) 118 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY, 119 chip->vendor.iobase + TPM_ACCESS(l)); 120} 121 122static int request_locality(struct tpm_chip *chip, int l) 123{ 124 unsigned long stop, timeout; 125 long rc; 126 127 if (check_locality(chip, l) >= 0) 128 return l; 129 130 iowrite8(TPM_ACCESS_REQUEST_USE, 131 chip->vendor.iobase + TPM_ACCESS(l)); 132 133 stop = jiffies + chip->vendor.timeout_a; 134 135 if (chip->vendor.irq) { 136again: 137 timeout = stop - jiffies; 138 if ((long)timeout <= 0) 139 return -1; 140 rc = wait_event_interruptible_timeout(chip->vendor.int_queue, 141 (check_locality 142 (chip, l) >= 0), 143 timeout); 144 if (rc > 0) 145 return l; 146 if (rc == -ERESTARTSYS && freezing(current)) { 147 clear_thread_flag(TIF_SIGPENDING); 148 goto again; 149 } 150 } else { 151 /* wait for burstcount */ 152 do { 153 if (check_locality(chip, l) >= 0) 154 return l; 155 msleep(TPM_TIMEOUT); 156 } 157 while (time_before(jiffies, stop)); 158 } 159 return -1; 160} 161 162static u8 tpm_tis_status(struct tpm_chip *chip) 163{ 164 return ioread8(chip->vendor.iobase + 165 TPM_STS(chip->vendor.locality)); 166} 167 168static void tpm_tis_ready(struct tpm_chip *chip) 169{ 170 /* this causes the current command to be aborted */ 171 iowrite8(TPM_STS_COMMAND_READY, 172 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 173} 174 175static int get_burstcount(struct tpm_chip *chip) 176{ 177 unsigned long stop; 178 int burstcnt; 179 180 /* wait for burstcount */ 181 /* which timeout value, spec has 2 answers (c & d) */ 182 stop = jiffies + chip->vendor.timeout_d; 183 do { 184 burstcnt = ioread8(chip->vendor.iobase + 185 TPM_STS(chip->vendor.locality) + 1); 186 burstcnt += ioread8(chip->vendor.iobase + 187 TPM_STS(chip->vendor.locality) + 188 2) << 8; 189 if (burstcnt) 190 return burstcnt; 191 msleep(TPM_TIMEOUT); 192 } while (time_before(jiffies, stop)); 193 return -EBUSY; 194} 195 196static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout, 197 wait_queue_head_t *queue) 198{ 199 unsigned long stop; 200 long rc; 201 u8 status; 202 203 /* check current status */ 204 status = tpm_tis_status(chip); 205 if ((status & mask) == mask) 206 return 0; 207 208 stop = jiffies + timeout; 209 210 if (chip->vendor.irq) { 211again: 212 timeout = stop - jiffies; 213 if ((long)timeout <= 0) 214 return -ETIME; 215 rc = wait_event_interruptible_timeout(*queue, 216 ((tpm_tis_status 217 (chip) & mask) == 218 mask), timeout); 219 if (rc > 0) 220 return 0; 221 if (rc == -ERESTARTSYS && freezing(current)) { 222 clear_thread_flag(TIF_SIGPENDING); 223 goto again; 224 } 225 } else { 226 do { 227 msleep(TPM_TIMEOUT); 228 status = tpm_tis_status(chip); 229 if ((status & mask) == mask) 230 return 0; 231 } while (time_before(jiffies, stop)); 232 } 233 return -ETIME; 234} 235 236static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 237{ 238 int size = 0, burstcnt; 239 while (size < count && 240 wait_for_stat(chip, 241 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 242 chip->vendor.timeout_c, 243 &chip->vendor.read_queue) 244 == 0) { 245 burstcnt = get_burstcount(chip); 246 for (; burstcnt > 0 && size < count; burstcnt--) 247 buf[size++] = ioread8(chip->vendor.iobase + 248 TPM_DATA_FIFO(chip->vendor. 249 locality)); 250 } 251 return size; 252} 253 254static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 255{ 256 int size = 0; 257 int expected, status; 258 259 if (count < TPM_HEADER_SIZE) { 260 size = -EIO; 261 goto out; 262 } 263 264 /* read first 10 bytes, including tag, paramsize, and result */ 265 if ((size = 266 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) { 267 dev_err(chip->dev, "Unable to read header\n"); 268 goto out; 269 } 270 271 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 272 if (expected > count) { 273 size = -EIO; 274 goto out; 275 } 276 277 if ((size += 278 recv_data(chip, &buf[TPM_HEADER_SIZE], 279 expected - TPM_HEADER_SIZE)) < expected) { 280 dev_err(chip->dev, "Unable to read remainder of result\n"); 281 size = -ETIME; 282 goto out; 283 } 284 285 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 286 &chip->vendor.int_queue); 287 status = tpm_tis_status(chip); 288 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 289 dev_err(chip->dev, "Error left over data\n"); 290 size = -EIO; 291 goto out; 292 } 293 294out: 295 tpm_tis_ready(chip); 296 release_locality(chip, chip->vendor.locality, 0); 297 return size; 298} 299 300static int itpm; 301module_param(itpm, bool, 0444); 302MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)"); 303 304/* 305 * If interrupts are used (signaled by an irq set in the vendor structure) 306 * tpm.c can skip polling for the data to be available as the interrupt is 307 * waited for here 308 */ 309static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 310{ 311 int rc, status, burstcnt; 312 size_t count = 0; 313 u32 ordinal; 314 315 if (request_locality(chip, 0) < 0) 316 return -EBUSY; 317 318 status = tpm_tis_status(chip); 319 if ((status & TPM_STS_COMMAND_READY) == 0) { 320 tpm_tis_ready(chip); 321 if (wait_for_stat 322 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b, 323 &chip->vendor.int_queue) < 0) { 324 rc = -ETIME; 325 goto out_err; 326 } 327 } 328 329 while (count < len - 1) { 330 burstcnt = get_burstcount(chip); 331 for (; burstcnt > 0 && count < len - 1; burstcnt--) { 332 iowrite8(buf[count], chip->vendor.iobase + 333 TPM_DATA_FIFO(chip->vendor.locality)); 334 count++; 335 } 336 337 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 338 &chip->vendor.int_queue); 339 status = tpm_tis_status(chip); 340 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 341 rc = -EIO; 342 goto out_err; 343 } 344 } 345 346 /* write last byte */ 347 iowrite8(buf[count], 348 chip->vendor.iobase + 349 TPM_DATA_FIFO(chip->vendor.locality)); 350 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 351 &chip->vendor.int_queue); 352 status = tpm_tis_status(chip); 353 if ((status & TPM_STS_DATA_EXPECT) != 0) { 354 rc = -EIO; 355 goto out_err; 356 } 357 358 /* go and do it */ 359 iowrite8(TPM_STS_GO, 360 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 361 362 if (chip->vendor.irq) { 363 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 364 if (wait_for_stat 365 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, 366 tpm_calc_ordinal_duration(chip, ordinal), 367 &chip->vendor.read_queue) < 0) { 368 rc = -ETIME; 369 goto out_err; 370 } 371 } 372 return len; 373out_err: 374 tpm_tis_ready(chip); 375 release_locality(chip, chip->vendor.locality, 0); 376 return rc; 377} 378 379static const struct file_operations tis_ops = { 380 .owner = THIS_MODULE, 381 .llseek = no_llseek, 382 .open = tpm_open, 383 .read = tpm_read, 384 .write = tpm_write, 385 .release = tpm_release, 386}; 387 388static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL); 389static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL); 390static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL); 391static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL); 392static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL); 393static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated, 394 NULL); 395static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); 396static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); 397static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL); 398static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL); 399 400static struct attribute *tis_attrs[] = { 401 &dev_attr_pubek.attr, 402 &dev_attr_pcrs.attr, 403 &dev_attr_enabled.attr, 404 &dev_attr_active.attr, 405 &dev_attr_owned.attr, 406 &dev_attr_temp_deactivated.attr, 407 &dev_attr_caps.attr, 408 &dev_attr_cancel.attr, 409 &dev_attr_durations.attr, 410 &dev_attr_timeouts.attr, NULL, 411}; 412 413static struct attribute_group tis_attr_grp = { 414 .attrs = tis_attrs 415}; 416 417static struct tpm_vendor_specific tpm_tis = { 418 .status = tpm_tis_status, 419 .recv = tpm_tis_recv, 420 .send = tpm_tis_send, 421 .cancel = tpm_tis_ready, 422 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 423 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 424 .req_canceled = TPM_STS_COMMAND_READY, 425 .attr_group = &tis_attr_grp, 426 .miscdev = { 427 .fops = &tis_ops,}, 428}; 429 430static irqreturn_t tis_int_probe(int irq, void *dev_id) 431{ 432 struct tpm_chip *chip = dev_id; 433 u32 interrupt; 434 435 interrupt = ioread32(chip->vendor.iobase + 436 TPM_INT_STATUS(chip->vendor.locality)); 437 438 if (interrupt == 0) 439 return IRQ_NONE; 440 441 chip->vendor.irq = irq; 442 443 /* Clear interrupts handled with TPM_EOI */ 444 iowrite32(interrupt, 445 chip->vendor.iobase + 446 TPM_INT_STATUS(chip->vendor.locality)); 447 return IRQ_HANDLED; 448} 449 450static irqreturn_t tis_int_handler(int dummy, void *dev_id) 451{ 452 struct tpm_chip *chip = dev_id; 453 u32 interrupt; 454 int i; 455 456 interrupt = ioread32(chip->vendor.iobase + 457 TPM_INT_STATUS(chip->vendor.locality)); 458 459 if (interrupt == 0) 460 return IRQ_NONE; 461 462 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 463 wake_up_interruptible(&chip->vendor.read_queue); 464 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 465 for (i = 0; i < 5; i++) 466 if (check_locality(chip, i) >= 0) 467 break; 468 if (interrupt & 469 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 470 TPM_INTF_CMD_READY_INT)) 471 wake_up_interruptible(&chip->vendor.int_queue); 472 473 /* Clear interrupts handled with TPM_EOI */ 474 iowrite32(interrupt, 475 chip->vendor.iobase + 476 TPM_INT_STATUS(chip->vendor.locality)); 477 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality)); 478 return IRQ_HANDLED; 479} 480 481static int interrupts = 1; 482module_param(interrupts, bool, 0444); 483MODULE_PARM_DESC(interrupts, "Enable interrupts"); 484 485static int tpm_tis_init(struct device *dev, resource_size_t start, 486 resource_size_t len, unsigned int irq) 487{ 488 u32 vendor, intfcaps, intmask; 489 int rc, i; 490 struct tpm_chip *chip; 491 492 if (!(chip = tpm_register_hardware(dev, &tpm_tis))) 493 return -ENODEV; 494 495 chip->vendor.iobase = ioremap(start, len); 496 if (!chip->vendor.iobase) { 497 rc = -EIO; 498 goto out_err; 499 } 500 501 /* Default timeouts */ 502 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 503 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); 504 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 505 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 506 507 if (request_locality(chip, 0) != 0) { 508 rc = -ENODEV; 509 goto out_err; 510 } 511 512 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); 513 514 dev_info(dev, 515 "1.2 TPM (device-id 0x%X, rev-id %d)\n", 516 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); 517 518 if (itpm) 519 dev_info(dev, "Intel iTPM workaround enabled\n"); 520 521 522 /* Figure out the capabilities */ 523 intfcaps = 524 ioread32(chip->vendor.iobase + 525 TPM_INTF_CAPS(chip->vendor.locality)); 526 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 527 intfcaps); 528 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 529 dev_dbg(dev, "\tBurst Count Static\n"); 530 if (intfcaps & TPM_INTF_CMD_READY_INT) 531 dev_dbg(dev, "\tCommand Ready Int Support\n"); 532 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 533 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 534 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 535 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 536 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 537 dev_dbg(dev, "\tInterrupt Level Low\n"); 538 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 539 dev_dbg(dev, "\tInterrupt Level High\n"); 540 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 541 dev_dbg(dev, "\tLocality Change Int Support\n"); 542 if (intfcaps & TPM_INTF_STS_VALID_INT) 543 dev_dbg(dev, "\tSts Valid Int Support\n"); 544 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 545 dev_dbg(dev, "\tData Avail Int Support\n"); 546 547 /* INTERRUPT Setup */ 548 init_waitqueue_head(&chip->vendor.read_queue); 549 init_waitqueue_head(&chip->vendor.int_queue); 550 551 intmask = 552 ioread32(chip->vendor.iobase + 553 TPM_INT_ENABLE(chip->vendor.locality)); 554 555 intmask |= TPM_INTF_CMD_READY_INT 556 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 557 | TPM_INTF_STS_VALID_INT; 558 559 iowrite32(intmask, 560 chip->vendor.iobase + 561 TPM_INT_ENABLE(chip->vendor.locality)); 562 if (interrupts) 563 chip->vendor.irq = irq; 564 if (interrupts && !chip->vendor.irq) { 565 chip->vendor.irq = 566 ioread8(chip->vendor.iobase + 567 TPM_INT_VECTOR(chip->vendor.locality)); 568 569 for (i = 3; i < 16 && chip->vendor.irq == 0; i++) { 570 iowrite8(i, chip->vendor.iobase + 571 TPM_INT_VECTOR(chip->vendor.locality)); 572 if (request_irq 573 (i, tis_int_probe, IRQF_SHARED, 574 chip->vendor.miscdev.name, chip) != 0) { 575 dev_info(chip->dev, 576 "Unable to request irq: %d for probe\n", 577 i); 578 continue; 579 } 580 581 /* Clear all existing */ 582 iowrite32(ioread32 583 (chip->vendor.iobase + 584 TPM_INT_STATUS(chip->vendor.locality)), 585 chip->vendor.iobase + 586 TPM_INT_STATUS(chip->vendor.locality)); 587 588 /* Turn on */ 589 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 590 chip->vendor.iobase + 591 TPM_INT_ENABLE(chip->vendor.locality)); 592 593 /* Generate Interrupts */ 594 tpm_gen_interrupt(chip); 595 596 /* Turn off */ 597 iowrite32(intmask, 598 chip->vendor.iobase + 599 TPM_INT_ENABLE(chip->vendor.locality)); 600 free_irq(i, chip); 601 } 602 } 603 if (chip->vendor.irq) { 604 iowrite8(chip->vendor.irq, 605 chip->vendor.iobase + 606 TPM_INT_VECTOR(chip->vendor.locality)); 607 if (request_irq 608 (chip->vendor.irq, tis_int_handler, IRQF_SHARED, 609 chip->vendor.miscdev.name, chip) != 0) { 610 dev_info(chip->dev, 611 "Unable to request irq: %d for use\n", 612 chip->vendor.irq); 613 chip->vendor.irq = 0; 614 } else { 615 /* Clear all existing */ 616 iowrite32(ioread32 617 (chip->vendor.iobase + 618 TPM_INT_STATUS(chip->vendor.locality)), 619 chip->vendor.iobase + 620 TPM_INT_STATUS(chip->vendor.locality)); 621 622 /* Turn on */ 623 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 624 chip->vendor.iobase + 625 TPM_INT_ENABLE(chip->vendor.locality)); 626 } 627 } 628 629 INIT_LIST_HEAD(&chip->vendor.list); 630 spin_lock(&tis_lock); 631 list_add(&chip->vendor.list, &tis_chips); 632 spin_unlock(&tis_lock); 633 634 tpm_get_timeouts(chip); 635 tpm_continue_selftest(chip); 636 637 return 0; 638out_err: 639 if (chip->vendor.iobase) 640 iounmap(chip->vendor.iobase); 641 tpm_remove_hardware(chip->dev); 642 return rc; 643} 644#ifdef CONFIG_PNP 645static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev, 646 const struct pnp_device_id *pnp_id) 647{ 648 resource_size_t start, len; 649 unsigned int irq = 0; 650 651 start = pnp_mem_start(pnp_dev, 0); 652 len = pnp_mem_len(pnp_dev, 0); 653 654 if (pnp_irq_valid(pnp_dev, 0)) 655 irq = pnp_irq(pnp_dev, 0); 656 else 657 interrupts = 0; 658 659 if (is_itpm(pnp_dev)) 660 itpm = 1; 661 662 return tpm_tis_init(&pnp_dev->dev, start, len, irq); 663} 664 665static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg) 666{ 667 return tpm_pm_suspend(&dev->dev, msg); 668} 669 670static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 671{ 672 u32 intmask; 673 674 /* reenable interrupts that device may have lost or 675 BIOS/firmware may have disabled */ 676 iowrite8(chip->vendor.irq, chip->vendor.iobase + 677 TPM_INT_VECTOR(chip->vendor.locality)); 678 679 intmask = 680 ioread32(chip->vendor.iobase + 681 TPM_INT_ENABLE(chip->vendor.locality)); 682 683 intmask |= TPM_INTF_CMD_READY_INT 684 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 685 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 686 687 iowrite32(intmask, 688 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); 689} 690 691 692static int tpm_tis_pnp_resume(struct pnp_dev *dev) 693{ 694 struct tpm_chip *chip = pnp_get_drvdata(dev); 695 int ret; 696 697 if (chip->vendor.irq) 698 tpm_tis_reenable_interrupts(chip); 699 700 ret = tpm_pm_resume(&dev->dev); 701 if (!ret) 702 tpm_continue_selftest(chip); 703 704 return ret; 705} 706 707static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = { 708 {"PNP0C31", 0}, /* TPM */ 709 {"ATM1200", 0}, /* Atmel */ 710 {"IFX0102", 0}, /* Infineon */ 711 {"BCM0101", 0}, /* Broadcom */ 712 {"BCM0102", 0}, /* Broadcom */ 713 {"NSC1200", 0}, /* National */ 714 {"ICO0102", 0}, /* Intel */ 715 /* Add new here */ 716 {"", 0}, /* User Specified */ 717 {"", 0} /* Terminator */ 718}; 719MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl); 720 721static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev) 722{ 723 struct tpm_chip *chip = pnp_get_drvdata(dev); 724 725 tpm_dev_vendor_release(chip); 726 727 kfree(chip); 728} 729 730 731static struct pnp_driver tis_pnp_driver = { 732 .name = "tpm_tis", 733 .id_table = tpm_pnp_tbl, 734 .probe = tpm_tis_pnp_init, 735 .suspend = tpm_tis_pnp_suspend, 736 .resume = tpm_tis_pnp_resume, 737 .remove = tpm_tis_pnp_remove, 738}; 739 740#define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2 741module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id, 742 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444); 743MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe"); 744#endif 745static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg) 746{ 747 return tpm_pm_suspend(&dev->dev, msg); 748} 749 750static int tpm_tis_resume(struct platform_device *dev) 751{ 752 struct tpm_chip *chip = dev_get_drvdata(&dev->dev); 753 754 if (chip->vendor.irq) 755 tpm_tis_reenable_interrupts(chip); 756 757 return tpm_pm_resume(&dev->dev); 758} 759static struct platform_driver tis_drv = { 760 .driver = { 761 .name = "tpm_tis", 762 .owner = THIS_MODULE, 763 }, 764 .suspend = tpm_tis_suspend, 765 .resume = tpm_tis_resume, 766}; 767 768static struct platform_device *pdev; 769 770static int force; 771module_param(force, bool, 0444); 772MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry"); 773static int __init init_tis(void) 774{ 775 int rc; 776#ifdef CONFIG_PNP 777 if (!force) 778 return pnp_register_driver(&tis_pnp_driver); 779#endif 780 781 rc = platform_driver_register(&tis_drv); 782 if (rc < 0) 783 return rc; 784 if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0))) 785 return PTR_ERR(pdev); 786 if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) { 787 platform_device_unregister(pdev); 788 platform_driver_unregister(&tis_drv); 789 } 790 return rc; 791} 792 793static void __exit cleanup_tis(void) 794{ 795 struct tpm_vendor_specific *i, *j; 796 struct tpm_chip *chip; 797 spin_lock(&tis_lock); 798 list_for_each_entry_safe(i, j, &tis_chips, list) { 799 chip = to_tpm_chip(i); 800 tpm_remove_hardware(chip->dev); 801 iowrite32(~TPM_GLOBAL_INT_ENABLE & 802 ioread32(chip->vendor.iobase + 803 TPM_INT_ENABLE(chip->vendor. 804 locality)), 805 chip->vendor.iobase + 806 TPM_INT_ENABLE(chip->vendor.locality)); 807 release_locality(chip, chip->vendor.locality, 1); 808 if (chip->vendor.irq) 809 free_irq(chip->vendor.irq, chip); 810 iounmap(i->iobase); 811 list_del(&i->list); 812 } 813 spin_unlock(&tis_lock); 814#ifdef CONFIG_PNP 815 if (!force) { 816 pnp_unregister_driver(&tis_pnp_driver); 817 return; 818 } 819#endif 820 platform_device_unregister(pdev); 821 platform_driver_unregister(&tis_drv); 822} 823 824module_init(init_tis); 825module_exit(cleanup_tis); 826MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 827MODULE_DESCRIPTION("TPM Driver"); 828MODULE_VERSION("2.0"); 829MODULE_LICENSE("GPL"); 830