fsldma.c revision 4018294b53d1dae026880e45f174c1cc63b5d435
1173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/* 2173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * Freescale MPC85xx, MPC83xx DMA Engine support 3173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 4173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. 5173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 6173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * Author: 7173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * Zhang Wei <wei.zhang@freescale.com>, Jul 2007 8173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * Ebony Zhu <ebony.zhu@freescale.com>, May 2007 9173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 10173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * Description: 11173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * DMA engine driver for Freescale MPC8540 DMA controller, which is 12173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * also fit for MPC8560, MPC8555, MPC8548, MPC8641, and etc. 13173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * The support for MPC8349 DMA contorller is also added. 14173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 15a7aea373b4ca428f1be2c1fedd2f26c8e3f2864dIra W. Snyder * This driver instructs the DMA controller to issue the PCI Read Multiple 16a7aea373b4ca428f1be2c1fedd2f26c8e3f2864dIra W. Snyder * command for PCI read operations, instead of using the default PCI Read Line 17a7aea373b4ca428f1be2c1fedd2f26c8e3f2864dIra W. Snyder * command. Please be aware that this setting may result in read pre-fetching 18a7aea373b4ca428f1be2c1fedd2f26c8e3f2864dIra W. Snyder * on some platforms. 19a7aea373b4ca428f1be2c1fedd2f26c8e3f2864dIra W. Snyder * 20173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * This is free software; you can redistribute it and/or modify 21173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * it under the terms of the GNU General Public License as published by 22173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * the Free Software Foundation; either version 2 of the License, or 23173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * (at your option) any later version. 24173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 25173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 26173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 27173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/init.h> 28173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/module.h> 29173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/pci.h> 305a0e3ad6af8660be21ca98a971cd00f331318c05Tejun Heo#include <linux/slab.h> 31173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/interrupt.h> 32173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/dmaengine.h> 33173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/delay.h> 34173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/dma-mapping.h> 35173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/dmapool.h> 36173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include <linux/of_platform.h> 37173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 38bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder#include <asm/fsldma.h> 39173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#include "fsldma.h" 40173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 41a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void dma_init(struct fsldma_chan *chan) 42173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 43173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Reset the channel */ 44a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, 0, 32); 45173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 46a1c03319018061304be28d131073ac13a5cb86fbIra Snyder switch (chan->feature & FSL_DMA_IP_MASK) { 47173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case FSL_DMA_IP_85XX: 48173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Set the channel to below modes: 49173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * EIE - Error interrupt enable 50173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * EOSIE - End of segments interrupt enable (basic mode) 51173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * EOLNIE - End of links interrupt enable 52173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 53a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_EIE 54173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei | FSL_DMA_MR_EOLNIE | FSL_DMA_MR_EOSIE, 32); 55173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei break; 56173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case FSL_DMA_IP_83XX: 57173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Set the channel to below modes: 58173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * EOTIE - End-of-transfer interrupt enable 59a7aea373b4ca428f1be2c1fedd2f26c8e3f2864dIra W. Snyder * PRC_RM - PCI read multiple 60173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 61a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_EOTIE 62a7aea373b4ca428f1be2c1fedd2f26c8e3f2864dIra W. Snyder | FSL_DMA_MR_PRC_RM, 32); 63173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei break; 64173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 65173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 66173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 67a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void set_sr(struct fsldma_chan *chan, u32 val) 68173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 69a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->sr, val, 32); 70173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 71173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 72a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic u32 get_sr(struct fsldma_chan *chan) 73173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 74a1c03319018061304be28d131073ac13a5cb86fbIra Snyder return DMA_IN(chan, &chan->regs->sr, 32); 75173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 76173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 77a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void set_desc_cnt(struct fsldma_chan *chan, 78173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei struct fsl_dma_ld_hw *hw, u32 count) 79173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 80a1c03319018061304be28d131073ac13a5cb86fbIra Snyder hw->count = CPU_TO_DMA(chan, count, 32); 81173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 82173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 83a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void set_desc_src(struct fsldma_chan *chan, 84173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei struct fsl_dma_ld_hw *hw, dma_addr_t src) 85173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 86173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei u64 snoop_bits; 87173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 88a1c03319018061304be28d131073ac13a5cb86fbIra Snyder snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) 89173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei ? ((u64)FSL_DMA_SATR_SREADTYPE_SNOOP_READ << 32) : 0; 90a1c03319018061304be28d131073ac13a5cb86fbIra Snyder hw->src_addr = CPU_TO_DMA(chan, snoop_bits | src, 64); 91173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 92173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 93a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void set_desc_dst(struct fsldma_chan *chan, 94738f5f7e1ae876448cb7d9c82bea258b69386647Ira Snyder struct fsl_dma_ld_hw *hw, dma_addr_t dst) 95173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 96173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei u64 snoop_bits; 97173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 98a1c03319018061304be28d131073ac13a5cb86fbIra Snyder snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) 99173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei ? ((u64)FSL_DMA_DATR_DWRITETYPE_SNOOP_WRITE << 32) : 0; 100a1c03319018061304be28d131073ac13a5cb86fbIra Snyder hw->dst_addr = CPU_TO_DMA(chan, snoop_bits | dst, 64); 101173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 102173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 103a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void set_desc_next(struct fsldma_chan *chan, 104173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei struct fsl_dma_ld_hw *hw, dma_addr_t next) 105173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 106173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei u64 snoop_bits; 107173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 108a1c03319018061304be28d131073ac13a5cb86fbIra Snyder snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) 109173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei ? FSL_DMA_SNEN : 0; 110a1c03319018061304be28d131073ac13a5cb86fbIra Snyder hw->next_ln_addr = CPU_TO_DMA(chan, snoop_bits | next, 64); 111173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 112173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 113a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void set_cdar(struct fsldma_chan *chan, dma_addr_t addr) 114173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 115a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->cdar, addr | FSL_DMA_SNEN, 64); 116173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 117173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 118a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic dma_addr_t get_cdar(struct fsldma_chan *chan) 119173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 120a1c03319018061304be28d131073ac13a5cb86fbIra Snyder return DMA_IN(chan, &chan->regs->cdar, 64) & ~FSL_DMA_SNEN; 121173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 122173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 123a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic dma_addr_t get_ndar(struct fsldma_chan *chan) 124173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 125a1c03319018061304be28d131073ac13a5cb86fbIra Snyder return DMA_IN(chan, &chan->regs->ndar, 64); 126173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 127173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 128a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic u32 get_bcr(struct fsldma_chan *chan) 129f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei{ 130a1c03319018061304be28d131073ac13a5cb86fbIra Snyder return DMA_IN(chan, &chan->regs->bcr, 32); 131f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei} 132f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei 133a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic int dma_is_idle(struct fsldma_chan *chan) 134173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 135a1c03319018061304be28d131073ac13a5cb86fbIra Snyder u32 sr = get_sr(chan); 136173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return (!(sr & FSL_DMA_SR_CB)) || (sr & FSL_DMA_SR_CH); 137173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 138173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 139a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void dma_start(struct fsldma_chan *chan) 140173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 141272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder u32 mode; 142272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 143a1c03319018061304be28d131073ac13a5cb86fbIra Snyder mode = DMA_IN(chan, &chan->regs->mr, 32); 144272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 145a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) { 146a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->feature & FSL_DMA_CHAN_PAUSE_EXT) { 147a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->bcr, 0, 32); 148272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode |= FSL_DMA_MR_EMP_EN; 149272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder } else { 150272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode &= ~FSL_DMA_MR_EMP_EN; 151272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder } 15243a1a3ed6bf5a1b9ae197b4f5f20033baf19db61Ira Snyder } 153173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 154a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->feature & FSL_DMA_CHAN_START_EXT) 155272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode |= FSL_DMA_MR_EMS_EN; 156173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei else 157272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode |= FSL_DMA_MR_CS; 158173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 159a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, mode, 32); 160173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 161173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 162a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void dma_halt(struct fsldma_chan *chan) 163173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 164272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder u32 mode; 165900325a6ce33995688b7a680a34e7698f16f4d72Dan Williams int i; 166900325a6ce33995688b7a680a34e7698f16f4d72Dan Williams 167a1c03319018061304be28d131073ac13a5cb86fbIra Snyder mode = DMA_IN(chan, &chan->regs->mr, 32); 168272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode |= FSL_DMA_MR_CA; 169a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, mode, 32); 170272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 171272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode &= ~(FSL_DMA_MR_CS | FSL_DMA_MR_EMS_EN | FSL_DMA_MR_CA); 172a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, mode, 32); 173173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 174900325a6ce33995688b7a680a34e7698f16f4d72Dan Williams for (i = 0; i < 100; i++) { 175a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (dma_is_idle(chan)) 1769c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder return; 1779c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 178173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei udelay(10); 179900325a6ce33995688b7a680a34e7698f16f4d72Dan Williams } 180272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 1819c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder if (!dma_is_idle(chan)) 182a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_err(chan->dev, "DMA halt timeout!\n"); 183173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 184173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 185a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void set_ld_eol(struct fsldma_chan *chan, 186173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei struct fsl_desc_sw *desc) 187173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 188776c8943f2766f2819fafd88fdfbaf418ecd6e41Ira Snyder u64 snoop_bits; 189776c8943f2766f2819fafd88fdfbaf418ecd6e41Ira Snyder 190a1c03319018061304be28d131073ac13a5cb86fbIra Snyder snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) 191776c8943f2766f2819fafd88fdfbaf418ecd6e41Ira Snyder ? FSL_DMA_SNEN : 0; 192776c8943f2766f2819fafd88fdfbaf418ecd6e41Ira Snyder 193a1c03319018061304be28d131073ac13a5cb86fbIra Snyder desc->hw.next_ln_addr = CPU_TO_DMA(chan, 194a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_TO_CPU(chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL 195776c8943f2766f2819fafd88fdfbaf418ecd6e41Ira Snyder | snoop_bits, 64); 196173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 197173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 198173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 199173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_chan_set_src_loop_size - Set source address hold transfer size 200a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 201173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * @size : Address loop size, 0 for disable loop 202173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 203173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * The set source address hold transfer size. The source 204173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * address hold or loop transfer size is when the DMA transfer 205173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * data from source address (SA), if the loop size is 4, the DMA will 206173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * read data from SA, SA + 1, SA + 2, SA + 3, then loop back to SA, 207173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * SA + 1 ... and so on. 208173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 209a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_chan_set_src_loop_size(struct fsldma_chan *chan, int size) 210173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 211272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder u32 mode; 212272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 213a1c03319018061304be28d131073ac13a5cb86fbIra Snyder mode = DMA_IN(chan, &chan->regs->mr, 32); 214272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 215173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei switch (size) { 216173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 0: 217272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode &= ~FSL_DMA_MR_SAHE; 218173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei break; 219173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 1: 220173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 2: 221173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 4: 222173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 8: 223272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode |= FSL_DMA_MR_SAHE | (__ilog2(size) << 14); 224173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei break; 225173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 226272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 227a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, mode, 32); 228173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 229173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 230173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 231738f5f7e1ae876448cb7d9c82bea258b69386647Ira Snyder * fsl_chan_set_dst_loop_size - Set destination address hold transfer size 232a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 233173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * @size : Address loop size, 0 for disable loop 234173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 235173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * The set destination address hold transfer size. The destination 236173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * address hold or loop transfer size is when the DMA transfer 237173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * data to destination address (TA), if the loop size is 4, the DMA will 238173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * write data to TA, TA + 1, TA + 2, TA + 3, then loop back to TA, 239173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * TA + 1 ... and so on. 240173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 241a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_chan_set_dst_loop_size(struct fsldma_chan *chan, int size) 242173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 243272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder u32 mode; 244272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 245a1c03319018061304be28d131073ac13a5cb86fbIra Snyder mode = DMA_IN(chan, &chan->regs->mr, 32); 246272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 247173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei switch (size) { 248173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 0: 249272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode &= ~FSL_DMA_MR_DAHE; 250173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei break; 251173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 1: 252173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 2: 253173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 4: 254173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case 8: 255272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode |= FSL_DMA_MR_DAHE | (__ilog2(size) << 16); 256173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei break; 257173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 258272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 259a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, mode, 32); 260173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 261173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 262173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 263e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * fsl_chan_set_request_count - Set DMA Request Count for external control 264a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 265e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * @size : Number of bytes to transfer in a single request 266e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * 267e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * The Freescale DMA channel can be controlled by the external signal DREQ#. 268e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * The DMA request count is how many bytes are allowed to transfer before 269e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * pausing the channel, after which a new assertion of DREQ# resumes channel 270e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * operation. 271173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 272e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * A size of 0 disables external pause control. The maximum size is 1024. 273173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 274a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_chan_set_request_count(struct fsldma_chan *chan, int size) 275173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 276272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder u32 mode; 277272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 278e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder BUG_ON(size > 1024); 279272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 280a1c03319018061304be28d131073ac13a5cb86fbIra Snyder mode = DMA_IN(chan, &chan->regs->mr, 32); 281272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder mode |= (__ilog2(size) << 24) & 0x0f000000; 282272ca655090978bdaa2630fc44fb2c03da5576fdIra Snyder 283a1c03319018061304be28d131073ac13a5cb86fbIra Snyder DMA_OUT(chan, &chan->regs->mr, mode, 32); 284e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder} 285173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 286e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder/** 287e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * fsl_chan_toggle_ext_pause - Toggle channel external pause status 288a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 289e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * @enable : 0 is disabled, 1 is enabled. 290e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * 291e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * The Freescale DMA channel can be controlled by the external signal DREQ#. 292e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * The DMA Request Count feature should be used in addition to this feature 293e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder * to set the number of bytes to transfer before pausing the channel. 294e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder */ 295a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_chan_toggle_ext_pause(struct fsldma_chan *chan, int enable) 296e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder{ 297e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder if (enable) 298a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->feature |= FSL_DMA_CHAN_PAUSE_EXT; 299e6c7ecb64e08ef346cb7062b4a5421f00bc602bdIra Snyder else 300a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->feature &= ~FSL_DMA_CHAN_PAUSE_EXT; 301173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 302173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 303173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 304173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_chan_toggle_ext_start - Toggle channel external start status 305a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 306173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * @enable : 0 is disabled, 1 is enabled. 307173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 308173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * If enable the external start, the channel can be started by an 309173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * external DMA start pin. So the dma_start() does not start the 310173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * transfer immediately. The DMA channel will wait for the 311173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * control pin asserted. 312173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 313a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_chan_toggle_ext_start(struct fsldma_chan *chan, int enable) 314173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 315173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (enable) 316a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->feature |= FSL_DMA_CHAN_START_EXT; 317173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei else 318a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->feature &= ~FSL_DMA_CHAN_START_EXT; 319173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 320173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 3219c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyderstatic void append_ld_queue(struct fsldma_chan *chan, 3229c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct fsl_desc_sw *desc) 3239c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder{ 3249c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct fsl_desc_sw *tail = to_fsl_desc(chan->ld_pending.prev); 3259c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 3269c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder if (list_empty(&chan->ld_pending)) 3279c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder goto out_splice; 3289c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 3299c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 3309c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * Add the hardware descriptor to the chain of hardware descriptors 3319c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * that already exists in memory. 3329c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * 3339c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * This will un-set the EOL bit of the existing transaction, and the 3349c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * last link in this transaction will become the EOL descriptor. 3359c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 3369c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder set_desc_next(chan, &tail->hw, desc->async_tx.phys); 3379c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 3389c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 3399c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * Add the software descriptor and all children to the list 3409c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * of pending transactions 3419c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 3429c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyderout_splice: 3439c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder list_splice_tail_init(&desc->tx_list, &chan->ld_pending); 3449c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder} 3459c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 346173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Weistatic dma_cookie_t fsl_dma_tx_submit(struct dma_async_tx_descriptor *tx) 347173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 348a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan = to_fsl_chan(tx->chan); 349eda34234578fd822c950fd06b5c5ff7ac08b3001Dan Williams struct fsl_desc_sw *desc = tx_to_fsl_desc(tx); 350eda34234578fd822c950fd06b5c5ff7ac08b3001Dan Williams struct fsl_desc_sw *child; 351173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei unsigned long flags; 352173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_cookie_t cookie; 353173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 354a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_lock_irqsave(&chan->desc_lock, flags); 355173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 3569c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 3579c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * assign cookies to all of the software descriptors 3589c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * that make up this transaction 3599c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 360a1c03319018061304be28d131073ac13a5cb86fbIra Snyder cookie = chan->common.cookie; 361eda34234578fd822c950fd06b5c5ff7ac08b3001Dan Williams list_for_each_entry(child, &desc->tx_list, node) { 362bcfb7465c03a8c62c89da374677df56f6b894d44Ira Snyder cookie++; 363bcfb7465c03a8c62c89da374677df56f6b894d44Ira Snyder if (cookie < 0) 364bcfb7465c03a8c62c89da374677df56f6b894d44Ira Snyder cookie = 1; 365bcfb7465c03a8c62c89da374677df56f6b894d44Ira Snyder 3666ca3a7a96e91b1aa8c704153c992b191d35b5747Steven J. Magnani child->async_tx.cookie = cookie; 367bcfb7465c03a8c62c89da374677df56f6b894d44Ira Snyder } 368bcfb7465c03a8c62c89da374677df56f6b894d44Ira Snyder 369a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->common.cookie = cookie; 3709c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 3719c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* put this transaction onto the tail of the pending queue */ 372a1c03319018061304be28d131073ac13a5cb86fbIra Snyder append_ld_queue(chan, desc); 373173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 374a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_unlock_irqrestore(&chan->desc_lock, flags); 375173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 376173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return cookie; 377173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 378173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 379173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 380173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_dma_alloc_descriptor - Allocate descriptor from channel's DMA pool. 381a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 382173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 383173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * Return - The descriptor allocated. NULL for failed. 384173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 385173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Weistatic struct fsl_desc_sw *fsl_dma_alloc_descriptor( 386a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan) 387173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 3889c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct fsl_desc_sw *desc; 389173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_addr_t pdesc; 3909c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 3919c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder desc = dma_pool_alloc(chan->desc_pool, GFP_ATOMIC, &pdesc); 3929c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder if (!desc) { 3939c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "out of memory for link desc\n"); 3949c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder return NULL; 395173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 396173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 3979c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder memset(desc, 0, sizeof(*desc)); 3989c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder INIT_LIST_HEAD(&desc->tx_list); 3999c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dma_async_tx_descriptor_init(&desc->async_tx, &chan->common); 4009c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder desc->async_tx.tx_submit = fsl_dma_tx_submit; 4019c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder desc->async_tx.phys = pdesc; 4029c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 4039c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder return desc; 404173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 405173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 406173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 407173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 408173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_dma_alloc_chan_resources - Allocate resources for DMA channel. 409a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 410173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 411173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * This function will create a dma pool for descriptor allocation. 412173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 413173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * Return - The number of descriptors allocated. 414173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 415a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic int fsl_dma_alloc_chan_resources(struct dma_chan *dchan) 416173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 417a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan = to_fsl_chan(dchan); 41877cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 41977cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi /* Has this channel already been allocated? */ 420a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->desc_pool) 42177cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi return 1; 422173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 4239c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 4249c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * We need the descriptor to be aligned to 32bytes 425173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * for meeting FSL DMA specification requirement. 426173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 427a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->desc_pool = dma_pool_create("fsl_dma_engine_desc_pool", 4289c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder chan->dev, 4299c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder sizeof(struct fsl_desc_sw), 4309c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder __alignof__(struct fsl_desc_sw), 0); 431a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (!chan->desc_pool) { 4329c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_err(chan->dev, "unable to allocate channel %d " 4339c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder "descriptor pool\n", chan->id); 4349c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder return -ENOMEM; 435173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 436173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 4379c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* there is at least one descriptor free to be allocated */ 438173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return 1; 439173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 440173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 441173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 4429c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * fsldma_free_desc_list - Free all descriptors in a queue 4439c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * @chan: Freescae DMA channel 4449c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * @list: the list to free 4459c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * 4469c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * LOCKING: must hold chan->desc_lock 4479c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 4489c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyderstatic void fsldma_free_desc_list(struct fsldma_chan *chan, 4499c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct list_head *list) 4509c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder{ 4519c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct fsl_desc_sw *desc, *_desc; 4529c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 4539c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder list_for_each_entry_safe(desc, _desc, list, node) { 4549c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder list_del(&desc->node); 4559c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); 4569c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder } 4579c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder} 4589c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 4599c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyderstatic void fsldma_free_desc_list_reverse(struct fsldma_chan *chan, 4609c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct list_head *list) 4619c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder{ 4629c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct fsl_desc_sw *desc, *_desc; 4639c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 4649c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder list_for_each_entry_safe_reverse(desc, _desc, list, node) { 4659c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder list_del(&desc->node); 4669c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); 4679c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder } 4689c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder} 4699c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 4709c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder/** 471173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_dma_free_chan_resources - Free all resources of the channel. 472a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 473173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 474a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_dma_free_chan_resources(struct dma_chan *dchan) 475173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 476a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan = to_fsl_chan(dchan); 477173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei unsigned long flags; 478173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 479a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_dbg(chan->dev, "Free all channel resources.\n"); 480a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_lock_irqsave(&chan->desc_lock, flags); 4819c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder fsldma_free_desc_list(chan, &chan->ld_pending); 4829c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder fsldma_free_desc_list(chan, &chan->ld_running); 483a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_unlock_irqrestore(&chan->desc_lock, flags); 48477cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 4859c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dma_pool_destroy(chan->desc_pool); 486a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->desc_pool = NULL; 487173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 488173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 4892187c269ad29510f1d65ec684133d1d3426d0eedZhang Weistatic struct dma_async_tx_descriptor * 490a1c03319018061304be28d131073ac13a5cb86fbIra Snyderfsl_dma_prep_interrupt(struct dma_chan *dchan, unsigned long flags) 4912187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei{ 492a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan; 4932187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei struct fsl_desc_sw *new; 4942187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei 495a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (!dchan) 4962187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei return NULL; 4972187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei 498a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan = to_fsl_chan(dchan); 4992187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei 500a1c03319018061304be28d131073ac13a5cb86fbIra Snyder new = fsl_dma_alloc_descriptor(chan); 5012187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei if (!new) { 502a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_err(chan->dev, "No free memory for link descriptor\n"); 5032187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei return NULL; 5042187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei } 5052187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei 5062187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei new->async_tx.cookie = -EBUSY; 507636bdeaa1243327501edfd2a597ed7443eb4239aDan Williams new->async_tx.flags = flags; 5082187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei 509f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei /* Insert the link descriptor to the LD ring */ 510eda34234578fd822c950fd06b5c5ff7ac08b3001Dan Williams list_add_tail(&new->node, &new->tx_list); 511f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei 5122187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei /* Set End-of-link to the last link descriptor of new list*/ 513a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_ld_eol(chan, new); 5142187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei 5152187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei return &new->async_tx; 5162187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei} 5172187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei 518173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Weistatic struct dma_async_tx_descriptor *fsl_dma_prep_memcpy( 519a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct dma_chan *dchan, dma_addr_t dma_dst, dma_addr_t dma_src, 520173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei size_t len, unsigned long flags) 521173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 522a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan; 523173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei struct fsl_desc_sw *first = NULL, *prev = NULL, *new; 524173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei size_t copy; 525173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 526a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (!dchan) 527173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return NULL; 528173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 529173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (!len) 530173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return NULL; 531173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 532a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan = to_fsl_chan(dchan); 533173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 534173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei do { 535173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 536173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Allocate the link descriptor from DMA pool */ 537a1c03319018061304be28d131073ac13a5cb86fbIra Snyder new = fsl_dma_alloc_descriptor(chan); 538173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (!new) { 539a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_err(chan->dev, 540173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei "No free memory for link descriptor\n"); 5412e077f8e8337e52eef3c39c24c31e103b11a0326Ira Snyder goto fail; 542173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 543173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#ifdef FSL_DMA_LD_DEBUG 544a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_dbg(chan->dev, "new link desc alloc %p\n", new); 545173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei#endif 546173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 54756822843ff99c88c778a614851328fcbb1503d10Zhang Wei copy = min(len, (size_t)FSL_DMA_BCR_MAX_CNT); 548173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 549a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_desc_cnt(chan, &new->hw, copy); 550a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_desc_src(chan, &new->hw, dma_src); 551a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_desc_dst(chan, &new->hw, dma_dst); 552173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 553173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (!first) 554173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei first = new; 555173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei else 556a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_desc_next(chan, &prev->hw, new->async_tx.phys); 557173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 558173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei new->async_tx.cookie = 0; 559636bdeaa1243327501edfd2a597ed7443eb4239aDan Williams async_tx_ack(&new->async_tx); 560173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 561173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei prev = new; 562173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei len -= copy; 563173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_src += copy; 564738f5f7e1ae876448cb7d9c82bea258b69386647Ira Snyder dma_dst += copy; 565173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 566173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Insert the link descriptor to the LD ring */ 567eda34234578fd822c950fd06b5c5ff7ac08b3001Dan Williams list_add_tail(&new->node, &first->tx_list); 568173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } while (len); 569173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 570636bdeaa1243327501edfd2a597ed7443eb4239aDan Williams new->async_tx.flags = flags; /* client is in control of this ack */ 571173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei new->async_tx.cookie = -EBUSY; 572173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 573173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Set End-of-link to the last link descriptor of new list*/ 574a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_ld_eol(chan, new); 575173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 5762e077f8e8337e52eef3c39c24c31e103b11a0326Ira Snyder return &first->async_tx; 5772e077f8e8337e52eef3c39c24c31e103b11a0326Ira Snyder 5782e077f8e8337e52eef3c39c24c31e103b11a0326Ira Snyderfail: 5792e077f8e8337e52eef3c39c24c31e103b11a0326Ira Snyder if (!first) 5802e077f8e8337e52eef3c39c24c31e103b11a0326Ira Snyder return NULL; 5812e077f8e8337e52eef3c39c24c31e103b11a0326Ira Snyder 5829c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder fsldma_free_desc_list_reverse(chan, &first->tx_list); 5832e077f8e8337e52eef3c39c24c31e103b11a0326Ira Snyder return NULL; 584173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 585173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 586173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 587bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * fsl_dma_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction 588bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * @chan: DMA channel 589bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * @sgl: scatterlist to transfer to/from 590bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * @sg_len: number of entries in @scatterlist 591bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * @direction: DMA direction 592bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * @flags: DMAEngine flags 593bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * 594bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * Prepare a set of descriptors for a DMA_SLAVE transaction. Following the 595bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * DMA_SLAVE API, this gets the device-specific information from the 596bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * chan->private variable. 597bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder */ 598bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyderstatic struct dma_async_tx_descriptor *fsl_dma_prep_slave_sg( 599a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct dma_chan *dchan, struct scatterlist *sgl, unsigned int sg_len, 600bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder enum dma_data_direction direction, unsigned long flags) 601bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder{ 602a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan; 603bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder struct fsl_desc_sw *first = NULL, *prev = NULL, *new = NULL; 604bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder struct fsl_dma_slave *slave; 605bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder size_t copy; 606bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 607bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder int i; 608bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder struct scatterlist *sg; 609bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder size_t sg_used; 610bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder size_t hw_used; 611bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder struct fsl_dma_hw_addr *hw; 612bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder dma_addr_t dma_dst, dma_src; 613bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 614a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (!dchan) 615bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder return NULL; 616bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 617a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (!dchan->private) 618bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder return NULL; 619bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 620a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan = to_fsl_chan(dchan); 621a1c03319018061304be28d131073ac13a5cb86fbIra Snyder slave = dchan->private; 622bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 623bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder if (list_empty(&slave->addresses)) 624bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder return NULL; 625bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 626bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder hw = list_first_entry(&slave->addresses, struct fsl_dma_hw_addr, entry); 627bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder hw_used = 0; 628bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 629bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* 630bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * Build the hardware transaction to copy from the scatterlist to 631bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * the hardware, or from the hardware to the scatterlist 632bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * 633bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * If you are copying from the hardware to the scatterlist and it 634bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * takes two hardware entries to fill an entire page, then both 635bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * hardware entries will be coalesced into the same page 636bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * 637bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * If you are copying from the scatterlist to the hardware and a 638bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * single page can fill two hardware entries, then the data will 639bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * be read out of the page into the first hardware entry, and so on 640bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder */ 641bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder for_each_sg(sgl, sg, sg_len, i) { 642bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder sg_used = 0; 643bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 644bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Loop until the entire scatterlist entry is used */ 645bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder while (sg_used < sg_dma_len(sg)) { 646bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 647bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* 648bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * If we've used up the current hardware address/length 649bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * pair, we need to load a new one 650bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * 651bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * This is done in a while loop so that descriptors with 652bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * length == 0 will be skipped 653bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder */ 654bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder while (hw_used >= hw->length) { 655bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 656bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* 657bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * If the current hardware entry is the last 658bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * entry in the list, we're finished 659bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder */ 660bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder if (list_is_last(&hw->entry, &slave->addresses)) 661bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder goto finished; 662bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 663bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Get the next hardware address/length pair */ 664bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder hw = list_entry(hw->entry.next, 665bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder struct fsl_dma_hw_addr, entry); 666bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder hw_used = 0; 667bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder } 668bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 669bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Allocate the link descriptor from DMA pool */ 670a1c03319018061304be28d131073ac13a5cb86fbIra Snyder new = fsl_dma_alloc_descriptor(chan); 671bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder if (!new) { 672a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_err(chan->dev, "No free memory for " 673bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder "link descriptor\n"); 674bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder goto fail; 675bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder } 676bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder#ifdef FSL_DMA_LD_DEBUG 677a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_dbg(chan->dev, "new link desc alloc %p\n", new); 678bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder#endif 679bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 680bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* 681bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * Calculate the maximum number of bytes to transfer, 682bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * making sure it is less than the DMA controller limit 683bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder */ 684bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder copy = min_t(size_t, sg_dma_len(sg) - sg_used, 685bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder hw->length - hw_used); 686bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder copy = min_t(size_t, copy, FSL_DMA_BCR_MAX_CNT); 687bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 688bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* 689bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * DMA_FROM_DEVICE 690bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * from the hardware to the scatterlist 691bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * 692bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * DMA_TO_DEVICE 693bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * from the scatterlist to the hardware 694bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder */ 695bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder if (direction == DMA_FROM_DEVICE) { 696bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder dma_src = hw->address + hw_used; 697bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder dma_dst = sg_dma_address(sg) + sg_used; 698bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder } else { 699bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder dma_src = sg_dma_address(sg) + sg_used; 700bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder dma_dst = hw->address + hw_used; 701bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder } 702bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 703bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Fill in the descriptor */ 704a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_desc_cnt(chan, &new->hw, copy); 705a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_desc_src(chan, &new->hw, dma_src); 706a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_desc_dst(chan, &new->hw, dma_dst); 707bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 708bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* 709bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * If this is not the first descriptor, chain the 710bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * current descriptor after the previous descriptor 711bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder */ 712bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder if (!first) { 713bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder first = new; 714bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder } else { 715a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_desc_next(chan, &prev->hw, 716bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder new->async_tx.phys); 717bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder } 718bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 719bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder new->async_tx.cookie = 0; 720bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder async_tx_ack(&new->async_tx); 721bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 722bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder prev = new; 723bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder sg_used += copy; 724bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder hw_used += copy; 725bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 726bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Insert the link descriptor into the LD ring */ 727bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder list_add_tail(&new->node, &first->tx_list); 728bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder } 729bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder } 730bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 731bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyderfinished: 732bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 733bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* All of the hardware address/length pairs had length == 0 */ 734bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder if (!first || !new) 735bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder return NULL; 736bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 737bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder new->async_tx.flags = flags; 738bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder new->async_tx.cookie = -EBUSY; 739bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 740bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Set End-of-link to the last link descriptor of new list */ 741a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_ld_eol(chan, new); 742bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 743bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Enable extra controller features */ 744a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->set_src_loop_size) 745a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->set_src_loop_size(chan, slave->src_loop_size); 746bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 747a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->set_dst_loop_size) 748a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->set_dst_loop_size(chan, slave->dst_loop_size); 749bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 750a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->toggle_ext_start) 751a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->toggle_ext_start(chan, slave->external_start); 752bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 753a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->toggle_ext_pause) 754a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->toggle_ext_pause(chan, slave->external_pause); 755bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 756a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->set_request_count) 757a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->set_request_count(chan, slave->request_count); 758bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 759bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder return &first->async_tx; 760bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 761bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyderfail: 762bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* If first was not set, then we failed to allocate the very first 763bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * descriptor, and we're done */ 764bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder if (!first) 765bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder return NULL; 766bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 767bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* 768bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * First is set, so all of the descriptors we allocated have been added 769bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * to first->tx_list, INCLUDING "first" itself. Therefore we 770bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * must traverse the list backwards freeing each descriptor in turn 771bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * 772bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder * We're re-using variables for the loop, oh well 773bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder */ 7749c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder fsldma_free_desc_list_reverse(chan, &first->tx_list); 775bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder return NULL; 776bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder} 777bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 778a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_dma_device_terminate_all(struct dma_chan *dchan) 779bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder{ 780a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan; 781bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder unsigned long flags; 782bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 783a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (!dchan) 784bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder return; 785bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 786a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan = to_fsl_chan(dchan); 787bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 788bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Halt the DMA engine */ 789a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dma_halt(chan); 790bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 791a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_lock_irqsave(&chan->desc_lock, flags); 792bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 793bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder /* Remove and free all of the descriptors in the LD queue */ 7949c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder fsldma_free_desc_list(chan, &chan->ld_pending); 7959c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder fsldma_free_desc_list(chan, &chan->ld_running); 796bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 797a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_unlock_irqrestore(&chan->desc_lock, flags); 798bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder} 799bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder 800bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder/** 801173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_dma_update_completed_cookie - Update the completed cookie. 802a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 8039c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * 8049c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * CONTEXT: hardirq 805173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 806a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_dma_update_completed_cookie(struct fsldma_chan *chan) 807173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 8089c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct fsl_desc_sw *desc; 8099c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder unsigned long flags; 8109c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dma_cookie_t cookie; 811173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 8129c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder spin_lock_irqsave(&chan->desc_lock, flags); 813173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 8149c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder if (list_empty(&chan->ld_running)) { 8159c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "no running descriptors\n"); 8169c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder goto out_unlock; 817173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 8189c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 8199c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* Get the last descriptor, update the cookie to that */ 8209c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder desc = to_fsl_desc(chan->ld_running.prev); 8219c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder if (dma_is_idle(chan)) 8229c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder cookie = desc->async_tx.cookie; 82376bd061f5c7b7550cdaed68ad6219ea7cee288fcSteven J. Magnani else { 8249c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder cookie = desc->async_tx.cookie - 1; 82576bd061f5c7b7550cdaed68ad6219ea7cee288fcSteven J. Magnani if (unlikely(cookie < DMA_MIN_COOKIE)) 82676bd061f5c7b7550cdaed68ad6219ea7cee288fcSteven J. Magnani cookie = DMA_MAX_COOKIE; 82776bd061f5c7b7550cdaed68ad6219ea7cee288fcSteven J. Magnani } 8289c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 8299c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder chan->completed_cookie = cookie; 8309c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 8319c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyderout_unlock: 8329c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder spin_unlock_irqrestore(&chan->desc_lock, flags); 8339c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder} 8349c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 8359c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder/** 8369c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * fsldma_desc_status - Check the status of a descriptor 8379c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * @chan: Freescale DMA channel 8389c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * @desc: DMA SW descriptor 8399c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * 8409c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * This function will return the status of the given descriptor 8419c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 8429c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyderstatic enum dma_status fsldma_desc_status(struct fsldma_chan *chan, 8439c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct fsl_desc_sw *desc) 8449c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder{ 8459c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder return dma_async_is_complete(desc->async_tx.cookie, 8469c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder chan->completed_cookie, 8479c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder chan->common.cookie); 848173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 849173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 850173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 851173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_chan_ld_cleanup - Clean up link descriptors 852a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 853173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * 854173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * This function clean up the ld_queue of DMA channel. 855173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 856a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_chan_ld_cleanup(struct fsldma_chan *chan) 857173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 858173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei struct fsl_desc_sw *desc, *_desc; 859173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei unsigned long flags; 860173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 861a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_lock_irqsave(&chan->desc_lock, flags); 862173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 8639c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "chan completed_cookie = %d\n", chan->completed_cookie); 8649c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder list_for_each_entry_safe(desc, _desc, &chan->ld_running, node) { 865173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_async_tx_callback callback; 866173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei void *callback_param; 867173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 8689c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder if (fsldma_desc_status(chan, desc) == DMA_IN_PROGRESS) 869173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei break; 870173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 8719c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* Remove from the list of running transactions */ 872173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei list_del(&desc->node); 873173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 874173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Run the link descriptor callback function */ 8759c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder callback = desc->async_tx.callback; 8769c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder callback_param = desc->async_tx.callback_param; 877173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (callback) { 878a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_unlock_irqrestore(&chan->desc_lock, flags); 8799c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "LD %p callback\n", desc); 880173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei callback(callback_param); 881a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_lock_irqsave(&chan->desc_lock, flags); 882173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 8839c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 8849c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* Run any dependencies, then free the descriptor */ 8859c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dma_run_dependencies(&desc->async_tx); 8869c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); 887173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 8889c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 889a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_unlock_irqrestore(&chan->desc_lock, flags); 890173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 891173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 892173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 8939c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * fsl_chan_xfer_ld_queue - transfer any pending transactions 894a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 8959c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * 8969c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * This will make sure that any pending transactions will be run. 8979c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * If the DMA controller is idle, it will be started. Otherwise, 8989c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * the DMA controller's interrupt handler will start any pending 8999c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * transactions when it becomes idle. 900173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 901a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_chan_xfer_ld_queue(struct fsldma_chan *chan) 902173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 9039c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder struct fsl_desc_sw *desc; 904173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei unsigned long flags; 905173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 906a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_lock_irqsave(&chan->desc_lock, flags); 907138ef0185177a6d221d24b6aa8f12d867fbbef90Ira Snyder 9089c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 9099c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * If the list of pending descriptors is empty, then we 9109c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * don't need to do any work at all 9119c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 9129c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder if (list_empty(&chan->ld_pending)) { 9139c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "no pending LDs\n"); 914138ef0185177a6d221d24b6aa8f12d867fbbef90Ira Snyder goto out_unlock; 9159c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder } 916173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 9179c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 9189c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * The DMA controller is not idle, which means the interrupt 9199c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * handler will start any queued transactions when it runs 9209c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * at the end of the current transaction 9219c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 9229c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder if (!dma_is_idle(chan)) { 9239c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "DMA controller still busy\n"); 9249c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder goto out_unlock; 9259c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder } 9269c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 9279c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 9289c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * TODO: 9299c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * make sure the dma_halt() function really un-wedges the 9309c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * controller as much as possible 9319c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 932a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dma_halt(chan); 933173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 9349c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 9359c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * If there are some link descriptors which have not been 9369c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * transferred, we need to start the controller 937173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 938173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 9399c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 9409c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * Move all elements from the queue of pending transactions 9419c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * onto the list of running transactions 9429c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 9439c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder desc = list_first_entry(&chan->ld_pending, struct fsl_desc_sw, node); 9449c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder list_splice_tail_init(&chan->ld_pending, &chan->ld_running); 9459c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder 9469c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 9479c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * Program the descriptor's address into the DMA controller, 9489c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * then start the DMA transaction 9499c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder */ 9509c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder set_cdar(chan, desc->async_tx.phys); 9519c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dma_start(chan); 952138ef0185177a6d221d24b6aa8f12d867fbbef90Ira Snyder 953138ef0185177a6d221d24b6aa8f12d867fbbef90Ira Snyderout_unlock: 954a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_unlock_irqrestore(&chan->desc_lock, flags); 955173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 956173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 957173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 958173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_dma_memcpy_issue_pending - Issue the DMA start command 959a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 960173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 961a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_dma_memcpy_issue_pending(struct dma_chan *dchan) 962173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 963a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan = to_fsl_chan(dchan); 964a1c03319018061304be28d131073ac13a5cb86fbIra Snyder fsl_chan_xfer_ld_queue(chan); 965173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 966173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 967173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei/** 968173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * fsl_dma_is_complete - Determine the DMA status 969a1c03319018061304be28d131073ac13a5cb86fbIra Snyder * @chan : Freescale DMA channel 970173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 971a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic enum dma_status fsl_dma_is_complete(struct dma_chan *dchan, 972173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_cookie_t cookie, 973173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_cookie_t *done, 974173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_cookie_t *used) 975173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 976a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan = to_fsl_chan(dchan); 977173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_cookie_t last_used; 978173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_cookie_t last_complete; 979173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 980a1c03319018061304be28d131073ac13a5cb86fbIra Snyder fsl_chan_ld_cleanup(chan); 981173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 982a1c03319018061304be28d131073ac13a5cb86fbIra Snyder last_used = dchan->cookie; 983a1c03319018061304be28d131073ac13a5cb86fbIra Snyder last_complete = chan->completed_cookie; 984173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 985173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (done) 986173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei *done = last_complete; 987173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 988173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (used) 989173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei *used = last_used; 990173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 991173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return dma_async_is_complete(cookie, last_complete, last_used); 992173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 993173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 994d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder/*----------------------------------------------------------------------------*/ 995d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder/* Interrupt Handling */ 996d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder/*----------------------------------------------------------------------------*/ 997d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 998e7a29151de1bd52081f27f149b68074fac0323beIra Snyderstatic irqreturn_t fsldma_chan_irq(int irq, void *data) 999173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 1000a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan = data; 10011c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei int update_cookie = 0; 10021c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei int xfer_ld_q = 0; 1003a1c03319018061304be28d131073ac13a5cb86fbIra Snyder u32 stat; 1004173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 10059c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* save and clear the status register */ 1006a1c03319018061304be28d131073ac13a5cb86fbIra Snyder stat = get_sr(chan); 10079c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder set_sr(chan, stat); 10089c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "irq: channel %d, stat = 0x%x\n", chan->id, stat); 1009173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1010173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei stat &= ~(FSL_DMA_SR_CB | FSL_DMA_SR_CH); 1011173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (!stat) 1012173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return IRQ_NONE; 1013173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1014173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (stat & FSL_DMA_SR_TE) 1015a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_err(chan->dev, "Transfer Error!\n"); 1016173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 10179c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 10189c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * Programming Error 1019f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei * The DMA_INTERRUPT async_tx is a NULL transfer, which will 1020f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei * triger a PE interrupt. 1021f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei */ 1022f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei if (stat & FSL_DMA_SR_PE) { 10239c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "irq: Programming Error INT\n"); 1024a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (get_bcr(chan) == 0) { 1025f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei /* BCR register is 0, this is a DMA_INTERRUPT async_tx. 1026f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei * Now, update the completed cookie, and continue the 1027f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei * next uncompleted transfer. 1028f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei */ 10291c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei update_cookie = 1; 10301c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei xfer_ld_q = 1; 1031f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei } 1032f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei stat &= ~FSL_DMA_SR_PE; 1033f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei } 1034f79abb627f033c85a6088231f20c85bc4a9bd757Zhang Wei 10359c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 10369c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * If the link descriptor segment transfer finishes, 1037173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * we will recycle the used descriptor. 1038173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 1039173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (stat & FSL_DMA_SR_EOSI) { 10409c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "irq: End-of-segments INT\n"); 10419c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "irq: clndar 0x%llx, nlndar 0x%llx\n", 1042a1c03319018061304be28d131073ac13a5cb86fbIra Snyder (unsigned long long)get_cdar(chan), 1043a1c03319018061304be28d131073ac13a5cb86fbIra Snyder (unsigned long long)get_ndar(chan)); 1044173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei stat &= ~FSL_DMA_SR_EOSI; 10451c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei update_cookie = 1; 10461c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei } 10471c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei 10489c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 10499c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * For MPC8349, EOCDI event need to update cookie 10501c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei * and start the next transfer if it exist. 10511c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei */ 10521c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei if (stat & FSL_DMA_SR_EOCDI) { 10539c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "irq: End-of-Chain link INT\n"); 10541c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei stat &= ~FSL_DMA_SR_EOCDI; 10551c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei update_cookie = 1; 10561c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei xfer_ld_q = 1; 1057173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 1058173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 10599c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder /* 10609c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder * If it current transfer is the end-of-transfer, 1061173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * we should clear the Channel Start bit for 1062173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei * prepare next transfer. 1063173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 10641c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei if (stat & FSL_DMA_SR_EOLNI) { 10659c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "irq: End-of-link INT\n"); 1066173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei stat &= ~FSL_DMA_SR_EOLNI; 10671c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei xfer_ld_q = 1; 1068173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 1069173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 10701c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei if (update_cookie) 1071a1c03319018061304be28d131073ac13a5cb86fbIra Snyder fsl_dma_update_completed_cookie(chan); 10721c62979ed29a8e2bf9fbe1db101c81a0089676f8Zhang Wei if (xfer_ld_q) 1073a1c03319018061304be28d131073ac13a5cb86fbIra Snyder fsl_chan_xfer_ld_queue(chan); 1074173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (stat) 10759c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "irq: unhandled sr 0x%02x\n", stat); 1076173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 10779c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder dev_dbg(chan->dev, "irq: Exit\n"); 1078a1c03319018061304be28d131073ac13a5cb86fbIra Snyder tasklet_schedule(&chan->tasklet); 1079173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return IRQ_HANDLED; 1080173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 1081173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1082d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyderstatic void dma_do_tasklet(unsigned long data) 1083d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder{ 1084a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan = (struct fsldma_chan *)data; 1085a1c03319018061304be28d131073ac13a5cb86fbIra Snyder fsl_chan_ld_cleanup(chan); 1086d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder} 1087d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1088d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyderstatic irqreturn_t fsldma_ctrl_irq(int irq, void *data) 1089173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 1090a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder struct fsldma_device *fdev = data; 1091d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder struct fsldma_chan *chan; 1092d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder unsigned int handled = 0; 1093d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder u32 gsr, mask; 1094d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder int i; 1095173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1096e7a29151de1bd52081f27f149b68074fac0323beIra Snyder gsr = (fdev->feature & FSL_DMA_BIG_ENDIAN) ? in_be32(fdev->regs) 1097d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder : in_le32(fdev->regs); 1098d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder mask = 0xff000000; 1099d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_dbg(fdev->dev, "IRQ: gsr 0x%.8x\n", gsr); 1100173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1101d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { 1102d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder chan = fdev->chan[i]; 1103d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (!chan) 1104d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder continue; 1105d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1106d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (gsr & mask) { 1107d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_dbg(fdev->dev, "IRQ: chan %d\n", chan->id); 1108d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder fsldma_chan_irq(irq, chan); 1109d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder handled++; 1110d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1111d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1112d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder gsr &= ~mask; 1113d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder mask >>= 8; 1114d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1115d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1116d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder return IRQ_RETVAL(handled); 1117173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 1118173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1119d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyderstatic void fsldma_free_irqs(struct fsldma_device *fdev) 1120173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 1121d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder struct fsldma_chan *chan; 1122d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder int i; 1123d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1124d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (fdev->irq != NO_IRQ) { 1125d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_dbg(fdev->dev, "free per-controller IRQ\n"); 1126d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder free_irq(fdev->irq, fdev); 1127d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder return; 1128d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1129d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1130d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { 1131d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder chan = fdev->chan[i]; 1132d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (chan && chan->irq != NO_IRQ) { 1133d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_dbg(fdev->dev, "free channel %d IRQ\n", chan->id); 1134d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder free_irq(chan->irq, chan); 1135d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1136d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1137d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder} 1138d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1139d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyderstatic int fsldma_request_irqs(struct fsldma_device *fdev) 1140d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder{ 1141d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder struct fsldma_chan *chan; 1142d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder int ret; 1143d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder int i; 1144d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1145d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder /* if we have a per-controller IRQ, use that */ 1146d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (fdev->irq != NO_IRQ) { 1147d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_dbg(fdev->dev, "request per-controller IRQ\n"); 1148d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder ret = request_irq(fdev->irq, fsldma_ctrl_irq, IRQF_SHARED, 1149d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder "fsldma-controller", fdev); 1150d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder return ret; 1151d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1152d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1153d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder /* no per-controller IRQ, use the per-channel IRQs */ 1154d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { 1155d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder chan = fdev->chan[i]; 1156d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (!chan) 1157d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder continue; 1158d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1159d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (chan->irq == NO_IRQ) { 1160d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_err(fdev->dev, "no interrupts property defined for " 1161d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder "DMA channel %d. Please fix your " 1162d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder "device tree\n", chan->id); 1163d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder ret = -ENODEV; 1164d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder goto out_unwind; 1165d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1166d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1167d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_dbg(fdev->dev, "request channel %d IRQ\n", chan->id); 1168d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder ret = request_irq(chan->irq, fsldma_chan_irq, IRQF_SHARED, 1169d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder "fsldma-chan", chan); 1170d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (ret) { 1171d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_err(fdev->dev, "unable to request IRQ for DMA " 1172d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder "channel %d\n", chan->id); 1173d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder goto out_unwind; 1174d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1175d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1176d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1177d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder return 0; 1178d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1179d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyderout_unwind: 1180d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder for (/* none */; i >= 0; i--) { 1181d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder chan = fdev->chan[i]; 1182d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (!chan) 1183d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder continue; 1184d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1185d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (chan->irq == NO_IRQ) 1186d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder continue; 1187d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1188d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder free_irq(chan->irq, chan); 1189d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1190d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1191d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder return ret; 1192173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 1193173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1194a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder/*----------------------------------------------------------------------------*/ 1195a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder/* OpenFirmware Subsystem */ 1196a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder/*----------------------------------------------------------------------------*/ 1197a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder 1198a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyderstatic int __devinit fsl_dma_chan_probe(struct fsldma_device *fdev, 119977cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi struct device_node *node, u32 feature, const char *compatible) 1200173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 1201a1c03319018061304be28d131073ac13a5cb86fbIra Snyder struct fsldma_chan *chan; 12024ce0e953f6286777452bf07c83056342d6b9b257Ira Snyder struct resource res; 1203173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei int err; 1204173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1205173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* alloc channel */ 1206a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan = kzalloc(sizeof(*chan), GFP_KERNEL); 1207a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (!chan) { 1208e7a29151de1bd52081f27f149b68074fac0323beIra Snyder dev_err(fdev->dev, "no free memory for DMA channels!\n"); 1209e7a29151de1bd52081f27f149b68074fac0323beIra Snyder err = -ENOMEM; 1210e7a29151de1bd52081f27f149b68074fac0323beIra Snyder goto out_return; 1211e7a29151de1bd52081f27f149b68074fac0323beIra Snyder } 1212e7a29151de1bd52081f27f149b68074fac0323beIra Snyder 1213e7a29151de1bd52081f27f149b68074fac0323beIra Snyder /* ioremap registers for use */ 1214a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->regs = of_iomap(node, 0); 1215a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (!chan->regs) { 1216e7a29151de1bd52081f27f149b68074fac0323beIra Snyder dev_err(fdev->dev, "unable to ioremap registers\n"); 1217e7a29151de1bd52081f27f149b68074fac0323beIra Snyder err = -ENOMEM; 1218a1c03319018061304be28d131073ac13a5cb86fbIra Snyder goto out_free_chan; 1219173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 1220173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 12214ce0e953f6286777452bf07c83056342d6b9b257Ira Snyder err = of_address_to_resource(node, 0, &res); 1222173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (err) { 1223e7a29151de1bd52081f27f149b68074fac0323beIra Snyder dev_err(fdev->dev, "unable to find 'reg' property\n"); 1224e7a29151de1bd52081f27f149b68074fac0323beIra Snyder goto out_iounmap_regs; 1225173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 1226173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1227a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->feature = feature; 1228173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (!fdev->feature) 1229a1c03319018061304be28d131073ac13a5cb86fbIra Snyder fdev->feature = chan->feature; 1230173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1231e7a29151de1bd52081f27f149b68074fac0323beIra Snyder /* 1232e7a29151de1bd52081f27f149b68074fac0323beIra Snyder * If the DMA device's feature is different than the feature 1233e7a29151de1bd52081f27f149b68074fac0323beIra Snyder * of its channels, report the bug 1234173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei */ 1235a1c03319018061304be28d131073ac13a5cb86fbIra Snyder WARN_ON(fdev->feature != chan->feature); 1236e7a29151de1bd52081f27f149b68074fac0323beIra Snyder 1237a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->dev = fdev->dev; 1238a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->id = ((res.start - 0x100) & 0xfff) >> 7; 1239a1c03319018061304be28d131073ac13a5cb86fbIra Snyder if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) { 1240e7a29151de1bd52081f27f149b68074fac0323beIra Snyder dev_err(fdev->dev, "too many channels for device\n"); 1241173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei err = -EINVAL; 1242e7a29151de1bd52081f27f149b68074fac0323beIra Snyder goto out_iounmap_regs; 1243173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 1244173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1245a1c03319018061304be28d131073ac13a5cb86fbIra Snyder fdev->chan[chan->id] = chan; 1246a1c03319018061304be28d131073ac13a5cb86fbIra Snyder tasklet_init(&chan->tasklet, dma_do_tasklet, (unsigned long)chan); 1247e7a29151de1bd52081f27f149b68074fac0323beIra Snyder 1248e7a29151de1bd52081f27f149b68074fac0323beIra Snyder /* Initialize the channel */ 1249a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dma_init(chan); 1250173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1251173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Clear cdar registers */ 1252a1c03319018061304be28d131073ac13a5cb86fbIra Snyder set_cdar(chan, 0); 1253173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1254a1c03319018061304be28d131073ac13a5cb86fbIra Snyder switch (chan->feature & FSL_DMA_IP_MASK) { 1255173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case FSL_DMA_IP_85XX: 1256a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->toggle_ext_pause = fsl_chan_toggle_ext_pause; 1257173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei case FSL_DMA_IP_83XX: 1258a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->toggle_ext_start = fsl_chan_toggle_ext_start; 1259a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->set_src_loop_size = fsl_chan_set_src_loop_size; 1260a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->set_dst_loop_size = fsl_chan_set_dst_loop_size; 1261a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->set_request_count = fsl_chan_set_request_count; 1262173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 1263173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1264a1c03319018061304be28d131073ac13a5cb86fbIra Snyder spin_lock_init(&chan->desc_lock); 12659c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder INIT_LIST_HEAD(&chan->ld_pending); 12669c3a50b7d7ec45da34e73cac66cde12dd6092dd8Ira Snyder INIT_LIST_HEAD(&chan->ld_running); 1267173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1268a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->common.device = &fdev->common; 1269173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1270d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder /* find the IRQ line, if it exists in the device tree */ 1271a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->irq = irq_of_parse_and_map(node, 0); 1272d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1273173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei /* Add the channel to DMA device channel list */ 1274a1c03319018061304be28d131073ac13a5cb86fbIra Snyder list_add_tail(&chan->common.device_node, &fdev->common.channels); 1275173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei fdev->common.chancnt++; 1276173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1277a1c03319018061304be28d131073ac13a5cb86fbIra Snyder dev_info(fdev->dev, "#%d (%s), irq %d\n", chan->id, compatible, 1278a1c03319018061304be28d131073ac13a5cb86fbIra Snyder chan->irq != NO_IRQ ? chan->irq : fdev->irq); 1279173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1280173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return 0; 128151ee87f27a1d2c0e08492924f2fb0223c4c704d9Li Yang 1282e7a29151de1bd52081f27f149b68074fac0323beIra Snyderout_iounmap_regs: 1283a1c03319018061304be28d131073ac13a5cb86fbIra Snyder iounmap(chan->regs); 1284a1c03319018061304be28d131073ac13a5cb86fbIra Snyderout_free_chan: 1285a1c03319018061304be28d131073ac13a5cb86fbIra Snyder kfree(chan); 1286e7a29151de1bd52081f27f149b68074fac0323beIra Snyderout_return: 1287173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return err; 1288173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 1289173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1290a1c03319018061304be28d131073ac13a5cb86fbIra Snyderstatic void fsl_dma_chan_remove(struct fsldma_chan *chan) 1291173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 1292a1c03319018061304be28d131073ac13a5cb86fbIra Snyder irq_dispose_mapping(chan->irq); 1293a1c03319018061304be28d131073ac13a5cb86fbIra Snyder list_del(&chan->common.device_node); 1294a1c03319018061304be28d131073ac13a5cb86fbIra Snyder iounmap(chan->regs); 1295a1c03319018061304be28d131073ac13a5cb86fbIra Snyder kfree(chan); 1296173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 1297173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1298e7a29151de1bd52081f27f149b68074fac0323beIra Snyderstatic int __devinit fsldma_of_probe(struct of_device *op, 1299173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei const struct of_device_id *match) 1300173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 1301a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder struct fsldma_device *fdev; 130277cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi struct device_node *child; 1303e7a29151de1bd52081f27f149b68074fac0323beIra Snyder int err; 1304173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1305a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder fdev = kzalloc(sizeof(*fdev), GFP_KERNEL); 1306173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei if (!fdev) { 1307e7a29151de1bd52081f27f149b68074fac0323beIra Snyder dev_err(&op->dev, "No enough memory for 'priv'\n"); 1308e7a29151de1bd52081f27f149b68074fac0323beIra Snyder err = -ENOMEM; 1309e7a29151de1bd52081f27f149b68074fac0323beIra Snyder goto out_return; 1310173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 1311e7a29151de1bd52081f27f149b68074fac0323beIra Snyder 1312e7a29151de1bd52081f27f149b68074fac0323beIra Snyder fdev->dev = &op->dev; 1313173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei INIT_LIST_HEAD(&fdev->common.channels); 1314173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1315e7a29151de1bd52081f27f149b68074fac0323beIra Snyder /* ioremap the registers for use */ 131661c7a080a5a061c976988fd4b844dfb468dda255Grant Likely fdev->regs = of_iomap(op->dev.of_node, 0); 1317e7a29151de1bd52081f27f149b68074fac0323beIra Snyder if (!fdev->regs) { 1318e7a29151de1bd52081f27f149b68074fac0323beIra Snyder dev_err(&op->dev, "unable to ioremap registers\n"); 1319e7a29151de1bd52081f27f149b68074fac0323beIra Snyder err = -ENOMEM; 1320e7a29151de1bd52081f27f149b68074fac0323beIra Snyder goto out_free_fdev; 1321173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei } 1322173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1323d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder /* map the channel IRQ if it exists, but don't hookup the handler yet */ 132461c7a080a5a061c976988fd4b844dfb468dda255Grant Likely fdev->irq = irq_of_parse_and_map(op->dev.of_node, 0); 1325d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1326173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_cap_set(DMA_MEMCPY, fdev->common.cap_mask); 1327173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_cap_set(DMA_INTERRUPT, fdev->common.cap_mask); 1328bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder dma_cap_set(DMA_SLAVE, fdev->common.cap_mask); 1329173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei fdev->common.device_alloc_chan_resources = fsl_dma_alloc_chan_resources; 1330173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei fdev->common.device_free_chan_resources = fsl_dma_free_chan_resources; 13312187c269ad29510f1d65ec684133d1d3426d0eedZhang Wei fdev->common.device_prep_dma_interrupt = fsl_dma_prep_interrupt; 1332173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei fdev->common.device_prep_dma_memcpy = fsl_dma_prep_memcpy; 1333173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei fdev->common.device_is_tx_complete = fsl_dma_is_complete; 1334173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei fdev->common.device_issue_pending = fsl_dma_memcpy_issue_pending; 1335bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder fdev->common.device_prep_slave_sg = fsl_dma_prep_slave_sg; 1336bbea0b6e0d214ef1511b9c6ccf3af26b38f0af7dIra Snyder fdev->common.device_terminate_all = fsl_dma_device_terminate_all; 1337e7a29151de1bd52081f27f149b68074fac0323beIra Snyder fdev->common.dev = &op->dev; 1338173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1339e7a29151de1bd52081f27f149b68074fac0323beIra Snyder dev_set_drvdata(&op->dev, fdev); 134077cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 1341e7a29151de1bd52081f27f149b68074fac0323beIra Snyder /* 1342e7a29151de1bd52081f27f149b68074fac0323beIra Snyder * We cannot use of_platform_bus_probe() because there is no 1343e7a29151de1bd52081f27f149b68074fac0323beIra Snyder * of_platform_bus_remove(). Instead, we manually instantiate every DMA 134477cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi * channel object. 134577cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi */ 134661c7a080a5a061c976988fd4b844dfb468dda255Grant Likely for_each_child_of_node(op->dev.of_node, child) { 1347e7a29151de1bd52081f27f149b68074fac0323beIra Snyder if (of_device_is_compatible(child, "fsl,eloplus-dma-channel")) { 134877cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi fsl_dma_chan_probe(fdev, child, 134977cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi FSL_DMA_IP_85XX | FSL_DMA_BIG_ENDIAN, 135077cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi "fsl,eloplus-dma-channel"); 1351e7a29151de1bd52081f27f149b68074fac0323beIra Snyder } 1352e7a29151de1bd52081f27f149b68074fac0323beIra Snyder 1353e7a29151de1bd52081f27f149b68074fac0323beIra Snyder if (of_device_is_compatible(child, "fsl,elo-dma-channel")) { 135477cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi fsl_dma_chan_probe(fdev, child, 135577cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi FSL_DMA_IP_83XX | FSL_DMA_LITTLE_ENDIAN, 135677cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi "fsl,elo-dma-channel"); 1357e7a29151de1bd52081f27f149b68074fac0323beIra Snyder } 135877cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi } 1359173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1360d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder /* 1361d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder * Hookup the IRQ handler(s) 1362d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder * 1363d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder * If we have a per-controller interrupt, we prefer that to the 1364d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder * per-channel interrupts to reduce the number of shared interrupt 1365d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder * handlers on the same IRQ line 1366d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder */ 1367d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder err = fsldma_request_irqs(fdev); 1368d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder if (err) { 1369d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder dev_err(fdev->dev, "unable to request IRQs\n"); 1370d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder goto out_free_fdev; 1371d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder } 1372d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1373173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei dma_async_device_register(&fdev->common); 1374173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return 0; 1375173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1376e7a29151de1bd52081f27f149b68074fac0323beIra Snyderout_free_fdev: 1377d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder irq_dispose_mapping(fdev->irq); 1378173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei kfree(fdev); 1379e7a29151de1bd52081f27f149b68074fac0323beIra Snyderout_return: 1380173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei return err; 1381173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 1382173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1383e7a29151de1bd52081f27f149b68074fac0323beIra Snyderstatic int fsldma_of_remove(struct of_device *op) 138477cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi{ 1385a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder struct fsldma_device *fdev; 138677cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi unsigned int i; 138777cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 1388e7a29151de1bd52081f27f149b68074fac0323beIra Snyder fdev = dev_get_drvdata(&op->dev); 138977cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi dma_async_device_unregister(&fdev->common); 139077cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 1391d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder fsldma_free_irqs(fdev); 1392d3f620b2c4fecdc8e060b70e8d92d29fc01c6126Ira Snyder 1393e7a29151de1bd52081f27f149b68074fac0323beIra Snyder for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { 139477cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi if (fdev->chan[i]) 139577cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi fsl_dma_chan_remove(fdev->chan[i]); 1396e7a29151de1bd52081f27f149b68074fac0323beIra Snyder } 139777cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 1398e7a29151de1bd52081f27f149b68074fac0323beIra Snyder iounmap(fdev->regs); 1399e7a29151de1bd52081f27f149b68074fac0323beIra Snyder dev_set_drvdata(&op->dev, NULL); 140077cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi kfree(fdev); 140177cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 140277cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi return 0; 140377cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi} 140477cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 14054b1cf1facca31b7db2a61d8aa2ba40d5a93a0957Márton Némethstatic const struct of_device_id fsldma_of_ids[] = { 1406049c9d45531d9825bf737891163a794fca1421c5Kumar Gala { .compatible = "fsl,eloplus-dma", }, 1407049c9d45531d9825bf737891163a794fca1421c5Kumar Gala { .compatible = "fsl,elo-dma", }, 1408173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei {} 1409173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei}; 1410173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1411a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyderstatic struct of_platform_driver fsldma_of_driver = { 14124018294b53d1dae026880e45f174c1cc63b5d435Grant Likely .driver = { 14134018294b53d1dae026880e45f174c1cc63b5d435Grant Likely .name = "fsl-elo-dma", 14144018294b53d1dae026880e45f174c1cc63b5d435Grant Likely .owner = THIS_MODULE, 14154018294b53d1dae026880e45f174c1cc63b5d435Grant Likely .of_match_table = fsldma_of_ids, 14164018294b53d1dae026880e45f174c1cc63b5d435Grant Likely }, 14174018294b53d1dae026880e45f174c1cc63b5d435Grant Likely .probe = fsldma_of_probe, 14184018294b53d1dae026880e45f174c1cc63b5d435Grant Likely .remove = fsldma_of_remove, 1419173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei}; 1420173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1421a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder/*----------------------------------------------------------------------------*/ 1422a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder/* Module Init / Exit */ 1423a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder/*----------------------------------------------------------------------------*/ 1424a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder 1425a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyderstatic __init int fsldma_init(void) 1426173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei{ 142777cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi int ret; 142877cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 142977cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi pr_info("Freescale Elo / Elo Plus DMA driver\n"); 143077cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 1431a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder ret = of_register_platform_driver(&fsldma_of_driver); 143277cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi if (ret) 143377cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi pr_err("fsldma: failed to register platform driver\n"); 143477cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 143577cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi return ret; 143677cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi} 143777cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 1438a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyderstatic void __exit fsldma_exit(void) 143977cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi{ 1440a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snyder of_unregister_platform_driver(&fsldma_of_driver); 1441173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei} 1442173acc7ce8538f1f3040791dc622a92aadc12cf4Zhang Wei 1443a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snydersubsys_initcall(fsldma_init); 1444a4f56d4b103d4e5d1a59a9118db0185a6bd1a83bIra Snydermodule_exit(fsldma_exit); 144577cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur Tabi 144677cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur TabiMODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver"); 144777cd62e8082b9743b59ee1946a4c3ee2e3cd2bceTimur TabiMODULE_LICENSE("GPL"); 1448