intel_lvds.c revision c5d1b51d3559664920136b45f4d2366ed9a9e8be
1/* 2 * Copyright © 2006-2007 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 */ 29 30#include <acpi/button.h> 31#include <linux/dmi.h> 32#include <linux/i2c.h> 33#include <linux/slab.h> 34#include "drmP.h" 35#include "drm.h" 36#include "drm_crtc.h" 37#include "drm_edid.h" 38#include "intel_drv.h" 39#include "i915_drm.h" 40#include "i915_drv.h" 41#include <linux/acpi.h> 42 43/* Private structure for the integrated LVDS support */ 44struct intel_lvds { 45 struct intel_encoder base; 46 47 struct edid *edid; 48 49 int fitting_mode; 50 u32 pfit_control; 51 u32 pfit_pgm_ratios; 52 bool pfit_dirty; 53 54 struct drm_display_mode *fixed_mode; 55}; 56 57static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder) 58{ 59 return container_of(encoder, struct intel_lvds, base.base); 60} 61 62static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector) 63{ 64 return container_of(intel_attached_encoder(connector), 65 struct intel_lvds, base); 66} 67 68/** 69 * Sets the power state for the panel. 70 */ 71static void intel_lvds_set_power(struct intel_lvds *intel_lvds, bool on) 72{ 73 struct drm_device *dev = intel_lvds->base.base.dev; 74 struct drm_i915_private *dev_priv = dev->dev_private; 75 u32 ctl_reg, lvds_reg; 76 77 if (HAS_PCH_SPLIT(dev)) { 78 ctl_reg = PCH_PP_CONTROL; 79 lvds_reg = PCH_LVDS; 80 } else { 81 ctl_reg = PP_CONTROL; 82 lvds_reg = LVDS; 83 } 84 85 if (on) { 86 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); 87 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); 88 intel_panel_set_backlight(dev, dev_priv->backlight_level); 89 } else { 90 dev_priv->backlight_level = intel_panel_get_backlight(dev); 91 92 intel_panel_set_backlight(dev, 0); 93 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); 94 95 if (intel_lvds->pfit_control) { 96 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) 97 DRM_ERROR("timed out waiting for panel to power off\n"); 98 I915_WRITE(PFIT_CONTROL, 0); 99 intel_lvds->pfit_control = 0; 100 intel_lvds->pfit_dirty = false; 101 } 102 103 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); 104 } 105 POSTING_READ(lvds_reg); 106} 107 108static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) 109{ 110 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 111 112 if (mode == DRM_MODE_DPMS_ON) 113 intel_lvds_set_power(intel_lvds, true); 114 else 115 intel_lvds_set_power(intel_lvds, false); 116 117 /* XXX: We never power down the LVDS pairs. */ 118} 119 120static int intel_lvds_mode_valid(struct drm_connector *connector, 121 struct drm_display_mode *mode) 122{ 123 struct intel_lvds *intel_lvds = intel_attached_lvds(connector); 124 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode; 125 126 if (mode->hdisplay > fixed_mode->hdisplay) 127 return MODE_PANEL; 128 if (mode->vdisplay > fixed_mode->vdisplay) 129 return MODE_PANEL; 130 131 return MODE_OK; 132} 133 134static void 135centre_horizontally(struct drm_display_mode *mode, 136 int width) 137{ 138 u32 border, sync_pos, blank_width, sync_width; 139 140 /* keep the hsync and hblank widths constant */ 141 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; 142 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; 143 sync_pos = (blank_width - sync_width + 1) / 2; 144 145 border = (mode->hdisplay - width + 1) / 2; 146 border += border & 1; /* make the border even */ 147 148 mode->crtc_hdisplay = width; 149 mode->crtc_hblank_start = width + border; 150 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; 151 152 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; 153 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; 154} 155 156static void 157centre_vertically(struct drm_display_mode *mode, 158 int height) 159{ 160 u32 border, sync_pos, blank_width, sync_width; 161 162 /* keep the vsync and vblank widths constant */ 163 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; 164 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; 165 sync_pos = (blank_width - sync_width + 1) / 2; 166 167 border = (mode->vdisplay - height + 1) / 2; 168 169 mode->crtc_vdisplay = height; 170 mode->crtc_vblank_start = height + border; 171 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; 172 173 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; 174 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; 175} 176 177static inline u32 panel_fitter_scaling(u32 source, u32 target) 178{ 179 /* 180 * Floating point operation is not supported. So the FACTOR 181 * is defined, which can avoid the floating point computation 182 * when calculating the panel ratio. 183 */ 184#define ACCURACY 12 185#define FACTOR (1 << ACCURACY) 186 u32 ratio = source * FACTOR / target; 187 return (FACTOR * ratio + FACTOR/2) / FACTOR; 188} 189 190static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, 191 struct drm_display_mode *mode, 192 struct drm_display_mode *adjusted_mode) 193{ 194 struct drm_device *dev = encoder->dev; 195 struct drm_i915_private *dev_priv = dev->dev_private; 196 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 197 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 198 struct drm_encoder *tmp_encoder; 199 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 200 201 /* Should never happen!! */ 202 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { 203 DRM_ERROR("Can't support LVDS on pipe A\n"); 204 return false; 205 } 206 207 /* Should never happen!! */ 208 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) { 209 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) { 210 DRM_ERROR("Can't enable LVDS and another " 211 "encoder on the same pipe\n"); 212 return false; 213 } 214 } 215 216 /* 217 * We have timings from the BIOS for the panel, put them in 218 * to the adjusted mode. The CRTC will be set up for this mode, 219 * with the panel scaling set up to source from the H/VDisplay 220 * of the original mode. 221 */ 222 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode); 223 224 if (HAS_PCH_SPLIT(dev)) { 225 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode, 226 mode, adjusted_mode); 227 return true; 228 } 229 230 /* Make sure pre-965s set dither correctly */ 231 if (INTEL_INFO(dev)->gen < 4) { 232 if (dev_priv->lvds_dither) 233 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 234 } 235 236 /* Native modes don't need fitting */ 237 if (adjusted_mode->hdisplay == mode->hdisplay && 238 adjusted_mode->vdisplay == mode->vdisplay) 239 goto out; 240 241 /* 965+ wants fuzzy fitting */ 242 if (INTEL_INFO(dev)->gen >= 4) 243 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | 244 PFIT_FILTER_FUZZY); 245 246 /* 247 * Enable automatic panel scaling for non-native modes so that they fill 248 * the screen. Should be enabled before the pipe is enabled, according 249 * to register description and PRM. 250 * Change the value here to see the borders for debugging 251 */ 252 I915_WRITE(BCLRPAT_A, 0); 253 I915_WRITE(BCLRPAT_B, 0); 254 255 switch (intel_lvds->fitting_mode) { 256 case DRM_MODE_SCALE_CENTER: 257 /* 258 * For centered modes, we have to calculate border widths & 259 * heights and modify the values programmed into the CRTC. 260 */ 261 centre_horizontally(adjusted_mode, mode->hdisplay); 262 centre_vertically(adjusted_mode, mode->vdisplay); 263 border = LVDS_BORDER_ENABLE; 264 break; 265 266 case DRM_MODE_SCALE_ASPECT: 267 /* Scale but preserve the aspect ratio */ 268 if (INTEL_INFO(dev)->gen >= 4) { 269 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; 270 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; 271 272 pfit_control |= PFIT_ENABLE; 273 /* 965+ is easy, it does everything in hw */ 274 if (scaled_width > scaled_height) 275 pfit_control |= PFIT_SCALING_PILLAR; 276 else if (scaled_width < scaled_height) 277 pfit_control |= PFIT_SCALING_LETTER; 278 else 279 pfit_control |= PFIT_SCALING_AUTO; 280 } else { 281 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; 282 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; 283 /* 284 * For earlier chips we have to calculate the scaling 285 * ratio by hand and program it into the 286 * PFIT_PGM_RATIO register 287 */ 288 if (scaled_width > scaled_height) { /* pillar */ 289 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay); 290 291 border = LVDS_BORDER_ENABLE; 292 if (mode->vdisplay != adjusted_mode->vdisplay) { 293 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay); 294 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 295 bits << PFIT_VERT_SCALE_SHIFT); 296 pfit_control |= (PFIT_ENABLE | 297 VERT_INTERP_BILINEAR | 298 HORIZ_INTERP_BILINEAR); 299 } 300 } else if (scaled_width < scaled_height) { /* letter */ 301 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay); 302 303 border = LVDS_BORDER_ENABLE; 304 if (mode->hdisplay != adjusted_mode->hdisplay) { 305 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay); 306 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 307 bits << PFIT_VERT_SCALE_SHIFT); 308 pfit_control |= (PFIT_ENABLE | 309 VERT_INTERP_BILINEAR | 310 HORIZ_INTERP_BILINEAR); 311 } 312 } else 313 /* Aspects match, Let hw scale both directions */ 314 pfit_control |= (PFIT_ENABLE | 315 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 316 VERT_INTERP_BILINEAR | 317 HORIZ_INTERP_BILINEAR); 318 } 319 break; 320 321 case DRM_MODE_SCALE_FULLSCREEN: 322 /* 323 * Full scaling, even if it changes the aspect ratio. 324 * Fortunately this is all done for us in hw. 325 */ 326 pfit_control |= PFIT_ENABLE; 327 if (INTEL_INFO(dev)->gen >= 4) 328 pfit_control |= PFIT_SCALING_AUTO; 329 else 330 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 331 VERT_INTERP_BILINEAR | 332 HORIZ_INTERP_BILINEAR); 333 break; 334 335 default: 336 break; 337 } 338 339out: 340 if (pfit_control != intel_lvds->pfit_control || 341 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) { 342 intel_lvds->pfit_control = pfit_control; 343 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios; 344 intel_lvds->pfit_dirty = true; 345 } 346 dev_priv->lvds_border_bits = border; 347 348 /* 349 * XXX: It would be nice to support lower refresh rates on the 350 * panels to reduce power consumption, and perhaps match the 351 * user's requested refresh rate. 352 */ 353 354 return true; 355} 356 357static void intel_lvds_prepare(struct drm_encoder *encoder) 358{ 359 struct drm_device *dev = encoder->dev; 360 struct drm_i915_private *dev_priv = dev->dev_private; 361 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 362 363 dev_priv->backlight_level = intel_panel_get_backlight(dev); 364 365 /* We try to do the minimum that is necessary in order to unlock 366 * the registers for mode setting. 367 * 368 * On Ironlake, this is quite simple as we just set the unlock key 369 * and ignore all subtleties. (This may cause some issues...) 370 * 371 * Prior to Ironlake, we must disable the pipe if we want to adjust 372 * the panel fitter. However at all other times we can just reset 373 * the registers regardless. 374 */ 375 376 if (HAS_PCH_SPLIT(dev)) { 377 I915_WRITE(PCH_PP_CONTROL, 378 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); 379 } else if (intel_lvds->pfit_dirty) { 380 I915_WRITE(PP_CONTROL, 381 (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS) 382 & ~POWER_TARGET_ON); 383 } else { 384 I915_WRITE(PP_CONTROL, 385 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); 386 } 387} 388 389static void intel_lvds_commit(struct drm_encoder *encoder) 390{ 391 struct drm_device *dev = encoder->dev; 392 struct drm_i915_private *dev_priv = dev->dev_private; 393 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 394 395 if (dev_priv->backlight_level == 0) 396 dev_priv->backlight_level = intel_panel_get_max_backlight(dev); 397 398 /* Undo any unlocking done in prepare to prevent accidental 399 * adjustment of the registers. 400 */ 401 if (HAS_PCH_SPLIT(dev)) { 402 u32 val = I915_READ(PCH_PP_CONTROL); 403 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS) 404 I915_WRITE(PCH_PP_CONTROL, val & 0x3); 405 } else { 406 u32 val = I915_READ(PP_CONTROL); 407 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS) 408 I915_WRITE(PP_CONTROL, val & 0x3); 409 } 410 411 /* Always do a full power on as we do not know what state 412 * we were left in. 413 */ 414 intel_lvds_set_power(intel_lvds, true); 415} 416 417static void intel_lvds_mode_set(struct drm_encoder *encoder, 418 struct drm_display_mode *mode, 419 struct drm_display_mode *adjusted_mode) 420{ 421 struct drm_device *dev = encoder->dev; 422 struct drm_i915_private *dev_priv = dev->dev_private; 423 struct intel_lvds *intel_lvds = to_intel_lvds(encoder); 424 425 /* 426 * The LVDS pin pair will already have been turned on in the 427 * intel_crtc_mode_set since it has a large impact on the DPLL 428 * settings. 429 */ 430 431 if (HAS_PCH_SPLIT(dev)) 432 return; 433 434 if (!intel_lvds->pfit_dirty) 435 return; 436 437 /* 438 * Enable automatic panel scaling so that non-native modes fill the 439 * screen. Should be enabled before the pipe is enabled, according to 440 * register description and PRM. 441 */ 442 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", 443 intel_lvds->pfit_control, 444 intel_lvds->pfit_pgm_ratios); 445 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) 446 DRM_ERROR("timed out waiting for panel to power off\n"); 447 448 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); 449 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); 450 intel_lvds->pfit_dirty = false; 451} 452 453/** 454 * Detect the LVDS connection. 455 * 456 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means 457 * connected and closed means disconnected. We also send hotplug events as 458 * needed, using lid status notification from the input layer. 459 */ 460static enum drm_connector_status 461intel_lvds_detect(struct drm_connector *connector, bool force) 462{ 463 struct drm_device *dev = connector->dev; 464 enum drm_connector_status status = connector_status_connected; 465 466 /* ACPI lid methods were generally unreliable in this generation, so 467 * don't even bother. 468 */ 469 if (IS_GEN2(dev) || IS_GEN3(dev)) 470 return connector_status_connected; 471 472 return status; 473} 474 475/** 476 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. 477 */ 478static int intel_lvds_get_modes(struct drm_connector *connector) 479{ 480 struct intel_lvds *intel_lvds = intel_attached_lvds(connector); 481 struct drm_device *dev = connector->dev; 482 struct drm_display_mode *mode; 483 484 if (intel_lvds->edid) 485 return drm_add_edid_modes(connector, intel_lvds->edid); 486 487 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode); 488 if (mode == 0) 489 return 0; 490 491 drm_mode_probed_add(connector, mode); 492 return 1; 493} 494 495static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) 496{ 497 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident); 498 return 1; 499} 500 501/* The GPU hangs up on these systems if modeset is performed on LID open */ 502static const struct dmi_system_id intel_no_modeset_on_lid[] = { 503 { 504 .callback = intel_no_modeset_on_lid_dmi_callback, 505 .ident = "Toshiba Tecra A11", 506 .matches = { 507 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 508 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), 509 }, 510 }, 511 512 { } /* terminating entry */ 513}; 514 515/* 516 * Lid events. Note the use of 'modeset_on_lid': 517 * - we set it on lid close, and reset it on open 518 * - we use it as a "only once" bit (ie we ignore 519 * duplicate events where it was already properly 520 * set/reset) 521 * - the suspend/resume paths will also set it to 522 * zero, since they restore the mode ("lid open"). 523 */ 524static int intel_lid_notify(struct notifier_block *nb, unsigned long val, 525 void *unused) 526{ 527 struct drm_i915_private *dev_priv = 528 container_of(nb, struct drm_i915_private, lid_notifier); 529 struct drm_device *dev = dev_priv->dev; 530 struct drm_connector *connector = dev_priv->int_lvds_connector; 531 532 /* 533 * check and update the status of LVDS connector after receiving 534 * the LID nofication event. 535 */ 536 if (connector) 537 connector->status = connector->funcs->detect(connector, 538 false); 539 540 /* Don't force modeset on machines where it causes a GPU lockup */ 541 if (dmi_check_system(intel_no_modeset_on_lid)) 542 return NOTIFY_OK; 543 if (!acpi_lid_open()) { 544 dev_priv->modeset_on_lid = 1; 545 return NOTIFY_OK; 546 } 547 548 if (!dev_priv->modeset_on_lid) 549 return NOTIFY_OK; 550 551 dev_priv->modeset_on_lid = 0; 552 553 mutex_lock(&dev->mode_config.mutex); 554 drm_helper_resume_force_mode(dev); 555 mutex_unlock(&dev->mode_config.mutex); 556 557 return NOTIFY_OK; 558} 559 560/** 561 * intel_lvds_destroy - unregister and free LVDS structures 562 * @connector: connector to free 563 * 564 * Unregister the DDC bus for this connector then free the driver private 565 * structure. 566 */ 567static void intel_lvds_destroy(struct drm_connector *connector) 568{ 569 struct drm_device *dev = connector->dev; 570 struct drm_i915_private *dev_priv = dev->dev_private; 571 572 if (dev_priv->lid_notifier.notifier_call) 573 acpi_lid_notifier_unregister(&dev_priv->lid_notifier); 574 drm_sysfs_connector_remove(connector); 575 drm_connector_cleanup(connector); 576 kfree(connector); 577} 578 579static int intel_lvds_set_property(struct drm_connector *connector, 580 struct drm_property *property, 581 uint64_t value) 582{ 583 struct intel_lvds *intel_lvds = intel_attached_lvds(connector); 584 struct drm_device *dev = connector->dev; 585 586 if (property == dev->mode_config.scaling_mode_property) { 587 struct drm_crtc *crtc = intel_lvds->base.base.crtc; 588 589 if (value == DRM_MODE_SCALE_NONE) { 590 DRM_DEBUG_KMS("no scaling not supported\n"); 591 return -EINVAL; 592 } 593 594 if (intel_lvds->fitting_mode == value) { 595 /* the LVDS scaling property is not changed */ 596 return 0; 597 } 598 intel_lvds->fitting_mode = value; 599 if (crtc && crtc->enabled) { 600 /* 601 * If the CRTC is enabled, the display will be changed 602 * according to the new panel fitting mode. 603 */ 604 drm_crtc_helper_set_mode(crtc, &crtc->mode, 605 crtc->x, crtc->y, crtc->fb); 606 } 607 } 608 609 return 0; 610} 611 612static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { 613 .dpms = intel_lvds_dpms, 614 .mode_fixup = intel_lvds_mode_fixup, 615 .prepare = intel_lvds_prepare, 616 .mode_set = intel_lvds_mode_set, 617 .commit = intel_lvds_commit, 618}; 619 620static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { 621 .get_modes = intel_lvds_get_modes, 622 .mode_valid = intel_lvds_mode_valid, 623 .best_encoder = intel_best_encoder, 624}; 625 626static const struct drm_connector_funcs intel_lvds_connector_funcs = { 627 .dpms = drm_helper_connector_dpms, 628 .detect = intel_lvds_detect, 629 .fill_modes = drm_helper_probe_single_connector_modes, 630 .set_property = intel_lvds_set_property, 631 .destroy = intel_lvds_destroy, 632}; 633 634static const struct drm_encoder_funcs intel_lvds_enc_funcs = { 635 .destroy = intel_encoder_destroy, 636}; 637 638static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) 639{ 640 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident); 641 return 1; 642} 643 644/* These systems claim to have LVDS, but really don't */ 645static const struct dmi_system_id intel_no_lvds[] = { 646 { 647 .callback = intel_no_lvds_dmi_callback, 648 .ident = "Apple Mac Mini (Core series)", 649 .matches = { 650 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 651 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), 652 }, 653 }, 654 { 655 .callback = intel_no_lvds_dmi_callback, 656 .ident = "Apple Mac Mini (Core 2 series)", 657 .matches = { 658 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 659 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), 660 }, 661 }, 662 { 663 .callback = intel_no_lvds_dmi_callback, 664 .ident = "MSI IM-945GSE-A", 665 .matches = { 666 DMI_MATCH(DMI_SYS_VENDOR, "MSI"), 667 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), 668 }, 669 }, 670 { 671 .callback = intel_no_lvds_dmi_callback, 672 .ident = "Dell Studio Hybrid", 673 .matches = { 674 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 675 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), 676 }, 677 }, 678 { 679 .callback = intel_no_lvds_dmi_callback, 680 .ident = "AOpen Mini PC", 681 .matches = { 682 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), 683 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), 684 }, 685 }, 686 { 687 .callback = intel_no_lvds_dmi_callback, 688 .ident = "AOpen Mini PC MP915", 689 .matches = { 690 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 691 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), 692 }, 693 }, 694 { 695 .callback = intel_no_lvds_dmi_callback, 696 .ident = "Aopen i945GTt-VFA", 697 .matches = { 698 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), 699 }, 700 }, 701 { 702 .callback = intel_no_lvds_dmi_callback, 703 .ident = "Clientron U800", 704 .matches = { 705 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 706 DMI_MATCH(DMI_PRODUCT_NAME, "U800"), 707 }, 708 }, 709 710 { } /* terminating entry */ 711}; 712 713/** 714 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID 715 * @dev: drm device 716 * @connector: LVDS connector 717 * 718 * Find the reduced downclock for LVDS in EDID. 719 */ 720static void intel_find_lvds_downclock(struct drm_device *dev, 721 struct drm_display_mode *fixed_mode, 722 struct drm_connector *connector) 723{ 724 struct drm_i915_private *dev_priv = dev->dev_private; 725 struct drm_display_mode *scan; 726 int temp_downclock; 727 728 temp_downclock = fixed_mode->clock; 729 list_for_each_entry(scan, &connector->probed_modes, head) { 730 /* 731 * If one mode has the same resolution with the fixed_panel 732 * mode while they have the different refresh rate, it means 733 * that the reduced downclock is found for the LVDS. In such 734 * case we can set the different FPx0/1 to dynamically select 735 * between low and high frequency. 736 */ 737 if (scan->hdisplay == fixed_mode->hdisplay && 738 scan->hsync_start == fixed_mode->hsync_start && 739 scan->hsync_end == fixed_mode->hsync_end && 740 scan->htotal == fixed_mode->htotal && 741 scan->vdisplay == fixed_mode->vdisplay && 742 scan->vsync_start == fixed_mode->vsync_start && 743 scan->vsync_end == fixed_mode->vsync_end && 744 scan->vtotal == fixed_mode->vtotal) { 745 if (scan->clock < temp_downclock) { 746 /* 747 * The downclock is already found. But we 748 * expect to find the lower downclock. 749 */ 750 temp_downclock = scan->clock; 751 } 752 } 753 } 754 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) { 755 /* We found the downclock for LVDS. */ 756 dev_priv->lvds_downclock_avail = 1; 757 dev_priv->lvds_downclock = temp_downclock; 758 DRM_DEBUG_KMS("LVDS downclock is found in EDID. " 759 "Normal clock %dKhz, downclock %dKhz\n", 760 fixed_mode->clock, temp_downclock); 761 } 762} 763 764/* 765 * Enumerate the child dev array parsed from VBT to check whether 766 * the LVDS is present. 767 * If it is present, return 1. 768 * If it is not present, return false. 769 * If no child dev is parsed from VBT, it assumes that the LVDS is present. 770 */ 771static bool lvds_is_present_in_vbt(struct drm_device *dev, 772 u8 *i2c_pin) 773{ 774 struct drm_i915_private *dev_priv = dev->dev_private; 775 int i; 776 777 if (!dev_priv->child_dev_num) 778 return true; 779 780 for (i = 0; i < dev_priv->child_dev_num; i++) { 781 struct child_device_config *child = dev_priv->child_dev + i; 782 783 /* If the device type is not LFP, continue. 784 * We have to check both the new identifiers as well as the 785 * old for compatibility with some BIOSes. 786 */ 787 if (child->device_type != DEVICE_TYPE_INT_LFP && 788 child->device_type != DEVICE_TYPE_LFP) 789 continue; 790 791 if (child->i2c_pin) 792 *i2c_pin = child->i2c_pin; 793 794 /* However, we cannot trust the BIOS writers to populate 795 * the VBT correctly. Since LVDS requires additional 796 * information from AIM blocks, a non-zero addin offset is 797 * a good indicator that the LVDS is actually present. 798 */ 799 if (child->addin_offset) 800 return true; 801 802 /* But even then some BIOS writers perform some black magic 803 * and instantiate the device without reference to any 804 * additional data. Trust that if the VBT was written into 805 * the OpRegion then they have validated the LVDS's existence. 806 */ 807 if (dev_priv->opregion.vbt) 808 return true; 809 } 810 811 return false; 812} 813 814static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin) 815{ 816 struct drm_i915_private *dev_priv = dev->dev_private; 817 u8 buf = 0; 818 struct i2c_msg msgs[] = { 819 { 820 .addr = 0xA0, 821 .flags = 0, 822 .len = 1, 823 .buf = &buf, 824 }, 825 }; 826 struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter; 827 /* XXX this only appears to work when using GMBUS */ 828 if (intel_gmbus_is_forced_bit(i2c)) 829 return true; 830 return i2c_transfer(i2c, msgs, 1) == 1; 831} 832 833/** 834 * intel_lvds_init - setup LVDS connectors on this device 835 * @dev: drm device 836 * 837 * Create the connector, register the LVDS DDC bus, and try to figure out what 838 * modes we can display on the LVDS panel (if present). 839 */ 840bool intel_lvds_init(struct drm_device *dev) 841{ 842 struct drm_i915_private *dev_priv = dev->dev_private; 843 struct intel_lvds *intel_lvds; 844 struct intel_encoder *intel_encoder; 845 struct intel_connector *intel_connector; 846 struct drm_connector *connector; 847 struct drm_encoder *encoder; 848 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 849 struct drm_crtc *crtc; 850 u32 lvds; 851 int pipe; 852 u8 pin; 853 854 /* Skip init on machines we know falsely report LVDS */ 855 if (dmi_check_system(intel_no_lvds)) 856 return false; 857 858 pin = GMBUS_PORT_PANEL; 859 if (!lvds_is_present_in_vbt(dev, &pin)) { 860 DRM_DEBUG_KMS("LVDS is not present in VBT\n"); 861 return false; 862 } 863 864 if (HAS_PCH_SPLIT(dev)) { 865 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) 866 return false; 867 if (dev_priv->edp.support) { 868 DRM_DEBUG_KMS("disable LVDS for eDP support\n"); 869 return false; 870 } 871 } 872 873 if (!intel_lvds_ddc_probe(dev, pin)) { 874 DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n"); 875 return false; 876 } 877 878 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL); 879 if (!intel_lvds) { 880 return false; 881 } 882 883 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); 884 if (!intel_connector) { 885 kfree(intel_lvds); 886 return false; 887 } 888 889 if (!HAS_PCH_SPLIT(dev)) { 890 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL); 891 } 892 893 intel_encoder = &intel_lvds->base; 894 encoder = &intel_encoder->base; 895 connector = &intel_connector->base; 896 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, 897 DRM_MODE_CONNECTOR_LVDS); 898 899 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, 900 DRM_MODE_ENCODER_LVDS); 901 902 intel_connector_attach_encoder(intel_connector, intel_encoder); 903 intel_encoder->type = INTEL_OUTPUT_LVDS; 904 905 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); 906 intel_encoder->crtc_mask = (1 << 1); 907 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); 908 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); 909 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 910 connector->interlace_allowed = false; 911 connector->doublescan_allowed = false; 912 913 /* create the scaling mode property */ 914 drm_mode_create_scaling_mode_property(dev); 915 /* 916 * the initial panel fitting mode will be FULL_SCREEN. 917 */ 918 919 drm_connector_attach_property(&intel_connector->base, 920 dev->mode_config.scaling_mode_property, 921 DRM_MODE_SCALE_ASPECT); 922 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT; 923 /* 924 * LVDS discovery: 925 * 1) check for EDID on DDC 926 * 2) check for VBT data 927 * 3) check to see if LVDS is already on 928 * if none of the above, no panel 929 * 4) make sure lid is open 930 * if closed, act like it's not there for now 931 */ 932 933 /* 934 * Attempt to get the fixed panel mode from DDC. Assume that the 935 * preferred mode is the right one. 936 */ 937 intel_lvds->edid = drm_get_edid(connector, 938 &dev_priv->gmbus[pin].adapter); 939 if (intel_lvds->edid) { 940 if (drm_add_edid_modes(connector, 941 intel_lvds->edid)) { 942 drm_mode_connector_update_edid_property(connector, 943 intel_lvds->edid); 944 } else { 945 kfree(intel_lvds->edid); 946 intel_lvds->edid = NULL; 947 } 948 } 949 if (!intel_lvds->edid) { 950 /* Didn't get an EDID, so 951 * Set wide sync ranges so we get all modes 952 * handed to valid_mode for checking 953 */ 954 connector->display_info.min_vfreq = 0; 955 connector->display_info.max_vfreq = 200; 956 connector->display_info.min_hfreq = 0; 957 connector->display_info.max_hfreq = 200; 958 } 959 960 list_for_each_entry(scan, &connector->probed_modes, head) { 961 if (scan->type & DRM_MODE_TYPE_PREFERRED) { 962 intel_lvds->fixed_mode = 963 drm_mode_duplicate(dev, scan); 964 intel_find_lvds_downclock(dev, 965 intel_lvds->fixed_mode, 966 connector); 967 goto out; 968 } 969 } 970 971 /* Failed to get EDID, what about VBT? */ 972 if (dev_priv->lfp_lvds_vbt_mode) { 973 intel_lvds->fixed_mode = 974 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); 975 if (intel_lvds->fixed_mode) { 976 intel_lvds->fixed_mode->type |= 977 DRM_MODE_TYPE_PREFERRED; 978 goto out; 979 } 980 } 981 982 /* 983 * If we didn't get EDID, try checking if the panel is already turned 984 * on. If so, assume that whatever is currently programmed is the 985 * correct mode. 986 */ 987 988 /* Ironlake: FIXME if still fail, not try pipe mode now */ 989 if (HAS_PCH_SPLIT(dev)) 990 goto failed; 991 992 lvds = I915_READ(LVDS); 993 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; 994 crtc = intel_get_crtc_for_pipe(dev, pipe); 995 996 if (crtc && (lvds & LVDS_PORT_EN)) { 997 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc); 998 if (intel_lvds->fixed_mode) { 999 intel_lvds->fixed_mode->type |= 1000 DRM_MODE_TYPE_PREFERRED; 1001 goto out; 1002 } 1003 } 1004 1005 /* If we still don't have a mode after all that, give up. */ 1006 if (!intel_lvds->fixed_mode) 1007 goto failed; 1008 1009out: 1010 if (HAS_PCH_SPLIT(dev)) { 1011 u32 pwm; 1012 /* make sure PWM is enabled */ 1013 pwm = I915_READ(BLC_PWM_CPU_CTL2); 1014 pwm |= (PWM_ENABLE | PWM_PIPE_B); 1015 I915_WRITE(BLC_PWM_CPU_CTL2, pwm); 1016 1017 pwm = I915_READ(BLC_PWM_PCH_CTL1); 1018 pwm |= PWM_PCH_ENABLE; 1019 I915_WRITE(BLC_PWM_PCH_CTL1, pwm); 1020 } 1021 dev_priv->lid_notifier.notifier_call = intel_lid_notify; 1022 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { 1023 DRM_DEBUG_KMS("lid notifier registration failed\n"); 1024 dev_priv->lid_notifier.notifier_call = NULL; 1025 } 1026 /* keep the LVDS connector */ 1027 dev_priv->int_lvds_connector = connector; 1028 drm_sysfs_connector_add(connector); 1029 return true; 1030 1031failed: 1032 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); 1033 drm_connector_cleanup(connector); 1034 drm_encoder_cleanup(encoder); 1035 kfree(intel_lvds); 1036 kfree(intel_connector); 1037 return false; 1038} 1039