af9013.c revision bc9cd2736b34619b58961d506210fe0e6dfaa27d
1/* 2 * Afatech AF9013 demodulator driver 3 * 4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi> 5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi> 6 * 7 * Thanks to Afatech who kindly provided information. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 */ 24 25#include "af9013_priv.h" 26 27int af9013_debug; 28module_param_named(debug, af9013_debug, int, 0644); 29MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 30 31struct af9013_state { 32 struct i2c_adapter *i2c; 33 struct dvb_frontend fe; 34 struct af9013_config config; 35 36 /* tuner/demod RF and IF AGC limits used for signal strength calc */ 37 u8 signal_strength_en, rf_50, rf_80, if_50, if_80; 38 u16 signal_strength; 39 u32 ber; 40 u32 ucblocks; 41 u16 snr; 42 u32 bandwidth_hz; 43 fe_status_t fe_status; 44 unsigned long set_frontend_jiffies; 45 unsigned long read_status_jiffies; 46 bool first_tune; 47 bool i2c_gate_state; 48 unsigned int statistics_step:3; 49 struct delayed_work statistics_work; 50}; 51 52/* write multiple registers */ 53static int af9013_wr_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg, 54 const u8 *val, int len) 55{ 56 int ret; 57 u8 buf[3+len]; 58 struct i2c_msg msg[1] = { 59 { 60 .addr = priv->config.i2c_addr, 61 .flags = 0, 62 .len = sizeof(buf), 63 .buf = buf, 64 } 65 }; 66 67 buf[0] = (reg >> 8) & 0xff; 68 buf[1] = (reg >> 0) & 0xff; 69 buf[2] = mbox; 70 memcpy(&buf[3], val, len); 71 72 ret = i2c_transfer(priv->i2c, msg, 1); 73 if (ret == 1) { 74 ret = 0; 75 } else { 76 warn("i2c wr failed=%d reg=%04x len=%d", ret, reg, len); 77 ret = -EREMOTEIO; 78 } 79 return ret; 80} 81 82/* read multiple registers */ 83static int af9013_rd_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg, 84 u8 *val, int len) 85{ 86 int ret; 87 u8 buf[3]; 88 struct i2c_msg msg[2] = { 89 { 90 .addr = priv->config.i2c_addr, 91 .flags = 0, 92 .len = 3, 93 .buf = buf, 94 }, { 95 .addr = priv->config.i2c_addr, 96 .flags = I2C_M_RD, 97 .len = len, 98 .buf = val, 99 } 100 }; 101 102 buf[0] = (reg >> 8) & 0xff; 103 buf[1] = (reg >> 0) & 0xff; 104 buf[2] = mbox; 105 106 ret = i2c_transfer(priv->i2c, msg, 2); 107 if (ret == 2) { 108 ret = 0; 109 } else { 110 warn("i2c rd failed=%d reg=%04x len=%d", ret, reg, len); 111 ret = -EREMOTEIO; 112 } 113 return ret; 114} 115 116/* write multiple registers */ 117static int af9013_wr_regs(struct af9013_state *priv, u16 reg, const u8 *val, 118 int len) 119{ 120 int ret, i; 121 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(1 << 0); 122 123 if ((priv->config.ts_mode == AF9013_TS_USB) & 124 ((reg & 0xff00) != 0xff00) & ((reg & 0xff00) != 0xae00)) { 125 mbox |= ((len - 1) << 2); 126 ret = af9013_wr_regs_i2c(priv, mbox, reg, val, len); 127 } else { 128 for (i = 0; i < len; i++) { 129 ret = af9013_wr_regs_i2c(priv, mbox, reg+i, val+i, 1); 130 if (ret) 131 goto err; 132 } 133 } 134 135err: 136 return 0; 137} 138 139/* read multiple registers */ 140static int af9013_rd_regs(struct af9013_state *priv, u16 reg, u8 *val, int len) 141{ 142 int ret, i; 143 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(0 << 0); 144 145 if ((priv->config.ts_mode == AF9013_TS_USB) & 146 ((reg & 0xff00) != 0xff00) & ((reg & 0xff00) != 0xae00)) { 147 mbox |= ((len - 1) << 2); 148 ret = af9013_rd_regs_i2c(priv, mbox, reg, val, len); 149 } else { 150 for (i = 0; i < len; i++) { 151 ret = af9013_rd_regs_i2c(priv, mbox, reg+i, val+i, 1); 152 if (ret) 153 goto err; 154 } 155 } 156 157err: 158 return 0; 159} 160 161/* write single register */ 162static int af9013_wr_reg(struct af9013_state *priv, u16 reg, u8 val) 163{ 164 return af9013_wr_regs(priv, reg, &val, 1); 165} 166 167/* read single register */ 168static int af9013_rd_reg(struct af9013_state *priv, u16 reg, u8 *val) 169{ 170 return af9013_rd_regs(priv, reg, val, 1); 171} 172 173static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val, 174 u8 len) 175{ 176 u8 mbox = (1 << 7)|(1 << 6)|((len - 1) << 2)|(1 << 1)|(1 << 0); 177 return af9013_wr_regs_i2c(state, mbox, reg, val, len); 178} 179 180static int af9013_wr_reg_bits(struct af9013_state *state, u16 reg, int pos, 181 int len, u8 val) 182{ 183 int ret; 184 u8 tmp, mask; 185 186 /* no need for read if whole reg is written */ 187 if (len != 8) { 188 ret = af9013_rd_reg(state, reg, &tmp); 189 if (ret) 190 return ret; 191 192 mask = (0xff >> (8 - len)) << pos; 193 val <<= pos; 194 tmp &= ~mask; 195 val |= tmp; 196 } 197 198 return af9013_wr_reg(state, reg, val); 199} 200 201static int af9013_rd_reg_bits(struct af9013_state *state, u16 reg, int pos, 202 int len, u8 *val) 203{ 204 int ret; 205 u8 tmp; 206 207 ret = af9013_rd_reg(state, reg, &tmp); 208 if (ret) 209 return ret; 210 211 *val = (tmp >> pos); 212 *val &= (0xff >> (8 - len)); 213 214 return 0; 215} 216 217static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval) 218{ 219 int ret; 220 u8 pos; 221 u16 addr; 222 223 dbg("%s: gpio=%d gpioval=%02x", __func__, gpio, gpioval); 224 225 /* 226 * GPIO0 & GPIO1 0xd735 227 * GPIO2 & GPIO3 0xd736 228 */ 229 230 switch (gpio) { 231 case 0: 232 case 1: 233 addr = 0xd735; 234 break; 235 case 2: 236 case 3: 237 addr = 0xd736; 238 break; 239 240 default: 241 err("invalid gpio:%d\n", gpio); 242 ret = -EINVAL; 243 goto err; 244 }; 245 246 switch (gpio) { 247 case 0: 248 case 2: 249 pos = 0; 250 break; 251 case 1: 252 case 3: 253 default: 254 pos = 4; 255 break; 256 }; 257 258 ret = af9013_wr_reg_bits(state, addr, pos, 4, gpioval); 259 if (ret) 260 goto err; 261 262 return ret; 263err: 264 dbg("%s: failed=%d", __func__, ret); 265 return ret; 266} 267 268static u32 af913_div(u32 a, u32 b, u32 x) 269{ 270 u32 r = 0, c = 0, i; 271 272 dbg("%s: a=%d b=%d x=%d", __func__, a, b, x); 273 274 if (a > b) { 275 c = a / b; 276 a = a - c * b; 277 } 278 279 for (i = 0; i < x; i++) { 280 if (a >= b) { 281 r += 1; 282 a -= b; 283 } 284 a <<= 1; 285 r <<= 1; 286 } 287 r = (c << (u32)x) + r; 288 289 dbg("%s: a=%d b=%d x=%d r=%x", __func__, a, b, x, r); 290 return r; 291} 292 293static int af9013_power_ctrl(struct af9013_state *state, u8 onoff) 294{ 295 int ret, i; 296 u8 tmp; 297 298 dbg("%s: onoff=%d", __func__, onoff); 299 300 /* enable reset */ 301 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 1); 302 if (ret) 303 goto err; 304 305 /* start reset mechanism */ 306 ret = af9013_wr_reg(state, 0xaeff, 1); 307 if (ret) 308 goto err; 309 310 /* wait reset performs */ 311 for (i = 0; i < 150; i++) { 312 ret = af9013_rd_reg_bits(state, 0xd417, 1, 1, &tmp); 313 if (ret) 314 goto err; 315 316 if (tmp) 317 break; /* reset done */ 318 319 usleep_range(5000, 25000); 320 } 321 322 if (!tmp) 323 return -ETIMEDOUT; 324 325 if (onoff) { 326 /* clear reset */ 327 ret = af9013_wr_reg_bits(state, 0xd417, 1, 1, 0); 328 if (ret) 329 goto err; 330 331 /* disable reset */ 332 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 0); 333 334 /* power on */ 335 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 0); 336 } else { 337 /* power off */ 338 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 1); 339 } 340 341 return ret; 342err: 343 dbg("%s: failed=%d", __func__, ret); 344 return ret; 345} 346 347static int af9013_statistics_ber_unc_start(struct dvb_frontend *fe) 348{ 349 struct af9013_state *state = fe->demodulator_priv; 350 int ret; 351 352 dbg("%s", __func__); 353 354 /* reset and start BER counter */ 355 ret = af9013_wr_reg_bits(state, 0xd391, 4, 1, 1); 356 if (ret) 357 goto err; 358 359 return ret; 360err: 361 dbg("%s: failed=%d", __func__, ret); 362 return ret; 363} 364 365static int af9013_statistics_ber_unc_result(struct dvb_frontend *fe) 366{ 367 struct af9013_state *state = fe->demodulator_priv; 368 int ret; 369 u8 buf[5]; 370 371 dbg("%s", __func__); 372 373 /* check if error bit count is ready */ 374 ret = af9013_rd_reg_bits(state, 0xd391, 4, 1, &buf[0]); 375 if (ret) 376 goto err; 377 378 if (!buf[0]) { 379 dbg("%s: not ready", __func__); 380 return 0; 381 } 382 383 ret = af9013_rd_regs(state, 0xd387, buf, 5); 384 if (ret) 385 goto err; 386 387 state->ber = (buf[2] << 16) | (buf[1] << 8) | buf[0]; 388 state->ucblocks += (buf[4] << 8) | buf[3]; 389 390 return ret; 391err: 392 dbg("%s: failed=%d", __func__, ret); 393 return ret; 394} 395 396static int af9013_statistics_snr_start(struct dvb_frontend *fe) 397{ 398 struct af9013_state *state = fe->demodulator_priv; 399 int ret; 400 401 dbg("%s", __func__); 402 403 /* start SNR meas */ 404 ret = af9013_wr_reg_bits(state, 0xd2e1, 3, 1, 1); 405 if (ret) 406 goto err; 407 408 return ret; 409err: 410 dbg("%s: failed=%d", __func__, ret); 411 return ret; 412} 413 414static int af9013_statistics_snr_result(struct dvb_frontend *fe) 415{ 416 struct af9013_state *state = fe->demodulator_priv; 417 int ret, i, len; 418 u8 buf[3], tmp; 419 u32 snr_val; 420 const struct af9013_snr *uninitialized_var(snr_lut); 421 422 dbg("%s", __func__); 423 424 /* check if SNR ready */ 425 ret = af9013_rd_reg_bits(state, 0xd2e1, 3, 1, &tmp); 426 if (ret) 427 goto err; 428 429 if (!tmp) { 430 dbg("%s: not ready", __func__); 431 return 0; 432 } 433 434 /* read value */ 435 ret = af9013_rd_regs(state, 0xd2e3, buf, 3); 436 if (ret) 437 goto err; 438 439 snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0]; 440 441 /* read current modulation */ 442 ret = af9013_rd_reg(state, 0xd3c1, &tmp); 443 if (ret) 444 goto err; 445 446 switch ((tmp >> 6) & 3) { 447 case 0: 448 len = ARRAY_SIZE(qpsk_snr_lut); 449 snr_lut = qpsk_snr_lut; 450 break; 451 case 1: 452 len = ARRAY_SIZE(qam16_snr_lut); 453 snr_lut = qam16_snr_lut; 454 break; 455 case 2: 456 len = ARRAY_SIZE(qam64_snr_lut); 457 snr_lut = qam64_snr_lut; 458 break; 459 default: 460 goto err; 461 break; 462 } 463 464 for (i = 0; i < len; i++) { 465 tmp = snr_lut[i].snr; 466 467 if (snr_val < snr_lut[i].val) 468 break; 469 } 470 state->snr = tmp * 10; /* dB/10 */ 471 472 return ret; 473err: 474 dbg("%s: failed=%d", __func__, ret); 475 return ret; 476} 477 478static int af9013_statistics_signal_strength(struct dvb_frontend *fe) 479{ 480 struct af9013_state *state = fe->demodulator_priv; 481 int ret = 0; 482 u8 buf[2], rf_gain, if_gain; 483 int signal_strength; 484 485 dbg("%s", __func__); 486 487 if (!state->signal_strength_en) 488 return 0; 489 490 ret = af9013_rd_regs(state, 0xd07c, buf, 2); 491 if (ret) 492 goto err; 493 494 rf_gain = buf[0]; 495 if_gain = buf[1]; 496 497 signal_strength = (0xffff / \ 498 (9 * (state->rf_50 + state->if_50) - \ 499 11 * (state->rf_80 + state->if_80))) * \ 500 (10 * (rf_gain + if_gain) - \ 501 11 * (state->rf_80 + state->if_80)); 502 if (signal_strength < 0) 503 signal_strength = 0; 504 else if (signal_strength > 0xffff) 505 signal_strength = 0xffff; 506 507 state->signal_strength = signal_strength; 508 509 return ret; 510err: 511 dbg("%s: failed=%d", __func__, ret); 512 return ret; 513} 514 515static void af9013_statistics_work(struct work_struct *work) 516{ 517 int ret; 518 struct af9013_state *state = container_of(work, 519 struct af9013_state, statistics_work.work); 520 unsigned int next_msec; 521 522 /* update only signal strength when demod is not locked */ 523 if (!(state->fe_status & FE_HAS_LOCK)) { 524 state->statistics_step = 0; 525 state->ber = 0; 526 state->snr = 0; 527 } 528 529 switch (state->statistics_step) { 530 default: 531 state->statistics_step = 0; 532 case 0: 533 ret = af9013_statistics_signal_strength(&state->fe); 534 state->statistics_step++; 535 next_msec = 300; 536 break; 537 case 1: 538 ret = af9013_statistics_snr_start(&state->fe); 539 state->statistics_step++; 540 next_msec = 200; 541 break; 542 case 2: 543 ret = af9013_statistics_ber_unc_start(&state->fe); 544 state->statistics_step++; 545 next_msec = 1000; 546 break; 547 case 3: 548 ret = af9013_statistics_snr_result(&state->fe); 549 state->statistics_step++; 550 next_msec = 400; 551 break; 552 case 4: 553 ret = af9013_statistics_ber_unc_result(&state->fe); 554 state->statistics_step++; 555 next_msec = 100; 556 break; 557 } 558 559 schedule_delayed_work(&state->statistics_work, 560 msecs_to_jiffies(next_msec)); 561 562 return; 563} 564 565static int af9013_get_tune_settings(struct dvb_frontend *fe, 566 struct dvb_frontend_tune_settings *fesettings) 567{ 568 fesettings->min_delay_ms = 800; 569 fesettings->step_size = 0; 570 fesettings->max_drift = 0; 571 572 return 0; 573} 574 575static int af9013_set_frontend(struct dvb_frontend *fe, 576 struct dvb_frontend_parameters *p) 577{ 578 struct af9013_state *state = fe->demodulator_priv; 579 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 580 int ret, i, sampling_freq; 581 bool auto_mode, spec_inv; 582 u8 buf[6]; 583 u32 if_frequency, freq_cw; 584 585 dbg("%s: frequency=%d bandwidth_hz=%d", __func__, 586 c->frequency, c->bandwidth_hz); 587 588 /* program tuner */ 589 if (fe->ops.tuner_ops.set_params) 590 fe->ops.tuner_ops.set_params(fe); 591 592 /* program CFOE coefficients */ 593 if (c->bandwidth_hz != state->bandwidth_hz) { 594 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) { 595 if (coeff_lut[i].clock == state->config.clock && 596 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) { 597 break; 598 } 599 } 600 601 ret = af9013_wr_regs(state, 0xae00, coeff_lut[i].val, 602 sizeof(coeff_lut[i].val)); 603 } 604 605 /* program frequency control */ 606 if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) { 607 /* get used IF frequency */ 608 if (fe->ops.tuner_ops.get_if_frequency) 609 fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency); 610 else 611 if_frequency = state->config.if_frequency; 612 613 sampling_freq = if_frequency; 614 615 while (sampling_freq > (state->config.clock / 2)) 616 sampling_freq -= state->config.clock; 617 618 if (sampling_freq < 0) { 619 sampling_freq *= -1; 620 spec_inv = state->config.spec_inv; 621 } else { 622 spec_inv = !state->config.spec_inv; 623 } 624 625 freq_cw = af913_div(sampling_freq, state->config.clock, 23); 626 627 if (spec_inv) 628 freq_cw = 0x800000 - freq_cw; 629 630 buf[0] = (freq_cw >> 0) & 0xff; 631 buf[1] = (freq_cw >> 8) & 0xff; 632 buf[2] = (freq_cw >> 16) & 0x7f; 633 634 freq_cw = 0x800000 - freq_cw; 635 636 buf[3] = (freq_cw >> 0) & 0xff; 637 buf[4] = (freq_cw >> 8) & 0xff; 638 buf[5] = (freq_cw >> 16) & 0x7f; 639 640 ret = af9013_wr_regs(state, 0xd140, buf, 3); 641 if (ret) 642 goto err; 643 644 ret = af9013_wr_regs(state, 0x9be7, buf, 6); 645 if (ret) 646 goto err; 647 } 648 649 /* clear TPS lock flag */ 650 ret = af9013_wr_reg_bits(state, 0xd330, 3, 1, 1); 651 if (ret) 652 goto err; 653 654 /* clear MPEG2 lock flag */ 655 ret = af9013_wr_reg_bits(state, 0xd507, 6, 1, 0); 656 if (ret) 657 goto err; 658 659 /* empty channel function */ 660 ret = af9013_wr_reg_bits(state, 0x9bfe, 0, 1, 0); 661 if (ret) 662 goto err; 663 664 /* empty DVB-T channel function */ 665 ret = af9013_wr_reg_bits(state, 0x9bc2, 0, 1, 0); 666 if (ret) 667 goto err; 668 669 /* transmission parameters */ 670 auto_mode = false; 671 memset(buf, 0, 3); 672 673 switch (c->transmission_mode) { 674 case TRANSMISSION_MODE_AUTO: 675 auto_mode = 1; 676 break; 677 case TRANSMISSION_MODE_2K: 678 break; 679 case TRANSMISSION_MODE_8K: 680 buf[0] |= (1 << 0); 681 break; 682 default: 683 dbg("%s: invalid transmission_mode", __func__); 684 auto_mode = 1; 685 } 686 687 switch (c->guard_interval) { 688 case GUARD_INTERVAL_AUTO: 689 auto_mode = 1; 690 break; 691 case GUARD_INTERVAL_1_32: 692 break; 693 case GUARD_INTERVAL_1_16: 694 buf[0] |= (1 << 2); 695 break; 696 case GUARD_INTERVAL_1_8: 697 buf[0] |= (2 << 2); 698 break; 699 case GUARD_INTERVAL_1_4: 700 buf[0] |= (3 << 2); 701 break; 702 default: 703 dbg("%s: invalid guard_interval", __func__); 704 auto_mode = 1; 705 } 706 707 switch (c->hierarchy) { 708 case HIERARCHY_AUTO: 709 auto_mode = 1; 710 break; 711 case HIERARCHY_NONE: 712 break; 713 case HIERARCHY_1: 714 buf[0] |= (1 << 4); 715 break; 716 case HIERARCHY_2: 717 buf[0] |= (2 << 4); 718 break; 719 case HIERARCHY_4: 720 buf[0] |= (3 << 4); 721 break; 722 default: 723 dbg("%s: invalid hierarchy", __func__); 724 auto_mode = 1; 725 }; 726 727 switch (c->modulation) { 728 case QAM_AUTO: 729 auto_mode = 1; 730 break; 731 case QPSK: 732 break; 733 case QAM_16: 734 buf[1] |= (1 << 6); 735 break; 736 case QAM_64: 737 buf[1] |= (2 << 6); 738 break; 739 default: 740 dbg("%s: invalid modulation", __func__); 741 auto_mode = 1; 742 } 743 744 /* Use HP. How and which case we can switch to LP? */ 745 buf[1] |= (1 << 4); 746 747 switch (c->code_rate_HP) { 748 case FEC_AUTO: 749 auto_mode = 1; 750 break; 751 case FEC_1_2: 752 break; 753 case FEC_2_3: 754 buf[2] |= (1 << 0); 755 break; 756 case FEC_3_4: 757 buf[2] |= (2 << 0); 758 break; 759 case FEC_5_6: 760 buf[2] |= (3 << 0); 761 break; 762 case FEC_7_8: 763 buf[2] |= (4 << 0); 764 break; 765 default: 766 dbg("%s: invalid code_rate_HP", __func__); 767 auto_mode = 1; 768 } 769 770 switch (c->code_rate_LP) { 771 case FEC_AUTO: 772 auto_mode = 1; 773 break; 774 case FEC_1_2: 775 break; 776 case FEC_2_3: 777 buf[2] |= (1 << 3); 778 break; 779 case FEC_3_4: 780 buf[2] |= (2 << 3); 781 break; 782 case FEC_5_6: 783 buf[2] |= (3 << 3); 784 break; 785 case FEC_7_8: 786 buf[2] |= (4 << 3); 787 break; 788 case FEC_NONE: 789 break; 790 default: 791 dbg("%s: invalid code_rate_LP", __func__); 792 auto_mode = 1; 793 } 794 795 switch (c->bandwidth_hz) { 796 case 6000000: 797 break; 798 case 7000000: 799 buf[1] |= (1 << 2); 800 break; 801 case 8000000: 802 buf[1] |= (2 << 2); 803 break; 804 default: 805 dbg("%s: invalid bandwidth_hz", __func__); 806 ret = -EINVAL; 807 goto err; 808 } 809 810 ret = af9013_wr_regs(state, 0xd3c0, buf, 3); 811 if (ret) 812 goto err; 813 814 if (auto_mode) { 815 /* clear easy mode flag */ 816 ret = af9013_wr_reg(state, 0xaefd, 0); 817 if (ret) 818 goto err; 819 820 dbg("%s: auto params", __func__); 821 } else { 822 /* set easy mode flag */ 823 ret = af9013_wr_reg(state, 0xaefd, 1); 824 if (ret) 825 goto err; 826 827 ret = af9013_wr_reg(state, 0xaefe, 0); 828 if (ret) 829 goto err; 830 831 dbg("%s: manual params", __func__); 832 } 833 834 /* tune */ 835 ret = af9013_wr_reg(state, 0xffff, 0); 836 if (ret) 837 goto err; 838 839 state->bandwidth_hz = c->bandwidth_hz; 840 state->set_frontend_jiffies = jiffies; 841 state->first_tune = false; 842 843 return ret; 844err: 845 dbg("%s: failed=%d", __func__, ret); 846 return ret; 847} 848 849static int af9013_get_frontend(struct dvb_frontend *fe, 850 struct dvb_frontend_parameters *p) 851{ 852 struct af9013_state *state = fe->demodulator_priv; 853 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 854 int ret; 855 u8 buf[3]; 856 857 dbg("%s", __func__); 858 859 ret = af9013_rd_regs(state, 0xd3c0, buf, 3); 860 if (ret) 861 goto err; 862 863 switch ((buf[1] >> 6) & 3) { 864 case 0: 865 c->modulation = QPSK; 866 break; 867 case 1: 868 c->modulation = QAM_16; 869 break; 870 case 2: 871 c->modulation = QAM_64; 872 break; 873 } 874 875 switch ((buf[0] >> 0) & 3) { 876 case 0: 877 c->transmission_mode = TRANSMISSION_MODE_2K; 878 break; 879 case 1: 880 c->transmission_mode = TRANSMISSION_MODE_8K; 881 } 882 883 switch ((buf[0] >> 2) & 3) { 884 case 0: 885 c->transmission_mode = GUARD_INTERVAL_1_32; 886 break; 887 case 1: 888 c->transmission_mode = GUARD_INTERVAL_1_16; 889 break; 890 case 2: 891 c->transmission_mode = GUARD_INTERVAL_1_8; 892 break; 893 case 3: 894 c->transmission_mode = GUARD_INTERVAL_1_4; 895 break; 896 } 897 898 switch ((buf[0] >> 4) & 7) { 899 case 0: 900 c->hierarchy = HIERARCHY_NONE; 901 break; 902 case 1: 903 c->hierarchy = HIERARCHY_1; 904 break; 905 case 2: 906 c->hierarchy = HIERARCHY_2; 907 break; 908 case 3: 909 c->hierarchy = HIERARCHY_4; 910 break; 911 } 912 913 switch ((buf[2] >> 0) & 7) { 914 case 0: 915 c->code_rate_HP = FEC_1_2; 916 break; 917 case 1: 918 c->code_rate_HP = FEC_2_3; 919 break; 920 case 2: 921 c->code_rate_HP = FEC_3_4; 922 break; 923 case 3: 924 c->code_rate_HP = FEC_5_6; 925 break; 926 case 4: 927 c->code_rate_HP = FEC_7_8; 928 break; 929 } 930 931 switch ((buf[2] >> 3) & 7) { 932 case 0: 933 c->code_rate_LP = FEC_1_2; 934 break; 935 case 1: 936 c->code_rate_LP = FEC_2_3; 937 break; 938 case 2: 939 c->code_rate_LP = FEC_3_4; 940 break; 941 case 3: 942 c->code_rate_LP = FEC_5_6; 943 break; 944 case 4: 945 c->code_rate_LP = FEC_7_8; 946 break; 947 } 948 949 switch ((buf[1] >> 2) & 3) { 950 case 0: 951 c->bandwidth_hz = 6000000; 952 break; 953 case 1: 954 c->bandwidth_hz = 7000000; 955 break; 956 case 2: 957 c->bandwidth_hz = 8000000; 958 break; 959 } 960 961 return ret; 962err: 963 dbg("%s: failed=%d", __func__, ret); 964 return ret; 965} 966 967static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status) 968{ 969 struct af9013_state *state = fe->demodulator_priv; 970 int ret; 971 u8 tmp; 972 973 /* 974 * Return status from the cache if it is younger than 2000ms with the 975 * exception of last tune is done during 4000ms. 976 */ 977 if (time_is_after_jiffies( 978 state->read_status_jiffies + msecs_to_jiffies(2000)) && 979 time_is_before_jiffies( 980 state->set_frontend_jiffies + msecs_to_jiffies(4000)) 981 ) { 982 *status = state->fe_status; 983 return 0; 984 } else { 985 *status = 0; 986 } 987 988 /* MPEG2 lock */ 989 ret = af9013_rd_reg_bits(state, 0xd507, 6, 1, &tmp); 990 if (ret) 991 goto err; 992 993 if (tmp) 994 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | 995 FE_HAS_SYNC | FE_HAS_LOCK; 996 997 if (!*status) { 998 /* TPS lock */ 999 ret = af9013_rd_reg_bits(state, 0xd330, 3, 1, &tmp); 1000 if (ret) 1001 goto err; 1002 1003 if (tmp) 1004 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | 1005 FE_HAS_VITERBI; 1006 } 1007 1008 state->fe_status = *status; 1009 state->read_status_jiffies = jiffies; 1010 1011 return ret; 1012err: 1013 dbg("%s: failed=%d", __func__, ret); 1014 return ret; 1015} 1016 1017static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr) 1018{ 1019 struct af9013_state *state = fe->demodulator_priv; 1020 *snr = state->snr; 1021 return 0; 1022} 1023 1024static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 1025{ 1026 struct af9013_state *state = fe->demodulator_priv; 1027 *strength = state->signal_strength; 1028 return 0; 1029} 1030 1031static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber) 1032{ 1033 struct af9013_state *state = fe->demodulator_priv; 1034 *ber = state->ber; 1035 return 0; 1036} 1037 1038static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 1039{ 1040 struct af9013_state *state = fe->demodulator_priv; 1041 *ucblocks = state->ucblocks; 1042 return 0; 1043} 1044 1045static int af9013_init(struct dvb_frontend *fe) 1046{ 1047 struct af9013_state *state = fe->demodulator_priv; 1048 int ret, i, len; 1049 u8 buf[3], tmp; 1050 u32 adc_cw; 1051 const struct af9013_reg_bit *init; 1052 1053 dbg("%s", __func__); 1054 1055 /* power on */ 1056 ret = af9013_power_ctrl(state, 1); 1057 if (ret) 1058 goto err; 1059 1060 /* enable ADC */ 1061 ret = af9013_wr_reg(state, 0xd73a, 0xa4); 1062 if (ret) 1063 goto err; 1064 1065 /* write API version to firmware */ 1066 ret = af9013_wr_regs(state, 0x9bf2, state->config.api_version, 4); 1067 if (ret) 1068 goto err; 1069 1070 /* program ADC control */ 1071 switch (state->config.clock) { 1072 case 28800000: /* 28.800 MHz */ 1073 tmp = 0; 1074 break; 1075 case 20480000: /* 20.480 MHz */ 1076 tmp = 1; 1077 break; 1078 case 28000000: /* 28.000 MHz */ 1079 tmp = 2; 1080 break; 1081 case 25000000: /* 25.000 MHz */ 1082 tmp = 3; 1083 break; 1084 default: 1085 err("invalid clock"); 1086 return -EINVAL; 1087 } 1088 1089 adc_cw = af913_div(state->config.clock, 1000000ul, 19); 1090 buf[0] = (adc_cw >> 0) & 0xff; 1091 buf[1] = (adc_cw >> 8) & 0xff; 1092 buf[2] = (adc_cw >> 16) & 0xff; 1093 1094 ret = af9013_wr_regs(state, 0xd180, buf, 3); 1095 if (ret) 1096 goto err; 1097 1098 ret = af9013_wr_reg_bits(state, 0x9bd2, 0, 4, tmp); 1099 if (ret) 1100 goto err; 1101 1102 /* set I2C master clock */ 1103 ret = af9013_wr_reg(state, 0xd416, 0x14); 1104 if (ret) 1105 goto err; 1106 1107 /* set 16 embx */ 1108 ret = af9013_wr_reg_bits(state, 0xd700, 1, 1, 1); 1109 if (ret) 1110 goto err; 1111 1112 /* set no trigger */ 1113 ret = af9013_wr_reg_bits(state, 0xd700, 2, 1, 0); 1114 if (ret) 1115 goto err; 1116 1117 /* set read-update bit for constellation */ 1118 ret = af9013_wr_reg_bits(state, 0xd371, 1, 1, 1); 1119 if (ret) 1120 goto err; 1121 1122 /* settings for mp2if */ 1123 if (state->config.ts_mode == AF9013_TS_USB) { 1124 /* AF9015 split PSB to 1.5k + 0.5k */ 1125 ret = af9013_wr_reg_bits(state, 0xd50b, 2, 1, 1); 1126 if (ret) 1127 goto err; 1128 } else { 1129 /* AF9013 change the output bit to data7 */ 1130 ret = af9013_wr_reg_bits(state, 0xd500, 3, 1, 1); 1131 if (ret) 1132 goto err; 1133 1134 /* AF9013 set mpeg to full speed */ 1135 ret = af9013_wr_reg_bits(state, 0xd502, 4, 1, 1); 1136 if (ret) 1137 goto err; 1138 } 1139 1140 ret = af9013_wr_reg_bits(state, 0xd520, 4, 1, 1); 1141 if (ret) 1142 goto err; 1143 1144 /* load OFSM settings */ 1145 dbg("%s: load ofsm settings", __func__); 1146 len = ARRAY_SIZE(ofsm_init); 1147 init = ofsm_init; 1148 for (i = 0; i < len; i++) { 1149 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos, 1150 init[i].len, init[i].val); 1151 if (ret) 1152 goto err; 1153 } 1154 1155 /* load tuner specific settings */ 1156 dbg("%s: load tuner specific settings", __func__); 1157 switch (state->config.tuner) { 1158 case AF9013_TUNER_MXL5003D: 1159 len = ARRAY_SIZE(tuner_init_mxl5003d); 1160 init = tuner_init_mxl5003d; 1161 break; 1162 case AF9013_TUNER_MXL5005D: 1163 case AF9013_TUNER_MXL5005R: 1164 case AF9013_TUNER_MXL5007T: 1165 len = ARRAY_SIZE(tuner_init_mxl5005); 1166 init = tuner_init_mxl5005; 1167 break; 1168 case AF9013_TUNER_ENV77H11D5: 1169 len = ARRAY_SIZE(tuner_init_env77h11d5); 1170 init = tuner_init_env77h11d5; 1171 break; 1172 case AF9013_TUNER_MT2060: 1173 len = ARRAY_SIZE(tuner_init_mt2060); 1174 init = tuner_init_mt2060; 1175 break; 1176 case AF9013_TUNER_MC44S803: 1177 len = ARRAY_SIZE(tuner_init_mc44s803); 1178 init = tuner_init_mc44s803; 1179 break; 1180 case AF9013_TUNER_QT1010: 1181 case AF9013_TUNER_QT1010A: 1182 len = ARRAY_SIZE(tuner_init_qt1010); 1183 init = tuner_init_qt1010; 1184 break; 1185 case AF9013_TUNER_MT2060_2: 1186 len = ARRAY_SIZE(tuner_init_mt2060_2); 1187 init = tuner_init_mt2060_2; 1188 break; 1189 case AF9013_TUNER_TDA18271: 1190 case AF9013_TUNER_TDA18218: 1191 len = ARRAY_SIZE(tuner_init_tda18271); 1192 init = tuner_init_tda18271; 1193 break; 1194 case AF9013_TUNER_UNKNOWN: 1195 default: 1196 len = ARRAY_SIZE(tuner_init_unknown); 1197 init = tuner_init_unknown; 1198 break; 1199 } 1200 1201 for (i = 0; i < len; i++) { 1202 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos, 1203 init[i].len, init[i].val); 1204 if (ret) 1205 goto err; 1206 } 1207 1208 /* TS mode */ 1209 ret = af9013_wr_reg_bits(state, 0xd500, 1, 2, state->config.ts_mode); 1210 if (ret) 1211 goto err; 1212 1213 /* enable lock led */ 1214 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 1); 1215 if (ret) 1216 goto err; 1217 1218 /* check if we support signal strength */ 1219 if (!state->signal_strength_en) { 1220 ret = af9013_rd_reg_bits(state, 0x9bee, 0, 1, 1221 &state->signal_strength_en); 1222 if (ret) 1223 goto err; 1224 } 1225 1226 /* read values needed for signal strength calculation */ 1227 if (state->signal_strength_en && !state->rf_50) { 1228 ret = af9013_rd_reg(state, 0x9bbd, &state->rf_50); 1229 if (ret) 1230 goto err; 1231 1232 ret = af9013_rd_reg(state, 0x9bd0, &state->rf_80); 1233 if (ret) 1234 goto err; 1235 1236 ret = af9013_rd_reg(state, 0x9be2, &state->if_50); 1237 if (ret) 1238 goto err; 1239 1240 ret = af9013_rd_reg(state, 0x9be4, &state->if_80); 1241 if (ret) 1242 goto err; 1243 } 1244 1245 /* SNR */ 1246 ret = af9013_wr_reg(state, 0xd2e2, 1); 1247 if (ret) 1248 goto err; 1249 1250 /* BER / UCB */ 1251 buf[0] = (10000 >> 0) & 0xff; 1252 buf[1] = (10000 >> 8) & 0xff; 1253 ret = af9013_wr_regs(state, 0xd385, buf, 2); 1254 if (ret) 1255 goto err; 1256 1257 /* enable FEC monitor */ 1258 ret = af9013_wr_reg_bits(state, 0xd392, 1, 1, 1); 1259 if (ret) 1260 goto err; 1261 1262 state->first_tune = true; 1263 schedule_delayed_work(&state->statistics_work, msecs_to_jiffies(400)); 1264 1265 return ret; 1266err: 1267 dbg("%s: failed=%d", __func__, ret); 1268 return ret; 1269} 1270 1271static int af9013_sleep(struct dvb_frontend *fe) 1272{ 1273 struct af9013_state *state = fe->demodulator_priv; 1274 int ret; 1275 1276 dbg("%s", __func__); 1277 1278 /* stop statistics polling */ 1279 cancel_delayed_work_sync(&state->statistics_work); 1280 1281 /* disable lock led */ 1282 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 0); 1283 if (ret) 1284 goto err; 1285 1286 /* power off */ 1287 ret = af9013_power_ctrl(state, 0); 1288 if (ret) 1289 goto err; 1290 1291 return ret; 1292err: 1293 dbg("%s: failed=%d", __func__, ret); 1294 return ret; 1295} 1296 1297static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) 1298{ 1299 int ret; 1300 struct af9013_state *state = fe->demodulator_priv; 1301 1302 dbg("%s: enable=%d", __func__, enable); 1303 1304 /* gate already open or close */ 1305 if (state->i2c_gate_state == enable) 1306 return 0; 1307 1308 if (state->config.ts_mode == AF9013_TS_USB) 1309 ret = af9013_wr_reg_bits(state, 0xd417, 3, 1, enable); 1310 else 1311 ret = af9013_wr_reg_bits(state, 0xd607, 2, 1, enable); 1312 if (ret) 1313 goto err; 1314 1315 state->i2c_gate_state = enable; 1316 1317 return ret; 1318err: 1319 dbg("%s: failed=%d", __func__, ret); 1320 return ret; 1321} 1322 1323static void af9013_release(struct dvb_frontend *fe) 1324{ 1325 struct af9013_state *state = fe->demodulator_priv; 1326 kfree(state); 1327} 1328 1329static struct dvb_frontend_ops af9013_ops; 1330 1331static int af9013_download_firmware(struct af9013_state *state) 1332{ 1333 int i, len, remaining, ret; 1334 const struct firmware *fw; 1335 u16 checksum = 0; 1336 u8 val; 1337 u8 fw_params[4]; 1338 u8 *fw_file = AF9013_DEFAULT_FIRMWARE; 1339 1340 msleep(100); 1341 /* check whether firmware is already running */ 1342 ret = af9013_rd_reg(state, 0x98be, &val); 1343 if (ret) 1344 goto err; 1345 else 1346 dbg("%s: firmware status=%02x", __func__, val); 1347 1348 if (val == 0x0c) /* fw is running, no need for download */ 1349 goto exit; 1350 1351 info("found a '%s' in cold state, will try to load a firmware", 1352 af9013_ops.info.name); 1353 1354 /* request the firmware, this will block and timeout */ 1355 ret = request_firmware(&fw, fw_file, state->i2c->dev.parent); 1356 if (ret) { 1357 err("did not find the firmware file. (%s) " 1358 "Please see linux/Documentation/dvb/ for more details" \ 1359 " on firmware-problems. (%d)", 1360 fw_file, ret); 1361 goto err; 1362 } 1363 1364 info("downloading firmware from file '%s'", fw_file); 1365 1366 /* calc checksum */ 1367 for (i = 0; i < fw->size; i++) 1368 checksum += fw->data[i]; 1369 1370 fw_params[0] = checksum >> 8; 1371 fw_params[1] = checksum & 0xff; 1372 fw_params[2] = fw->size >> 8; 1373 fw_params[3] = fw->size & 0xff; 1374 1375 /* write fw checksum & size */ 1376 ret = af9013_write_ofsm_regs(state, 0x50fc, 1377 fw_params, sizeof(fw_params)); 1378 if (ret) 1379 goto err_release; 1380 1381 #define FW_ADDR 0x5100 /* firmware start address */ 1382 #define LEN_MAX 16 /* max packet size */ 1383 for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) { 1384 len = remaining; 1385 if (len > LEN_MAX) 1386 len = LEN_MAX; 1387 1388 ret = af9013_write_ofsm_regs(state, 1389 FW_ADDR + fw->size - remaining, 1390 (u8 *) &fw->data[fw->size - remaining], len); 1391 if (ret) { 1392 err("firmware download failed:%d", ret); 1393 goto err_release; 1394 } 1395 } 1396 1397 /* request boot firmware */ 1398 ret = af9013_wr_reg(state, 0xe205, 1); 1399 if (ret) 1400 goto err_release; 1401 1402 for (i = 0; i < 15; i++) { 1403 msleep(100); 1404 1405 /* check firmware status */ 1406 ret = af9013_rd_reg(state, 0x98be, &val); 1407 if (ret) 1408 goto err_release; 1409 1410 dbg("%s: firmware status=%02x", __func__, val); 1411 1412 if (val == 0x0c || val == 0x04) /* success or fail */ 1413 break; 1414 } 1415 1416 if (val == 0x04) { 1417 err("firmware did not run"); 1418 ret = -ENODEV; 1419 } else if (val != 0x0c) { 1420 err("firmware boot timeout"); 1421 ret = -ENODEV; 1422 } 1423 1424err_release: 1425 release_firmware(fw); 1426err: 1427exit: 1428 if (!ret) 1429 info("found a '%s' in warm state.", af9013_ops.info.name); 1430 return ret; 1431} 1432 1433struct dvb_frontend *af9013_attach(const struct af9013_config *config, 1434 struct i2c_adapter *i2c) 1435{ 1436 int ret; 1437 struct af9013_state *state = NULL; 1438 u8 buf[4], i; 1439 1440 /* allocate memory for the internal state */ 1441 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL); 1442 if (state == NULL) 1443 goto err; 1444 1445 /* setup the state */ 1446 state->i2c = i2c; 1447 memcpy(&state->config, config, sizeof(struct af9013_config)); 1448 1449 /* download firmware */ 1450 if (state->config.ts_mode != AF9013_TS_USB) { 1451 ret = af9013_download_firmware(state); 1452 if (ret) 1453 goto err; 1454 } 1455 1456 /* firmware version */ 1457 ret = af9013_rd_regs(state, 0x5103, buf, 4); 1458 if (ret) 1459 goto err; 1460 1461 info("firmware version %d.%d.%d.%d", buf[0], buf[1], buf[2], buf[3]); 1462 1463 /* set GPIOs */ 1464 for (i = 0; i < sizeof(state->config.gpio); i++) { 1465 ret = af9013_set_gpio(state, i, state->config.gpio[i]); 1466 if (ret) 1467 goto err; 1468 } 1469 1470 /* create dvb_frontend */ 1471 memcpy(&state->fe.ops, &af9013_ops, 1472 sizeof(struct dvb_frontend_ops)); 1473 state->fe.demodulator_priv = state; 1474 1475 INIT_DELAYED_WORK(&state->statistics_work, af9013_statistics_work); 1476 1477 return &state->fe; 1478err: 1479 kfree(state); 1480 return NULL; 1481} 1482EXPORT_SYMBOL(af9013_attach); 1483 1484static struct dvb_frontend_ops af9013_ops = { 1485 .info = { 1486 .name = "Afatech AF9013", 1487 .type = FE_OFDM, 1488 .frequency_min = 174000000, 1489 .frequency_max = 862000000, 1490 .frequency_stepsize = 250000, 1491 .frequency_tolerance = 0, 1492 .caps = FE_CAN_FEC_1_2 | 1493 FE_CAN_FEC_2_3 | 1494 FE_CAN_FEC_3_4 | 1495 FE_CAN_FEC_5_6 | 1496 FE_CAN_FEC_7_8 | 1497 FE_CAN_FEC_AUTO | 1498 FE_CAN_QPSK | 1499 FE_CAN_QAM_16 | 1500 FE_CAN_QAM_64 | 1501 FE_CAN_QAM_AUTO | 1502 FE_CAN_TRANSMISSION_MODE_AUTO | 1503 FE_CAN_GUARD_INTERVAL_AUTO | 1504 FE_CAN_HIERARCHY_AUTO | 1505 FE_CAN_RECOVER | 1506 FE_CAN_MUTE_TS 1507 }, 1508 1509 .release = af9013_release, 1510 1511 .init = af9013_init, 1512 .sleep = af9013_sleep, 1513 1514 .get_tune_settings = af9013_get_tune_settings, 1515 .set_frontend_legacy = af9013_set_frontend, 1516 .get_frontend = af9013_get_frontend, 1517 1518 .read_status = af9013_read_status, 1519 .read_snr = af9013_read_snr, 1520 .read_signal_strength = af9013_read_signal_strength, 1521 .read_ber = af9013_read_ber, 1522 .read_ucblocks = af9013_read_ucblocks, 1523 1524 .i2c_gate_ctrl = af9013_i2c_gate_ctrl, 1525}; 1526 1527MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 1528MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver"); 1529MODULE_LICENSE("GPL"); 1530