cxd2820r_t2.c revision 14d24d148c7521b2b88b396652e36f55d061e195
1/* 2 * Sony CXD2820R demodulator driver 3 * 4 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, write to the Free Software Foundation, Inc., 18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 */ 20 21 22#include "cxd2820r_priv.h" 23 24int cxd2820r_set_frontend_t2(struct dvb_frontend *fe, 25 struct dvb_frontend_parameters *params) 26{ 27 struct cxd2820r_priv *priv = fe->demodulator_priv; 28 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 29 int ret, i, bw_i; 30 u32 if_freq, if_ctl; 31 u64 num; 32 u8 buf[3], bw_param; 33 u8 bw_params1[][5] = { 34 { 0x1c, 0xb3, 0x33, 0x33, 0x33 }, /* 5 MHz */ 35 { 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */ 36 { 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */ 37 { 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */ 38 }; 39 struct reg_val_mask tab[] = { 40 { 0x00080, 0x02, 0xff }, 41 { 0x00081, 0x20, 0xff }, 42 { 0x00085, 0x07, 0xff }, 43 { 0x00088, 0x01, 0xff }, 44 { 0x02069, 0x01, 0xff }, 45 46 { 0x0207f, 0x2a, 0xff }, 47 { 0x02082, 0x0a, 0xff }, 48 { 0x02083, 0x0a, 0xff }, 49 { 0x020cb, priv->cfg.if_agc_polarity << 6, 0x40 }, 50 { 0x02070, priv->cfg.ts_mode, 0xff }, 51 { 0x020b5, priv->cfg.spec_inv << 4, 0x10 }, 52 { 0x02567, 0x07, 0x0f }, 53 { 0x02569, 0x03, 0x03 }, 54 { 0x02595, 0x1a, 0xff }, 55 { 0x02596, 0x50, 0xff }, 56 { 0x02a8c, 0x00, 0xff }, 57 { 0x02a8d, 0x34, 0xff }, 58 { 0x02a45, 0x06, 0x07 }, 59 { 0x03f10, 0x0d, 0xff }, 60 { 0x03f11, 0x02, 0xff }, 61 { 0x03f12, 0x01, 0xff }, 62 { 0x03f23, 0x2c, 0xff }, 63 { 0x03f51, 0x13, 0xff }, 64 { 0x03f52, 0x01, 0xff }, 65 { 0x03f53, 0x00, 0xff }, 66 { 0x027e6, 0x14, 0xff }, 67 { 0x02786, 0x02, 0x07 }, 68 { 0x02787, 0x40, 0xe0 }, 69 { 0x027ef, 0x10, 0x18 }, 70 }; 71 72 dbg("%s: RF=%d BW=%d", __func__, c->frequency, c->bandwidth_hz); 73 74 switch (c->bandwidth_hz) { 75 case 5000000: 76 bw_i = 0; 77 bw_param = 3; 78 break; 79 case 6000000: 80 bw_i = 1; 81 bw_param = 2; 82 break; 83 case 7000000: 84 bw_i = 2; 85 bw_param = 1; 86 break; 87 case 8000000: 88 bw_i = 3; 89 bw_param = 0; 90 break; 91 default: 92 return -EINVAL; 93 } 94 95 /* update GPIOs */ 96 ret = cxd2820r_gpio(fe); 97 if (ret) 98 goto error; 99 100 /* program tuner */ 101 if (fe->ops.tuner_ops.set_params) 102 fe->ops.tuner_ops.set_params(fe); 103 104 if (priv->delivery_system != SYS_DVBT2) { 105 for (i = 0; i < ARRAY_SIZE(tab); i++) { 106 ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, 107 tab[i].val, tab[i].mask); 108 if (ret) 109 goto error; 110 } 111 } 112 113 priv->delivery_system = SYS_DVBT2; 114 115 /* program IF frequency */ 116 if (fe->ops.tuner_ops.get_if_frequency) { 117 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq); 118 if (ret) 119 goto error; 120 } else 121 if_freq = 0; 122 123 dbg("%s: if_freq=%d", __func__, if_freq); 124 125 num = if_freq / 1000; /* Hz => kHz */ 126 num *= 0x1000000; 127 if_ctl = cxd2820r_div_u64_round_closest(num, 41000); 128 buf[0] = ((if_ctl >> 16) & 0xff); 129 buf[1] = ((if_ctl >> 8) & 0xff); 130 buf[2] = ((if_ctl >> 0) & 0xff); 131 132 ret = cxd2820r_wr_regs(priv, 0x020b6, buf, 3); 133 if (ret) 134 goto error; 135 136 ret = cxd2820r_wr_regs(priv, 0x0209f, bw_params1[bw_i], 5); 137 if (ret) 138 goto error; 139 140 ret = cxd2820r_wr_reg_mask(priv, 0x020d7, bw_param << 6, 0xc0); 141 if (ret) 142 goto error; 143 144 ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08); 145 if (ret) 146 goto error; 147 148 ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01); 149 if (ret) 150 goto error; 151 152 return ret; 153error: 154 dbg("%s: failed:%d", __func__, ret); 155 return ret; 156 157} 158 159int cxd2820r_get_frontend_t2(struct dvb_frontend *fe, 160 struct dvb_frontend_parameters *p) 161{ 162 struct cxd2820r_priv *priv = fe->demodulator_priv; 163 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 164 int ret; 165 u8 buf[2]; 166 167 ret = cxd2820r_rd_regs(priv, 0x0205c, buf, 2); 168 if (ret) 169 goto error; 170 171 switch ((buf[0] >> 0) & 0x07) { 172 case 0: 173 c->transmission_mode = TRANSMISSION_MODE_2K; 174 break; 175 case 1: 176 c->transmission_mode = TRANSMISSION_MODE_8K; 177 break; 178 case 2: 179 c->transmission_mode = TRANSMISSION_MODE_4K; 180 break; 181 case 3: 182 c->transmission_mode = TRANSMISSION_MODE_1K; 183 break; 184 case 4: 185 c->transmission_mode = TRANSMISSION_MODE_16K; 186 break; 187 case 5: 188 c->transmission_mode = TRANSMISSION_MODE_32K; 189 break; 190 } 191 192 switch ((buf[1] >> 4) & 0x07) { 193 case 0: 194 c->guard_interval = GUARD_INTERVAL_1_32; 195 break; 196 case 1: 197 c->guard_interval = GUARD_INTERVAL_1_16; 198 break; 199 case 2: 200 c->guard_interval = GUARD_INTERVAL_1_8; 201 break; 202 case 3: 203 c->guard_interval = GUARD_INTERVAL_1_4; 204 break; 205 case 4: 206 c->guard_interval = GUARD_INTERVAL_1_128; 207 break; 208 case 5: 209 c->guard_interval = GUARD_INTERVAL_19_128; 210 break; 211 case 6: 212 c->guard_interval = GUARD_INTERVAL_19_256; 213 break; 214 } 215 216 ret = cxd2820r_rd_regs(priv, 0x0225b, buf, 2); 217 if (ret) 218 goto error; 219 220 switch ((buf[0] >> 0) & 0x07) { 221 case 0: 222 c->fec_inner = FEC_1_2; 223 break; 224 case 1: 225 c->fec_inner = FEC_3_5; 226 break; 227 case 2: 228 c->fec_inner = FEC_2_3; 229 break; 230 case 3: 231 c->fec_inner = FEC_3_4; 232 break; 233 case 4: 234 c->fec_inner = FEC_4_5; 235 break; 236 case 5: 237 c->fec_inner = FEC_5_6; 238 break; 239 } 240 241 switch ((buf[1] >> 0) & 0x07) { 242 case 0: 243 c->modulation = QPSK; 244 break; 245 case 1: 246 c->modulation = QAM_16; 247 break; 248 case 2: 249 c->modulation = QAM_64; 250 break; 251 case 3: 252 c->modulation = QAM_256; 253 break; 254 } 255 256 ret = cxd2820r_rd_reg(priv, 0x020b5, &buf[0]); 257 if (ret) 258 goto error; 259 260 switch ((buf[0] >> 4) & 0x01) { 261 case 0: 262 c->inversion = INVERSION_OFF; 263 break; 264 case 1: 265 c->inversion = INVERSION_ON; 266 break; 267 } 268 269 return ret; 270error: 271 dbg("%s: failed:%d", __func__, ret); 272 return ret; 273} 274 275int cxd2820r_read_status_t2(struct dvb_frontend *fe, fe_status_t *status) 276{ 277 struct cxd2820r_priv *priv = fe->demodulator_priv; 278 int ret; 279 u8 buf[1]; 280 *status = 0; 281 282 ret = cxd2820r_rd_reg(priv, 0x02010 , &buf[0]); 283 if (ret) 284 goto error; 285 286 if ((buf[0] & 0x07) == 6) { 287 if (((buf[0] >> 5) & 0x01) == 1) { 288 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | 289 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; 290 } else { 291 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | 292 FE_HAS_VITERBI | FE_HAS_SYNC; 293 } 294 } 295 296 dbg("%s: lock=%02x", __func__, buf[0]); 297 298 return ret; 299error: 300 dbg("%s: failed:%d", __func__, ret); 301 return ret; 302} 303 304int cxd2820r_read_ber_t2(struct dvb_frontend *fe, u32 *ber) 305{ 306 struct cxd2820r_priv *priv = fe->demodulator_priv; 307 int ret; 308 u8 buf[4]; 309 unsigned int errbits; 310 *ber = 0; 311 /* FIXME: correct calculation */ 312 313 ret = cxd2820r_rd_regs(priv, 0x02039, buf, sizeof(buf)); 314 if (ret) 315 goto error; 316 317 if ((buf[0] >> 4) & 0x01) { 318 errbits = (buf[0] & 0x0f) << 24 | buf[1] << 16 | 319 buf[2] << 8 | buf[3]; 320 321 if (errbits) 322 *ber = errbits * 64 / 16588800; 323 } 324 325 return ret; 326error: 327 dbg("%s: failed:%d", __func__, ret); 328 return ret; 329} 330 331int cxd2820r_read_signal_strength_t2(struct dvb_frontend *fe, 332 u16 *strength) 333{ 334 struct cxd2820r_priv *priv = fe->demodulator_priv; 335 int ret; 336 u8 buf[2]; 337 u16 tmp; 338 339 ret = cxd2820r_rd_regs(priv, 0x02026, buf, sizeof(buf)); 340 if (ret) 341 goto error; 342 343 tmp = (buf[0] & 0x0f) << 8 | buf[1]; 344 tmp = ~tmp & 0x0fff; 345 346 /* scale value to 0x0000-0xffff from 0x0000-0x0fff */ 347 *strength = tmp * 0xffff / 0x0fff; 348 349 return ret; 350error: 351 dbg("%s: failed:%d", __func__, ret); 352 return ret; 353} 354 355int cxd2820r_read_snr_t2(struct dvb_frontend *fe, u16 *snr) 356{ 357 struct cxd2820r_priv *priv = fe->demodulator_priv; 358 int ret; 359 u8 buf[2]; 360 u16 tmp; 361 /* report SNR in dB * 10 */ 362 363 ret = cxd2820r_rd_regs(priv, 0x02028, buf, sizeof(buf)); 364 if (ret) 365 goto error; 366 367 tmp = (buf[0] & 0x0f) << 8 | buf[1]; 368 #define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */ 369 if (tmp) 370 *snr = (intlog10(tmp) - CXD2820R_LOG10_8_24) / ((1 << 24) 371 / 100); 372 else 373 *snr = 0; 374 375 dbg("%s: dBx10=%d val=%04x", __func__, *snr, tmp); 376 377 return ret; 378error: 379 dbg("%s: failed:%d", __func__, ret); 380 return ret; 381} 382 383int cxd2820r_read_ucblocks_t2(struct dvb_frontend *fe, u32 *ucblocks) 384{ 385 *ucblocks = 0; 386 /* no way to read ? */ 387 return 0; 388} 389 390int cxd2820r_sleep_t2(struct dvb_frontend *fe) 391{ 392 struct cxd2820r_priv *priv = fe->demodulator_priv; 393 int ret, i; 394 struct reg_val_mask tab[] = { 395 { 0x000ff, 0x1f, 0xff }, 396 { 0x00085, 0x00, 0xff }, 397 { 0x00088, 0x01, 0xff }, 398 { 0x02069, 0x00, 0xff }, 399 { 0x00081, 0x00, 0xff }, 400 { 0x00080, 0x00, 0xff }, 401 }; 402 403 dbg("%s", __func__); 404 405 for (i = 0; i < ARRAY_SIZE(tab); i++) { 406 ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val, 407 tab[i].mask); 408 if (ret) 409 goto error; 410 } 411 412 priv->delivery_system = SYS_UNDEFINED; 413 414 return ret; 415error: 416 dbg("%s: failed:%d", __func__, ret); 417 return ret; 418} 419 420int cxd2820r_get_tune_settings_t2(struct dvb_frontend *fe, 421 struct dvb_frontend_tune_settings *s) 422{ 423 s->min_delay_ms = 1500; 424 s->step_size = fe->ops.info.frequency_stepsize * 2; 425 s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1; 426 427 return 0; 428} 429