mb86a16.c revision b05c90de08b582172b8f63dd751ac0a1aee421e9
1/* 2 Fujitsu MB86A16 DVB-S/DSS DC Receiver driver 3 4 Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com) 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19*/ 20 21#include <linux/init.h> 22#include <linux/kernel.h> 23#include <linux/module.h> 24#include <linux/moduleparam.h> 25 26#include "dvb_frontend.h" 27#include "mb86a16.h" 28#include "mb86a16_priv.h" 29 30unsigned int verbose = 5; 31module_param(verbose, int, 0644); 32 33#define ABS(x) ((x) < 0 ? (-x) : (x)) 34 35struct mb86a16_state { 36 struct i2c_adapter *i2c_adap; 37 const struct mb86a16_config *config; 38 struct dvb_frontend frontend; 39 u8 signal; 40 41 // tuning parameters 42 int frequency; 43 int srate; 44 45 // Internal stuff 46 int master_clk; 47 int deci; 48 int csel; 49 int rsel; 50}; 51 52#define MB86A16_ERROR 0 53#define MB86A16_NOTICE 1 54#define MB86A16_INFO 2 55#define MB86A16_DEBUG 3 56 57#define dprintk(x, y, z, format, arg...) do { \ 58 if (z) { \ 59 if ((x > MB86A16_ERROR) && (x > y)) \ 60 printk(KERN_ERR "%s: " format "\n", __func__, ##arg); \ 61 else if ((x > MB86A16_NOTICE) && (x > y)) \ 62 printk(KERN_NOTICE "%s: " format "\n", __func__, ##arg); \ 63 else if ((x > MB86A16_INFO) && (x > y)) \ 64 printk(KERN_INFO "%s: " format "\n", __func__, ##arg); \ 65 else if ((x > MB86A16_DEBUG) && (x > y)) \ 66 printk(KERN_DEBUG "%s: " format "\n", __func__, ##arg); \ 67 } else { \ 68 if (x > y) \ 69 printk(format, ##arg); \ 70 } \ 71} while (0) 72 73#define TRACE_IN dprintk(verbose, MB86A16_DEBUG, 1, "-->()") 74#define TRACE_OUT dprintk(verbose, MB86A16_DEBUG, 1, "()-->") 75 76static int mb86a16_write(struct mb86a16_state *state, u8 reg, u8 val) 77{ 78 int ret; 79 u8 buf[] = { reg, val }; 80 81 struct i2c_msg msg = { 82 .addr = state->config->demod_address, 83 .flags = 0, 84 .buf = buf, 85 .len = 2 86 }; 87 88 dprintk(verbose, MB86A16_DEBUG, 1, 89 "writing to [0x%02x],Reg[0x%02x],Data[0x%02x]", 90 state->config->demod_address, buf[0], buf[1]); 91 92 ret = i2c_transfer(state->i2c_adap, &msg, 1); 93 94 return (ret != 1) ? -EREMOTEIO : 0; 95} 96 97static int mb86a16_read(struct mb86a16_state *state, u8 reg, u8 *val) 98{ 99 int ret; 100 u8 b0[] = { reg }; 101 u8 b1[] = { 0 }; 102 103 struct i2c_msg msg[] = { 104 { 105 .addr = state->config->demod_address, 106 .flags = 0, 107 .buf = b0, 108 .len = 1 109 },{ 110 .addr = state->config->demod_address, 111 .flags = I2C_M_RD, 112 .buf = b1, 113 .len = 1 114 } 115 }; 116 ret = i2c_transfer(state->i2c_adap, msg, 2); 117 if (ret != 2) { 118 dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=0x%i)", 119 reg, ret); 120 121 return -EREMOTEIO; 122 } 123 *val = b1[0]; 124 125 return ret; 126} 127 128static int CNTM_set(struct mb86a16_state *state, 129 unsigned char timint1, 130 unsigned char timint2, 131 unsigned char cnext) 132{ 133 unsigned char val; 134 135 val = (timint1 << 4) | (timint2 << 2) | cnext; 136 if (mb86a16_write(state, MB86A16_CNTMR, val) < 0) 137 goto err; 138 139 return 0; 140 141err: 142 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 143 return -EREMOTEIO; 144} 145 146static int smrt_set(struct mb86a16_state *state, int rate) 147{ 148 int tmp ; 149 int m ; 150 unsigned char STOFS0, STOFS1; 151 152 m = 1 << state->deci; 153 tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk; 154 155 STOFS0 = tmp & 0x0ff; 156 STOFS1 = (tmp & 0xf00) >> 8; 157 158 if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) | 159 (state->csel << 1) | 160 state->rsel) < 0) 161 goto err; 162 if (mb86a16_write(state, MB86A16_SRATE2, STOFS0) < 0) 163 goto err; 164 if (mb86a16_write(state, MB86A16_SRATE3, STOFS1) < 0) 165 goto err; 166 167 return 0; 168err: 169 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 170 return -1; 171} 172 173static int srst(struct mb86a16_state *state) 174{ 175 if (mb86a16_write(state, MB86A16_RESET, 0x04) < 0) 176 goto err; 177 178 return 0; 179err: 180 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 181 return -EREMOTEIO; 182 183} 184 185static int afcex_data_set(struct mb86a16_state *state, 186 unsigned char AFCEX_L, 187 unsigned char AFCEX_H) 188{ 189 if (mb86a16_write(state, MB86A16_AFCEXL, AFCEX_L) < 0) 190 goto err; 191 if (mb86a16_write(state, MB86A16_AFCEXH, AFCEX_H) < 0) 192 goto err; 193 194 return 0; 195err: 196 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 197 198 return -1; 199} 200 201static int afcofs_data_set(struct mb86a16_state *state, 202 unsigned char AFCEX_L, 203 unsigned char AFCEX_H) 204{ 205 if (mb86a16_write(state, 0x58, AFCEX_L) < 0) 206 goto err; 207 if (mb86a16_write(state, 0x59, AFCEX_H) < 0) 208 goto err; 209 210 return 0; 211err: 212 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 213 return -EREMOTEIO; 214} 215 216static int stlp_set(struct mb86a16_state *state, 217 unsigned char STRAS, 218 unsigned char STRBS) 219{ 220 if (mb86a16_write(state, MB86A16_STRFILTCOEF1, (STRBS << 3) | (STRAS)) < 0) 221 goto err; 222 223 return 0; 224err: 225 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 226 return -EREMOTEIO; 227} 228 229static int Vi_set(struct mb86a16_state *state, unsigned char ETH, unsigned char VIA) 230{ 231 if (mb86a16_write(state, MB86A16_VISET2, 0x04) < 0) 232 goto err; 233 if (mb86a16_write(state, MB86A16_VISET3, 0xf5) < 0) 234 goto err; 235 236 return 0; 237err: 238 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 239 return -EREMOTEIO; 240} 241 242static int initial_set(struct mb86a16_state *state) 243{ 244 if (stlp_set(state, 5, 7)) 245 goto err; 246 247 udelay(100); 248 if (afcex_data_set(state, 0, 0)) 249 goto err; 250 251 udelay(100); 252 if (afcofs_data_set(state, 0, 0)) 253 goto err; 254 255 udelay(100); 256 if (mb86a16_write(state, MB86A16_CRLFILTCOEF1, 0x16) < 0) 257 goto err; 258 if (mb86a16_write(state, 0x2f, 0x21) < 0) 259 goto err; 260 if (mb86a16_write(state, MB86A16_VIMAG, 0x38) < 0) 261 goto err; 262 if (mb86a16_write(state, MB86A16_FAGCS1, 0x00) < 0) 263 goto err; 264 if (mb86a16_write(state, MB86A16_FAGCS2, 0x1c) < 0) 265 goto err; 266 if (mb86a16_write(state, MB86A16_FAGCS3, 0x20) < 0) 267 goto err; 268 if (mb86a16_write(state, MB86A16_FAGCS4, 0x1e) < 0) 269 goto err; 270 if (mb86a16_write(state, MB86A16_FAGCS5, 0x23) < 0) 271 goto err; 272 if (mb86a16_write(state, 0x54, 0xff) < 0) 273 goto err; 274 if (mb86a16_write(state, MB86A16_TSOUT, 0x00) < 0) 275 goto err; 276 277 return 0; 278 279err: 280 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 281 return -EREMOTEIO; 282} 283 284static int S01T_set(struct mb86a16_state *state, 285 unsigned char s1t, 286 unsigned s0t) 287{ 288 if (mb86a16_write(state, 0x33, (s1t << 3) | s0t) < 0) 289 goto err; 290 291 return 0; 292err: 293 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 294 return -EREMOTEIO; 295} 296 297 298static int EN_set(struct mb86a16_state *state, 299 int cren, 300 int afcen) 301{ 302 unsigned char val; 303 304 val = 0x7a | (cren << 7) | (afcen << 2); 305 if (mb86a16_write(state, 0x49, val) < 0) 306 goto err; 307 308 return 0; 309err: 310 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 311 return -EREMOTEIO; 312} 313 314static int AFCEXEN_set(struct mb86a16_state *state, 315 int afcexen, 316 int smrt) 317{ 318 unsigned char AFCA ; 319 320 if (smrt > 18875) 321 AFCA = 4; 322 else if (smrt > 9375) 323 AFCA = 3; 324 else if (smrt > 2250) 325 AFCA = 2; 326 else 327 AFCA = 1; 328 329 if (mb86a16_write(state, 0x2a, 0x02 | (afcexen << 5) | (AFCA << 2)) < 0) 330 goto err; 331 332 return 0; 333 334err: 335 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 336 return -EREMOTEIO; 337} 338 339static int DAGC_data_set(struct mb86a16_state *state, 340 unsigned char DAGCA, 341 unsigned char DAGCW) 342{ 343 if (mb86a16_write(state, 0x2d, (DAGCA << 3) | DAGCW) < 0) 344 goto err; 345 346 return 0; 347 348err: 349 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 350 return -EREMOTEIO; 351} 352 353static void smrt_info_get(struct mb86a16_state *state, int rate) 354{ 355 if (rate >= 37501) { 356 state->deci = 0; state->csel = 0; state->rsel = 0; 357 } else if (rate >= 30001) { 358 state->deci = 0; state->csel = 0; state->rsel = 1; 359 } else if (rate >= 26251) { 360 state->deci = 0; state->csel = 1; state->rsel = 0; 361 } else if (rate >= 22501) { 362 state->deci = 0; state->csel = 1; state->rsel = 1; 363 } else if (rate >= 18751) { 364 state->deci = 1; state->csel = 0; state->rsel = 0; 365 } else if (rate >= 15001) { 366 state->deci = 1; state->csel = 0; state->rsel = 1; 367 } else if (rate >= 13126) { 368 state->deci = 1; state->csel = 1; state->rsel = 0; 369 } else if (rate >= 11251) { 370 state->deci = 1; state->csel = 1; state->rsel = 1; 371 } else if (rate >= 9376) { 372 state->deci = 2; state->csel = 0; state->rsel = 0; 373 } else if (rate >= 7501) { 374 state->deci = 2; state->csel = 0; state->rsel = 1; 375 } else if (rate >= 6563) { 376 state->deci = 2; state->csel = 1; state->rsel = 0; 377 } else if (rate >= 5626) { 378 state->deci = 2; state->csel = 1; state->rsel = 1; 379 } else if (rate >= 4688) { 380 state->deci = 3; state->csel = 0; state->rsel = 0; 381 } else if (rate >= 3751) { 382 state->deci = 3; state->csel = 0; state->rsel = 1; 383 } else if (rate >= 3282) { 384 state->deci = 3; state->csel = 1; state->rsel = 0; 385 } else if (rate >= 2814) { 386 state->deci = 3; state->csel = 1; state->rsel = 1; 387 } else if (rate >= 2344) { 388 state->deci = 4; state->csel = 0; state->rsel = 0; 389 } else if (rate >= 1876) { 390 state->deci = 4; state->csel = 0; state->rsel = 1; 391 } else if (rate >= 1641) { 392 state->deci = 4; state->csel = 1; state->rsel = 0; 393 } else if (rate >= 1407) { 394 state->deci = 4; state->csel = 1; state->rsel = 1; 395 } else if (rate >= 1172) { 396 state->deci = 5; state->csel = 0; state->rsel = 0; 397 } else if (rate >= 939) { 398 state->deci = 5; state->csel = 0; state->rsel = 1; 399 } else if (rate >= 821) { 400 state->deci = 5; state->csel = 1; state->rsel = 0; 401 } else { 402 state->deci = 5; state->csel = 1; state->rsel = 1; 403 } 404 405 if (state->csel == 0) 406 state->master_clk = 92000; 407 else 408 state->master_clk = 61333; 409 410} 411 412static int signal_det(struct mb86a16_state *state, 413 int smrt, 414 unsigned char *SIG) 415{ 416 417 int ret ; 418 int smrtd ; 419 int wait_sym ; 420 int wait_t ; 421 unsigned char S[3] ; 422 int i ; 423 424 if (*SIG > 45) { 425 if (CNTM_set(state, 2, 1, 2) < 0) { 426 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error"); 427 return -1; 428 } 429 wait_sym = 40000; 430 } else { 431 if (CNTM_set(state, 3, 1, 2) < 0) { 432 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error"); 433 return -1; 434 } 435 wait_sym = 80000; 436 } 437 for (i = 0; i < 3; i++) { 438 if (i == 0 ) 439 smrtd = smrt * 98 / 100; 440 else if (i == 1) 441 smrtd = smrt; 442 else 443 smrtd = smrt * 102 / 100; 444 smrt_info_get(state, smrtd); 445 smrt_set(state, smrtd); 446 srst(state); 447 wait_t = (wait_sym + 99 * smrtd / 100) / smrtd; 448 if (wait_t == 0) 449 wait_t = 1; 450 msleep_interruptible(10); 451 if (mb86a16_read(state, 0x37, &(S[i])) != 2) { 452 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 453 return -EREMOTEIO; 454 } 455 } 456 if ((S[1] > S[0] * 112 / 100) && 457 (S[1] > S[2] * 112 / 100)) { 458 459 ret = 1; 460 } else { 461 ret = 0; 462 } 463 *SIG = S[1]; 464 465 if (CNTM_set(state, 0, 1, 2) < 0) { 466 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error"); 467 return -1; 468 } 469 470 return ret; 471} 472 473static int rf_val_set(struct mb86a16_state *state, 474 int f, 475 int smrt, 476 unsigned char R) 477{ 478 unsigned char C, F, B; 479 int M; 480 unsigned char rf_val[5]; 481 int ack = -1; 482 483 if (smrt > 37750 ) 484 C = 1; 485 else if (smrt > 18875) 486 C = 2; 487 else if (smrt > 5500 ) 488 C = 3; 489 else 490 C = 4; 491 492 if (smrt > 30500) 493 F = 3; 494 else if (smrt > 9375) 495 F = 1; 496 else if (smrt > 4625) 497 F = 0; 498 else 499 F = 2; 500 501 if (f < 1060) 502 B = 0; 503 else if (f < 1175) 504 B = 1; 505 else if (f < 1305) 506 B = 2; 507 else if (f < 1435) 508 B = 3; 509 else if (f < 1570) 510 B = 4; 511 else if (f < 1715) 512 B = 5; 513 else if (f < 1845) 514 B = 6; 515 else if (f < 1980) 516 B = 7; 517 else if (f < 2080) 518 B = 8; 519 else 520 B = 9; 521 522 M = f * (1 << R) / 2; 523 524 rf_val[0] = 0x01 | (C << 3) | (F << 1); 525 rf_val[1] = (R << 5) | ((M & 0x1f000) >> 12); 526 rf_val[2] = (M & 0x00ff0) >> 4; 527 rf_val[3] = ((M & 0x0000f) << 4) | B; 528 529 // Frequency Set 530 if (mb86a16_write(state, 0x21, rf_val[0]) < 0) 531 ack = 0; 532 if (mb86a16_write(state, 0x22, rf_val[1]) < 0) 533 ack = 0; 534 if (mb86a16_write(state, 0x23, rf_val[2]) < 0) 535 ack = 0; 536 if (mb86a16_write(state, 0x24, rf_val[3]) < 0) 537 ack = 0; 538 if (mb86a16_write(state, 0x25, 0x01) < 0) 539 ack = 0; 540 if (ack == 0) { 541 dprintk(verbose, MB86A16_ERROR, 1, "RF Setup - I2C transfer error"); 542 return -EREMOTEIO; 543 } 544 545 return 0; 546} 547 548static int afcerr_chk(struct mb86a16_state *state) 549{ 550 unsigned char AFCM_L, AFCM_H ; 551 int AFCM ; 552 int afcm, afcerr ; 553 554 if (mb86a16_read(state, 0x0e, &AFCM_L) != 2) 555 goto err; 556 if (mb86a16_read(state, 0x0f, &AFCM_H) != 2) 557 goto err; 558 559 AFCM = (AFCM_H << 8) + AFCM_L; 560 561 if (AFCM > 2048) 562 afcm = AFCM - 4096; 563 else 564 afcm = AFCM; 565 afcerr = afcm * state->master_clk / 8192; 566 567 return afcerr; 568 569err: 570 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 571 return -EREMOTEIO; 572} 573 574static int dagcm_val_get(struct mb86a16_state *state) 575{ 576 int DAGCM; 577 unsigned char DAGCM_H, DAGCM_L; 578 579 if (mb86a16_read(state, 0x45, &DAGCM_L) != 2) 580 goto err; 581 if (mb86a16_read(state, 0x46, &DAGCM_H) != 2) 582 goto err; 583 584 DAGCM = (DAGCM_H << 8) + DAGCM_L; 585 586 return DAGCM; 587 588err: 589 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 590 return -EREMOTEIO; 591} 592 593static int mb86a16_read_status(struct dvb_frontend *fe, fe_status_t *status) 594{ 595 struct mb86a16_state *state = fe->demodulator_priv; 596 597 if (state->signal & 0x02) 598 *status |= FE_HAS_VITERBI; 599 if (state->signal & 0x01) 600 *status |= FE_HAS_SYNC; 601 if (state->signal & 0x03) 602 *status |= FE_HAS_LOCK; 603 604 return 0; 605} 606 607static int sync_chk(struct mb86a16_state *state, 608 unsigned char *VIRM) 609{ 610 unsigned char val; 611 int sync; 612 613 if (mb86a16_read(state, 0x0d, &val) != 2) 614 goto err; 615 616 dprintk(verbose, MB86A16_INFO, 1, "Status = %02x,", val); 617 sync = val & 0x01; 618 *VIRM = (val & 0x1c) >> 2; 619 620 return sync; 621err: 622 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 623 return -EREMOTEIO; 624 625} 626 627static int freqerr_chk(struct mb86a16_state *state, 628 int fTP, 629 int smrt, 630 int unit) 631{ 632 unsigned char CRM, AFCML, AFCMH; 633 unsigned char temp1, temp2, temp3; 634 int crm, afcm, AFCM; 635 int crrerr, afcerr; // [kHz] 636 int frqerr; // [MHz] 637 int afcen, afcexen = 0; 638 int R, M, fOSC, fOSC_OFS; 639 640 if (mb86a16_read(state, 0x43, &CRM) != 2) 641 goto err; 642 643 if (CRM > 127) 644 crm = CRM - 256; 645 else 646 crm = CRM; 647 648 crrerr = smrt * crm / 256; 649 if (mb86a16_read(state, 0x49, &temp1) != 2) 650 goto err; 651 652 afcen = (temp1 & 0x04) >> 2; 653 if (afcen == 0) { 654 if (mb86a16_read(state, 0x2a, &temp1) != 2) 655 goto err; 656 afcexen = (temp1 & 0x20) >> 5; 657 } 658 659 if (afcen == 1) { 660 if (mb86a16_read(state, 0x0e, &AFCML) != 2) 661 goto err; 662 if (mb86a16_read(state, 0x0f, &AFCMH) != 2) 663 goto err; 664 } else if (afcexen == 1) { 665 if (mb86a16_read(state, 0x2b, &AFCML) != 2) 666 goto err; 667 if (mb86a16_read(state, 0x2c, &AFCMH) != 2) 668 goto err; 669 } 670 if ((afcen == 1) || (afcexen == 1)) { 671 smrt_info_get(state, smrt); 672 AFCM = ((AFCMH & 0x01) << 8) + AFCML; 673 if (AFCM > 255) 674 afcm = AFCM - 512; 675 else 676 afcm = AFCM; 677 678 afcerr = afcm * state->master_clk / 8192; 679 } else 680 afcerr = 0; 681 682 if (mb86a16_read(state, 0x22, &temp1) != 2) 683 goto err; 684 if (mb86a16_read(state, 0x23, &temp2) != 2) 685 goto err; 686 if (mb86a16_read(state, 0x24, &temp3) != 2) 687 goto err; 688 689 R = (temp1 & 0xe0) >> 5; 690 M = ((temp1 & 0x1f) << 12) + (temp2 << 4) + (temp3 >> 4); 691 if (R == 0) 692 fOSC = 2 * M; 693 else 694 fOSC = M; 695 696 fOSC_OFS = fOSC - fTP; 697 698 if (unit == 0) { //[MHz] 699 if (crrerr + afcerr + fOSC_OFS * 1000 >= 0) 700 frqerr = (crrerr + afcerr + fOSC_OFS * 1000 + 500) / 1000; 701 else 702 frqerr = (crrerr + afcerr + fOSC_OFS * 1000 - 500) / 1000; 703 } else { //[kHz] 704 frqerr = crrerr + afcerr + fOSC_OFS * 1000; 705 } 706 707 return frqerr; 708err: 709 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 710 return -EREMOTEIO; 711} 712 713static unsigned char vco_dev_get(struct mb86a16_state *state, int smrt) 714{ 715 unsigned char R; 716 717 if (smrt > 9375) 718 R = 0; 719 else 720 R = 1; 721 722 return R; 723} 724 725static void swp_info_get(struct mb86a16_state *state, 726 int fOSC_start, 727 int smrt, 728 int v, int R, 729 int swp_ofs, 730 int *fOSC, 731 int *afcex_freq, 732 unsigned char *AFCEX_L, 733 unsigned char *AFCEX_H) 734{ 735 int AFCEX ; 736 int crnt_swp_freq ; 737 738 crnt_swp_freq = fOSC_start * 1000 + v * swp_ofs; 739 740 if (R == 0 ) 741 *fOSC = (crnt_swp_freq + 1000) / 2000 * 2; 742 else 743 *fOSC = (crnt_swp_freq + 500) / 1000; 744 745 if (*fOSC >= crnt_swp_freq) 746 *afcex_freq = *fOSC *1000 - crnt_swp_freq; 747 else 748 *afcex_freq = crnt_swp_freq - *fOSC * 1000; 749 750 AFCEX = *afcex_freq * 8192 / state->master_clk; 751 *AFCEX_L = AFCEX & 0x00ff; 752 *AFCEX_H = (AFCEX & 0x0f00) >> 8; 753} 754 755 756static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V, int vmax, int vmin, 757 int SIGMIN, int fOSC, int afcex_freq, int swp_ofs, unsigned char *SIG1) 758{ 759 int swp_freq ; 760 761 if ((i % 2 == 1) && (v <= vmax)) { 762 // positive v (case 1) 763 if ((v - 1 == vmin) && 764 (*(V + 30 + v) >= 0) && 765 (*(V + 30 + v - 1) >= 0) && 766 (*(V + 30 + v - 1) > *(V + 30 + v)) && 767 (*(V + 30 + v - 1) > SIGMIN)) { 768 769 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs; 770 *SIG1 = *(V + 30 + v - 1); 771 } else if ((v == vmax) && 772 (*(V + 30 + v) >= 0) && 773 (*(V + 30 + v - 1) >= 0) && 774 (*(V + 30 + v) > *(V + 30 + v - 1)) && 775 (*(V + 30 + v) > SIGMIN)) { 776 // (case 2) 777 swp_freq = fOSC * 1000 + afcex_freq; 778 *SIG1 = *(V + 30 + v); 779 } else if ((*(V + 30 + v) > 0) && 780 (*(V + 30 + v - 1) > 0) && 781 (*(V + 30 + v - 2) > 0) && 782 (*(V + 30 + v - 3) > 0) && 783 (*(V + 30 + v - 1) > *(V + 30 + v)) && 784 (*(V + 30 + v - 2) > *(V + 30 + v - 3)) && 785 ((*(V + 30 + v - 1) > SIGMIN) || 786 (*(V + 30 + v - 2) > SIGMIN))) { 787 // (case 3) 788 if (*(V + 30 + v - 1) >= *(V + 30 + v - 2)) { 789 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs; 790 *SIG1 = *(V + 30 + v - 1); 791 } else { 792 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs * 2; 793 *SIG1 = *(V + 30 + v - 2); 794 } 795 } else if ((v == vmax) && 796 (*(V + 30 + v) >= 0) && 797 (*(V + 30 + v - 1) >= 0) && 798 (*(V + 30 + v - 2) >= 0) && 799 (*(V + 30 + v) > *(V + 30 + v - 2)) && 800 (*(V + 30 + v - 1) > *(V + 30 + v - 2)) && 801 ((*(V + 30 + v) > SIGMIN) || 802 (*(V + 30 + v - 1) > SIGMIN))) { 803 // (case 4) 804 if (*(V + 30 + v) >= *(V + 30 + v - 1)) { 805 swp_freq = fOSC * 1000 + afcex_freq; 806 *SIG1 = *(V + 30 + v); 807 } else { 808 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs; 809 *SIG1 = *(V + 30 + v - 1); 810 } 811 } else { 812 swp_freq = -1 ; 813 } 814 } else if ((i % 2 == 0) && (v >= vmin)) { 815 // Negative v (case 1) 816 if ((*(V + 30 + v) > 0) && 817 (*(V + 30 + v + 1) > 0) && 818 (*(V + 30 + v + 2) > 0) && 819 (*(V + 30 + v + 1) > *(V + 30 + v)) && 820 (*(V + 30 + v + 1) > *(V + 30 + v + 2)) && 821 (*(V + 30 + v + 1) > SIGMIN)) { 822 823 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs; 824 *SIG1 = *(V + 30 + v + 1); 825 } else if ((v + 1 == vmax) && 826 (*(V + 30 + v) >= 0) && 827 (*(V + 30 + v + 1) >= 0) && 828 (*(V + 30 + v + 1) > *(V + 30 + v)) && 829 (*(V + 30 + v + 1) > SIGMIN)) { 830 // (case 2) 831 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs; 832 *SIG1 = *(V + 30 + v); 833 } else if ((v == vmin) && 834 (*(V + 30 + v) > 0) && 835 (*(V + 30 + v + 1) > 0) && 836 (*(V + 30 + v + 2) > 0) && 837 (*(V + 30 + v) > *(V + 30 + v + 1)) && 838 (*(V + 30 + v) > *(V + 30 + v + 2)) && 839 (*(V + 30 + v) > SIGMIN)) { 840 // (case 3) 841 swp_freq = fOSC * 1000 + afcex_freq; 842 *SIG1 = *(V + 30 + v); 843 } else if ((*(V + 30 + v) >= 0) && 844 (*(V + 30 + v + 1) >= 0) && 845 (*(V + 30 + v + 2) >= 0) && 846 (*(V +30 + v + 3) >= 0) && 847 (*(V + 30 + v + 1) > *(V + 30 + v)) && 848 (*(V + 30 + v + 2) > *(V + 30 + v + 3)) && 849 ((*(V + 30 + v + 1) > SIGMIN) || 850 (*(V + 30 + v + 2) > SIGMIN))) { 851 // (case 4) 852 if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) { 853 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs; 854 *SIG1 = *(V + 30 + v + 1); 855 } else { 856 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2; 857 *SIG1 = *(V + 30 + v + 2); 858 } 859 } else if ((*(V + 30 + v) >= 0) && 860 (*(V + 30 + v + 1) >= 0) && 861 (*(V + 30 + v + 2) >= 0) && 862 (*(V + 30 + v + 3) >= 0) && 863 (*(V + 30 + v) > *(V + 30 + v + 2)) && 864 (*(V + 30 + v + 1) > *(V + 30 + v + 2)) && 865 (*(V + 30 + v) > *(V + 30 + v + 3)) && 866 (*(V + 30 + v + 1) > *(V + 30 + v + 3)) && 867 ((*(V + 30 + v) > SIGMIN) || 868 (*(V + 30 + v + 1) > SIGMIN))) { 869 // (case 5) 870 if (*(V + 30 + v) >= *(V + 30 + v + 1)) { 871 swp_freq = fOSC * 1000 + afcex_freq; 872 *SIG1 = *(V + 30 + v); 873 } else { 874 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs; 875 *SIG1 = *(V + 30 + v + 1); 876 } 877 } else if ((v + 2 == vmin) && 878 (*(V + 30 + v) >= 0) && 879 (*(V + 30 + v + 1) >= 0) && 880 (*(V + 30 + v + 2) >= 0) && 881 (*(V + 30 + v + 1) > *(V + 30 + v)) && 882 (*(V + 30 + v + 2) > *(V + 30 + v)) && 883 ((*(V + 30 + v + 1) > SIGMIN) || 884 (*(V + 30 + v + 2) > SIGMIN))) { 885 // (case 6) 886 if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) { 887 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs; 888 *SIG1 = *(V + 30 + v + 1); 889 } else { 890 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2; 891 *SIG1 = *(V + 30 + v + 2); 892 } 893 } else if ((vmax == 0) && (vmin == 0) && (*(V + 30 + v) > SIGMIN)) { 894 swp_freq = fOSC * 1000; 895 *SIG1 = *(V + 30 + v); 896 } else swp_freq = -1; 897 } else swp_freq = -1; 898 899 return swp_freq; 900} 901 902static void swp_info_get2(struct mb86a16_state *state, 903 int smrt, 904 int R, 905 int swp_freq, 906 int *afcex_freq, 907 int *fOSC, 908 unsigned char *AFCEX_L, 909 unsigned char *AFCEX_H) 910{ 911 int AFCEX ; 912 913 if (R == 0) 914 *fOSC = (swp_freq + 1000) / 2000 * 2; 915 else 916 *fOSC = (swp_freq + 500) / 1000; 917 918 if (*fOSC >= swp_freq) 919 *afcex_freq = *fOSC * 1000 - swp_freq; 920 else 921 *afcex_freq = swp_freq - *fOSC * 1000; 922 923 AFCEX = *afcex_freq * 8192 / state->master_clk; 924 *AFCEX_L = AFCEX & 0x00ff; 925 *AFCEX_H = (AFCEX & 0x0f00) >> 8; 926} 927 928static void afcex_info_get(struct mb86a16_state *state, 929 int afcex_freq, 930 unsigned char *AFCEX_L, 931 unsigned char *AFCEX_H) 932{ 933 int AFCEX ; 934 935 AFCEX = afcex_freq * 8192 / state->master_clk; 936 *AFCEX_L = AFCEX & 0x00ff; 937 *AFCEX_H = (AFCEX & 0x0f00) >> 8; 938} 939 940static int SEQ_set(struct mb86a16_state *state, unsigned char loop) 941{ 942 // SLOCK0 = 0 943 if (mb86a16_write(state, 0x32, 0x02 | (loop << 2)) < 0) { 944 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 945 return -EREMOTEIO; 946 } 947 948 return 0; 949} 950 951static int iq_vt_set(struct mb86a16_state *state, unsigned char IQINV) 952{ 953 // Viterbi Rate, IQ Settings 954 if (mb86a16_write(state, 0x06, 0xdf | (IQINV << 5)) < 0) { 955 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 956 return -EREMOTEIO; 957 } 958 959 return 0; 960} 961 962static int FEC_srst(struct mb86a16_state *state) 963{ 964 if (mb86a16_write(state, MB86A16_RESET, 0x02) < 0) { 965 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 966 return -EREMOTEIO; 967 } 968 969 return 0; 970} 971 972static int S2T_set(struct mb86a16_state *state, unsigned char S2T) 973{ 974 if (mb86a16_write(state, 0x34, 0x70 | S2T) < 0) { 975 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 976 return -EREMOTEIO; 977 } 978 979 return 0; 980} 981 982static int S45T_set(struct mb86a16_state *state, unsigned char S4T, unsigned char S5T) 983{ 984 if (mb86a16_write(state, 0x35, 0x00 | (S5T << 4) | S4T) < 0) { 985 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 986 return -EREMOTEIO; 987 } 988 989 return 0; 990} 991 992 993static int mb86a16_set_fe(struct mb86a16_state *state) 994{ 995 u8 agcval, cnmval; 996 997 int i, j; 998 int fOSC = 0; 999 int fOSC_start = 0; 1000 int wait_t; 1001 int fcp; 1002 int swp_ofs; 1003 int V[60]; 1004 u8 SIG1MIN; 1005 1006 unsigned char CREN, AFCEN, AFCEXEN; 1007 unsigned char SIG1; 1008 unsigned char TIMINT1, TIMINT2, TIMEXT; 1009 unsigned char S0T, S1T; 1010 unsigned char S2T; 1011// unsigned char S2T, S3T; 1012 unsigned char S4T, S5T; 1013 unsigned char AFCEX_L, AFCEX_H; 1014 unsigned char R; 1015 unsigned char VIRM; 1016 unsigned char ETH, VIA; 1017 unsigned char junk; 1018 1019 int loop; 1020 int ftemp; 1021 int v, vmax, vmin; 1022 int vmax_his, vmin_his; 1023 int swp_freq, prev_swp_freq[20]; 1024 int prev_freq_num; 1025 int signal_dupl; 1026 int afcex_freq; 1027 int signal; 1028 int afcerr; 1029 int temp_freq, delta_freq; 1030 int dagcm[4]; 1031 int smrt_d; 1032// int freq_err; 1033 int n; 1034 int ret = -1; 1035 int sync; 1036 1037 dprintk(verbose, MB86A16_INFO, 1, "freq=%d Mhz, symbrt=%d Ksps", state->frequency, state->srate); 1038 1039 fcp = 3000; 1040 swp_ofs = state->srate / 4; 1041 1042 for (i = 0; i < 60; i++) 1043 V[i] = -1; 1044 1045 for (i = 0; i < 20; i++) 1046 prev_swp_freq[i] = 0; 1047 1048 SIG1MIN = 25; 1049 1050 for (n = 0; ((n < 3) && (ret == -1)); n++) { 1051 SEQ_set(state, 0); 1052 iq_vt_set(state, 0); 1053 1054 CREN = 0; 1055 AFCEN = 0; 1056 AFCEXEN = 1; 1057 TIMINT1 = 0; 1058 TIMINT2 = 1; 1059 TIMEXT = 2; 1060 S1T = 0; 1061 S0T = 0; 1062 1063 if (initial_set(state) < 0) { 1064 dprintk(verbose, MB86A16_ERROR, 1, "initial set failed"); 1065 return -1; 1066 } 1067 if (DAGC_data_set(state, 3, 2) < 0) { 1068 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error"); 1069 return -1; 1070 } 1071 if (EN_set(state, CREN, AFCEN) < 0) { 1072 dprintk(verbose, MB86A16_ERROR, 1, "EN set error"); 1073 return -1; // (0, 0) 1074 } 1075 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) { 1076 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error"); 1077 return -1; // (1, smrt) = (1, symbolrate) 1078 } 1079 if (CNTM_set(state, TIMINT1, TIMINT2, TIMEXT) < 0) { 1080 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set error"); 1081 return -1; // (0, 1, 2) 1082 } 1083 if (S01T_set(state, S1T, S0T) < 0) { 1084 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error"); 1085 return -1; // (0, 0) 1086 } 1087 smrt_info_get(state, state->srate); 1088 if (smrt_set(state, state->srate) < 0) { 1089 dprintk(verbose, MB86A16_ERROR, 1, "smrt info get error"); 1090 return -1; 1091 } 1092 1093 R = vco_dev_get(state, state->srate); 1094 if (R == 1) 1095 fOSC_start = state->frequency; 1096 1097 else if (R == 0) { 1098 if (state->frequency % 2 == 0) { 1099 fOSC_start = state->frequency; 1100 } else { 1101 fOSC_start = state->frequency + 1; 1102 if (fOSC_start > 2150) 1103 fOSC_start = state->frequency - 1; 1104 } 1105 } 1106 loop = 1; 1107 ftemp = fOSC_start * 1000; 1108 vmax = 0 ; 1109 while (loop == 1) { 1110 ftemp = ftemp + swp_ofs; 1111 vmax++; 1112 1113 // Upper bound 1114 if (ftemp > 2150000) { 1115 loop = 0; 1116 vmax--; 1117 } 1118 else if ((ftemp == 2150000) || (ftemp - state->frequency * 1000 >= fcp + state->srate / 4)) 1119 loop = 0; 1120 } 1121 1122 loop = 1; 1123 ftemp = fOSC_start * 1000; 1124 vmin = 0 ; 1125 while (loop == 1) { 1126 ftemp = ftemp - swp_ofs; 1127 vmin--; 1128 1129 // Lower bound 1130 if (ftemp < 950000) { 1131 loop = 0; 1132 vmin++; 1133 } 1134 else if ((ftemp == 950000) || (state->frequency * 1000 - ftemp >= fcp + state->srate / 4)) 1135 loop = 0; 1136 } 1137 1138 wait_t = (8000 + state->srate / 2) / state->srate; 1139 if (wait_t == 0) 1140 wait_t = 1; 1141 1142 i = 0; 1143 j = 0; 1144 prev_freq_num = 0; 1145 loop = 1; 1146 signal = 0; 1147 vmax_his = 0; 1148 vmin_his = 0; 1149 v = 0; 1150 1151 while (loop == 1) { 1152 swp_info_get(state, fOSC_start, state->srate, 1153 v, R, swp_ofs, &fOSC, 1154 &afcex_freq, &AFCEX_L, &AFCEX_H); 1155 1156 udelay(100); 1157 if (rf_val_set(state, fOSC, state->srate, R) < 0) { 1158 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error"); 1159 return -1; 1160 } 1161 udelay(100); 1162 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { 1163 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error"); 1164 return -1; 1165 } 1166 if (srst(state) < 0) { 1167 dprintk(verbose, MB86A16_ERROR, 1, "srst error"); 1168 return -1; 1169 } 1170 msleep_interruptible(wait_t); 1171 1172 if (mb86a16_read(state, 0x37, &SIG1) != 2) { 1173 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 1174 return -1; 1175 } 1176 V[30 + v] = SIG1 ; 1177 swp_freq = swp_freq_calcuation(state, i, v, V, vmax, vmin, 1178 SIG1MIN, fOSC, afcex_freq, 1179 swp_ofs, &SIG1); //changed 1180 1181 signal_dupl = 0; 1182 for (j = 0; j < prev_freq_num; j++) { 1183 if ((ABS(prev_swp_freq[j] - swp_freq)) < (swp_ofs * 3 / 2)) { 1184 signal_dupl = 1; 1185 dprintk(verbose, MB86A16_INFO, 1, "Probably Duplicate Signal, j = %d", j); 1186 } 1187 } 1188 if ((signal_dupl == 0) && (swp_freq > 0) && (ABS(swp_freq - state->frequency * 1000) < fcp + state->srate / 6)) { 1189 dprintk(verbose, MB86A16_DEBUG, 1, "------ Signal detect ------ [swp_freq=[%07d, srate=%05d]]", swp_freq, state->srate); 1190 prev_swp_freq[prev_freq_num] = swp_freq; 1191 prev_freq_num++; 1192 swp_info_get2(state, state->srate, R, swp_freq, 1193 &afcex_freq, &fOSC, 1194 &AFCEX_L, &AFCEX_H); 1195 1196 if (rf_val_set(state, fOSC, state->srate, R) < 0) { 1197 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error"); 1198 return -1; 1199 } 1200 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { 1201 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error"); 1202 return -1; 1203 } 1204 signal = signal_det(state, state->srate, &SIG1); 1205 if (signal == 1) { 1206 dprintk(verbose, MB86A16_ERROR, 1, "***** Signal Found *****"); 1207 loop = 0; 1208 } else { 1209 dprintk(verbose, MB86A16_ERROR, 1, "!!!!! No signal !!!!!, try again..."); 1210 smrt_info_get(state, state->srate); 1211 if (smrt_set(state, state->srate) < 0) { 1212 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error"); 1213 return -1; 1214 } 1215 } 1216 } 1217 if (v > vmax) 1218 vmax_his = 1 ; 1219 if (v < vmin) 1220 vmin_his = 1 ; 1221 i++; 1222 1223 if ((i % 2 == 1) && (vmax_his == 1)) 1224 i++; 1225 if ((i % 2 == 0) && (vmin_his == 1)) 1226 i++; 1227 1228 if (i % 2 == 1) 1229 v = (i + 1) / 2; 1230 else 1231 v = -i / 2; 1232 1233 if ((vmax_his == 1) && (vmin_his == 1)) 1234 loop = 0 ; 1235 } 1236 1237 if (signal == 1) { 1238 dprintk(verbose, MB86A16_INFO, 1, " Start Freq Error Check"); 1239 S1T = 7 ; 1240 S0T = 1 ; 1241 CREN = 0 ; 1242 AFCEN = 1 ; 1243 AFCEXEN = 0 ; 1244 1245 if (S01T_set(state, S1T, S0T) < 0) { 1246 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error"); 1247 return -1; 1248 } 1249 smrt_info_get(state, state->srate); 1250 if (smrt_set(state, state->srate) < 0) { 1251 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error"); 1252 return -1; 1253 } 1254 if (EN_set(state, CREN, AFCEN) < 0) { 1255 dprintk(verbose, MB86A16_ERROR, 1, "EN set error"); 1256 return -1; 1257 } 1258 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) { 1259 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error"); 1260 return -1; 1261 } 1262 afcex_info_get(state, afcex_freq, &AFCEX_L, &AFCEX_H); 1263 if (afcofs_data_set(state, AFCEX_L, AFCEX_H) < 0) { 1264 dprintk(verbose, MB86A16_ERROR, 1, "AFCOFS data set error"); 1265 return -1; 1266 } 1267 if (srst(state) < 0) { 1268 dprintk(verbose, MB86A16_ERROR, 1, "srst error"); 1269 return -1; 1270 } 1271 // delay 4~200 1272 wait_t = 200000 / state->master_clk + 200000 / state->srate; 1273 msleep(wait_t); 1274 afcerr = afcerr_chk(state); 1275 if (afcerr == -1) 1276 return -1; 1277 1278 swp_freq = fOSC * 1000 + afcerr ; 1279 AFCEXEN = 1 ; 1280 if (state->srate >= 1500) 1281 smrt_d = state->srate / 3; 1282 else 1283 smrt_d = state->srate / 2; 1284 smrt_info_get(state, smrt_d); 1285 if (smrt_set(state, smrt_d) < 0) { 1286 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error"); 1287 return -1; 1288 } 1289 if (AFCEXEN_set(state, AFCEXEN, smrt_d) < 0) { 1290 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error"); 1291 return -1; 1292 } 1293 R = vco_dev_get(state, smrt_d); 1294 if (DAGC_data_set(state, 2, 0) < 0) { 1295 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error"); 1296 return -1; 1297 } 1298 for (i = 0; i < 3; i++) { 1299 temp_freq = swp_freq + (i - 1) * state->srate / 8; 1300 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H); 1301 if (rf_val_set(state, fOSC, smrt_d, R) < 0) { 1302 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error"); 1303 return -1; 1304 } 1305 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { 1306 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error"); 1307 return -1; 1308 } 1309 wait_t = 200000 / state->master_clk + 40000 / smrt_d; 1310 msleep(wait_t); 1311 dagcm[i] = dagcm_val_get(state); 1312 } 1313 if ((dagcm[0] > dagcm[1]) && 1314 (dagcm[0] > dagcm[2]) && 1315 (dagcm[0] - dagcm[1] > 2 * (dagcm[2] - dagcm[1]))) { 1316 1317 temp_freq = swp_freq - 2 * state->srate / 8; 1318 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H); 1319 if (rf_val_set(state, fOSC, smrt_d, R) < 0) { 1320 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error"); 1321 return -1; 1322 } 1323 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { 1324 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set"); 1325 return -1; 1326 } 1327 wait_t = 200000 / state->master_clk + 40000 / smrt_d; 1328 msleep(wait_t); 1329 dagcm[3] = dagcm_val_get(state); 1330 if (dagcm[3] > dagcm[1]) 1331 delta_freq = (dagcm[2] - dagcm[0] + dagcm[1] - dagcm[3]) * state->srate / 300; 1332 else 1333 delta_freq = 0; 1334 } else if ((dagcm[2] > dagcm[1]) && 1335 (dagcm[2] > dagcm[0]) && 1336 (dagcm[2] - dagcm[1] > 2 * (dagcm[0] - dagcm[1]))) { 1337 1338 temp_freq = swp_freq + 2 * state->srate / 8; 1339 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H); 1340 if (rf_val_set(state, fOSC, smrt_d, R) < 0) { 1341 dprintk(verbose, MB86A16_ERROR, 1, "rf val set"); 1342 return -1; 1343 } 1344 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { 1345 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set"); 1346 return -1; 1347 } 1348 wait_t = 200000 / state->master_clk + 40000 / smrt_d; 1349 msleep(wait_t); 1350 dagcm[3] = dagcm_val_get(state); 1351 if (dagcm[3] > dagcm[1]) 1352 delta_freq = (dagcm[2] - dagcm[0] + dagcm[3] - dagcm[1]) * state->srate / 300; 1353 else 1354 delta_freq = 0 ; 1355 1356 } else { 1357 delta_freq = 0 ; 1358 } 1359 dprintk(verbose, MB86A16_INFO, 1, "SWEEP Frequency = %d", swp_freq); 1360 swp_freq += delta_freq; 1361 dprintk(verbose, MB86A16_INFO, 1, "Adjusting .., DELTA Freq = %d, SWEEP Freq=%d", delta_freq, swp_freq); 1362 if (ABS(state->frequency * 1000 - swp_freq) > 3800) { 1363 dprintk(verbose, MB86A16_INFO, 1, "NO -- SIGNAL !"); 1364 } else { 1365 1366 S1T = 0; 1367 S0T = 3; 1368 CREN = 1; 1369 AFCEN = 0; 1370 AFCEXEN = 1; 1371 1372 if (S01T_set(state, S1T, S0T) < 0) { 1373 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error"); 1374 return -1; 1375 } 1376 if (DAGC_data_set(state, 0, 0) < 0) { 1377 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error"); 1378 return -1; 1379 } 1380 R = vco_dev_get(state, state->srate); 1381 smrt_info_get(state, state->srate); 1382 if (smrt_set(state, state->srate) < 0) { 1383 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error"); 1384 return -1; 1385 } 1386 if (EN_set(state, CREN, AFCEN) < 0) { 1387 dprintk(verbose, MB86A16_ERROR, 1, "EN set error"); 1388 return -1; 1389 } 1390 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) { 1391 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error"); 1392 return -1; 1393 } 1394 swp_info_get2(state, state->srate, R, swp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H); 1395 if (rf_val_set(state, fOSC, state->srate, R) < 0) { 1396 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error"); 1397 return -1; 1398 } 1399 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) { 1400 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error"); 1401 return -1; 1402 } 1403 if (srst(state) < 0) { 1404 dprintk(verbose, MB86A16_ERROR, 1, "srst error"); 1405 return -1; 1406 } 1407 wait_t = 7 + (10000 + state->srate / 2) / state->srate; 1408 if (wait_t == 0) 1409 wait_t = 1; 1410 msleep_interruptible(wait_t); 1411 if (mb86a16_read(state, 0x37, &SIG1) != 2) { 1412 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 1413 return -EREMOTEIO; 1414 } 1415 1416 if (SIG1 > 110) { 1417 S2T = 4; S4T = 1; S5T = 6; ETH = 4; VIA = 6; 1418 wait_t = 7 + (917504 + state->srate / 2) / state->srate; 1419 } else if (SIG1 > 105) { 1420 S2T = 4; S4T = 2; S5T = 8; ETH = 7; VIA = 2; 1421 wait_t = 7 + (1048576 + state->srate / 2) / state->srate; 1422 } else if (SIG1 > 85) { 1423 S2T = 5; S4T = 2; S5T = 8; ETH = 7; VIA = 2; 1424 wait_t = 7 + (1310720 + state->srate / 2) / state->srate; 1425 } else if (SIG1 > 65) { 1426 S2T = 6; S4T = 2; S5T = 8; ETH = 7; VIA = 2; 1427 wait_t = 7 + (1572864 + state->srate / 2) / state->srate; 1428 } else { 1429 S2T = 7; S4T = 2; S5T = 8; ETH = 7; VIA = 2; 1430 wait_t = 7 + (2097152 + state->srate / 2) / state->srate; 1431 } 1432 S2T_set(state, S2T); 1433 S45T_set(state, S4T, S5T); 1434 Vi_set(state, ETH, VIA); 1435 srst(state); 1436 msleep_interruptible(wait_t); 1437 sync = sync_chk(state, &VIRM); 1438 dprintk(verbose, MB86A16_INFO, 1, "-------- Viterbi=[%d] SYNC=[%d] ---------", VIRM, sync); 1439 if (mb86a16_read(state, 0x0d, &state->signal) != 2) { 1440 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 1441 return -EREMOTEIO; 1442 } 1443 if (VIRM) { 1444 if (VIRM == 4) { // 5/6 1445 if (SIG1 > 110) 1446 wait_t = ( 786432 + state->srate / 2) / state->srate; 1447 else 1448 wait_t = (1572864 + state->srate / 2) / state->srate; 1449 if (state->srate < 5000) 1450 // FIXME ! , should be a long wait ! 1451 msleep_interruptible(wait_t); 1452 else 1453 msleep_interruptible(wait_t); 1454 1455 if (sync_chk(state, &junk) == 0) { 1456 iq_vt_set(state, 1); 1457 FEC_srst(state); 1458 } 1459 if (SIG1 > 110) 1460 wait_t = ( 786432 + state->srate / 2) / state->srate; 1461 else 1462 wait_t = (1572864 + state->srate / 2) / state->srate; 1463 1464 msleep_interruptible(wait_t); 1465 SEQ_set(state, 1); 1466 } else { // 1/2, 2/3, 3/4, 7/8 1467 if (SIG1 > 110) 1468 wait_t = ( 786432 + state->srate / 2) / state->srate; 1469 else 1470 wait_t = (1572864 + state->srate / 2) / state->srate; 1471 1472 msleep_interruptible(wait_t); 1473 SEQ_set(state, 1); 1474 } 1475 } else { 1476 dprintk(verbose, MB86A16_INFO, 1, "NO -- SIGNAL"); 1477 SEQ_set(state, 1); 1478 } 1479 } 1480 } else { 1481 dprintk (verbose, MB86A16_INFO, 1, "NO -- SIGNAL"); 1482 } 1483 1484 sync = sync_chk(state, &junk); 1485 if (sync) { 1486 dprintk(verbose, MB86A16_INFO, 1, "******* SYNC *******"); 1487 freqerr_chk(state, state->frequency, state->srate, 1); 1488 } 1489 } 1490 1491 mb86a16_read(state, 0x15, &agcval); 1492 mb86a16_read(state, 0x26, &cnmval); 1493 dprintk(verbose, MB86A16_INFO, 1, "AGC = %02x CNM = %02x", agcval, cnmval); 1494 1495 return ret; 1496} 1497 1498static int mb86a16_send_diseqc_msg(struct dvb_frontend *fe, 1499 struct dvb_diseqc_master_cmd *cmd) 1500{ 1501 struct mb86a16_state *state = fe->demodulator_priv; 1502 int i; 1503 u8 regs; 1504 1505 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0) 1506 goto err; 1507 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0) 1508 goto err; 1509 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0) 1510 goto err; 1511 1512 regs = 0x18; 1513 1514 if (cmd->msg_len > 5 || cmd->msg_len < 4) 1515 return -EINVAL; 1516 1517 for (i = 0; i < cmd->msg_len; i++) { 1518 if (mb86a16_write(state, regs, cmd->msg[i]) < 0) 1519 goto err; 1520 1521 regs++; 1522 } 1523 i += 0x90; 1524 1525 msleep_interruptible(10); 1526 1527 if (mb86a16_write(state, MB86A16_DCC1, i) < 0) 1528 goto err; 1529 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0) 1530 goto err; 1531 1532 return 0; 1533 1534err: 1535 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 1536 return -EREMOTEIO; 1537} 1538 1539static int mb86a16_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst) 1540{ 1541 struct mb86a16_state *state = fe->demodulator_priv; 1542 1543 switch (burst) { 1544 case SEC_MINI_A: 1545 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA | 1546 MB86A16_DCC1_TBEN | 1547 MB86A16_DCC1_TBO) < 0) 1548 goto err; 1549 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0) 1550 goto err; 1551 break; 1552 case SEC_MINI_B: 1553 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA | 1554 MB86A16_DCC1_TBEN) < 0) 1555 goto err; 1556 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0) 1557 goto err; 1558 break; 1559 } 1560 1561 return 0; 1562err: 1563 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 1564 return -EREMOTEIO; 1565} 1566 1567static int mb86a16_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone) 1568{ 1569 struct mb86a16_state *state = fe->demodulator_priv; 1570 1571 switch (tone) { 1572 case SEC_TONE_ON: 1573 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x00) < 0) 1574 goto err; 1575 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA | 1576 MB86A16_DCC1_CTOE) < 0) 1577 1578 goto err; 1579 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0) 1580 goto err; 1581 break; 1582 case SEC_TONE_OFF: 1583 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0) 1584 goto err; 1585 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0) 1586 goto err; 1587 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0) 1588 goto err; 1589 break; 1590 default: 1591 return -EINVAL; 1592 } 1593 return 0; 1594 1595err: 1596 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 1597 return -EREMOTEIO; 1598} 1599 1600#define MB86A16_FE_ALGO 1 1601 1602static int mb86a16_frontend_algo(struct dvb_frontend *fe) 1603{ 1604 return MB86A16_FE_ALGO; 1605} 1606 1607static int mb86a16_set_frontend(struct dvb_frontend *fe, 1608 struct dvb_frontend_parameters *p, 1609 unsigned int mode_flags, 1610 int *delay, 1611 fe_status_t *status) 1612{ 1613 int ret = 0; 1614 struct mb86a16_state *state = fe->demodulator_priv; 1615 1616 if (p != NULL) { 1617 state->frequency = p->frequency / 1000; 1618 state->srate = p->u.qpsk.symbol_rate / 1000; 1619 ret = mb86a16_set_fe(state); 1620 } 1621 if (!(mode_flags & FE_TUNE_MODE_ONESHOT)) 1622 mb86a16_read_status(fe, status); 1623 1624 *delay = HZ/3000; 1625 1626 return ret; 1627} 1628 1629static void mb86a16_release(struct dvb_frontend *fe) 1630{ 1631 struct mb86a16_state *state = fe->demodulator_priv; 1632 kfree(state); 1633} 1634 1635static int mb86a16_init(struct dvb_frontend *fe) 1636{ 1637 return 0; 1638} 1639 1640static int mb86a16_sleep(struct dvb_frontend *fe) 1641{ 1642 return 0; 1643} 1644 1645static int mb86a16_read_ber(struct dvb_frontend *fe, u32 *ber) 1646{ 1647 return 0; 1648} 1649 1650static int mb86a16_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 1651{ 1652 *strength = 0; 1653 1654 return 0; 1655} 1656 1657struct cnr { 1658 u8 cn_reg; 1659 u8 cn_val; 1660}; 1661 1662static const struct cnr cnr_tab[] = { 1663 { 35, 2 }, 1664 { 40, 3 }, 1665 { 50, 4 }, 1666 { 60, 5 }, 1667 { 70, 6 }, 1668 { 80, 7 }, 1669 { 92, 8 }, 1670 { 103, 9 }, 1671 { 115, 10 }, 1672 { 138, 12 }, 1673 { 162, 15 }, 1674 { 180, 18 }, 1675 { 185, 19 }, 1676 { 189, 20 }, 1677 { 195, 22 }, 1678 { 199, 24 }, 1679 { 201, 25 }, 1680 { 202, 26 }, 1681 { 203, 27 }, 1682 { 205, 28 }, 1683 { 208, 30 } 1684}; 1685 1686static int mb86a16_read_snr(struct dvb_frontend *fe, u16 *snr) 1687{ 1688 struct mb86a16_state *state = fe->demodulator_priv; 1689 int i = 0; 1690 int low_tide = 2, high_tide = 30, q_level; 1691 u8 cn; 1692 1693 if (mb86a16_read(state, 0x26, &cn) != 2) { 1694 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error"); 1695 return -EREMOTEIO; 1696 } 1697 1698 for (i = 0; i < ARRAY_SIZE(cnr_tab); i++) { 1699 if (cn < cnr_tab[i].cn_reg) { 1700 *snr = cnr_tab[i].cn_val; 1701 break; 1702 } 1703 } 1704 q_level = (*snr * 100) / (high_tide - low_tide); 1705 dprintk(verbose, MB86A16_ERROR, 1, "SNR (Quality) = [%d dB], Level=%d %%", *snr, q_level); 1706 1707 return 0; 1708} 1709 1710static int mb86a16_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 1711{ 1712 return 0; 1713} 1714 1715static struct dvb_frontend_ops mb86a16_ops = { 1716 .info = { 1717 .name = "Fujitsu MB86A16 DVB-S", 1718 .type = FE_QPSK, 1719 .frequency_min = 950000, 1720 .frequency_max = 2150000, 1721 .frequency_stepsize = 125, 1722 .frequency_tolerance = 0, 1723 .symbol_rate_min = 1000000, 1724 .symbol_rate_max = 45000000, 1725 .symbol_rate_tolerance = 500, 1726 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | 1727 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | 1728 FE_CAN_FEC_7_8 | FE_CAN_QPSK | 1729 FE_CAN_FEC_AUTO 1730 }, 1731 .release = mb86a16_release, 1732 .tune = mb86a16_set_frontend, 1733 .read_status = mb86a16_read_status, 1734 .get_frontend_algo = mb86a16_frontend_algo, 1735 .init = mb86a16_init, 1736 .sleep = mb86a16_sleep, 1737 .read_status = mb86a16_read_status, 1738 1739 .read_ber = mb86a16_read_ber, 1740 .read_signal_strength = mb86a16_read_signal_strength, 1741 .read_snr = mb86a16_read_snr, 1742 .read_ucblocks = mb86a16_read_ucblocks, 1743 1744 .diseqc_send_master_cmd = mb86a16_send_diseqc_msg, 1745 .diseqc_send_burst = mb86a16_send_diseqc_burst, 1746 .set_tone = mb86a16_set_tone, 1747}; 1748 1749struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config, 1750 struct i2c_adapter *i2c_adap) 1751{ 1752 u8 dev_id = 0; 1753 struct mb86a16_state *state = NULL; 1754 1755 state = kmalloc(sizeof (struct mb86a16_state), GFP_KERNEL); 1756 if (state == NULL) 1757 goto error; 1758 1759 state->config = config; 1760 state->i2c_adap = i2c_adap; 1761 1762 mb86a16_read(state, 0x7f, &dev_id); 1763 if (dev_id != 0xfe) 1764 goto error; 1765 1766 memcpy(&state->frontend.ops, &mb86a16_ops, sizeof (struct dvb_frontend_ops)); 1767 state->frontend.demodulator_priv = state; 1768 state->frontend.ops.set_voltage = state->config->set_voltage; 1769 1770 return &state->frontend; 1771error: 1772 kfree(state); 1773 return NULL; 1774} 1775EXPORT_SYMBOL(mb86a16_attach); 1776MODULE_LICENSE("GPL"); 1777MODULE_AUTHOR("Manu Abraham"); 1778