cx18-mailbox.c revision fd6b9c978dc3447b9b4677d8949ef3ea7f946abc
11c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil/* 21c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * cx18 mailbox functions 31c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * 41c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 51ed9dcc8ef61c35a620fecc039c01f2c50dceb80Andy Walls * Copyright (C) 2008 Andy Walls <awalls@radix.net> 61c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * 71c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * This program is free software; you can redistribute it and/or modify 81c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * it under the terms of the GNU General Public License as published by 91c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * the Free Software Foundation; either version 2 of the License, or 101c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * (at your option) any later version. 111c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * 121c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * This program is distributed in the hope that it will be useful, 131c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * but WITHOUT ANY WARRANTY; without even the implied warranty of 141c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 151c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * GNU General Public License for more details. 161c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * 171c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * You should have received a copy of the GNU General Public License 181c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * along with this program; if not, write to the Free Software 191c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 201c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil * 02111-1307 USA 211c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil */ 221c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 231c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include <stdarg.h> 241c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 251c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "cx18-driver.h" 26b1526421eac9a912b2cda7e147f1da2aa31be278Andy Walls#include "cx18-io.h" 271c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "cx18-scb.h" 281c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "cx18-irq.h" 291c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#include "cx18-mailbox.h" 30ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls#include "cx18-queue.h" 31ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls#include "cx18-streams.h" 32ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 33ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" }; 341c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 351c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define API_FAST (1 << 2) /* Short timeout */ 361c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define API_SLOW (1 << 3) /* Additional 300ms timeout */ 371c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 381c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstruct cx18_api_info { 391c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil u32 cmd; 401c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil u8 flags; /* Flags, see above */ 411c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil u8 rpu; /* Processing unit */ 421c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil const char *name; /* The name of the command */ 431c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil}; 441c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 451c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil#define API_ENTRY(rpu, x, f) { (x), (f), (rpu), #x } 461c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 471c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstatic const struct cx18_api_info api_info[] = { 481c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil /* MPEG encoder API */ 491c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0), 501c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_EPU_DEBUG, 0), 511c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CREATE_TASK, 0), 521c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_DESTROY_TASK, 0), 531c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW), 541c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW), 551c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0), 561c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0), 571c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0), 581c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0), 591c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_VIDEO_IN, 0), 601c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RATE, 0), 611c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RESOLUTION, 0), 621c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_FILTER_PARAM, 0), 631c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 0), 641c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_MEDIAN_CORING, 0), 651c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_INDEXTABLE, 0), 661c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PARAMETERS, 0), 671c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_VIDEO_MUTE, 0), 681c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_AUDIO_MUTE, 0), 691c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_MISC_PARAMETERS, 0), 701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_RAW_VBI_PARAM, API_SLOW), 711c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_CAPTURE_LINE_NO, 0), 721c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_COPYRIGHT, 0), 731c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PID, 0), 741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_VIDEO_PID, 0), 751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_VER_CROP_LINE, 0), 761c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_GOP_STRUCTURE, 0), 771c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_SCENE_CHANGE_DETECTION, 0), 781c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_ASPECT_RATIO, 0), 791c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_SKIP_INPUT_FRAME, 0), 801c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_SLICED_VBI_PARAM, 0), 811c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_SET_USERDATA_PLACE_HOLDER, 0), 821c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_GET_ENC_PTS, 0), 831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_DE_SET_MDL_ACK, 0), 841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(CPU, CX18_CPU_DE_SET_MDL, API_FAST), 854e6b61047db2a77a250b6510bdb3c20c41aee591Andy Walls API_ENTRY(CPU, CX18_CPU_DE_RELEASE_MDL, API_SLOW), 86fd6b9c978dc3447b9b4677d8949ef3ea7f946abcAndy Walls API_ENTRY(APU, CX18_APU_RESETAI, 0), 87fd6b9c978dc3447b9b4677d8949ef3ea7f946abcAndy Walls API_ENTRY(CPU, CX18_CPU_DEBUG_PEEK32, 0), 881c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil API_ENTRY(0, 0, 0), 891c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil}; 901c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 911c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstatic const struct cx18_api_info *find_api_info(u32 cmd) 921c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil{ 931c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil int i; 941c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 951c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil for (i = 0; api_info[i].cmd; i++) 961c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil if (api_info[i].cmd == cmd) 971c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return &api_info[i]; 981c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return NULL; 991c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil} 1001c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 101ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic void dump_mb(struct cx18 *cx, struct cx18_mailbox *mb, char *name) 102ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 103ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls char argstr[MAX_MB_ARGUMENTS*11+1]; 104ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls char *p; 105ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls int i; 106ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 107ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (!(cx18_debug & CX18_DBGFLG_API)) 108ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return; 109ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 110ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls for (i = 0, p = argstr; i < MAX_MB_ARGUMENTS; i++, p += 11) { 111ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls /* kernel snprintf() appends '\0' always */ 112ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls snprintf(p, 12, " %#010x", mb->args[i]); 113ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 114ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_DEBUG_API("%s: req %#010x ack %#010x cmd %#010x err %#010x args%s" 115ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls "\n", name, mb->request, mb->ack, mb->cmd, mb->error, argstr); 116ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 117ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 118ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 119ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls/* 120ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * Functions that run in a work_queue work handling context 121ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls */ 122ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 123ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic void epu_dma_done(struct cx18 *cx, struct cx18_epu_work_order *order) 124ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 125bca11a5721917d6d5874571813673a2669ffec4bAndy Walls u32 handle, mdl_ack_count, id; 126ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_mailbox *mb; 127ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_mdl_ack *mdl_ack; 128ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_stream *s; 129ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_buffer *buf; 130ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls int i; 131ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 132ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mb = &order->mb; 133ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls handle = mb->args[0]; 134ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls s = cx18_handle_to_stream(cx, handle); 135ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 136ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (s == NULL) { 137ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_WARN("Got DMA done notification for unknown/inactive" 138bca11a5721917d6d5874571813673a2669ffec4bAndy Walls " handle %d, %s mailbox seq no %d\n", handle, 139bca11a5721917d6d5874571813673a2669ffec4bAndy Walls (order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) ? 140bca11a5721917d6d5874571813673a2669ffec4bAndy Walls "stale" : "good", mb->request); 141ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return; 142ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 143ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 144ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mdl_ack_count = mb->args[2]; 145ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mdl_ack = order->mdl_ack; 146ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls for (i = 0; i < mdl_ack_count; i++, mdl_ack++) { 147bca11a5721917d6d5874571813673a2669ffec4bAndy Walls id = mdl_ack->id; 148bca11a5721917d6d5874571813673a2669ffec4bAndy Walls /* 149bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * Simple integrity check for processing a stale (and possibly 150bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * inconsistent mailbox): make sure the buffer id is in the 151bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * valid range for the stream. 152bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * 153bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * We go through the trouble of dealing with stale mailboxes 154bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * because most of the time, the mailbox data is still valid and 155bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * unchanged (and in practice the firmware ping-pongs the 156bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * two mdl_ack buffers so mdl_acks are not stale). 157bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * 158bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * There are occasions when we get a half changed mailbox, 159bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * which this check catches for a handle & id mismatch. If the 160bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * handle and id do correspond, the worst case is that we 161bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * completely lost the old buffer, but pick up the new buffer 162bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * early (but the new mdl_ack is guaranteed to be good in this 163bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * case as the firmware wouldn't point us to a new mdl_ack until 164bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * it's filled in). 165bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * 166bca11a5721917d6d5874571813673a2669ffec4bAndy Walls * cx18_queue_get buf() will detect the lost buffers 167abb096de82f6f920a06ca935f76925261e66b556Andy Walls * and send them back to q_free for fw rotation eventually. 168bca11a5721917d6d5874571813673a2669ffec4bAndy Walls */ 169bca11a5721917d6d5874571813673a2669ffec4bAndy Walls if ((order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) && 170bca11a5721917d6d5874571813673a2669ffec4bAndy Walls !(id >= s->mdl_offset && 171bca11a5721917d6d5874571813673a2669ffec4bAndy Walls id < (s->mdl_offset + s->buffers))) { 172bca11a5721917d6d5874571813673a2669ffec4bAndy Walls CX18_WARN("Fell behind! Ignoring stale mailbox with " 173bca11a5721917d6d5874571813673a2669ffec4bAndy Walls " inconsistent data. Lost buffer for mailbox " 174bca11a5721917d6d5874571813673a2669ffec4bAndy Walls "seq no %d\n", mb->request); 175bca11a5721917d6d5874571813673a2669ffec4bAndy Walls break; 176bca11a5721917d6d5874571813673a2669ffec4bAndy Walls } 177bca11a5721917d6d5874571813673a2669ffec4bAndy Walls buf = cx18_queue_get_buf(s, id, mdl_ack->data_used); 178abb096de82f6f920a06ca935f76925261e66b556Andy Walls 179bca11a5721917d6d5874571813673a2669ffec4bAndy Walls CX18_DEBUG_HI_DMA("DMA DONE for %s (buffer %d)\n", s->name, id); 180ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (buf == NULL) { 181ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_WARN("Could not find buf %d for stream %s\n", 182bca11a5721917d6d5874571813673a2669ffec4bAndy Walls id, s->name); 183abb096de82f6f920a06ca935f76925261e66b556Andy Walls /* Put as many buffers as possible back into fw use */ 184abb096de82f6f920a06ca935f76925261e66b556Andy Walls cx18_stream_load_fw_queue(s); 185ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls continue; 186ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 187ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 188ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (s->type == CX18_ENC_STREAM_TYPE_TS && s->dvb.enabled) { 189ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_DEBUG_HI_DMA("TS recv bytesused = %d\n", 190ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls buf->bytesused); 191ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls dvb_dmx_swfilter(&s->dvb.demux, buf->buf, 192ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls buf->bytesused); 193abb096de82f6f920a06ca935f76925261e66b556Andy Walls } 194abb096de82f6f920a06ca935f76925261e66b556Andy Walls /* Put as many buffers as possible back into fw use */ 195abb096de82f6f920a06ca935f76925261e66b556Andy Walls cx18_stream_load_fw_queue(s); 196abb096de82f6f920a06ca935f76925261e66b556Andy Walls /* Put back TS buffer, since it was removed from all queues */ 197abb096de82f6f920a06ca935f76925261e66b556Andy Walls if (s->type == CX18_ENC_STREAM_TYPE_TS) 19866c2a6b0bc0b394d215768610d96f44cf97052acAndy Walls cx18_stream_put_buf_fw(s, buf); 199ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 200ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls wake_up(&cx->dma_waitq); 201ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (s->id != -1) 202ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls wake_up(&s->waitq); 203ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 204ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 205ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic void epu_debug(struct cx18 *cx, struct cx18_epu_work_order *order) 206ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 207ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls char *p; 208ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls char *str = order->str; 209ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 210ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_DEBUG_INFO("%x %s\n", order->mb.args[0], str); 211ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls p = strchr(str, '.'); 212ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags) && p && p > str) 213ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_INFO("FW version: %s\n", p - 1); 214ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 215ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 216ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic void epu_cmd(struct cx18 *cx, struct cx18_epu_work_order *order) 217ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 218ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls switch (order->rpu) { 219ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case CPU: 220ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls { 221ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls switch (order->mb.cmd) { 222ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case CX18_EPU_DMA_DONE: 223ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls epu_dma_done(cx, order); 224ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 225ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case CX18_EPU_DEBUG: 226ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls epu_debug(cx, order); 227ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 228ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls default: 229ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n", 230ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order->mb.cmd); 231ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 232ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 233ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 234ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 235ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case APU: 236ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_WARN("Unknown APU to EPU mailbox command %#0x\n", 237ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order->mb.cmd); 238ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 239ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls default: 240ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 241ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 242ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 243ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 244ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic 245ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsvoid free_epu_work_order(struct cx18 *cx, struct cx18_epu_work_order *order) 246ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 247ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls atomic_set(&order->pending, 0); 248ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 249ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 250ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsvoid cx18_epu_work_handler(struct work_struct *work) 251ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 252ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_epu_work_order *order = 253ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls container_of(work, struct cx18_epu_work_order, work); 254ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18 *cx = order->cx; 255ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls epu_cmd(cx, order); 256ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls free_epu_work_order(cx, order); 257ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 258ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 259ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 260ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls/* 261ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * Functions that run in an interrupt handling context 262ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls */ 263ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 26472a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Wallsstatic void mb_ack_irq(struct cx18 *cx, struct cx18_epu_work_order *order) 2651c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil{ 266990c81c8afcd71eced2482ad59950ea755eddc7fAl Viro struct cx18_mailbox __iomem *ack_mb; 267ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls u32 ack_irq, req; 2681c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 269ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls switch (order->rpu) { 2701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case APU: 2711c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil ack_irq = IRQ_EPU_TO_APU_ACK; 2721c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil ack_mb = &cx->scb->apu2epu_mb; 2731c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil break; 2741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CPU: 2751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil ack_irq = IRQ_EPU_TO_CPU_ACK; 2761c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil ack_mb = &cx->scb->cpu2epu_mb; 2771c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil break; 2781c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil default: 27972c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls CX18_WARN("Unhandled RPU (%d) for command %x ack\n", 280ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order->rpu, order->mb.cmd); 281ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return; 2821c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil } 2831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 284ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls req = order->mb.request; 285ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls /* Don't ack if the RPU has gotten impatient and timed us out */ 286ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (req != cx18_readl(cx, &ack_mb->request) || 28772a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls req == cx18_readl(cx, &ack_mb->ack)) { 288bca11a5721917d6d5874571813673a2669ffec4bAndy Walls CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our " 289bca11a5721917d6d5874571813673a2669ffec4bAndy Walls "incoming %s to EPU mailbox (sequence no. %u) " 290bca11a5721917d6d5874571813673a2669ffec4bAndy Walls "while processing\n", 291bca11a5721917d6d5874571813673a2669ffec4bAndy Walls rpu_str[order->rpu], rpu_str[order->rpu], req); 29272a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls order->flags |= CX18_F_EWO_MB_STALE_WHILE_PROC; 293ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return; 29472a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls } 295ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls cx18_writel(cx, req, &ack_mb->ack); 296f056d29eebd2c8800cf42528ba0470c77a928821Andy Walls cx18_write_reg_expect(cx, ack_irq, SW2_INT_SET, ack_irq, ack_irq); 297ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return; 298ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 299ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 30072a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Wallsstatic int epu_dma_done_irq(struct cx18 *cx, struct cx18_epu_work_order *order) 301ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 302ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls u32 handle, mdl_ack_offset, mdl_ack_count; 303ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_mailbox *mb; 304ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 305ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mb = &order->mb; 306ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls handle = mb->args[0]; 307ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mdl_ack_offset = mb->args[1]; 308ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mdl_ack_count = mb->args[2]; 309ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 310ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (handle == CX18_INVALID_TASK_HANDLE || 311ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mdl_ack_count == 0 || mdl_ack_count > CX18_MAX_MDL_ACKS) { 31272a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls if ((order->flags & CX18_F_EWO_MB_STALE) == 0) 313ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mb_ack_irq(cx, order); 314ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return -1; 315ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 316ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 317ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls cx18_memcpy_fromio(cx, order->mdl_ack, cx->enc_mem + mdl_ack_offset, 318ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls sizeof(struct cx18_mdl_ack) * mdl_ack_count); 31972a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls 32072a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls if ((order->flags & CX18_F_EWO_MB_STALE) == 0) 321ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mb_ack_irq(cx, order); 322ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return 1; 323ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 324ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 325ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic 32672a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Wallsint epu_debug_irq(struct cx18 *cx, struct cx18_epu_work_order *order) 327ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 328ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls u32 str_offset; 329ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls char *str = order->str; 330ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 331ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls str[0] = '\0'; 332ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls str_offset = order->mb.args[1]; 333ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (str_offset) { 334ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls cx18_setup_page(cx, str_offset); 335ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls cx18_memcpy_fromio(cx, str, cx->enc_mem + str_offset, 252); 336ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls str[252] = '\0'; 337ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls cx18_setup_page(cx, SCB_OFFSET); 338ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 339ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 34072a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls if ((order->flags & CX18_F_EWO_MB_STALE) == 0) 341ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mb_ack_irq(cx, order); 342ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 343ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return str_offset ? 1 : 0; 344ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 345ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 346ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic inline 34772a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Wallsint epu_cmd_irq(struct cx18 *cx, struct cx18_epu_work_order *order) 348ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 349ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls int ret = -1; 350ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 351ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls switch (order->rpu) { 352ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case CPU: 353ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls { 354ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls switch (order->mb.cmd) { 355ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case CX18_EPU_DMA_DONE: 35672a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls ret = epu_dma_done_irq(cx, order); 357ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 358ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case CX18_EPU_DEBUG: 35972a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls ret = epu_debug_irq(cx, order); 360ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 361ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls default: 362ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n", 363ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order->mb.cmd); 364ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 365ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 366ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 367ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 368ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case APU: 369ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_WARN("Unknown APU to EPU mailbox command %#0x\n", 370ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order->mb.cmd); 371ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 372ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls default: 373ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 374ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 375ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return ret; 3761c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil} 3771c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 378ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstatic inline 379ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsstruct cx18_epu_work_order *alloc_epu_work_order_irq(struct cx18 *cx) 380ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 381ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls int i; 382ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_epu_work_order *order = NULL; 383ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 384ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls for (i = 0; i < CX18_MAX_EPU_WORK_ORDERS; i++) { 385ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls /* 386ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * We only need "pending" atomic to inspect its contents, 387ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * and need not do a check and set because: 388ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * 1. Any work handler thread only clears "pending" and only 389ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * on one, particular work order at a time, per handler thread. 390ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * 2. "pending" is only set here, and we're serialized because 391ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * we're called in an IRQ handler context. 392ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls */ 393ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (atomic_read(&cx->epu_work_order[i].pending) == 0) { 394ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order = &cx->epu_work_order[i]; 395ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls atomic_set(&order->pending, 1); 396ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 397ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 398ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 399ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return order; 400ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 401ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 402ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Wallsvoid cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu) 403ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls{ 404ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_mailbox __iomem *mb; 405ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_mailbox *order_mb; 406ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls struct cx18_epu_work_order *order; 407ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls int submit; 408ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 409ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls switch (rpu) { 410ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case CPU: 411ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mb = &cx->scb->cpu2epu_mb; 412ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 413ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls case APU: 414ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls mb = &cx->scb->apu2epu_mb; 415ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls break; 416ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls default: 417ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return; 418ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 419ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 420ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order = alloc_epu_work_order_irq(cx); 421ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (order == NULL) { 422ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls CX18_WARN("Unable to find blank work order form to schedule " 423ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls "incoming mailbox command processing\n"); 424ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls return; 425ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 426ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 42772a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls order->flags = 0; 428ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order->rpu = rpu; 429ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls order_mb = &order->mb; 430d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls 431d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls /* mb->cmd and mb->args[0] through mb->args[2] */ 432d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls cx18_memcpy_fromio(cx, &order_mb->cmd, &mb->cmd, 4 * sizeof(u32)); 433d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls /* mb->request and mb->ack. N.B. we want to read mb->ack last */ 434d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls cx18_memcpy_fromio(cx, &order_mb->request, &mb->request, 435d6c7e5f8faad080e75bace5c4f2265e3513e3510Andy Walls 2 * sizeof(u32)); 436ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 437ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (order_mb->request == order_mb->ack) { 438bca11a5721917d6d5874571813673a2669ffec4bAndy Walls CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our " 439bca11a5721917d6d5874571813673a2669ffec4bAndy Walls "incoming %s to EPU mailbox (sequence no. %u)" 440bca11a5721917d6d5874571813673a2669ffec4bAndy Walls "\n", 441bca11a5721917d6d5874571813673a2669ffec4bAndy Walls rpu_str[rpu], rpu_str[rpu], order_mb->request); 442ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls dump_mb(cx, order_mb, "incoming"); 44372a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls order->flags = CX18_F_EWO_MB_STALE_UPON_RECEIPT; 444ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 445ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 446ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls /* 447ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * Individual EPU command processing is responsible for ack-ing 448ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * a non-stale mailbox as soon as possible 449ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls */ 45072a4f8081af1c53a1673c173ce0fdd85c4b7d403Andy Walls submit = epu_cmd_irq(cx, order); 451ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls if (submit > 0) { 452572bfea71b0fb2efb36407b4e284c1e7962d4779Andy Walls queue_work(cx->work_queue, &order->work); 453ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls } 454ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls} 455ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 456ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 457ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls/* 458ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls * Functions called from a non-interrupt, non work_queue context 459ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls */ 460ee2d64f5ccc71b5c5191e92ea91a12b65f9ca060Andy Walls 4611c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstatic int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[]) 4621c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil{ 4631c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil const struct cx18_api_info *info = find_api_info(cmd); 464ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls u32 state, irq, req, ack, err; 465990c81c8afcd71eced2482ad59950ea755eddc7fAl Viro struct cx18_mailbox __iomem *mb; 466ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls u32 __iomem *xpu_state; 4671c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil wait_queue_head_t *waitq; 46872c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls struct mutex *mb_lock; 469330c6ec8942765e81f237bd58020da1b161935ceAndy Walls long int timeout, ret; 4701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil int i; 4711c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 4721c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil if (info == NULL) { 4731c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil CX18_WARN("unknown cmd %x\n", cmd); 4741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return -EINVAL; 4751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil } 4761c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 4771c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil if (cmd == CX18_CPU_DE_SET_MDL) 4781c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil CX18_DEBUG_HI_API("%s\n", info->name); 4791c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil else 4801c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil CX18_DEBUG_API("%s\n", info->name); 48172c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls 48272c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls switch (info->rpu) { 48372c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls case APU: 48472c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls waitq = &cx->mb_apu_waitq; 48572c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls mb_lock = &cx->epu2apu_mb_lock; 486ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls irq = IRQ_EPU_TO_APU; 487ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls mb = &cx->scb->epu2apu_mb; 488ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls xpu_state = &cx->scb->apu_state; 48972c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls break; 49072c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls case CPU: 49172c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls waitq = &cx->mb_cpu_waitq; 49272c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls mb_lock = &cx->epu2cpu_mb_lock; 493ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls irq = IRQ_EPU_TO_CPU; 494ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls mb = &cx->scb->epu2cpu_mb; 495ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls xpu_state = &cx->scb->cpu_state; 49672c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls break; 49772c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls default: 49872c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls CX18_WARN("Unknown RPU (%d) for API call\n", info->rpu); 49972c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls return -EINVAL; 50072c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls } 50172c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls 50272c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls mutex_lock(mb_lock); 503ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls /* 504ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * Wait for an in-use mailbox to complete 505ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * 506ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * If the XPU is responding with Ack's, the mailbox shouldn't be in 507ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * a busy state, since we serialize access to it on our end. 508ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * 509ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * If the wait for ack after sending a previous command was interrupted 510ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * by a signal, we may get here and find a busy mailbox. After waiting, 511ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * mark it "not busy" from our end, if the XPU hasn't ack'ed it still. 512ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls */ 513ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls state = cx18_readl(cx, xpu_state); 514ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls req = cx18_readl(cx, &mb->request); 5152bb49f1b9f6a4f50222bc8a6b1e9df87a432c52cAndy Walls timeout = msecs_to_jiffies(10); 516ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls ret = wait_event_timeout(*waitq, 517ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls (ack = cx18_readl(cx, &mb->ack)) == req, 518330c6ec8942765e81f237bd58020da1b161935ceAndy Walls timeout); 519ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls if (req != ack) { 520ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls /* waited long enough, make the mbox "not busy" from our end */ 521ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls cx18_writel(cx, req, &mb->ack); 522ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls CX18_ERR("mbox was found stuck busy when setting up for %s; " 523ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls "clearing busy and trying to proceed\n", info->name); 524330c6ec8942765e81f237bd58020da1b161935ceAndy Walls } else if (ret != timeout) 5252bb49f1b9f6a4f50222bc8a6b1e9df87a432c52cAndy Walls CX18_DEBUG_API("waited %u msecs for busy mbox to be acked\n", 5262bb49f1b9f6a4f50222bc8a6b1e9df87a432c52cAndy Walls jiffies_to_msecs(timeout-ret)); 527ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls 528ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls /* Build the outgoing mailbox */ 529ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls req = ((req & 0xfffffffe) == 0xfffffffe) ? 1 : req + 1; 5301c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 531b1526421eac9a912b2cda7e147f1da2aa31be278Andy Walls cx18_writel(cx, cmd, &mb->cmd); 5321c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil for (i = 0; i < args; i++) 533b1526421eac9a912b2cda7e147f1da2aa31be278Andy Walls cx18_writel(cx, data[i], &mb->args[i]); 534b1526421eac9a912b2cda7e147f1da2aa31be278Andy Walls cx18_writel(cx, 0, &mb->error); 535b1526421eac9a912b2cda7e147f1da2aa31be278Andy Walls cx18_writel(cx, req, &mb->request); 536ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls cx18_writel(cx, req - 1, &mb->ack); /* ensure ack & req are distinct */ 5371c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 538330c6ec8942765e81f237bd58020da1b161935ceAndy Walls /* 539330c6ec8942765e81f237bd58020da1b161935ceAndy Walls * Notify the XPU and wait for it to send an Ack back 540330c6ec8942765e81f237bd58020da1b161935ceAndy Walls */ 5412bb49f1b9f6a4f50222bc8a6b1e9df87a432c52cAndy Walls timeout = msecs_to_jiffies((info->flags & API_FAST) ? 10 : 20); 542ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls 543ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls CX18_DEBUG_HI_IRQ("sending interrupt SW1: %x to send %s\n", 544ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls irq, info->name); 545f056d29eebd2c8800cf42528ba0470c77a928821Andy Walls cx18_write_reg_expect(cx, irq, SW1_INT_SET, irq, irq); 5461c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 547330c6ec8942765e81f237bd58020da1b161935ceAndy Walls ret = wait_event_timeout( 54872c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls *waitq, 54972c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls cx18_readl(cx, &mb->ack) == cx18_readl(cx, &mb->request), 550330c6ec8942765e81f237bd58020da1b161935ceAndy Walls timeout); 5512bb49f1b9f6a4f50222bc8a6b1e9df87a432c52cAndy Walls 552ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls if (ret == 0) { 55372c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls /* Timed out */ 55472c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls mutex_unlock(mb_lock); 555ec984f437842426622fb54b56bbcc416183eefe6Andy Walls CX18_DEBUG_WARN("sending %s timed out waiting %d msecs for RPU " 556ec984f437842426622fb54b56bbcc416183eefe6Andy Walls "acknowledgement\n", 557ec984f437842426622fb54b56bbcc416183eefe6Andy Walls info->name, jiffies_to_msecs(timeout)); 5581c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return -EINVAL; 559330c6ec8942765e81f237bd58020da1b161935ceAndy Walls } 560330c6ec8942765e81f237bd58020da1b161935ceAndy Walls 561330c6ec8942765e81f237bd58020da1b161935ceAndy Walls if (ret != timeout) 562330c6ec8942765e81f237bd58020da1b161935ceAndy Walls CX18_DEBUG_HI_API("waited %u msecs for %s to be acked\n", 5632bb49f1b9f6a4f50222bc8a6b1e9df87a432c52cAndy Walls jiffies_to_msecs(timeout-ret), info->name); 56472c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls 565ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls /* Collect data returned by the XPU */ 5661c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil for (i = 0; i < MAX_MB_ARGUMENTS; i++) 567b1526421eac9a912b2cda7e147f1da2aa31be278Andy Walls data[i] = cx18_readl(cx, &mb->args[i]); 568b1526421eac9a912b2cda7e147f1da2aa31be278Andy Walls err = cx18_readl(cx, &mb->error); 56972c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls mutex_unlock(mb_lock); 570ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls 571ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls /* 572ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * Wait for XPU to perform extra actions for the caller in some cases. 573ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * e.g. CX18_CPU_DE_RELEASE_MDL will cause the CPU to send all buffers 574ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls * back in a burst shortly thereafter 575ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls */ 57672c2d6d3ac91d1b9efb482ff4a8dd68e3d867965Andy Walls if (info->flags & API_SLOW) 5771c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil cx18_msleep_timeout(300, 0); 578ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls 5791c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil if (err) 5801c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil CX18_DEBUG_API("mailbox error %08x for command %s\n", err, 5811c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil info->name); 5821c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return err ? -EIO : 0; 5831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil} 5841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 5851c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilint cx18_api(struct cx18 *cx, u32 cmd, int args, u32 data[]) 5861c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil{ 587ac50441720332f22a9d85ac03151d6acb7bc55d6Andy Walls return cx18_api_call(cx, cmd, args, data); 5881c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil} 5891c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 5901c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilstatic int cx18_set_filter_param(struct cx18_stream *s) 5911c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil{ 5921c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil struct cx18 *cx = s->cx; 5931c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil u32 mode; 5941c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil int ret; 5951c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 5961c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil mode = (cx->filter_mode & 1) ? 2 : (cx->spatial_strength ? 1 : 0); 5971c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil ret = cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4, 5981c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, 1, mode, cx->spatial_strength); 5991c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil mode = (cx->filter_mode & 2) ? 2 : (cx->temporal_strength ? 1 : 0); 6001c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4, 6011c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, 0, mode, cx->temporal_strength); 6021c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4, 6031c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, 2, cx->filter_mode >> 2, 0); 6041c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return ret; 6051c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil} 6061c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 6071c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilint cx18_api_func(void *priv, u32 cmd, int in, int out, 6081c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil u32 data[CX2341X_MBOX_MAX_DATA]) 6091c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil{ 61050b86bac6ae6dda00faa14f7d73ae2412eacc240Andy Walls struct cx18_api_func_private *api_priv = priv; 61150b86bac6ae6dda00faa14f7d73ae2412eacc240Andy Walls struct cx18 *cx = api_priv->cx; 61250b86bac6ae6dda00faa14f7d73ae2412eacc240Andy Walls struct cx18_stream *s = api_priv->s; 6131c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 6141c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil switch (cmd) { 6151c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_OUTPUT_PORT: 6161c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return 0; 6171c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_FRAME_RATE: 6181c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_VIDEO_IN, 6, 6191c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, 0, 0, 0, 0, data[0]); 6201c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_FRAME_SIZE: 6211c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RESOLUTION, 3, 6221c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[1], data[0]); 6231c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_STREAM_TYPE: 6241c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 2, 6251c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0]); 6261c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_ASPECT_RATIO: 6271c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_ASPECT_RATIO, 2, 6281c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0]); 6291c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 6301c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_GOP_PROPERTIES: 6311c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_GOP_STRUCTURE, 3, 6321c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0], data[1]); 6331c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_GOP_CLOSURE: 6341c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return 0; 6351c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_AUDIO_PROPERTIES: 6361c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_AUDIO_PARAMETERS, 2, 6371c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0]); 6381c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_MUTE_AUDIO: 6391c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_AUDIO_MUTE, 2, 6401c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0]); 6411c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_BIT_RATE: 6421c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RATE, 5, 6431c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0], data[1], data[2], data[3]); 6441c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_MUTE_VIDEO: 6451c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, 6461c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0]); 6471c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_FRAME_DROP_RATE: 6481c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_SKIP_INPUT_FRAME, 2, 6491c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0]); 6501c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_MISC: 6511c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 4, 6521c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0], data[1], data[2]); 6531c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_DNR_FILTER_MODE: 6541c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil cx->filter_mode = (data[0] & 3) | (data[1] << 2); 6551c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_set_filter_param(s); 6561c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_DNR_FILTER_PROPS: 6571c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil cx->spatial_strength = data[0]; 6581c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil cx->temporal_strength = data[1]; 6591c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_set_filter_param(s); 6601c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE: 6611c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 3, 6621c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0], data[1]); 6631c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil case CX2341X_ENC_SET_CORING_LEVELS: 6641c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_vapi(cx, CX18_CPU_SET_MEDIAN_CORING, 5, 6651c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil s->handle, data[0], data[1], data[2], data[3]); 6661c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil } 6671c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil CX18_WARN("Unknown cmd %x\n", cmd); 6681c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return 0; 6691c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil} 6701c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 6711c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilint cx18_vapi_result(struct cx18 *cx, u32 data[MAX_MB_ARGUMENTS], 6721c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil u32 cmd, int args, ...) 6731c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil{ 6741c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil va_list ap; 6751c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil int i; 6761c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 6771c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil va_start(ap, args); 6781c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil for (i = 0; i < args; i++) 6791c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil data[i] = va_arg(ap, u32); 6801c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil va_end(ap); 6811c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_api(cx, cmd, args, data); 6821c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil} 6831c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 6841c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuilint cx18_vapi(struct cx18 *cx, u32 cmd, int args, ...) 6851c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil{ 6861c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil u32 data[MAX_MB_ARGUMENTS]; 6871c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil va_list ap; 6881c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil int i; 6891c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil 6901c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil if (cx == NULL) { 6911c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil CX18_ERR("cx == NULL (cmd=%x)\n", cmd); 6921c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return 0; 6931c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil } 6941c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil if (args > MAX_MB_ARGUMENTS) { 6951c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil CX18_ERR("args too big (cmd=%x)\n", cmd); 6961c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil args = MAX_MB_ARGUMENTS; 6971c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil } 6981c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil va_start(ap, args); 6991c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil for (i = 0; i < args; i++) 7001c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil data[i] = va_arg(ap, u32); 7011c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil va_end(ap); 7021c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil return cx18_api(cx, cmd, args, data); 7031c1e45d17b663d4749af456ab7c2fc1f36405ef8Hans Verkuil} 704