em28xx-core.c revision 094f9b4b317b235b8d7fa03b356b9a3f3633b55b
1/* 2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices 3 4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> 5 Markus Rechberger <mrechberger@gmail.com> 6 Mauro Carvalho Chehab <mchehab@infradead.org> 7 Sascha Sommer <saschasommer@freenet.de> 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; if not, write to the Free Software 21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 */ 23 24#include <linux/init.h> 25#include <linux/list.h> 26#include <linux/module.h> 27#include <linux/usb.h> 28#include <linux/vmalloc.h> 29 30#include "em28xx.h" 31 32/* #define ENABLE_DEBUG_ISOC_FRAMES */ 33 34static unsigned int core_debug; 35module_param(core_debug,int,0644); 36MODULE_PARM_DESC(core_debug,"enable debug messages [core]"); 37 38#define em28xx_coredbg(fmt, arg...) do {\ 39 if (core_debug) \ 40 printk(KERN_INFO "%s %s :"fmt, \ 41 dev->name, __func__ , ##arg); } while (0) 42 43static unsigned int reg_debug; 44module_param(reg_debug,int,0644); 45MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]"); 46 47#define em28xx_regdbg(fmt, arg...) do {\ 48 if (reg_debug) \ 49 printk(KERN_INFO "%s %s :"fmt, \ 50 dev->name, __func__ , ##arg); } while (0) 51 52static int alt = EM28XX_PINOUT; 53module_param(alt, int, 0644); 54MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint"); 55 56/* FIXME */ 57#define em28xx_isocdbg(fmt, arg...) do {\ 58 if (core_debug) \ 59 printk(KERN_INFO "%s %s :"fmt, \ 60 dev->name, __func__ , ##arg); } while (0) 61 62/* 63 * em28xx_read_reg_req() 64 * reads data from the usb device specifying bRequest 65 */ 66int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, 67 char *buf, int len) 68{ 69 int ret, byte; 70 71 if (dev->state & DEV_DISCONNECTED) 72 return(-ENODEV); 73 74 em28xx_regdbg("req=%02x, reg=%02x ", req, reg); 75 76 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req, 77 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 78 0x0000, reg, buf, len, HZ); 79 80 if (reg_debug) { 81 printk(ret < 0 ? " failed!\n" : "%02x values: ", ret); 82 for (byte = 0; byte < len; byte++) 83 printk(" %02x", (unsigned char)buf[byte]); 84 85 printk("\n"); 86 } 87 88 return ret; 89} 90 91/* 92 * em28xx_read_reg_req() 93 * reads data from the usb device specifying bRequest 94 */ 95int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg) 96{ 97 u8 val; 98 int ret; 99 100 if (dev->state & DEV_DISCONNECTED) 101 return(-ENODEV); 102 103 em28xx_regdbg("req=%02x, reg=%02x:", req, reg); 104 105 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req, 106 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 107 0x0000, reg, &val, 1, HZ); 108 109 if (reg_debug) 110 printk(ret < 0 ? " failed!\n" : 111 "%02x\n", (unsigned char) val); 112 113 if (ret < 0) 114 return ret; 115 116 return val; 117} 118 119int em28xx_read_reg(struct em28xx *dev, u16 reg) 120{ 121 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg); 122} 123 124/* 125 * em28xx_write_regs_req() 126 * sends data to the usb device, specifying bRequest 127 */ 128int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, 129 int len) 130{ 131 int ret; 132 133 /*usb_control_msg seems to expect a kmalloced buffer */ 134 unsigned char *bufs; 135 136 if (dev->state & DEV_DISCONNECTED) 137 return -ENODEV; 138 139 if (len < 1) 140 return -EINVAL; 141 142 bufs = kmalloc(len, GFP_KERNEL); 143 144 em28xx_regdbg("req=%02x reg=%02x:", req, reg); 145 146 if (reg_debug) { 147 int i; 148 for (i = 0; i < len; ++i) 149 printk(" %02x", (unsigned char)buf[i]); 150 printk("\n"); 151 } 152 153 if (!bufs) 154 return -ENOMEM; 155 memcpy(bufs, buf, len); 156 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req, 157 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 158 0x0000, reg, bufs, len, HZ); 159 if (dev->wait_after_write) 160 msleep(dev->wait_after_write); 161 162 kfree(bufs); 163 return ret; 164} 165 166int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len) 167{ 168 int rc; 169 170 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len); 171 172 /* Stores GPO/GPIO values at the cache, if changed 173 Only write values should be stored, since input on a GPIO 174 register will return the input bits. 175 Not sure what happens on reading GPO register. 176 */ 177 if (rc >= 0) { 178 if (reg == EM2880_R04_GPO) 179 dev->reg_gpo = buf[0]; 180 else if (reg == EM28XX_R08_GPIO) 181 dev->reg_gpio = buf[0]; 182 } 183 184 return rc; 185} 186 187/* 188 * em28xx_write_reg_bits() 189 * sets only some bits (specified by bitmask) of a register, by first reading 190 * the actual value 191 */ 192static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, 193 u8 bitmask) 194{ 195 int oldval; 196 u8 newval; 197 198 /* Uses cache for gpo/gpio registers */ 199 if (reg == EM2880_R04_GPO) 200 oldval = dev->reg_gpo; 201 else if (reg == EM28XX_R08_GPIO) 202 oldval = dev->reg_gpio; 203 else 204 oldval = em28xx_read_reg(dev, reg); 205 206 if (oldval < 0) 207 return oldval; 208 209 newval = (((u8) oldval) & ~bitmask) | (val & bitmask); 210 211 return em28xx_write_regs(dev, reg, &newval, 1); 212} 213 214/* 215 * em28xx_write_ac97() 216 * write a 16 bit value to the specified AC97 address (LSB first!) 217 */ 218static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u8 *val) 219{ 220 int ret, i; 221 u8 addr = reg & 0x7f; 222 223 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, val, 2); 224 if (ret < 0) 225 return ret; 226 227 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 228 if (ret < 0) 229 return ret; 230 231 /* Wait up to 50 ms for AC97 command to complete */ 232 for (i = 0; i < 10; i++) { 233 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY); 234 if (ret < 0) 235 return ret; 236 237 if (!(ret & 0x01)) 238 return 0; 239 msleep(5); 240 } 241 em28xx_warn("AC97 command still being executed: not handled properly!\n"); 242 return 0; 243} 244 245static int em28xx_set_audio_source(struct em28xx *dev) 246{ 247 static char *enable = "\x08\x08"; 248 static char *disable = "\x08\x88"; 249 char *video = enable, *line = disable; 250 int ret; 251 u8 input; 252 253 if (dev->is_em2800) { 254 if (dev->ctl_ainput) 255 input = EM2800_AUDIO_SRC_LINE; 256 else 257 input = EM2800_AUDIO_SRC_TUNER; 258 259 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1); 260 if (ret < 0) 261 return ret; 262 } 263 264 if (dev->has_msp34xx) 265 input = EM28XX_AUDIO_SRC_TUNER; 266 else { 267 switch (dev->ctl_ainput) { 268 case EM28XX_AMUX_VIDEO: 269 input = EM28XX_AUDIO_SRC_TUNER; 270 break; 271 case EM28XX_AMUX_LINE_IN: 272 input = EM28XX_AUDIO_SRC_LINE; 273 break; 274 case EM28XX_AMUX_AC97_VIDEO: 275 input = EM28XX_AUDIO_SRC_LINE; 276 break; 277 case EM28XX_AMUX_AC97_LINE_IN: 278 input = EM28XX_AUDIO_SRC_LINE; 279 video = disable; 280 line = enable; 281 break; 282 } 283 } 284 285 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0); 286 if (ret < 0) 287 return ret; 288 msleep(5); 289 290 /* Sets AC97 mixer registers 291 This is seems to be needed, even for non-ac97 configs 292 */ 293 ret = em28xx_write_ac97(dev, EM28XX_R14_VIDEO_AC97, video); 294 if (ret < 0) 295 return ret; 296 297 ret = em28xx_write_ac97(dev, EM28XX_R10_LINE_IN_AC97, line); 298 299 return ret; 300} 301 302int em28xx_audio_analog_set(struct em28xx *dev) 303{ 304 int ret; 305 char s[2] = { 0x00, 0x00 }; 306 u8 xclk = 0x07; 307 308 s[0] |= 0x1f - dev->volume; 309 s[1] |= 0x1f - dev->volume; 310 311 /* Mute */ 312 s[1] |= 0x80; 313 ret = em28xx_write_ac97(dev, EM28XX_R02_MASTER_AC97, s); 314 315 if (ret < 0) 316 return ret; 317 318 if (dev->has_12mhz_i2s) 319 xclk |= 0x20; 320 321 if (!dev->mute) 322 xclk |= 0x80; 323 324 ret = em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, xclk, 0xa7); 325 if (ret < 0) 326 return ret; 327 msleep(10); 328 329 /* Selects the proper audio input */ 330 ret = em28xx_set_audio_source(dev); 331 332 /* Unmute device */ 333 if (!dev->mute) 334 s[1] &= ~0x80; 335 ret = em28xx_write_ac97(dev, EM28XX_R02_MASTER_AC97, s); 336 337 return ret; 338} 339EXPORT_SYMBOL_GPL(em28xx_audio_analog_set); 340 341int em28xx_colorlevels_set_default(struct em28xx *dev) 342{ 343 em28xx_write_regs(dev, EM28XX_R20_YGAIN, "\x10", 1); /* contrast */ 344 em28xx_write_regs(dev, EM28XX_R21_YOFFSET, "\x00", 1); /* brightness */ 345 em28xx_write_regs(dev, EM28XX_R22_UVGAIN, "\x10", 1); /* saturation */ 346 em28xx_write_regs(dev, EM28XX_R23_UOFFSET, "\x00", 1); 347 em28xx_write_regs(dev, EM28XX_R24_VOFFSET, "\x00", 1); 348 em28xx_write_regs(dev, EM28XX_R25_SHARPNESS, "\x00", 1); 349 350 em28xx_write_regs(dev, EM28XX_R14_GAMMA, "\x20", 1); 351 em28xx_write_regs(dev, EM28XX_R15_RGAIN, "\x20", 1); 352 em28xx_write_regs(dev, EM28XX_R16_GGAIN, "\x20", 1); 353 em28xx_write_regs(dev, EM28XX_R17_BGAIN, "\x20", 1); 354 em28xx_write_regs(dev, EM28XX_R18_ROFFSET, "\x00", 1); 355 em28xx_write_regs(dev, EM28XX_R19_GOFFSET, "\x00", 1); 356 return em28xx_write_regs(dev, EM28XX_R1A_BOFFSET, "\x00", 1); 357} 358 359int em28xx_capture_start(struct em28xx *dev, int start) 360{ 361 int rc; 362 /* FIXME: which is the best order? */ 363 /* video registers are sampled by VREF */ 364 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP, 365 start ? 0x10 : 0x00, 0x10); 366 if (rc < 0) 367 return rc; 368 369 if (!start) { 370 /* disable video capture */ 371 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x27", 1); 372 return rc; 373 } 374 375 /* enable video capture */ 376 rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1); 377 378 if (dev->mode == EM28XX_ANALOG_MODE) 379 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x67", 1); 380 else 381 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x37", 1); 382 383 msleep(6); 384 385 return rc; 386} 387 388int em28xx_outfmt_set_yuv422(struct em28xx *dev) 389{ 390 em28xx_write_regs(dev, EM28XX_R27_OUTFMT, "\x34", 1); 391 em28xx_write_regs(dev, EM28XX_R10_VINMODE, "\x10", 1); 392 return em28xx_write_regs(dev, EM28XX_R11_VINCTRL, "\x11", 1); 393} 394 395static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax, 396 u8 ymin, u8 ymax) 397{ 398 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n", 399 xmin, ymin, xmax, ymax); 400 401 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1); 402 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1); 403 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1); 404 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1); 405} 406 407static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart, 408 u16 width, u16 height) 409{ 410 u8 cwidth = width; 411 u8 cheight = height; 412 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01); 413 414 em28xx_coredbg("em28xx Area Set: (%d,%d)\n", 415 (width | (overflow & 2) << 7), 416 (height | (overflow & 1) << 8)); 417 418 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1); 419 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1); 420 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1); 421 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1); 422 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1); 423} 424 425static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v) 426{ 427 u8 mode; 428 /* the em2800 scaler only supports scaling down to 50% */ 429 if (dev->is_em2800) 430 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00); 431 else { 432 u8 buf[2]; 433 buf[0] = h; 434 buf[1] = h >> 8; 435 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2); 436 buf[0] = v; 437 buf[1] = v >> 8; 438 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2); 439 /* it seems that both H and V scalers must be active 440 to work correctly */ 441 mode = (h || v)? 0x30: 0x00; 442 } 443 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30); 444} 445 446/* FIXME: this only function read values from dev */ 447int em28xx_resolution_set(struct em28xx *dev) 448{ 449 int width, height; 450 width = norm_maxw(dev); 451 height = norm_maxh(dev) >> 1; 452 453 em28xx_outfmt_set_yuv422(dev); 454 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2); 455 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2); 456 return em28xx_scaler_set(dev, dev->hscale, dev->vscale); 457} 458 459int em28xx_set_alternate(struct em28xx *dev) 460{ 461 int errCode, prev_alt = dev->alt; 462 int i; 463 unsigned int min_pkt_size = dev->width * 2 + 4; 464 465 /* When image size is bigger than a certain value, 466 the frame size should be increased, otherwise, only 467 green screen will be received. 468 */ 469 if (dev->width * 2 * dev->height > 720 * 240 * 2) 470 min_pkt_size *= 2; 471 472 for (i = 0; i < dev->num_alt; i++) { 473 /* stop when the selected alt setting offers enough bandwidth */ 474 if (dev->alt_max_pkt_size[i] >= min_pkt_size) { 475 dev->alt = i; 476 break; 477 /* otherwise make sure that we end up with the maximum bandwidth 478 because the min_pkt_size equation might be wrong... 479 */ 480 } else if (dev->alt_max_pkt_size[i] > 481 dev->alt_max_pkt_size[dev->alt]) 482 dev->alt = i; 483 } 484 485 if (dev->alt != prev_alt) { 486 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n", 487 min_pkt_size, dev->alt); 488 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt]; 489 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n", 490 dev->alt, dev->max_pkt_size); 491 errCode = usb_set_interface(dev->udev, 0, dev->alt); 492 if (errCode < 0) { 493 em28xx_errdev("cannot change alternate number to %d (error=%i)\n", 494 dev->alt, errCode); 495 return errCode; 496 } 497 } 498 return 0; 499} 500 501int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio) 502{ 503 int rc = 0; 504 505 if (!gpio) 506 return rc; 507 508 dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1); 509 if (dev->mode == EM28XX_ANALOG_MODE) 510 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1); 511 else 512 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x37", 1); 513 msleep(6); 514 515 /* Send GPIO reset sequences specified at board entry */ 516 while (gpio->sleep >= 0) { 517 if (gpio->reg >= 0) { 518 rc = em28xx_write_reg_bits(dev, 519 gpio->reg, 520 gpio->val, 521 gpio->mask); 522 if (rc < 0) 523 return rc; 524 } 525 if (gpio->sleep > 0) 526 msleep(gpio->sleep); 527 528 gpio++; 529 } 530 return rc; 531} 532 533int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode) 534{ 535 if (dev->mode == set_mode) 536 return 0; 537 538 if (set_mode == EM28XX_MODE_UNDEFINED) { 539 dev->mode = set_mode; 540 return 0; 541 } 542 543 dev->mode = set_mode; 544 545 if (dev->mode == EM28XX_DIGITAL_MODE) 546 return em28xx_gpio_set(dev, dev->digital_gpio); 547 else 548 return em28xx_gpio_set(dev, dev->analog_gpio); 549} 550EXPORT_SYMBOL_GPL(em28xx_set_mode); 551 552/* ------------------------------------------------------------------ 553 URB control 554 ------------------------------------------------------------------*/ 555 556/* 557 * IRQ callback, called by URB callback 558 */ 559static void em28xx_irq_callback(struct urb *urb) 560{ 561 struct em28xx_dmaqueue *dma_q = urb->context; 562 struct em28xx *dev = container_of(dma_q, struct em28xx, vidq); 563 int rc, i; 564 565 /* Copy data from URB */ 566 spin_lock(&dev->slock); 567 rc = dev->isoc_ctl.isoc_copy(dev, urb); 568 spin_unlock(&dev->slock); 569 570 /* Reset urb buffers */ 571 for (i = 0; i < urb->number_of_packets; i++) { 572 urb->iso_frame_desc[i].status = 0; 573 urb->iso_frame_desc[i].actual_length = 0; 574 } 575 urb->status = 0; 576 577 urb->status = usb_submit_urb(urb, GFP_ATOMIC); 578 if (urb->status) { 579 em28xx_isocdbg("urb resubmit failed (error=%i)\n", 580 urb->status); 581 } 582} 583 584/* 585 * Stop and Deallocate URBs 586 */ 587void em28xx_uninit_isoc(struct em28xx *dev) 588{ 589 struct urb *urb; 590 int i; 591 592 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n"); 593 594 dev->isoc_ctl.nfields = -1; 595 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { 596 urb = dev->isoc_ctl.urb[i]; 597 if (urb) { 598 usb_kill_urb(urb); 599 usb_unlink_urb(urb); 600 if (dev->isoc_ctl.transfer_buffer[i]) { 601 usb_buffer_free(dev->udev, 602 urb->transfer_buffer_length, 603 dev->isoc_ctl.transfer_buffer[i], 604 urb->transfer_dma); 605 } 606 usb_free_urb(urb); 607 dev->isoc_ctl.urb[i] = NULL; 608 } 609 dev->isoc_ctl.transfer_buffer[i] = NULL; 610 } 611 612 kfree(dev->isoc_ctl.urb); 613 kfree(dev->isoc_ctl.transfer_buffer); 614 615 dev->isoc_ctl.urb = NULL; 616 dev->isoc_ctl.transfer_buffer = NULL; 617 dev->isoc_ctl.num_bufs = 0; 618 619 em28xx_capture_start(dev, 0); 620} 621EXPORT_SYMBOL_GPL(em28xx_uninit_isoc); 622 623/* 624 * Allocate URBs and start IRQ 625 */ 626int em28xx_init_isoc(struct em28xx *dev, int max_packets, 627 int num_bufs, int max_pkt_size, 628 int (*isoc_copy) (struct em28xx *dev, struct urb *urb)) 629{ 630 struct em28xx_dmaqueue *dma_q = &dev->vidq; 631 int i; 632 int sb_size, pipe; 633 struct urb *urb; 634 int j, k; 635 int rc; 636 637 em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n"); 638 639 /* De-allocates all pending stuff */ 640 em28xx_uninit_isoc(dev); 641 642 dev->isoc_ctl.isoc_copy = isoc_copy; 643 dev->isoc_ctl.num_bufs = num_bufs; 644 645 dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL); 646 if (!dev->isoc_ctl.urb) { 647 em28xx_errdev("cannot alloc memory for usb buffers\n"); 648 return -ENOMEM; 649 } 650 651 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs, 652 GFP_KERNEL); 653 if (!dev->isoc_ctl.transfer_buffer) { 654 em28xx_errdev("cannot allocate memory for usbtransfer\n"); 655 kfree(dev->isoc_ctl.urb); 656 return -ENOMEM; 657 } 658 659 dev->isoc_ctl.max_pkt_size = max_pkt_size; 660 dev->isoc_ctl.buf = NULL; 661 662 sb_size = max_packets * dev->isoc_ctl.max_pkt_size; 663 664 /* allocate urbs and transfer buffers */ 665 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { 666 urb = usb_alloc_urb(max_packets, GFP_KERNEL); 667 if (!urb) { 668 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i); 669 em28xx_uninit_isoc(dev); 670 return -ENOMEM; 671 } 672 dev->isoc_ctl.urb[i] = urb; 673 674 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev, 675 sb_size, GFP_KERNEL, &urb->transfer_dma); 676 if (!dev->isoc_ctl.transfer_buffer[i]) { 677 em28xx_err("unable to allocate %i bytes for transfer" 678 " buffer %i%s\n", 679 sb_size, i, 680 in_interrupt()?" while in int":""); 681 em28xx_uninit_isoc(dev); 682 return -ENOMEM; 683 } 684 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size); 685 686 /* FIXME: this is a hack - should be 687 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK' 688 should also be using 'desc.bInterval' 689 */ 690 pipe = usb_rcvisocpipe(dev->udev, 691 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84); 692 693 usb_fill_int_urb(urb, dev->udev, pipe, 694 dev->isoc_ctl.transfer_buffer[i], sb_size, 695 em28xx_irq_callback, dma_q, 1); 696 697 urb->number_of_packets = max_packets; 698 urb->transfer_flags = URB_ISO_ASAP; 699 700 k = 0; 701 for (j = 0; j < max_packets; j++) { 702 urb->iso_frame_desc[j].offset = k; 703 urb->iso_frame_desc[j].length = 704 dev->isoc_ctl.max_pkt_size; 705 k += dev->isoc_ctl.max_pkt_size; 706 } 707 } 708 709 init_waitqueue_head(&dma_q->wq); 710 711 em28xx_capture_start(dev, 1); 712 713 /* submit urbs and enables IRQ */ 714 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { 715 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC); 716 if (rc) { 717 em28xx_err("submit of urb %i failed (error=%i)\n", i, 718 rc); 719 em28xx_uninit_isoc(dev); 720 return rc; 721 } 722 } 723 724 return 0; 725} 726EXPORT_SYMBOL_GPL(em28xx_init_isoc); 727