mx3_camera.c revision 760697beca338599a65484389c7abbe54aedb664
1/* 2 * V4L2 Driver for i.MX3x camera host 3 * 4 * Copyright (C) 2008 5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12#include <linux/init.h> 13#include <linux/module.h> 14#include <linux/version.h> 15#include <linux/videodev2.h> 16#include <linux/platform_device.h> 17#include <linux/clk.h> 18#include <linux/vmalloc.h> 19#include <linux/interrupt.h> 20#include <linux/sched.h> 21 22#include <media/v4l2-common.h> 23#include <media/v4l2-dev.h> 24#include <media/videobuf-dma-contig.h> 25#include <media/soc_camera.h> 26#include <media/soc_mediabus.h> 27 28#include <mach/ipu.h> 29#include <mach/mx3_camera.h> 30 31#define MX3_CAM_DRV_NAME "mx3-camera" 32 33/* CMOS Sensor Interface Registers */ 34#define CSI_REG_START 0x60 35 36#define CSI_SENS_CONF (0x60 - CSI_REG_START) 37#define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START) 38#define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START) 39#define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START) 40#define CSI_TST_CTRL (0x70 - CSI_REG_START) 41#define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START) 42#define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START) 43#define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START) 44#define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START) 45#define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START) 46 47#define CSI_SENS_CONF_VSYNC_POL_SHIFT 0 48#define CSI_SENS_CONF_HSYNC_POL_SHIFT 1 49#define CSI_SENS_CONF_DATA_POL_SHIFT 2 50#define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3 51#define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4 52#define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7 53#define CSI_SENS_CONF_DATA_FMT_SHIFT 8 54#define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10 55#define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15 56#define CSI_SENS_CONF_DIVRATIO_SHIFT 16 57 58#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT) 59#define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT) 60#define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT) 61 62#define MAX_VIDEO_MEM 16 63 64struct mx3_camera_buffer { 65 /* common v4l buffer stuff -- must be first */ 66 struct videobuf_buffer vb; 67 enum v4l2_mbus_pixelcode code; 68 69 /* One descriptot per scatterlist (per frame) */ 70 struct dma_async_tx_descriptor *txd; 71 72 /* We have to "build" a scatterlist ourselves - one element per frame */ 73 struct scatterlist sg; 74}; 75 76/** 77 * struct mx3_camera_dev - i.MX3x camera (CSI) object 78 * @dev: camera device, to which the coherent buffer is attached 79 * @icd: currently attached camera sensor 80 * @clk: pointer to clock 81 * @base: remapped register base address 82 * @pdata: platform data 83 * @platform_flags: platform flags 84 * @mclk: master clock frequency in Hz 85 * @capture: list of capture videobuffers 86 * @lock: protects video buffer lists 87 * @active: active video buffer 88 * @idmac_channel: array of pointers to IPU DMAC DMA channels 89 * @soc_host: embedded soc_host object 90 */ 91struct mx3_camera_dev { 92 /* 93 * i.MX3x is only supposed to handle one camera on its Camera Sensor 94 * Interface. If anyone ever builds hardware to enable more than one 95 * camera _simultaneously_, they will have to modify this driver too 96 */ 97 struct soc_camera_device *icd; 98 struct clk *clk; 99 100 void __iomem *base; 101 102 struct mx3_camera_pdata *pdata; 103 104 unsigned long platform_flags; 105 unsigned long mclk; 106 107 struct list_head capture; 108 spinlock_t lock; /* Protects video buffer lists */ 109 struct mx3_camera_buffer *active; 110 111 /* IDMAC / dmaengine interface */ 112 struct idmac_channel *idmac_channel[1]; /* We need one channel */ 113 114 struct soc_camera_host soc_host; 115}; 116 117struct dma_chan_request { 118 struct mx3_camera_dev *mx3_cam; 119 enum ipu_channel id; 120}; 121 122static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg) 123{ 124 return __raw_readl(mx3->base + reg); 125} 126 127static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg) 128{ 129 __raw_writel(value, mx3->base + reg); 130} 131 132/* Called from the IPU IDMAC ISR */ 133static void mx3_cam_dma_done(void *arg) 134{ 135 struct idmac_tx_desc *desc = to_tx_desc(arg); 136 struct dma_chan *chan = desc->txd.chan; 137 struct idmac_channel *ichannel = to_idmac_chan(chan); 138 struct mx3_camera_dev *mx3_cam = ichannel->client; 139 struct videobuf_buffer *vb; 140 141 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n", 142 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0); 143 144 spin_lock(&mx3_cam->lock); 145 if (mx3_cam->active) { 146 vb = &mx3_cam->active->vb; 147 148 list_del_init(&vb->queue); 149 vb->state = VIDEOBUF_DONE; 150 do_gettimeofday(&vb->ts); 151 vb->field_count++; 152 wake_up(&vb->done); 153 } 154 155 if (list_empty(&mx3_cam->capture)) { 156 mx3_cam->active = NULL; 157 spin_unlock(&mx3_cam->lock); 158 159 /* 160 * stop capture - without further buffers IPU_CHA_BUF0_RDY will 161 * not get updated 162 */ 163 return; 164 } 165 166 mx3_cam->active = list_entry(mx3_cam->capture.next, 167 struct mx3_camera_buffer, vb.queue); 168 mx3_cam->active->vb.state = VIDEOBUF_ACTIVE; 169 spin_unlock(&mx3_cam->lock); 170} 171 172static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf) 173{ 174 struct soc_camera_device *icd = vq->priv_data; 175 struct videobuf_buffer *vb = &buf->vb; 176 struct dma_async_tx_descriptor *txd = buf->txd; 177 struct idmac_channel *ichan; 178 179 BUG_ON(in_interrupt()); 180 181 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, 182 vb, vb->baddr, vb->bsize); 183 184 /* 185 * This waits until this buffer is out of danger, i.e., until it is no 186 * longer in STATE_QUEUED or STATE_ACTIVE 187 */ 188 videobuf_waiton(vb, 0, 0); 189 if (txd) { 190 ichan = to_idmac_chan(txd->chan); 191 async_tx_ack(txd); 192 } 193 videobuf_dma_contig_free(vq, vb); 194 buf->txd = NULL; 195 196 vb->state = VIDEOBUF_NEEDS_INIT; 197} 198 199/* 200 * Videobuf operations 201 */ 202 203/* 204 * Calculate the __buffer__ (not data) size and number of buffers. 205 * Called with .vb_lock held 206 */ 207static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count, 208 unsigned int *size) 209{ 210 struct soc_camera_device *icd = vq->priv_data; 211 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 212 struct mx3_camera_dev *mx3_cam = ici->priv; 213 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, 214 icd->current_fmt->host_fmt); 215 216 if (bytes_per_line < 0) 217 return bytes_per_line; 218 219 if (!mx3_cam->idmac_channel[0]) 220 return -EINVAL; 221 222 *size = bytes_per_line * icd->user_height; 223 224 if (!*count) 225 *count = 32; 226 227 if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024) 228 *count = MAX_VIDEO_MEM * 1024 * 1024 / *size; 229 230 return 0; 231} 232 233/* Called with .vb_lock held */ 234static int mx3_videobuf_prepare(struct videobuf_queue *vq, 235 struct videobuf_buffer *vb, enum v4l2_field field) 236{ 237 struct soc_camera_device *icd = vq->priv_data; 238 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 239 struct mx3_camera_dev *mx3_cam = ici->priv; 240 struct mx3_camera_buffer *buf = 241 container_of(vb, struct mx3_camera_buffer, vb); 242 size_t new_size; 243 int ret; 244 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, 245 icd->current_fmt->host_fmt); 246 247 if (bytes_per_line < 0) 248 return bytes_per_line; 249 250 new_size = bytes_per_line * icd->user_height; 251 252 /* 253 * I think, in buf_prepare you only have to protect global data, 254 * the actual buffer is yours 255 */ 256 257 if (buf->code != icd->current_fmt->code || 258 vb->width != icd->user_width || 259 vb->height != icd->user_height || 260 vb->field != field) { 261 buf->code = icd->current_fmt->code; 262 vb->width = icd->user_width; 263 vb->height = icd->user_height; 264 vb->field = field; 265 if (vb->state != VIDEOBUF_NEEDS_INIT) 266 free_buffer(vq, buf); 267 } 268 269 if (vb->baddr && vb->bsize < new_size) { 270 /* User provided buffer, but it is too small */ 271 ret = -ENOMEM; 272 goto out; 273 } 274 275 if (vb->state == VIDEOBUF_NEEDS_INIT) { 276 struct idmac_channel *ichan = mx3_cam->idmac_channel[0]; 277 struct scatterlist *sg = &buf->sg; 278 279 /* 280 * The total size of video-buffers that will be allocated / mapped. 281 * *size that we calculated in videobuf_setup gets assigned to 282 * vb->bsize, and now we use the same calculation to get vb->size. 283 */ 284 vb->size = new_size; 285 286 /* This actually (allocates and) maps buffers */ 287 ret = videobuf_iolock(vq, vb, NULL); 288 if (ret) 289 goto fail; 290 291 /* 292 * We will have to configure the IDMAC channel. It has two slots 293 * for DMA buffers, we shall enter the first two buffers there, 294 * and then submit new buffers in DMA-ready interrupts 295 */ 296 sg_init_table(sg, 1); 297 sg_dma_address(sg) = videobuf_to_dma_contig(vb); 298 sg_dma_len(sg) = vb->size; 299 300 buf->txd = ichan->dma_chan.device->device_prep_slave_sg( 301 &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE, 302 DMA_PREP_INTERRUPT); 303 if (!buf->txd) { 304 ret = -EIO; 305 goto fail; 306 } 307 308 buf->txd->callback_param = buf->txd; 309 buf->txd->callback = mx3_cam_dma_done; 310 311 vb->state = VIDEOBUF_PREPARED; 312 } 313 314 return 0; 315 316fail: 317 free_buffer(vq, buf); 318out: 319 return ret; 320} 321 322static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc) 323{ 324 /* Add more formats as need arises and test possibilities appear... */ 325 switch (fourcc) { 326 case V4L2_PIX_FMT_RGB565: 327 return IPU_PIX_FMT_RGB565; 328 case V4L2_PIX_FMT_RGB24: 329 return IPU_PIX_FMT_RGB24; 330 case V4L2_PIX_FMT_RGB332: 331 return IPU_PIX_FMT_RGB332; 332 case V4L2_PIX_FMT_YUV422P: 333 return IPU_PIX_FMT_YVU422P; 334 default: 335 return IPU_PIX_FMT_GENERIC; 336 } 337} 338 339/* 340 * Called with .vb_lock mutex held and 341 * under spinlock_irqsave(&mx3_cam->lock, ...) 342 */ 343static void mx3_videobuf_queue(struct videobuf_queue *vq, 344 struct videobuf_buffer *vb) 345{ 346 struct soc_camera_device *icd = vq->priv_data; 347 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 348 struct mx3_camera_dev *mx3_cam = ici->priv; 349 struct mx3_camera_buffer *buf = 350 container_of(vb, struct mx3_camera_buffer, vb); 351 struct dma_async_tx_descriptor *txd = buf->txd; 352 struct idmac_channel *ichan = to_idmac_chan(txd->chan); 353 struct idmac_video_param *video = &ichan->params.video; 354 dma_cookie_t cookie; 355 u32 fourcc = icd->current_fmt->host_fmt->fourcc; 356 357 BUG_ON(!irqs_disabled()); 358 359 /* This is the configuration of one sg-element */ 360 video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc); 361 video->out_width = icd->user_width; 362 video->out_height = icd->user_height; 363 video->out_stride = icd->user_width; 364 365#ifdef DEBUG 366 /* helps to see what DMA actually has written */ 367 memset((void *)vb->baddr, 0xaa, vb->bsize); 368#endif 369 370 list_add_tail(&vb->queue, &mx3_cam->capture); 371 372 if (!mx3_cam->active) { 373 mx3_cam->active = buf; 374 vb->state = VIDEOBUF_ACTIVE; 375 } else { 376 vb->state = VIDEOBUF_QUEUED; 377 } 378 379 spin_unlock_irq(&mx3_cam->lock); 380 381 cookie = txd->tx_submit(txd); 382 dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n", 383 cookie, sg_dma_address(&buf->sg)); 384 385 spin_lock_irq(&mx3_cam->lock); 386 387 if (cookie >= 0) 388 return; 389 390 /* Submit error */ 391 vb->state = VIDEOBUF_PREPARED; 392 393 list_del_init(&vb->queue); 394 395 if (mx3_cam->active == buf) 396 mx3_cam->active = NULL; 397} 398 399/* Called with .vb_lock held */ 400static void mx3_videobuf_release(struct videobuf_queue *vq, 401 struct videobuf_buffer *vb) 402{ 403 struct soc_camera_device *icd = vq->priv_data; 404 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 405 struct mx3_camera_dev *mx3_cam = ici->priv; 406 struct mx3_camera_buffer *buf = 407 container_of(vb, struct mx3_camera_buffer, vb); 408 unsigned long flags; 409 410 dev_dbg(icd->dev.parent, 411 "Release%s DMA 0x%08x (state %d), queue %sempty\n", 412 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg), 413 vb->state, list_empty(&vb->queue) ? "" : "not "); 414 spin_lock_irqsave(&mx3_cam->lock, flags); 415 if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) && 416 !list_empty(&vb->queue)) { 417 vb->state = VIDEOBUF_ERROR; 418 419 list_del_init(&vb->queue); 420 if (mx3_cam->active == buf) 421 mx3_cam->active = NULL; 422 } 423 spin_unlock_irqrestore(&mx3_cam->lock, flags); 424 free_buffer(vq, buf); 425} 426 427static struct videobuf_queue_ops mx3_videobuf_ops = { 428 .buf_setup = mx3_videobuf_setup, 429 .buf_prepare = mx3_videobuf_prepare, 430 .buf_queue = mx3_videobuf_queue, 431 .buf_release = mx3_videobuf_release, 432}; 433 434static void mx3_camera_init_videobuf(struct videobuf_queue *q, 435 struct soc_camera_device *icd) 436{ 437 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 438 struct mx3_camera_dev *mx3_cam = ici->priv; 439 440 videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, icd->dev.parent, 441 &mx3_cam->lock, 442 V4L2_BUF_TYPE_VIDEO_CAPTURE, 443 V4L2_FIELD_NONE, 444 sizeof(struct mx3_camera_buffer), icd); 445} 446 447/* First part of ipu_csi_init_interface() */ 448static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam, 449 struct soc_camera_device *icd) 450{ 451 u32 conf; 452 long rate; 453 454 /* Set default size: ipu_csi_set_window_size() */ 455 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE); 456 /* ...and position to 0:0: ipu_csi_set_window_pos() */ 457 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000; 458 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL); 459 460 /* We use only gated clock synchronisation mode so far */ 461 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT; 462 463 /* Set generic data, platform-biggest bus-width */ 464 conf |= CSI_SENS_CONF_DATA_FMT_BAYER; 465 466 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15) 467 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 468 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10) 469 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 470 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8) 471 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 472 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/ 473 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 474 475 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC) 476 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT; 477 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC) 478 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT; 479 if (mx3_cam->platform_flags & MX3_CAMERA_DP) 480 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT; 481 if (mx3_cam->platform_flags & MX3_CAMERA_PCP) 482 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT; 483 if (mx3_cam->platform_flags & MX3_CAMERA_HSP) 484 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT; 485 if (mx3_cam->platform_flags & MX3_CAMERA_VSP) 486 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT; 487 488 /* ipu_csi_init_interface() */ 489 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF); 490 491 clk_enable(mx3_cam->clk); 492 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk); 493 dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate); 494 if (rate) 495 clk_set_rate(mx3_cam->clk, rate); 496} 497 498/* Called with .video_lock held */ 499static int mx3_camera_add_device(struct soc_camera_device *icd) 500{ 501 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 502 struct mx3_camera_dev *mx3_cam = ici->priv; 503 504 if (mx3_cam->icd) 505 return -EBUSY; 506 507 mx3_camera_activate(mx3_cam, icd); 508 509 mx3_cam->icd = icd; 510 511 dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n", 512 icd->devnum); 513 514 return 0; 515} 516 517/* Called with .video_lock held */ 518static void mx3_camera_remove_device(struct soc_camera_device *icd) 519{ 520 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 521 struct mx3_camera_dev *mx3_cam = ici->priv; 522 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0]; 523 524 BUG_ON(icd != mx3_cam->icd); 525 526 if (*ichan) { 527 dma_release_channel(&(*ichan)->dma_chan); 528 *ichan = NULL; 529 } 530 531 clk_disable(mx3_cam->clk); 532 533 mx3_cam->icd = NULL; 534 535 dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n", 536 icd->devnum); 537} 538 539static bool channel_change_requested(struct soc_camera_device *icd, 540 struct v4l2_rect *rect) 541{ 542 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 543 struct mx3_camera_dev *mx3_cam = ici->priv; 544 struct idmac_channel *ichan = mx3_cam->idmac_channel[0]; 545 546 /* Do buffers have to be re-allocated or channel re-configured? */ 547 return ichan && rect->width * rect->height > 548 icd->user_width * icd->user_height; 549} 550 551static int test_platform_param(struct mx3_camera_dev *mx3_cam, 552 unsigned char buswidth, unsigned long *flags) 553{ 554 /* 555 * Platform specified synchronization and pixel clock polarities are 556 * only a recommendation and are only used during probing. MX3x 557 * camera interface only works in master mode, i.e., uses HSYNC and 558 * VSYNC signals from the sensor 559 */ 560 *flags = SOCAM_MASTER | 561 SOCAM_HSYNC_ACTIVE_HIGH | 562 SOCAM_HSYNC_ACTIVE_LOW | 563 SOCAM_VSYNC_ACTIVE_HIGH | 564 SOCAM_VSYNC_ACTIVE_LOW | 565 SOCAM_PCLK_SAMPLE_RISING | 566 SOCAM_PCLK_SAMPLE_FALLING | 567 SOCAM_DATA_ACTIVE_HIGH | 568 SOCAM_DATA_ACTIVE_LOW; 569 570 /* 571 * If requested data width is supported by the platform, use it or any 572 * possible lower value - i.MX31 is smart enough to schift bits 573 */ 574 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15) 575 *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 | 576 SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4; 577 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10) 578 *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 | 579 SOCAM_DATAWIDTH_4; 580 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8) 581 *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4; 582 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4) 583 *flags |= SOCAM_DATAWIDTH_4; 584 585 switch (buswidth) { 586 case 15: 587 if (!(*flags & SOCAM_DATAWIDTH_15)) 588 return -EINVAL; 589 break; 590 case 10: 591 if (!(*flags & SOCAM_DATAWIDTH_10)) 592 return -EINVAL; 593 break; 594 case 8: 595 if (!(*flags & SOCAM_DATAWIDTH_8)) 596 return -EINVAL; 597 break; 598 case 4: 599 if (!(*flags & SOCAM_DATAWIDTH_4)) 600 return -EINVAL; 601 break; 602 default: 603 dev_warn(mx3_cam->soc_host.v4l2_dev.dev, 604 "Unsupported bus width %d\n", buswidth); 605 return -EINVAL; 606 } 607 608 return 0; 609} 610 611static int mx3_camera_try_bus_param(struct soc_camera_device *icd, 612 const unsigned int depth) 613{ 614 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 615 struct mx3_camera_dev *mx3_cam = ici->priv; 616 unsigned long bus_flags, camera_flags; 617 int ret = test_platform_param(mx3_cam, depth, &bus_flags); 618 619 dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret); 620 621 if (ret < 0) 622 return ret; 623 624 camera_flags = icd->ops->query_bus_param(icd); 625 626 ret = soc_camera_bus_param_compatible(camera_flags, bus_flags); 627 if (ret < 0) 628 dev_warn(icd->dev.parent, 629 "Flags incompatible: camera %lx, host %lx\n", 630 camera_flags, bus_flags); 631 632 return ret; 633} 634 635static bool chan_filter(struct dma_chan *chan, void *arg) 636{ 637 struct dma_chan_request *rq = arg; 638 struct mx3_camera_pdata *pdata; 639 640 if (!rq) 641 return false; 642 643 pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data; 644 645 return rq->id == chan->chan_id && 646 pdata->dma_dev == chan->device->dev; 647} 648 649static const struct soc_mbus_pixelfmt mx3_camera_formats[] = { 650 { 651 .fourcc = V4L2_PIX_FMT_SBGGR8, 652 .name = "Bayer BGGR (sRGB) 8 bit", 653 .bits_per_sample = 8, 654 .packing = SOC_MBUS_PACKING_NONE, 655 .order = SOC_MBUS_ORDER_LE, 656 }, { 657 .fourcc = V4L2_PIX_FMT_GREY, 658 .name = "Monochrome 8 bit", 659 .bits_per_sample = 8, 660 .packing = SOC_MBUS_PACKING_NONE, 661 .order = SOC_MBUS_ORDER_LE, 662 }, 663}; 664 665/* This will be corrected as we get more formats */ 666static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt) 667{ 668 return fmt->packing == SOC_MBUS_PACKING_NONE || 669 (fmt->bits_per_sample == 8 && 670 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) || 671 (fmt->bits_per_sample > 8 && 672 fmt->packing == SOC_MBUS_PACKING_EXTEND16); 673} 674 675static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx, 676 struct soc_camera_format_xlate *xlate) 677{ 678 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 679 struct device *dev = icd->dev.parent; 680 int formats = 0, ret; 681 enum v4l2_mbus_pixelcode code; 682 const struct soc_mbus_pixelfmt *fmt; 683 684 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); 685 if (ret < 0) 686 /* No more formats */ 687 return 0; 688 689 fmt = soc_mbus_get_fmtdesc(code); 690 if (!fmt) { 691 dev_err(icd->dev.parent, 692 "Invalid format code #%d: %d\n", idx, code); 693 return 0; 694 } 695 696 /* This also checks support for the requested bits-per-sample */ 697 ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample); 698 if (ret < 0) 699 return 0; 700 701 switch (code) { 702 case V4L2_MBUS_FMT_SBGGR10_1X10: 703 formats++; 704 if (xlate) { 705 xlate->host_fmt = &mx3_camera_formats[0]; 706 xlate->code = code; 707 xlate++; 708 dev_dbg(dev, "Providing format %s using code %d\n", 709 mx3_camera_formats[0].name, code); 710 } 711 break; 712 case V4L2_MBUS_FMT_Y10_1X10: 713 formats++; 714 if (xlate) { 715 xlate->host_fmt = &mx3_camera_formats[1]; 716 xlate->code = code; 717 xlate++; 718 dev_dbg(dev, "Providing format %s using code %d\n", 719 mx3_camera_formats[1].name, code); 720 } 721 break; 722 default: 723 if (!mx3_camera_packing_supported(fmt)) 724 return 0; 725 } 726 727 /* Generic pass-through */ 728 formats++; 729 if (xlate) { 730 xlate->host_fmt = fmt; 731 xlate->code = code; 732 xlate++; 733 dev_dbg(dev, "Providing format %x in pass-through mode\n", 734 xlate->host_fmt->fourcc); 735 } 736 737 return formats; 738} 739 740static void configure_geometry(struct mx3_camera_dev *mx3_cam, 741 unsigned int width, unsigned int height) 742{ 743 u32 ctrl, width_field, height_field; 744 745 /* Setup frame size - this cannot be changed on-the-fly... */ 746 width_field = width - 1; 747 height_field = height - 1; 748 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE); 749 750 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1); 751 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2); 752 753 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE); 754 755 /* ...and position */ 756 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000; 757 /* Sensor does the cropping */ 758 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL); 759} 760 761static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam) 762{ 763 dma_cap_mask_t mask; 764 struct dma_chan *chan; 765 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0]; 766 /* We have to use IDMAC_IC_7 for Bayer / generic data */ 767 struct dma_chan_request rq = {.mx3_cam = mx3_cam, 768 .id = IDMAC_IC_7}; 769 770 if (*ichan) { 771 struct videobuf_buffer *vb, *_vb; 772 dma_release_channel(&(*ichan)->dma_chan); 773 *ichan = NULL; 774 mx3_cam->active = NULL; 775 list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) { 776 list_del_init(&vb->queue); 777 vb->state = VIDEOBUF_ERROR; 778 wake_up(&vb->done); 779 } 780 } 781 782 dma_cap_zero(mask); 783 dma_cap_set(DMA_SLAVE, mask); 784 dma_cap_set(DMA_PRIVATE, mask); 785 chan = dma_request_channel(mask, chan_filter, &rq); 786 if (!chan) 787 return -EBUSY; 788 789 *ichan = to_idmac_chan(chan); 790 (*ichan)->client = mx3_cam; 791 792 return 0; 793} 794 795/* 796 * FIXME: learn to use stride != width, then we can keep stride properly aligned 797 * and support arbitrary (even) widths. 798 */ 799static inline void stride_align(__s32 *width) 800{ 801 if (((*width + 7) & ~7) < 4096) 802 *width = (*width + 7) & ~7; 803 else 804 *width = *width & ~7; 805} 806 807/* 808 * As long as we don't implement host-side cropping and scaling, we can use 809 * default g_crop and cropcap from soc_camera.c 810 */ 811static int mx3_camera_set_crop(struct soc_camera_device *icd, 812 struct v4l2_crop *a) 813{ 814 struct v4l2_rect *rect = &a->c; 815 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 816 struct mx3_camera_dev *mx3_cam = ici->priv; 817 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 818 struct v4l2_mbus_framefmt mf; 819 int ret; 820 821 soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096); 822 soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096); 823 824 ret = v4l2_subdev_call(sd, video, s_crop, a); 825 if (ret < 0) 826 return ret; 827 828 /* The capture device might have changed its output */ 829 ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf); 830 if (ret < 0) 831 return ret; 832 833 if (mf.width & 7) { 834 /* Ouch! We can only handle 8-byte aligned width... */ 835 stride_align(&mf.width); 836 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); 837 if (ret < 0) 838 return ret; 839 } 840 841 if (mf.width != icd->user_width || mf.height != icd->user_height) { 842 /* 843 * We now know pixel formats and can decide upon DMA-channel(s) 844 * So far only direct camera-to-memory is supported 845 */ 846 if (channel_change_requested(icd, rect)) { 847 int ret = acquire_dma_channel(mx3_cam); 848 if (ret < 0) 849 return ret; 850 } 851 852 configure_geometry(mx3_cam, mf.width, mf.height); 853 } 854 855 dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n", 856 mf.width, mf.height); 857 858 icd->user_width = mf.width; 859 icd->user_height = mf.height; 860 861 return ret; 862} 863 864static int mx3_camera_set_fmt(struct soc_camera_device *icd, 865 struct v4l2_format *f) 866{ 867 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 868 struct mx3_camera_dev *mx3_cam = ici->priv; 869 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 870 const struct soc_camera_format_xlate *xlate; 871 struct v4l2_pix_format *pix = &f->fmt.pix; 872 struct v4l2_mbus_framefmt mf; 873 int ret; 874 875 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); 876 if (!xlate) { 877 dev_warn(icd->dev.parent, "Format %x not found\n", 878 pix->pixelformat); 879 return -EINVAL; 880 } 881 882 stride_align(&pix->width); 883 dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height); 884 885 ret = acquire_dma_channel(mx3_cam); 886 if (ret < 0) 887 return ret; 888 889 /* 890 * Might have to perform a complete interface initialisation like in 891 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider 892 * mxc_v4l2_s_fmt() 893 */ 894 895 configure_geometry(mx3_cam, pix->width, pix->height); 896 897 mf.width = pix->width; 898 mf.height = pix->height; 899 mf.field = pix->field; 900 mf.colorspace = pix->colorspace; 901 mf.code = xlate->code; 902 903 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); 904 if (ret < 0) 905 return ret; 906 907 if (mf.code != xlate->code) 908 return -EINVAL; 909 910 pix->width = mf.width; 911 pix->height = mf.height; 912 pix->field = mf.field; 913 pix->colorspace = mf.colorspace; 914 icd->current_fmt = xlate; 915 916 dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height); 917 918 return ret; 919} 920 921static int mx3_camera_try_fmt(struct soc_camera_device *icd, 922 struct v4l2_format *f) 923{ 924 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 925 const struct soc_camera_format_xlate *xlate; 926 struct v4l2_pix_format *pix = &f->fmt.pix; 927 struct v4l2_mbus_framefmt mf; 928 __u32 pixfmt = pix->pixelformat; 929 int ret; 930 931 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); 932 if (pixfmt && !xlate) { 933 dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt); 934 return -EINVAL; 935 } 936 937 /* limit to MX3 hardware capabilities */ 938 if (pix->height > 4096) 939 pix->height = 4096; 940 if (pix->width > 4096) 941 pix->width = 4096; 942 943 pix->bytesperline = soc_mbus_bytes_per_line(pix->width, 944 xlate->host_fmt); 945 if (pix->bytesperline < 0) 946 return pix->bytesperline; 947 pix->sizeimage = pix->height * pix->bytesperline; 948 949 /* limit to sensor capabilities */ 950 mf.width = pix->width; 951 mf.height = pix->height; 952 mf.field = pix->field; 953 mf.colorspace = pix->colorspace; 954 mf.code = xlate->code; 955 956 ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf); 957 if (ret < 0) 958 return ret; 959 960 pix->width = mf.width; 961 pix->height = mf.height; 962 pix->colorspace = mf.colorspace; 963 964 switch (mf.field) { 965 case V4L2_FIELD_ANY: 966 pix->field = V4L2_FIELD_NONE; 967 break; 968 case V4L2_FIELD_NONE: 969 break; 970 default: 971 dev_err(icd->dev.parent, "Field type %d unsupported.\n", 972 mf.field); 973 ret = -EINVAL; 974 } 975 976 return ret; 977} 978 979static int mx3_camera_reqbufs(struct soc_camera_file *icf, 980 struct v4l2_requestbuffers *p) 981{ 982 return 0; 983} 984 985static unsigned int mx3_camera_poll(struct file *file, poll_table *pt) 986{ 987 struct soc_camera_file *icf = file->private_data; 988 989 return videobuf_poll_stream(file, &icf->vb_vidq, pt); 990} 991 992static int mx3_camera_querycap(struct soc_camera_host *ici, 993 struct v4l2_capability *cap) 994{ 995 /* cap->name is set by the firendly caller:-> */ 996 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card)); 997 cap->version = KERNEL_VERSION(0, 2, 2); 998 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; 999 1000 return 0; 1001} 1002 1003static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) 1004{ 1005 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 1006 struct mx3_camera_dev *mx3_cam = ici->priv; 1007 unsigned long bus_flags, camera_flags, common_flags; 1008 u32 dw, sens_conf; 1009 const struct soc_mbus_pixelfmt *fmt; 1010 int buswidth; 1011 int ret; 1012 const struct soc_camera_format_xlate *xlate; 1013 struct device *dev = icd->dev.parent; 1014 1015 fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code); 1016 if (!fmt) 1017 return -EINVAL; 1018 1019 buswidth = fmt->bits_per_sample; 1020 ret = test_platform_param(mx3_cam, buswidth, &bus_flags); 1021 1022 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); 1023 if (!xlate) { 1024 dev_warn(dev, "Format %x not found\n", pixfmt); 1025 return -EINVAL; 1026 } 1027 1028 dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret); 1029 1030 if (ret < 0) 1031 return ret; 1032 1033 camera_flags = icd->ops->query_bus_param(icd); 1034 1035 common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags); 1036 dev_dbg(dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n", 1037 camera_flags, bus_flags, common_flags); 1038 if (!common_flags) { 1039 dev_dbg(dev, "no common flags"); 1040 return -EINVAL; 1041 } 1042 1043 /* Make choices, based on platform preferences */ 1044 if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) && 1045 (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) { 1046 if (mx3_cam->platform_flags & MX3_CAMERA_HSP) 1047 common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH; 1048 else 1049 common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW; 1050 } 1051 1052 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) && 1053 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) { 1054 if (mx3_cam->platform_flags & MX3_CAMERA_VSP) 1055 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH; 1056 else 1057 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW; 1058 } 1059 1060 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) && 1061 (common_flags & SOCAM_DATA_ACTIVE_LOW)) { 1062 if (mx3_cam->platform_flags & MX3_CAMERA_DP) 1063 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH; 1064 else 1065 common_flags &= ~SOCAM_DATA_ACTIVE_LOW; 1066 } 1067 1068 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) && 1069 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) { 1070 if (mx3_cam->platform_flags & MX3_CAMERA_PCP) 1071 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING; 1072 else 1073 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING; 1074 } 1075 1076 /* 1077 * Make the camera work in widest common mode, we'll take care of 1078 * the rest 1079 */ 1080 if (common_flags & SOCAM_DATAWIDTH_15) 1081 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) | 1082 SOCAM_DATAWIDTH_15; 1083 else if (common_flags & SOCAM_DATAWIDTH_10) 1084 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) | 1085 SOCAM_DATAWIDTH_10; 1086 else if (common_flags & SOCAM_DATAWIDTH_8) 1087 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) | 1088 SOCAM_DATAWIDTH_8; 1089 else 1090 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) | 1091 SOCAM_DATAWIDTH_4; 1092 1093 ret = icd->ops->set_bus_param(icd, common_flags); 1094 if (ret < 0) { 1095 dev_dbg(dev, "camera set_bus_param(%lx) returned %d\n", 1096 common_flags, ret); 1097 return ret; 1098 } 1099 1100 /* 1101 * So far only gated clock mode is supported. Add a line 1102 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) | 1103 * below and select the required mode when supporting other 1104 * synchronisation protocols. 1105 */ 1106 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) & 1107 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) | 1108 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) | 1109 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) | 1110 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) | 1111 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) | 1112 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT)); 1113 1114 /* TODO: Support RGB and YUV formats */ 1115 1116 /* This has been set in mx3_camera_activate(), but we clear it above */ 1117 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER; 1118 1119 if (common_flags & SOCAM_PCLK_SAMPLE_FALLING) 1120 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT; 1121 if (common_flags & SOCAM_HSYNC_ACTIVE_LOW) 1122 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT; 1123 if (common_flags & SOCAM_VSYNC_ACTIVE_LOW) 1124 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT; 1125 if (common_flags & SOCAM_DATA_ACTIVE_LOW) 1126 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT; 1127 1128 /* Just do what we're asked to do */ 1129 switch (xlate->host_fmt->bits_per_sample) { 1130 case 4: 1131 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 1132 break; 1133 case 8: 1134 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 1135 break; 1136 case 10: 1137 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 1138 break; 1139 default: 1140 /* 1141 * Actually it can only be 15 now, default is just to silence 1142 * compiler warnings 1143 */ 1144 case 15: 1145 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 1146 } 1147 1148 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF); 1149 1150 dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw); 1151 1152 return 0; 1153} 1154 1155static struct soc_camera_host_ops mx3_soc_camera_host_ops = { 1156 .owner = THIS_MODULE, 1157 .add = mx3_camera_add_device, 1158 .remove = mx3_camera_remove_device, 1159 .set_crop = mx3_camera_set_crop, 1160 .set_fmt = mx3_camera_set_fmt, 1161 .try_fmt = mx3_camera_try_fmt, 1162 .get_formats = mx3_camera_get_formats, 1163 .init_videobuf = mx3_camera_init_videobuf, 1164 .reqbufs = mx3_camera_reqbufs, 1165 .poll = mx3_camera_poll, 1166 .querycap = mx3_camera_querycap, 1167 .set_bus_param = mx3_camera_set_bus_param, 1168}; 1169 1170static int __devinit mx3_camera_probe(struct platform_device *pdev) 1171{ 1172 struct mx3_camera_dev *mx3_cam; 1173 struct resource *res; 1174 void __iomem *base; 1175 int err = 0; 1176 struct soc_camera_host *soc_host; 1177 1178 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1179 if (!res) { 1180 err = -ENODEV; 1181 goto egetres; 1182 } 1183 1184 mx3_cam = vmalloc(sizeof(*mx3_cam)); 1185 if (!mx3_cam) { 1186 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n"); 1187 err = -ENOMEM; 1188 goto ealloc; 1189 } 1190 memset(mx3_cam, 0, sizeof(*mx3_cam)); 1191 1192 mx3_cam->clk = clk_get(&pdev->dev, NULL); 1193 if (IS_ERR(mx3_cam->clk)) { 1194 err = PTR_ERR(mx3_cam->clk); 1195 goto eclkget; 1196 } 1197 1198 mx3_cam->pdata = pdev->dev.platform_data; 1199 mx3_cam->platform_flags = mx3_cam->pdata->flags; 1200 if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 | 1201 MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 | 1202 MX3_CAMERA_DATAWIDTH_15))) { 1203 /* 1204 * Platform hasn't set available data widths. This is bad. 1205 * Warn and use a default. 1206 */ 1207 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available " 1208 "data widths, using default 8 bit\n"); 1209 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8; 1210 } 1211 1212 mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000; 1213 if (!mx3_cam->mclk) { 1214 dev_warn(&pdev->dev, 1215 "mclk_10khz == 0! Please, fix your platform data. " 1216 "Using default 20MHz\n"); 1217 mx3_cam->mclk = 20000000; 1218 } 1219 1220 /* list of video-buffers */ 1221 INIT_LIST_HEAD(&mx3_cam->capture); 1222 spin_lock_init(&mx3_cam->lock); 1223 1224 base = ioremap(res->start, resource_size(res)); 1225 if (!base) { 1226 pr_err("Couldn't map %x@%x\n", resource_size(res), res->start); 1227 err = -ENOMEM; 1228 goto eioremap; 1229 } 1230 1231 mx3_cam->base = base; 1232 1233 soc_host = &mx3_cam->soc_host; 1234 soc_host->drv_name = MX3_CAM_DRV_NAME; 1235 soc_host->ops = &mx3_soc_camera_host_ops; 1236 soc_host->priv = mx3_cam; 1237 soc_host->v4l2_dev.dev = &pdev->dev; 1238 soc_host->nr = pdev->id; 1239 1240 err = soc_camera_host_register(soc_host); 1241 if (err) 1242 goto ecamhostreg; 1243 1244 /* IDMAC interface */ 1245 dmaengine_get(); 1246 1247 return 0; 1248 1249ecamhostreg: 1250 iounmap(base); 1251eioremap: 1252 clk_put(mx3_cam->clk); 1253eclkget: 1254 vfree(mx3_cam); 1255ealloc: 1256egetres: 1257 return err; 1258} 1259 1260static int __devexit mx3_camera_remove(struct platform_device *pdev) 1261{ 1262 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); 1263 struct mx3_camera_dev *mx3_cam = container_of(soc_host, 1264 struct mx3_camera_dev, soc_host); 1265 1266 clk_put(mx3_cam->clk); 1267 1268 soc_camera_host_unregister(soc_host); 1269 1270 iounmap(mx3_cam->base); 1271 1272 /* 1273 * The channel has either not been allocated, 1274 * or should have been released 1275 */ 1276 if (WARN_ON(mx3_cam->idmac_channel[0])) 1277 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan); 1278 1279 vfree(mx3_cam); 1280 1281 dmaengine_put(); 1282 1283 dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n"); 1284 1285 return 0; 1286} 1287 1288static struct platform_driver mx3_camera_driver = { 1289 .driver = { 1290 .name = MX3_CAM_DRV_NAME, 1291 }, 1292 .probe = mx3_camera_probe, 1293 .remove = __devexit_p(mx3_camera_remove), 1294}; 1295 1296 1297static int __init mx3_camera_init(void) 1298{ 1299 return platform_driver_register(&mx3_camera_driver); 1300} 1301 1302static void __exit mx3_camera_exit(void) 1303{ 1304 platform_driver_unregister(&mx3_camera_driver); 1305} 1306 1307module_init(mx3_camera_init); 1308module_exit(mx3_camera_exit); 1309 1310MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver"); 1311MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>"); 1312MODULE_LICENSE("GPL v2"); 1313MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME); 1314