atmel-mci.c revision da45b66ec89bbf3a1c172688c35d4d3a6e8e757f
1/* 2 * Atmel MultiMedia Card Interface driver 3 * 4 * Copyright (C) 2004-2008 Atmel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#include <linux/blkdev.h> 11#include <linux/clk.h> 12#include <linux/debugfs.h> 13#include <linux/device.h> 14#include <linux/err.h> 15#include <linux/gpio.h> 16#include <linux/init.h> 17#include <linux/interrupt.h> 18#include <linux/ioport.h> 19#include <linux/module.h> 20#include <linux/platform_device.h> 21#include <linux/scatterlist.h> 22#include <linux/seq_file.h> 23#include <linux/stat.h> 24 25#include <linux/mmc/host.h> 26 27#include <asm/atmel-mci.h> 28#include <asm/io.h> 29#include <asm/unaligned.h> 30 31#include <mach/board.h> 32 33#include "atmel-mci-regs.h" 34 35#define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE) 36 37enum { 38 EVENT_CMD_COMPLETE = 0, 39 EVENT_DATA_ERROR, 40 EVENT_DATA_COMPLETE, 41 EVENT_STOP_SENT, 42 EVENT_STOP_COMPLETE, 43 EVENT_XFER_COMPLETE, 44}; 45 46struct atmel_mci { 47 struct mmc_host *mmc; 48 void __iomem *regs; 49 50 struct scatterlist *sg; 51 unsigned int pio_offset; 52 53 struct mmc_request *mrq; 54 struct mmc_command *cmd; 55 struct mmc_data *data; 56 57 u32 cmd_status; 58 u32 data_status; 59 u32 stop_status; 60 u32 stop_cmdr; 61 62 u32 mode_reg; 63 u32 sdc_reg; 64 65 struct tasklet_struct tasklet; 66 unsigned long pending_events; 67 unsigned long completed_events; 68 69 int present; 70 int detect_pin; 71 int wp_pin; 72 73 /* For detect pin debouncing */ 74 struct timer_list detect_timer; 75 76 unsigned long bus_hz; 77 unsigned long mapbase; 78 struct clk *mck; 79 struct platform_device *pdev; 80}; 81 82#define atmci_is_completed(host, event) \ 83 test_bit(event, &host->completed_events) 84#define atmci_test_and_clear_pending(host, event) \ 85 test_and_clear_bit(event, &host->pending_events) 86#define atmci_test_and_set_completed(host, event) \ 87 test_and_set_bit(event, &host->completed_events) 88#define atmci_set_completed(host, event) \ 89 set_bit(event, &host->completed_events) 90#define atmci_set_pending(host, event) \ 91 set_bit(event, &host->pending_events) 92#define atmci_clear_pending(host, event) \ 93 clear_bit(event, &host->pending_events) 94 95/* 96 * The debugfs stuff below is mostly optimized away when 97 * CONFIG_DEBUG_FS is not set. 98 */ 99static int atmci_req_show(struct seq_file *s, void *v) 100{ 101 struct atmel_mci *host = s->private; 102 struct mmc_request *mrq = host->mrq; 103 struct mmc_command *cmd; 104 struct mmc_command *stop; 105 struct mmc_data *data; 106 107 /* Make sure we get a consistent snapshot */ 108 spin_lock_irq(&host->mmc->lock); 109 110 if (mrq) { 111 cmd = mrq->cmd; 112 data = mrq->data; 113 stop = mrq->stop; 114 115 if (cmd) 116 seq_printf(s, 117 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 118 cmd->opcode, cmd->arg, cmd->flags, 119 cmd->resp[0], cmd->resp[1], cmd->resp[2], 120 cmd->resp[2], cmd->error); 121 if (data) 122 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 123 data->bytes_xfered, data->blocks, 124 data->blksz, data->flags, data->error); 125 if (stop) 126 seq_printf(s, 127 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 128 stop->opcode, stop->arg, stop->flags, 129 stop->resp[0], stop->resp[1], stop->resp[2], 130 stop->resp[2], stop->error); 131 } 132 133 spin_unlock_irq(&host->mmc->lock); 134 135 return 0; 136} 137 138static int atmci_req_open(struct inode *inode, struct file *file) 139{ 140 return single_open(file, atmci_req_show, inode->i_private); 141} 142 143static const struct file_operations atmci_req_fops = { 144 .owner = THIS_MODULE, 145 .open = atmci_req_open, 146 .read = seq_read, 147 .llseek = seq_lseek, 148 .release = single_release, 149}; 150 151static void atmci_show_status_reg(struct seq_file *s, 152 const char *regname, u32 value) 153{ 154 static const char *sr_bit[] = { 155 [0] = "CMDRDY", 156 [1] = "RXRDY", 157 [2] = "TXRDY", 158 [3] = "BLKE", 159 [4] = "DTIP", 160 [5] = "NOTBUSY", 161 [8] = "SDIOIRQA", 162 [9] = "SDIOIRQB", 163 [16] = "RINDE", 164 [17] = "RDIRE", 165 [18] = "RCRCE", 166 [19] = "RENDE", 167 [20] = "RTOE", 168 [21] = "DCRCE", 169 [22] = "DTOE", 170 [30] = "OVRE", 171 [31] = "UNRE", 172 }; 173 unsigned int i; 174 175 seq_printf(s, "%s:\t0x%08x", regname, value); 176 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) { 177 if (value & (1 << i)) { 178 if (sr_bit[i]) 179 seq_printf(s, " %s", sr_bit[i]); 180 else 181 seq_puts(s, " UNKNOWN"); 182 } 183 } 184 seq_putc(s, '\n'); 185} 186 187static int atmci_regs_show(struct seq_file *s, void *v) 188{ 189 struct atmel_mci *host = s->private; 190 u32 *buf; 191 192 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL); 193 if (!buf) 194 return -ENOMEM; 195 196 /* Grab a more or less consistent snapshot */ 197 spin_lock_irq(&host->mmc->lock); 198 clk_enable(host->mck); 199 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE); 200 clk_disable(host->mck); 201 spin_unlock_irq(&host->mmc->lock); 202 203 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n", 204 buf[MCI_MR / 4], 205 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "", 206 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "", 207 buf[MCI_MR / 4] & 0xff); 208 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]); 209 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]); 210 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]); 211 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n", 212 buf[MCI_BLKR / 4], 213 buf[MCI_BLKR / 4] & 0xffff, 214 (buf[MCI_BLKR / 4] >> 16) & 0xffff); 215 216 /* Don't read RSPR and RDR; it will consume the data there */ 217 218 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]); 219 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]); 220 221 kfree(buf); 222 223 return 0; 224} 225 226static int atmci_regs_open(struct inode *inode, struct file *file) 227{ 228 return single_open(file, atmci_regs_show, inode->i_private); 229} 230 231static const struct file_operations atmci_regs_fops = { 232 .owner = THIS_MODULE, 233 .open = atmci_regs_open, 234 .read = seq_read, 235 .llseek = seq_lseek, 236 .release = single_release, 237}; 238 239static void atmci_init_debugfs(struct atmel_mci *host) 240{ 241 struct mmc_host *mmc; 242 struct dentry *root; 243 struct dentry *node; 244 245 mmc = host->mmc; 246 root = mmc->debugfs_root; 247 if (!root) 248 return; 249 250 node = debugfs_create_file("regs", S_IRUSR, root, host, 251 &atmci_regs_fops); 252 if (IS_ERR(node)) 253 return; 254 if (!node) 255 goto err; 256 257 node = debugfs_create_file("req", S_IRUSR, root, host, &atmci_req_fops); 258 if (!node) 259 goto err; 260 261 node = debugfs_create_x32("pending_events", S_IRUSR, root, 262 (u32 *)&host->pending_events); 263 if (!node) 264 goto err; 265 266 node = debugfs_create_x32("completed_events", S_IRUSR, root, 267 (u32 *)&host->completed_events); 268 if (!node) 269 goto err; 270 271 return; 272 273err: 274 dev_err(&host->pdev->dev, 275 "failed to initialize debugfs for controller\n"); 276} 277 278static void atmci_enable(struct atmel_mci *host) 279{ 280 clk_enable(host->mck); 281 mci_writel(host, CR, MCI_CR_MCIEN); 282 mci_writel(host, MR, host->mode_reg); 283 mci_writel(host, SDCR, host->sdc_reg); 284} 285 286static void atmci_disable(struct atmel_mci *host) 287{ 288 mci_writel(host, CR, MCI_CR_SWRST); 289 290 /* Stall until write is complete, then disable the bus clock */ 291 mci_readl(host, SR); 292 clk_disable(host->mck); 293} 294 295static inline unsigned int ns_to_clocks(struct atmel_mci *host, 296 unsigned int ns) 297{ 298 return (ns * (host->bus_hz / 1000000) + 999) / 1000; 299} 300 301static void atmci_set_timeout(struct atmel_mci *host, 302 struct mmc_data *data) 303{ 304 static unsigned dtomul_to_shift[] = { 305 0, 4, 7, 8, 10, 12, 16, 20 306 }; 307 unsigned timeout; 308 unsigned dtocyc; 309 unsigned dtomul; 310 311 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks; 312 313 for (dtomul = 0; dtomul < 8; dtomul++) { 314 unsigned shift = dtomul_to_shift[dtomul]; 315 dtocyc = (timeout + (1 << shift) - 1) >> shift; 316 if (dtocyc < 15) 317 break; 318 } 319 320 if (dtomul >= 8) { 321 dtomul = 7; 322 dtocyc = 15; 323 } 324 325 dev_vdbg(&host->mmc->class_dev, "setting timeout to %u cycles\n", 326 dtocyc << dtomul_to_shift[dtomul]); 327 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc))); 328} 329 330/* 331 * Return mask with command flags to be enabled for this command. 332 */ 333static u32 atmci_prepare_command(struct mmc_host *mmc, 334 struct mmc_command *cmd) 335{ 336 struct mmc_data *data; 337 u32 cmdr; 338 339 cmd->error = -EINPROGRESS; 340 341 cmdr = MCI_CMDR_CMDNB(cmd->opcode); 342 343 if (cmd->flags & MMC_RSP_PRESENT) { 344 if (cmd->flags & MMC_RSP_136) 345 cmdr |= MCI_CMDR_RSPTYP_136BIT; 346 else 347 cmdr |= MCI_CMDR_RSPTYP_48BIT; 348 } 349 350 /* 351 * This should really be MAXLAT_5 for CMD2 and ACMD41, but 352 * it's too difficult to determine whether this is an ACMD or 353 * not. Better make it 64. 354 */ 355 cmdr |= MCI_CMDR_MAXLAT_64CYC; 356 357 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) 358 cmdr |= MCI_CMDR_OPDCMD; 359 360 data = cmd->data; 361 if (data) { 362 cmdr |= MCI_CMDR_START_XFER; 363 if (data->flags & MMC_DATA_STREAM) 364 cmdr |= MCI_CMDR_STREAM; 365 else if (data->blocks > 1) 366 cmdr |= MCI_CMDR_MULTI_BLOCK; 367 else 368 cmdr |= MCI_CMDR_BLOCK; 369 370 if (data->flags & MMC_DATA_READ) 371 cmdr |= MCI_CMDR_TRDIR_READ; 372 } 373 374 return cmdr; 375} 376 377static void atmci_start_command(struct atmel_mci *host, 378 struct mmc_command *cmd, 379 u32 cmd_flags) 380{ 381 /* Must read host->cmd after testing event flags */ 382 smp_rmb(); 383 WARN_ON(host->cmd); 384 host->cmd = cmd; 385 386 dev_vdbg(&host->mmc->class_dev, 387 "start command: ARGR=0x%08x CMDR=0x%08x\n", 388 cmd->arg, cmd_flags); 389 390 mci_writel(host, ARGR, cmd->arg); 391 mci_writel(host, CMDR, cmd_flags); 392} 393 394static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data) 395{ 396 struct atmel_mci *host = mmc_priv(mmc); 397 398 atmci_start_command(host, data->stop, host->stop_cmdr); 399 mci_writel(host, IER, MCI_CMDRDY); 400} 401 402static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq) 403{ 404 struct atmel_mci *host = mmc_priv(mmc); 405 406 WARN_ON(host->cmd || host->data); 407 host->mrq = NULL; 408 409 atmci_disable(host); 410 411 mmc_request_done(mmc, mrq); 412} 413 414/* 415 * Returns a mask of interrupt flags to be enabled after the whole 416 * request has been prepared. 417 */ 418static u32 atmci_submit_data(struct mmc_host *mmc, struct mmc_data *data) 419{ 420 struct atmel_mci *host = mmc_priv(mmc); 421 u32 iflags; 422 423 data->error = -EINPROGRESS; 424 425 WARN_ON(host->data); 426 host->sg = NULL; 427 host->data = data; 428 429 mci_writel(host, BLKR, MCI_BCNT(data->blocks) 430 | MCI_BLKLEN(data->blksz)); 431 dev_vdbg(&mmc->class_dev, "BLKR=0x%08x\n", 432 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz)); 433 434 iflags = ATMCI_DATA_ERROR_FLAGS; 435 host->sg = data->sg; 436 host->pio_offset = 0; 437 if (data->flags & MMC_DATA_READ) 438 iflags |= MCI_RXRDY; 439 else 440 iflags |= MCI_TXRDY; 441 442 return iflags; 443} 444 445static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) 446{ 447 struct atmel_mci *host = mmc_priv(mmc); 448 struct mmc_data *data; 449 struct mmc_command *cmd; 450 u32 iflags; 451 u32 cmdflags = 0; 452 453 iflags = mci_readl(host, IMR); 454 if (iflags) 455 dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n", 456 mci_readl(host, IMR)); 457 458 WARN_ON(host->mrq != NULL); 459 460 /* 461 * We may "know" the card is gone even though there's still an 462 * electrical connection. If so, we really need to communicate 463 * this to the MMC core since there won't be any more 464 * interrupts as the card is completely removed. Otherwise, 465 * the MMC core might believe the card is still there even 466 * though the card was just removed very slowly. 467 */ 468 if (!host->present) { 469 mrq->cmd->error = -ENOMEDIUM; 470 mmc_request_done(mmc, mrq); 471 return; 472 } 473 474 host->mrq = mrq; 475 host->pending_events = 0; 476 host->completed_events = 0; 477 478 atmci_enable(host); 479 480 /* We don't support multiple blocks of weird lengths. */ 481 data = mrq->data; 482 if (data) { 483 if (data->blocks > 1 && data->blksz & 3) 484 goto fail; 485 atmci_set_timeout(host, data); 486 } 487 488 iflags = MCI_CMDRDY; 489 cmd = mrq->cmd; 490 cmdflags = atmci_prepare_command(mmc, cmd); 491 atmci_start_command(host, cmd, cmdflags); 492 493 if (data) 494 iflags |= atmci_submit_data(mmc, data); 495 496 if (mrq->stop) { 497 host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop); 498 host->stop_cmdr |= MCI_CMDR_STOP_XFER; 499 if (!(data->flags & MMC_DATA_WRITE)) 500 host->stop_cmdr |= MCI_CMDR_TRDIR_READ; 501 if (data->flags & MMC_DATA_STREAM) 502 host->stop_cmdr |= MCI_CMDR_STREAM; 503 else 504 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK; 505 } 506 507 /* 508 * We could have enabled interrupts earlier, but I suspect 509 * that would open up a nice can of interesting race 510 * conditions (e.g. command and data complete, but stop not 511 * prepared yet.) 512 */ 513 mci_writel(host, IER, iflags); 514 515 return; 516 517fail: 518 atmci_disable(host); 519 host->mrq = NULL; 520 mrq->cmd->error = -EINVAL; 521 mmc_request_done(mmc, mrq); 522} 523 524static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 525{ 526 struct atmel_mci *host = mmc_priv(mmc); 527 528 if (ios->clock) { 529 u32 clkdiv; 530 531 /* Set clock rate */ 532 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * ios->clock) - 1; 533 if (clkdiv > 255) { 534 dev_warn(&mmc->class_dev, 535 "clock %u too slow; using %lu\n", 536 ios->clock, host->bus_hz / (2 * 256)); 537 clkdiv = 255; 538 } 539 540 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF 541 | MCI_MR_RDPROOF; 542 } 543 544 switch (ios->bus_width) { 545 case MMC_BUS_WIDTH_1: 546 host->sdc_reg = 0; 547 break; 548 case MMC_BUS_WIDTH_4: 549 host->sdc_reg = MCI_SDCBUS_4BIT; 550 break; 551 } 552 553 switch (ios->power_mode) { 554 case MMC_POWER_ON: 555 /* Send init sequence (74 clock cycles) */ 556 atmci_enable(host); 557 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT); 558 while (!(mci_readl(host, SR) & MCI_CMDRDY)) 559 cpu_relax(); 560 atmci_disable(host); 561 break; 562 default: 563 /* 564 * TODO: None of the currently available AVR32-based 565 * boards allow MMC power to be turned off. Implement 566 * power control when this can be tested properly. 567 */ 568 break; 569 } 570} 571 572static int atmci_get_ro(struct mmc_host *mmc) 573{ 574 int read_only = 0; 575 struct atmel_mci *host = mmc_priv(mmc); 576 577 if (gpio_is_valid(host->wp_pin)) { 578 read_only = gpio_get_value(host->wp_pin); 579 dev_dbg(&mmc->class_dev, "card is %s\n", 580 read_only ? "read-only" : "read-write"); 581 } else { 582 dev_dbg(&mmc->class_dev, 583 "no pin for checking read-only switch." 584 " Assuming write-enable.\n"); 585 } 586 587 return read_only; 588} 589 590static struct mmc_host_ops atmci_ops = { 591 .request = atmci_request, 592 .set_ios = atmci_set_ios, 593 .get_ro = atmci_get_ro, 594}; 595 596static void atmci_command_complete(struct atmel_mci *host, 597 struct mmc_command *cmd, u32 status) 598{ 599 /* Read the response from the card (up to 16 bytes) */ 600 cmd->resp[0] = mci_readl(host, RSPR); 601 cmd->resp[1] = mci_readl(host, RSPR); 602 cmd->resp[2] = mci_readl(host, RSPR); 603 cmd->resp[3] = mci_readl(host, RSPR); 604 605 if (status & MCI_RTOE) 606 cmd->error = -ETIMEDOUT; 607 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE)) 608 cmd->error = -EILSEQ; 609 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE)) 610 cmd->error = -EIO; 611 else 612 cmd->error = 0; 613 614 if (cmd->error) { 615 dev_dbg(&host->mmc->class_dev, 616 "command error: status=0x%08x\n", status); 617 618 if (cmd->data) { 619 host->data = NULL; 620 mci_writel(host, IDR, MCI_NOTBUSY 621 | MCI_TXRDY | MCI_RXRDY 622 | ATMCI_DATA_ERROR_FLAGS); 623 } 624 } 625} 626 627static void atmci_detect_change(unsigned long data) 628{ 629 struct atmel_mci *host = (struct atmel_mci *)data; 630 struct mmc_request *mrq = host->mrq; 631 int present; 632 633 /* 634 * atmci_remove() sets detect_pin to -1 before freeing the 635 * interrupt. We must not re-enable the interrupt if it has 636 * been freed. 637 */ 638 smp_rmb(); 639 if (!gpio_is_valid(host->detect_pin)) 640 return; 641 642 enable_irq(gpio_to_irq(host->detect_pin)); 643 present = !gpio_get_value(host->detect_pin); 644 645 dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n", 646 present, host->present); 647 648 if (present != host->present) { 649 dev_dbg(&host->mmc->class_dev, "card %s\n", 650 present ? "inserted" : "removed"); 651 host->present = present; 652 653 /* Reset controller if card is gone */ 654 if (!present) { 655 mci_writel(host, CR, MCI_CR_SWRST); 656 mci_writel(host, IDR, ~0UL); 657 mci_writel(host, CR, MCI_CR_MCIEN); 658 } 659 660 /* Clean up queue if present */ 661 if (mrq) { 662 /* 663 * Reset controller to terminate any ongoing 664 * commands or data transfers. 665 */ 666 mci_writel(host, CR, MCI_CR_SWRST); 667 668 if (!atmci_is_completed(host, EVENT_CMD_COMPLETE)) 669 mrq->cmd->error = -ENOMEDIUM; 670 671 if (mrq->data && !atmci_is_completed(host, 672 EVENT_DATA_COMPLETE)) { 673 host->data = NULL; 674 mrq->data->error = -ENOMEDIUM; 675 } 676 if (mrq->stop && !atmci_is_completed(host, 677 EVENT_STOP_COMPLETE)) 678 mrq->stop->error = -ENOMEDIUM; 679 680 host->cmd = NULL; 681 atmci_request_end(host->mmc, mrq); 682 } 683 684 mmc_detect_change(host->mmc, 0); 685 } 686} 687 688static void atmci_tasklet_func(unsigned long priv) 689{ 690 struct mmc_host *mmc = (struct mmc_host *)priv; 691 struct atmel_mci *host = mmc_priv(mmc); 692 struct mmc_request *mrq = host->mrq; 693 struct mmc_data *data = host->data; 694 695 dev_vdbg(&mmc->class_dev, 696 "tasklet: pending/completed/mask %lx/%lx/%x\n", 697 host->pending_events, host->completed_events, 698 mci_readl(host, IMR)); 699 700 if (atmci_test_and_clear_pending(host, EVENT_CMD_COMPLETE)) { 701 /* 702 * host->cmd must be set to NULL before the interrupt 703 * handler sees EVENT_CMD_COMPLETE 704 */ 705 host->cmd = NULL; 706 smp_wmb(); 707 atmci_set_completed(host, EVENT_CMD_COMPLETE); 708 atmci_command_complete(host, mrq->cmd, host->cmd_status); 709 710 if (!mrq->cmd->error && mrq->stop 711 && atmci_is_completed(host, EVENT_XFER_COMPLETE) 712 && !atmci_test_and_set_completed(host, 713 EVENT_STOP_SENT)) 714 send_stop_cmd(host->mmc, mrq->data); 715 } 716 if (atmci_test_and_clear_pending(host, EVENT_STOP_COMPLETE)) { 717 /* 718 * host->cmd must be set to NULL before the interrupt 719 * handler sees EVENT_STOP_COMPLETE 720 */ 721 host->cmd = NULL; 722 smp_wmb(); 723 atmci_set_completed(host, EVENT_STOP_COMPLETE); 724 atmci_command_complete(host, mrq->stop, host->stop_status); 725 } 726 if (atmci_test_and_clear_pending(host, EVENT_DATA_ERROR)) { 727 u32 status = host->data_status; 728 729 dev_vdbg(&mmc->class_dev, "data error: status=%08x\n", status); 730 731 atmci_set_completed(host, EVENT_DATA_ERROR); 732 atmci_set_completed(host, EVENT_DATA_COMPLETE); 733 734 if (status & MCI_DTOE) { 735 dev_dbg(&mmc->class_dev, 736 "data timeout error\n"); 737 data->error = -ETIMEDOUT; 738 } else if (status & MCI_DCRCE) { 739 dev_dbg(&mmc->class_dev, "data CRC error\n"); 740 data->error = -EILSEQ; 741 } else { 742 dev_dbg(&mmc->class_dev, 743 "data FIFO error (status=%08x)\n", 744 status); 745 data->error = -EIO; 746 } 747 748 if (host->present && data->stop 749 && atmci_is_completed(host, EVENT_CMD_COMPLETE) 750 && !atmci_test_and_set_completed( 751 host, EVENT_STOP_SENT)) 752 send_stop_cmd(host->mmc, data); 753 754 host->data = NULL; 755 } 756 if (atmci_test_and_clear_pending(host, EVENT_DATA_COMPLETE)) { 757 atmci_set_completed(host, EVENT_DATA_COMPLETE); 758 759 if (!atmci_is_completed(host, EVENT_DATA_ERROR)) { 760 data->bytes_xfered = data->blocks * data->blksz; 761 data->error = 0; 762 } 763 764 host->data = NULL; 765 } 766 767 if (host->mrq && !host->cmd && !host->data) 768 atmci_request_end(mmc, host->mrq); 769} 770 771static void atmci_read_data_pio(struct atmel_mci *host) 772{ 773 struct scatterlist *sg = host->sg; 774 void *buf = sg_virt(sg); 775 unsigned int offset = host->pio_offset; 776 struct mmc_data *data = host->data; 777 u32 value; 778 u32 status; 779 unsigned int nbytes = 0; 780 781 do { 782 value = mci_readl(host, RDR); 783 if (likely(offset + 4 <= sg->length)) { 784 put_unaligned(value, (u32 *)(buf + offset)); 785 786 offset += 4; 787 nbytes += 4; 788 789 if (offset == sg->length) { 790 host->sg = sg = sg_next(sg); 791 if (!sg) 792 goto done; 793 794 offset = 0; 795 buf = sg_virt(sg); 796 } 797 } else { 798 unsigned int remaining = sg->length - offset; 799 memcpy(buf + offset, &value, remaining); 800 nbytes += remaining; 801 802 flush_dcache_page(sg_page(sg)); 803 host->sg = sg = sg_next(sg); 804 if (!sg) 805 goto done; 806 807 offset = 4 - remaining; 808 buf = sg_virt(sg); 809 memcpy(buf, (u8 *)&value + remaining, offset); 810 nbytes += offset; 811 } 812 813 status = mci_readl(host, SR); 814 if (status & ATMCI_DATA_ERROR_FLAGS) { 815 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY 816 | ATMCI_DATA_ERROR_FLAGS)); 817 host->data_status = status; 818 atmci_set_pending(host, EVENT_DATA_ERROR); 819 tasklet_schedule(&host->tasklet); 820 break; 821 } 822 } while (status & MCI_RXRDY); 823 824 host->pio_offset = offset; 825 data->bytes_xfered += nbytes; 826 827 return; 828 829done: 830 mci_writel(host, IDR, MCI_RXRDY); 831 mci_writel(host, IER, MCI_NOTBUSY); 832 data->bytes_xfered += nbytes; 833 atmci_set_completed(host, EVENT_XFER_COMPLETE); 834 if (data->stop && atmci_is_completed(host, EVENT_CMD_COMPLETE) 835 && !atmci_test_and_set_completed(host, EVENT_STOP_SENT)) 836 send_stop_cmd(host->mmc, data); 837} 838 839static void atmci_write_data_pio(struct atmel_mci *host) 840{ 841 struct scatterlist *sg = host->sg; 842 void *buf = sg_virt(sg); 843 unsigned int offset = host->pio_offset; 844 struct mmc_data *data = host->data; 845 u32 value; 846 u32 status; 847 unsigned int nbytes = 0; 848 849 do { 850 if (likely(offset + 4 <= sg->length)) { 851 value = get_unaligned((u32 *)(buf + offset)); 852 mci_writel(host, TDR, value); 853 854 offset += 4; 855 nbytes += 4; 856 if (offset == sg->length) { 857 host->sg = sg = sg_next(sg); 858 if (!sg) 859 goto done; 860 861 offset = 0; 862 buf = sg_virt(sg); 863 } 864 } else { 865 unsigned int remaining = sg->length - offset; 866 867 value = 0; 868 memcpy(&value, buf + offset, remaining); 869 nbytes += remaining; 870 871 host->sg = sg = sg_next(sg); 872 if (!sg) { 873 mci_writel(host, TDR, value); 874 goto done; 875 } 876 877 offset = 4 - remaining; 878 buf = sg_virt(sg); 879 memcpy((u8 *)&value + remaining, buf, offset); 880 mci_writel(host, TDR, value); 881 nbytes += offset; 882 } 883 884 status = mci_readl(host, SR); 885 if (status & ATMCI_DATA_ERROR_FLAGS) { 886 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY 887 | ATMCI_DATA_ERROR_FLAGS)); 888 host->data_status = status; 889 atmci_set_pending(host, EVENT_DATA_ERROR); 890 tasklet_schedule(&host->tasklet); 891 break; 892 } 893 } while (status & MCI_TXRDY); 894 895 host->pio_offset = offset; 896 data->bytes_xfered += nbytes; 897 898 return; 899 900done: 901 mci_writel(host, IDR, MCI_TXRDY); 902 mci_writel(host, IER, MCI_NOTBUSY); 903 data->bytes_xfered += nbytes; 904 atmci_set_completed(host, EVENT_XFER_COMPLETE); 905 if (data->stop && atmci_is_completed(host, EVENT_CMD_COMPLETE) 906 && !atmci_test_and_set_completed(host, EVENT_STOP_SENT)) 907 send_stop_cmd(host->mmc, data); 908} 909 910static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) 911{ 912 struct atmel_mci *host = mmc_priv(mmc); 913 914 mci_writel(host, IDR, MCI_CMDRDY); 915 916 if (atmci_is_completed(host, EVENT_STOP_SENT)) { 917 host->stop_status = status; 918 atmci_set_pending(host, EVENT_STOP_COMPLETE); 919 } else { 920 host->cmd_status = status; 921 atmci_set_pending(host, EVENT_CMD_COMPLETE); 922 } 923 924 tasklet_schedule(&host->tasklet); 925} 926 927static irqreturn_t atmci_interrupt(int irq, void *dev_id) 928{ 929 struct mmc_host *mmc = dev_id; 930 struct atmel_mci *host = mmc_priv(mmc); 931 u32 status, mask, pending; 932 unsigned int pass_count = 0; 933 934 spin_lock(&mmc->lock); 935 936 do { 937 status = mci_readl(host, SR); 938 mask = mci_readl(host, IMR); 939 pending = status & mask; 940 if (!pending) 941 break; 942 943 if (pending & ATMCI_DATA_ERROR_FLAGS) { 944 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS 945 | MCI_RXRDY | MCI_TXRDY); 946 pending &= mci_readl(host, IMR); 947 host->data_status = status; 948 atmci_set_pending(host, EVENT_DATA_ERROR); 949 tasklet_schedule(&host->tasklet); 950 } 951 if (pending & MCI_NOTBUSY) { 952 mci_writel(host, IDR, (MCI_NOTBUSY 953 | ATMCI_DATA_ERROR_FLAGS)); 954 atmci_set_pending(host, EVENT_DATA_COMPLETE); 955 tasklet_schedule(&host->tasklet); 956 } 957 if (pending & MCI_RXRDY) 958 atmci_read_data_pio(host); 959 if (pending & MCI_TXRDY) 960 atmci_write_data_pio(host); 961 962 if (pending & MCI_CMDRDY) 963 atmci_cmd_interrupt(mmc, status); 964 } while (pass_count++ < 5); 965 966 spin_unlock(&mmc->lock); 967 968 return pass_count ? IRQ_HANDLED : IRQ_NONE; 969} 970 971static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id) 972{ 973 struct mmc_host *mmc = dev_id; 974 struct atmel_mci *host = mmc_priv(mmc); 975 976 /* 977 * Disable interrupts until the pin has stabilized and check 978 * the state then. Use mod_timer() since we may be in the 979 * middle of the timer routine when this interrupt triggers. 980 */ 981 disable_irq_nosync(irq); 982 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20)); 983 984 return IRQ_HANDLED; 985} 986 987static int __init atmci_probe(struct platform_device *pdev) 988{ 989 struct mci_platform_data *pdata; 990 struct atmel_mci *host; 991 struct mmc_host *mmc; 992 struct resource *regs; 993 int irq; 994 int ret; 995 996 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 997 if (!regs) 998 return -ENXIO; 999 pdata = pdev->dev.platform_data; 1000 if (!pdata) 1001 return -ENXIO; 1002 irq = platform_get_irq(pdev, 0); 1003 if (irq < 0) 1004 return irq; 1005 1006 mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev); 1007 if (!mmc) 1008 return -ENOMEM; 1009 1010 host = mmc_priv(mmc); 1011 host->pdev = pdev; 1012 host->mmc = mmc; 1013 host->detect_pin = pdata->detect_pin; 1014 host->wp_pin = pdata->wp_pin; 1015 1016 host->mck = clk_get(&pdev->dev, "mci_clk"); 1017 if (IS_ERR(host->mck)) { 1018 ret = PTR_ERR(host->mck); 1019 goto err_clk_get; 1020 } 1021 1022 ret = -ENOMEM; 1023 host->regs = ioremap(regs->start, regs->end - regs->start + 1); 1024 if (!host->regs) 1025 goto err_ioremap; 1026 1027 clk_enable(host->mck); 1028 mci_writel(host, CR, MCI_CR_SWRST); 1029 host->bus_hz = clk_get_rate(host->mck); 1030 clk_disable(host->mck); 1031 1032 host->mapbase = regs->start; 1033 1034 mmc->ops = &atmci_ops; 1035 mmc->f_min = (host->bus_hz + 511) / 512; 1036 mmc->f_max = host->bus_hz / 2; 1037 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1038 mmc->caps |= MMC_CAP_4_BIT_DATA; 1039 1040 mmc->max_hw_segs = 64; 1041 mmc->max_phys_segs = 64; 1042 mmc->max_req_size = 32768 * 512; 1043 mmc->max_blk_size = 32768; 1044 mmc->max_blk_count = 512; 1045 1046 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc); 1047 1048 ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, mmc); 1049 if (ret) 1050 goto err_request_irq; 1051 1052 /* Assume card is present if we don't have a detect pin */ 1053 host->present = 1; 1054 if (gpio_is_valid(host->detect_pin)) { 1055 if (gpio_request(host->detect_pin, "mmc_detect")) { 1056 dev_dbg(&mmc->class_dev, "no detect pin available\n"); 1057 host->detect_pin = -1; 1058 } else { 1059 host->present = !gpio_get_value(host->detect_pin); 1060 } 1061 } 1062 1063 if (!gpio_is_valid(host->detect_pin)) 1064 mmc->caps |= MMC_CAP_NEEDS_POLL; 1065 1066 if (gpio_is_valid(host->wp_pin)) { 1067 if (gpio_request(host->wp_pin, "mmc_wp")) { 1068 dev_dbg(&mmc->class_dev, "no WP pin available\n"); 1069 host->wp_pin = -1; 1070 } 1071 } 1072 1073 platform_set_drvdata(pdev, host); 1074 1075 mmc_add_host(mmc); 1076 1077 if (gpio_is_valid(host->detect_pin)) { 1078 setup_timer(&host->detect_timer, atmci_detect_change, 1079 (unsigned long)host); 1080 1081 ret = request_irq(gpio_to_irq(host->detect_pin), 1082 atmci_detect_interrupt, 1083 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 1084 "mmc-detect", mmc); 1085 if (ret) { 1086 dev_dbg(&mmc->class_dev, 1087 "could not request IRQ %d for detect pin\n", 1088 gpio_to_irq(host->detect_pin)); 1089 gpio_free(host->detect_pin); 1090 host->detect_pin = -1; 1091 } 1092 } 1093 1094 dev_info(&mmc->class_dev, 1095 "Atmel MCI controller at 0x%08lx irq %d\n", 1096 host->mapbase, irq); 1097 1098 atmci_init_debugfs(host); 1099 1100 return 0; 1101 1102err_request_irq: 1103 iounmap(host->regs); 1104err_ioremap: 1105 clk_put(host->mck); 1106err_clk_get: 1107 mmc_free_host(mmc); 1108 return ret; 1109} 1110 1111static int __exit atmci_remove(struct platform_device *pdev) 1112{ 1113 struct atmel_mci *host = platform_get_drvdata(pdev); 1114 1115 platform_set_drvdata(pdev, NULL); 1116 1117 if (host) { 1118 /* Debugfs stuff is cleaned up by mmc core */ 1119 1120 if (gpio_is_valid(host->detect_pin)) { 1121 int pin = host->detect_pin; 1122 1123 /* Make sure the timer doesn't enable the interrupt */ 1124 host->detect_pin = -1; 1125 smp_wmb(); 1126 1127 free_irq(gpio_to_irq(pin), host->mmc); 1128 del_timer_sync(&host->detect_timer); 1129 gpio_free(pin); 1130 } 1131 1132 mmc_remove_host(host->mmc); 1133 1134 clk_enable(host->mck); 1135 mci_writel(host, IDR, ~0UL); 1136 mci_writel(host, CR, MCI_CR_MCIDIS); 1137 mci_readl(host, SR); 1138 clk_disable(host->mck); 1139 1140 if (gpio_is_valid(host->wp_pin)) 1141 gpio_free(host->wp_pin); 1142 1143 free_irq(platform_get_irq(pdev, 0), host->mmc); 1144 iounmap(host->regs); 1145 1146 clk_put(host->mck); 1147 1148 mmc_free_host(host->mmc); 1149 } 1150 return 0; 1151} 1152 1153static struct platform_driver atmci_driver = { 1154 .remove = __exit_p(atmci_remove), 1155 .driver = { 1156 .name = "atmel_mci", 1157 }, 1158}; 1159 1160static int __init atmci_init(void) 1161{ 1162 return platform_driver_probe(&atmci_driver, atmci_probe); 1163} 1164 1165static void __exit atmci_exit(void) 1166{ 1167 platform_driver_unregister(&atmci_driver); 1168} 1169 1170module_init(atmci_init); 1171module_exit(atmci_exit); 1172 1173MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); 1174MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>"); 1175MODULE_LICENSE("GPL v2"); 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