1/* 2 * ichxrom.c 3 * 4 * Normal mappings of chips in physical memory 5 */ 6 7#include <linux/module.h> 8#include <linux/types.h> 9#include <linux/kernel.h> 10#include <linux/init.h> 11#include <linux/slab.h> 12#include <asm/io.h> 13#include <linux/mtd/mtd.h> 14#include <linux/mtd/map.h> 15#include <linux/mtd/cfi.h> 16#include <linux/mtd/flashchip.h> 17#include <linux/pci.h> 18#include <linux/pci_ids.h> 19#include <linux/list.h> 20 21#define xstr(s) str(s) 22#define str(s) #s 23#define MOD_NAME xstr(KBUILD_BASENAME) 24 25#define ADDRESS_NAME_LEN 18 26 27#define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */ 28 29#define BIOS_CNTL 0x4e 30#define FWH_DEC_EN1 0xE3 31#define FWH_DEC_EN2 0xF0 32#define FWH_SEL1 0xE8 33#define FWH_SEL2 0xEE 34 35struct ichxrom_window { 36 void __iomem* virt; 37 unsigned long phys; 38 unsigned long size; 39 struct list_head maps; 40 struct resource rsrc; 41 struct pci_dev *pdev; 42}; 43 44struct ichxrom_map_info { 45 struct list_head list; 46 struct map_info map; 47 struct mtd_info *mtd; 48 struct resource rsrc; 49 char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN]; 50}; 51 52static struct ichxrom_window ichxrom_window = { 53 .maps = LIST_HEAD_INIT(ichxrom_window.maps), 54}; 55 56static void ichxrom_cleanup(struct ichxrom_window *window) 57{ 58 struct ichxrom_map_info *map, *scratch; 59 u16 word; 60 61 /* Disable writes through the rom window */ 62 pci_read_config_word(window->pdev, BIOS_CNTL, &word); 63 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); 64 pci_dev_put(window->pdev); 65 66 /* Free all of the mtd devices */ 67 list_for_each_entry_safe(map, scratch, &window->maps, list) { 68 if (map->rsrc.parent) 69 release_resource(&map->rsrc); 70 mtd_device_unregister(map->mtd); 71 map_destroy(map->mtd); 72 list_del(&map->list); 73 kfree(map); 74 } 75 if (window->rsrc.parent) 76 release_resource(&window->rsrc); 77 if (window->virt) { 78 iounmap(window->virt); 79 window->virt = NULL; 80 window->phys = 0; 81 window->size = 0; 82 window->pdev = NULL; 83 } 84} 85 86 87static int __devinit ichxrom_init_one (struct pci_dev *pdev, 88 const struct pci_device_id *ent) 89{ 90 static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL }; 91 struct ichxrom_window *window = &ichxrom_window; 92 struct ichxrom_map_info *map = NULL; 93 unsigned long map_top; 94 u8 byte; 95 u16 word; 96 97 /* For now I just handle the ichx and I assume there 98 * are not a lot of resources up at the top of the address 99 * space. It is possible to handle other devices in the 100 * top 16MB but it is very painful. Also since 101 * you can only really attach a FWH to an ICHX there 102 * a number of simplifications you can make. 103 * 104 * Also you can page firmware hubs if an 8MB window isn't enough 105 * but don't currently handle that case either. 106 */ 107 window->pdev = pdev; 108 109 /* Find a region continuous to the end of the ROM window */ 110 window->phys = 0; 111 pci_read_config_byte(pdev, FWH_DEC_EN1, &byte); 112 if (byte == 0xff) { 113 window->phys = 0xffc00000; 114 pci_read_config_byte(pdev, FWH_DEC_EN2, &byte); 115 if ((byte & 0x0f) == 0x0f) { 116 window->phys = 0xff400000; 117 } 118 else if ((byte & 0x0e) == 0x0e) { 119 window->phys = 0xff500000; 120 } 121 else if ((byte & 0x0c) == 0x0c) { 122 window->phys = 0xff600000; 123 } 124 else if ((byte & 0x08) == 0x08) { 125 window->phys = 0xff700000; 126 } 127 } 128 else if ((byte & 0xfe) == 0xfe) { 129 window->phys = 0xffc80000; 130 } 131 else if ((byte & 0xfc) == 0xfc) { 132 window->phys = 0xffd00000; 133 } 134 else if ((byte & 0xf8) == 0xf8) { 135 window->phys = 0xffd80000; 136 } 137 else if ((byte & 0xf0) == 0xf0) { 138 window->phys = 0xffe00000; 139 } 140 else if ((byte & 0xe0) == 0xe0) { 141 window->phys = 0xffe80000; 142 } 143 else if ((byte & 0xc0) == 0xc0) { 144 window->phys = 0xfff00000; 145 } 146 else if ((byte & 0x80) == 0x80) { 147 window->phys = 0xfff80000; 148 } 149 150 if (window->phys == 0) { 151 printk(KERN_ERR MOD_NAME ": Rom window is closed\n"); 152 goto out; 153 } 154 window->phys -= 0x400000UL; 155 window->size = (0xffffffffUL - window->phys) + 1UL; 156 157 /* Enable writes through the rom window */ 158 pci_read_config_word(pdev, BIOS_CNTL, &word); 159 if (!(word & 1) && (word & (1<<1))) { 160 /* The BIOS will generate an error if I enable 161 * this device, so don't even try. 162 */ 163 printk(KERN_ERR MOD_NAME ": firmware access control, I can't enable writes\n"); 164 goto out; 165 } 166 pci_write_config_word(pdev, BIOS_CNTL, word | 1); 167 168 /* 169 * Try to reserve the window mem region. If this fails then 170 * it is likely due to the window being "reseved" by the BIOS. 171 */ 172 window->rsrc.name = MOD_NAME; 173 window->rsrc.start = window->phys; 174 window->rsrc.end = window->phys + window->size - 1; 175 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; 176 if (request_resource(&iomem_resource, &window->rsrc)) { 177 window->rsrc.parent = NULL; 178 printk(KERN_DEBUG MOD_NAME ": " 179 "%s(): Unable to register resource %pR - kernel bug?\n", 180 __func__, &window->rsrc); 181 } 182 183 /* Map the firmware hub into my address space. */ 184 window->virt = ioremap_nocache(window->phys, window->size); 185 if (!window->virt) { 186 printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", 187 window->phys, window->size); 188 goto out; 189 } 190 191 /* Get the first address to look for an rom chip at */ 192 map_top = window->phys; 193 if ((window->phys & 0x3fffff) != 0) { 194 map_top = window->phys + 0x400000; 195 } 196#if 1 197 /* The probe sequence run over the firmware hub lock 198 * registers sets them to 0x7 (no access). 199 * Probe at most the last 4M of the address space. 200 */ 201 if (map_top < 0xffc00000) { 202 map_top = 0xffc00000; 203 } 204#endif 205 /* Loop through and look for rom chips */ 206 while((map_top - 1) < 0xffffffffUL) { 207 struct cfi_private *cfi; 208 unsigned long offset; 209 int i; 210 211 if (!map) { 212 map = kmalloc(sizeof(*map), GFP_KERNEL); 213 } 214 if (!map) { 215 printk(KERN_ERR MOD_NAME ": kmalloc failed"); 216 goto out; 217 } 218 memset(map, 0, sizeof(*map)); 219 INIT_LIST_HEAD(&map->list); 220 map->map.name = map->map_name; 221 map->map.phys = map_top; 222 offset = map_top - window->phys; 223 map->map.virt = (void __iomem *) 224 (((unsigned long)(window->virt)) + offset); 225 map->map.size = 0xffffffffUL - map_top + 1UL; 226 /* Set the name of the map to the address I am trying */ 227 sprintf(map->map_name, "%s @%08Lx", 228 MOD_NAME, (unsigned long long)map->map.phys); 229 230 /* Firmware hubs only use vpp when being programmed 231 * in a factory setting. So in-place programming 232 * needs to use a different method. 233 */ 234 for(map->map.bankwidth = 32; map->map.bankwidth; 235 map->map.bankwidth >>= 1) 236 { 237 char **probe_type; 238 /* Skip bankwidths that are not supported */ 239 if (!map_bankwidth_supported(map->map.bankwidth)) 240 continue; 241 242 /* Setup the map methods */ 243 simple_map_init(&map->map); 244 245 /* Try all of the probe methods */ 246 probe_type = rom_probe_types; 247 for(; *probe_type; probe_type++) { 248 map->mtd = do_map_probe(*probe_type, &map->map); 249 if (map->mtd) 250 goto found; 251 } 252 } 253 map_top += ROM_PROBE_STEP_SIZE; 254 continue; 255 found: 256 /* Trim the size if we are larger than the map */ 257 if (map->mtd->size > map->map.size) { 258 printk(KERN_WARNING MOD_NAME 259 " rom(%llu) larger than window(%lu). fixing...\n", 260 (unsigned long long)map->mtd->size, map->map.size); 261 map->mtd->size = map->map.size; 262 } 263 if (window->rsrc.parent) { 264 /* 265 * Registering the MTD device in iomem may not be possible 266 * if there is a BIOS "reserved" and BUSY range. If this 267 * fails then continue anyway. 268 */ 269 map->rsrc.name = map->map_name; 270 map->rsrc.start = map->map.phys; 271 map->rsrc.end = map->map.phys + map->mtd->size - 1; 272 map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; 273 if (request_resource(&window->rsrc, &map->rsrc)) { 274 printk(KERN_ERR MOD_NAME 275 ": cannot reserve MTD resource\n"); 276 map->rsrc.parent = NULL; 277 } 278 } 279 280 /* Make the whole region visible in the map */ 281 map->map.virt = window->virt; 282 map->map.phys = window->phys; 283 cfi = map->map.fldrv_priv; 284 for(i = 0; i < cfi->numchips; i++) { 285 cfi->chips[i].start += offset; 286 } 287 288 /* Now that the mtd devices is complete claim and export it */ 289 map->mtd->owner = THIS_MODULE; 290 if (mtd_device_register(map->mtd, NULL, 0)) { 291 map_destroy(map->mtd); 292 map->mtd = NULL; 293 goto out; 294 } 295 296 297 /* Calculate the new value of map_top */ 298 map_top += map->mtd->size; 299 300 /* File away the map structure */ 301 list_add(&map->list, &window->maps); 302 map = NULL; 303 } 304 305 out: 306 /* Free any left over map structures */ 307 kfree(map); 308 309 /* See if I have any map structures */ 310 if (list_empty(&window->maps)) { 311 ichxrom_cleanup(window); 312 return -ENODEV; 313 } 314 return 0; 315} 316 317 318static void __devexit ichxrom_remove_one (struct pci_dev *pdev) 319{ 320 struct ichxrom_window *window = &ichxrom_window; 321 ichxrom_cleanup(window); 322} 323 324static struct pci_device_id ichxrom_pci_tbl[] __devinitdata = { 325 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, 326 PCI_ANY_ID, PCI_ANY_ID, }, 327 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, 328 PCI_ANY_ID, PCI_ANY_ID, }, 329 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, 330 PCI_ANY_ID, PCI_ANY_ID, }, 331 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, 332 PCI_ANY_ID, PCI_ANY_ID, }, 333 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, 334 PCI_ANY_ID, PCI_ANY_ID, }, 335 { 0, }, 336}; 337 338#if 0 339MODULE_DEVICE_TABLE(pci, ichxrom_pci_tbl); 340 341static struct pci_driver ichxrom_driver = { 342 .name = MOD_NAME, 343 .id_table = ichxrom_pci_tbl, 344 .probe = ichxrom_init_one, 345 .remove = ichxrom_remove_one, 346}; 347#endif 348 349static int __init init_ichxrom(void) 350{ 351 struct pci_dev *pdev; 352 struct pci_device_id *id; 353 354 pdev = NULL; 355 for (id = ichxrom_pci_tbl; id->vendor; id++) { 356 pdev = pci_get_device(id->vendor, id->device, NULL); 357 if (pdev) { 358 break; 359 } 360 } 361 if (pdev) { 362 return ichxrom_init_one(pdev, &ichxrom_pci_tbl[0]); 363 } 364 return -ENXIO; 365#if 0 366 return pci_register_driver(&ichxrom_driver); 367#endif 368} 369 370static void __exit cleanup_ichxrom(void) 371{ 372 ichxrom_remove_one(ichxrom_window.pdev); 373} 374 375module_init(init_ichxrom); 376module_exit(cleanup_ichxrom); 377 378MODULE_LICENSE("GPL"); 379MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>"); 380MODULE_DESCRIPTION("MTD map driver for BIOS chips on the ICHX southbridge"); 381