onenand_base.c revision e0c1a921f62d22d1aa62c72ddb793f898945ff5a
1/* 2 * linux/drivers/mtd/onenand/onenand_base.c 3 * 4 * Copyright © 2005-2009 Samsung Electronics 5 * Copyright © 2007 Nokia Corporation 6 * 7 * Kyungmin Park <kyungmin.park@samsung.com> 8 * 9 * Credits: 10 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 11 * auto-placement support, read-while load support, various fixes 12 * 13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com> 14 * Flex-OneNAND support 15 * Amul Kumar Saha <amul.saha at samsung.com> 16 * OTP support 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License version 2 as 20 * published by the Free Software Foundation. 21 */ 22 23#include <linux/kernel.h> 24#include <linux/module.h> 25#include <linux/moduleparam.h> 26#include <linux/slab.h> 27#include <linux/init.h> 28#include <linux/sched.h> 29#include <linux/delay.h> 30#include <linux/interrupt.h> 31#include <linux/jiffies.h> 32#include <linux/mtd/mtd.h> 33#include <linux/mtd/onenand.h> 34#include <linux/mtd/partitions.h> 35 36#include <asm/io.h> 37 38/* 39 * Multiblock erase if number of blocks to erase is 2 or more. 40 * Maximum number of blocks for simultaneous erase is 64. 41 */ 42#define MB_ERASE_MIN_BLK_COUNT 2 43#define MB_ERASE_MAX_BLK_COUNT 64 44 45/* Default Flex-OneNAND boundary and lock respectively */ 46static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 }; 47 48module_param_array(flex_bdry, int, NULL, 0400); 49MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND" 50 "Syntax:flex_bdry=DIE_BDRY,LOCK,..." 51 "DIE_BDRY: SLC boundary of the die" 52 "LOCK: Locking information for SLC boundary" 53 " : 0->Set boundary in unlocked status" 54 " : 1->Set boundary in locked status"); 55 56/* Default OneNAND/Flex-OneNAND OTP options*/ 57static int otp; 58 59module_param(otp, int, 0400); 60MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP" 61 "Syntax : otp=LOCK_TYPE" 62 "LOCK_TYPE : Keys issued, for specific OTP Lock type" 63 " : 0 -> Default (No Blocks Locked)" 64 " : 1 -> OTP Block lock" 65 " : 2 -> 1st Block lock" 66 " : 3 -> BOTH OTP Block and 1st Block lock"); 67 68/** 69 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page 70 * For now, we expose only 64 out of 80 ecc bytes 71 */ 72static struct nand_ecclayout onenand_oob_128 = { 73 .eccbytes = 64, 74 .eccpos = { 75 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 76 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 77 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 78 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 79 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 81 102, 103, 104, 105 82 }, 83 .oobfree = { 84 {2, 4}, {18, 4}, {34, 4}, {50, 4}, 85 {66, 4}, {82, 4}, {98, 4}, {114, 4} 86 } 87}; 88 89/** 90 * onenand_oob_64 - oob info for large (2KB) page 91 */ 92static struct nand_ecclayout onenand_oob_64 = { 93 .eccbytes = 20, 94 .eccpos = { 95 8, 9, 10, 11, 12, 96 24, 25, 26, 27, 28, 97 40, 41, 42, 43, 44, 98 56, 57, 58, 59, 60, 99 }, 100 .oobfree = { 101 {2, 3}, {14, 2}, {18, 3}, {30, 2}, 102 {34, 3}, {46, 2}, {50, 3}, {62, 2} 103 } 104}; 105 106/** 107 * onenand_oob_32 - oob info for middle (1KB) page 108 */ 109static struct nand_ecclayout onenand_oob_32 = { 110 .eccbytes = 10, 111 .eccpos = { 112 8, 9, 10, 11, 12, 113 24, 25, 26, 27, 28, 114 }, 115 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } 116}; 117 118static const unsigned char ffchars[] = { 119 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 120 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 121 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 122 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 123 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 124 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 125 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 126 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 127 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 128 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */ 129 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 130 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */ 131 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 132 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */ 133 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 134 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */ 135}; 136 137/** 138 * onenand_readw - [OneNAND Interface] Read OneNAND register 139 * @param addr address to read 140 * 141 * Read OneNAND register 142 */ 143static unsigned short onenand_readw(void __iomem *addr) 144{ 145 return readw(addr); 146} 147 148/** 149 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 150 * @param value value to write 151 * @param addr address to write 152 * 153 * Write OneNAND register with value 154 */ 155static void onenand_writew(unsigned short value, void __iomem *addr) 156{ 157 writew(value, addr); 158} 159 160/** 161 * onenand_block_address - [DEFAULT] Get block address 162 * @param this onenand chip data structure 163 * @param block the block 164 * @return translated block address if DDP, otherwise same 165 * 166 * Setup Start Address 1 Register (F100h) 167 */ 168static int onenand_block_address(struct onenand_chip *this, int block) 169{ 170 /* Device Flash Core select, NAND Flash Block Address */ 171 if (block & this->density_mask) 172 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); 173 174 return block; 175} 176 177/** 178 * onenand_bufferram_address - [DEFAULT] Get bufferram address 179 * @param this onenand chip data structure 180 * @param block the block 181 * @return set DBS value if DDP, otherwise 0 182 * 183 * Setup Start Address 2 Register (F101h) for DDP 184 */ 185static int onenand_bufferram_address(struct onenand_chip *this, int block) 186{ 187 /* Device BufferRAM Select */ 188 if (block & this->density_mask) 189 return ONENAND_DDP_CHIP1; 190 191 return ONENAND_DDP_CHIP0; 192} 193 194/** 195 * onenand_page_address - [DEFAULT] Get page address 196 * @param page the page address 197 * @param sector the sector address 198 * @return combined page and sector address 199 * 200 * Setup Start Address 8 Register (F107h) 201 */ 202static int onenand_page_address(int page, int sector) 203{ 204 /* Flash Page Address, Flash Sector Address */ 205 int fpa, fsa; 206 207 fpa = page & ONENAND_FPA_MASK; 208 fsa = sector & ONENAND_FSA_MASK; 209 210 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 211} 212 213/** 214 * onenand_buffer_address - [DEFAULT] Get buffer address 215 * @param dataram1 DataRAM index 216 * @param sectors the sector address 217 * @param count the number of sectors 218 * @return the start buffer value 219 * 220 * Setup Start Buffer Register (F200h) 221 */ 222static int onenand_buffer_address(int dataram1, int sectors, int count) 223{ 224 int bsa, bsc; 225 226 /* BufferRAM Sector Address */ 227 bsa = sectors & ONENAND_BSA_MASK; 228 229 if (dataram1) 230 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 231 else 232 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 233 234 /* BufferRAM Sector Count */ 235 bsc = count & ONENAND_BSC_MASK; 236 237 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 238} 239 240/** 241 * flexonenand_block- For given address return block number 242 * @param this - OneNAND device structure 243 * @param addr - Address for which block number is needed 244 */ 245static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr) 246{ 247 unsigned boundary, blk, die = 0; 248 249 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) { 250 die = 1; 251 addr -= this->diesize[0]; 252 } 253 254 boundary = this->boundary[die]; 255 256 blk = addr >> (this->erase_shift - 1); 257 if (blk > boundary) 258 blk = (blk + boundary + 1) >> 1; 259 260 blk += die ? this->density_mask : 0; 261 return blk; 262} 263 264inline unsigned onenand_block(struct onenand_chip *this, loff_t addr) 265{ 266 if (!FLEXONENAND(this)) 267 return addr >> this->erase_shift; 268 return flexonenand_block(this, addr); 269} 270 271/** 272 * flexonenand_addr - Return address of the block 273 * @this: OneNAND device structure 274 * @block: Block number on Flex-OneNAND 275 * 276 * Return address of the block 277 */ 278static loff_t flexonenand_addr(struct onenand_chip *this, int block) 279{ 280 loff_t ofs = 0; 281 int die = 0, boundary; 282 283 if (ONENAND_IS_DDP(this) && block >= this->density_mask) { 284 block -= this->density_mask; 285 die = 1; 286 ofs = this->diesize[0]; 287 } 288 289 boundary = this->boundary[die]; 290 ofs += (loff_t)block << (this->erase_shift - 1); 291 if (block > (boundary + 1)) 292 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1); 293 return ofs; 294} 295 296loff_t onenand_addr(struct onenand_chip *this, int block) 297{ 298 if (!FLEXONENAND(this)) 299 return (loff_t)block << this->erase_shift; 300 return flexonenand_addr(this, block); 301} 302EXPORT_SYMBOL(onenand_addr); 303 304/** 305 * onenand_get_density - [DEFAULT] Get OneNAND density 306 * @param dev_id OneNAND device ID 307 * 308 * Get OneNAND density from device ID 309 */ 310static inline int onenand_get_density(int dev_id) 311{ 312 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 313 return (density & ONENAND_DEVICE_DENSITY_MASK); 314} 315 316/** 317 * flexonenand_region - [Flex-OneNAND] Return erase region of addr 318 * @param mtd MTD device structure 319 * @param addr address whose erase region needs to be identified 320 */ 321int flexonenand_region(struct mtd_info *mtd, loff_t addr) 322{ 323 int i; 324 325 for (i = 0; i < mtd->numeraseregions; i++) 326 if (addr < mtd->eraseregions[i].offset) 327 break; 328 return i - 1; 329} 330EXPORT_SYMBOL(flexonenand_region); 331 332/** 333 * onenand_command - [DEFAULT] Send command to OneNAND device 334 * @param mtd MTD device structure 335 * @param cmd the command to be sent 336 * @param addr offset to read from or write to 337 * @param len number of bytes to read or write 338 * 339 * Send command to OneNAND device. This function is used for middle/large page 340 * devices (1KB/2KB Bytes per page) 341 */ 342static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) 343{ 344 struct onenand_chip *this = mtd->priv; 345 int value, block, page; 346 347 /* Address translation */ 348 switch (cmd) { 349 case ONENAND_CMD_UNLOCK: 350 case ONENAND_CMD_LOCK: 351 case ONENAND_CMD_LOCK_TIGHT: 352 case ONENAND_CMD_UNLOCK_ALL: 353 block = -1; 354 page = -1; 355 break; 356 357 case FLEXONENAND_CMD_PI_ACCESS: 358 /* addr contains die index */ 359 block = addr * this->density_mask; 360 page = -1; 361 break; 362 363 case ONENAND_CMD_ERASE: 364 case ONENAND_CMD_MULTIBLOCK_ERASE: 365 case ONENAND_CMD_ERASE_VERIFY: 366 case ONENAND_CMD_BUFFERRAM: 367 case ONENAND_CMD_OTP_ACCESS: 368 block = onenand_block(this, addr); 369 page = -1; 370 break; 371 372 case FLEXONENAND_CMD_READ_PI: 373 cmd = ONENAND_CMD_READ; 374 block = addr * this->density_mask; 375 page = 0; 376 break; 377 378 default: 379 block = onenand_block(this, addr); 380 if (FLEXONENAND(this)) 381 page = (int) (addr - onenand_addr(this, block))>>\ 382 this->page_shift; 383 else 384 page = (int) (addr >> this->page_shift); 385 if (ONENAND_IS_2PLANE(this)) { 386 /* Make the even block number */ 387 block &= ~1; 388 /* Is it the odd plane? */ 389 if (addr & this->writesize) 390 block++; 391 page >>= 1; 392 } 393 page &= this->page_mask; 394 break; 395 } 396 397 /* NOTE: The setting order of the registers is very important! */ 398 if (cmd == ONENAND_CMD_BUFFERRAM) { 399 /* Select DataRAM for DDP */ 400 value = onenand_bufferram_address(this, block); 401 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 402 403 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) 404 /* It is always BufferRAM0 */ 405 ONENAND_SET_BUFFERRAM0(this); 406 else 407 /* Switch to the next data buffer */ 408 ONENAND_SET_NEXT_BUFFERRAM(this); 409 410 return 0; 411 } 412 413 if (block != -1) { 414 /* Write 'DFS, FBA' of Flash */ 415 value = onenand_block_address(this, block); 416 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 417 418 /* Select DataRAM for DDP */ 419 value = onenand_bufferram_address(this, block); 420 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 421 } 422 423 if (page != -1) { 424 /* Now we use page size operation */ 425 int sectors = 0, count = 0; 426 int dataram; 427 428 switch (cmd) { 429 case FLEXONENAND_CMD_RECOVER_LSB: 430 case ONENAND_CMD_READ: 431 case ONENAND_CMD_READOOB: 432 if (ONENAND_IS_4KB_PAGE(this)) 433 /* It is always BufferRAM0 */ 434 dataram = ONENAND_SET_BUFFERRAM0(this); 435 else 436 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 437 break; 438 439 default: 440 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 441 cmd = ONENAND_CMD_2X_PROG; 442 dataram = ONENAND_CURRENT_BUFFERRAM(this); 443 break; 444 } 445 446 /* Write 'FPA, FSA' of Flash */ 447 value = onenand_page_address(page, sectors); 448 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); 449 450 /* Write 'BSA, BSC' of DataRAM */ 451 value = onenand_buffer_address(dataram, sectors, count); 452 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 453 } 454 455 /* Interrupt clear */ 456 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 457 458 /* Write command */ 459 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 460 461 return 0; 462} 463 464/** 465 * onenand_read_ecc - return ecc status 466 * @param this onenand chip structure 467 */ 468static inline int onenand_read_ecc(struct onenand_chip *this) 469{ 470 int ecc, i, result = 0; 471 472 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this)) 473 return this->read_word(this->base + ONENAND_REG_ECC_STATUS); 474 475 for (i = 0; i < 4; i++) { 476 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2); 477 if (likely(!ecc)) 478 continue; 479 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) 480 return ONENAND_ECC_2BIT_ALL; 481 else 482 result = ONENAND_ECC_1BIT_ALL; 483 } 484 485 return result; 486} 487 488/** 489 * onenand_wait - [DEFAULT] wait until the command is done 490 * @param mtd MTD device structure 491 * @param state state to select the max. timeout value 492 * 493 * Wait for command done. This applies to all OneNAND command 494 * Read can take up to 30us, erase up to 2ms and program up to 350us 495 * according to general OneNAND specs 496 */ 497static int onenand_wait(struct mtd_info *mtd, int state) 498{ 499 struct onenand_chip * this = mtd->priv; 500 unsigned long timeout; 501 unsigned int flags = ONENAND_INT_MASTER; 502 unsigned int interrupt = 0; 503 unsigned int ctrl; 504 505 /* The 20 msec is enough */ 506 timeout = jiffies + msecs_to_jiffies(20); 507 while (time_before(jiffies, timeout)) { 508 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 509 510 if (interrupt & flags) 511 break; 512 513 if (state != FL_READING && state != FL_PREPARING_ERASE) 514 cond_resched(); 515 } 516 /* To get correct interrupt status in timeout case */ 517 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 518 519 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 520 521 /* 522 * In the Spec. it checks the controller status first 523 * However if you get the correct information in case of 524 * power off recovery (POR) test, it should read ECC status first 525 */ 526 if (interrupt & ONENAND_INT_READ) { 527 int ecc = onenand_read_ecc(this); 528 if (ecc) { 529 if (ecc & ONENAND_ECC_2BIT_ALL) { 530 printk(KERN_ERR "%s: ECC error = 0x%04x\n", 531 __func__, ecc); 532 mtd->ecc_stats.failed++; 533 return -EBADMSG; 534 } else if (ecc & ONENAND_ECC_1BIT_ALL) { 535 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n", 536 __func__, ecc); 537 mtd->ecc_stats.corrected++; 538 } 539 } 540 } else if (state == FL_READING) { 541 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", 542 __func__, ctrl, interrupt); 543 return -EIO; 544 } 545 546 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) { 547 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n", 548 __func__, ctrl, interrupt); 549 return -EIO; 550 } 551 552 if (!(interrupt & ONENAND_INT_MASTER)) { 553 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n", 554 __func__, ctrl, interrupt); 555 return -EIO; 556 } 557 558 /* If there's controller error, it's a real error */ 559 if (ctrl & ONENAND_CTRL_ERROR) { 560 printk(KERN_ERR "%s: controller error = 0x%04x\n", 561 __func__, ctrl); 562 if (ctrl & ONENAND_CTRL_LOCK) 563 printk(KERN_ERR "%s: it's locked error.\n", __func__); 564 return -EIO; 565 } 566 567 return 0; 568} 569 570/* 571 * onenand_interrupt - [DEFAULT] onenand interrupt handler 572 * @param irq onenand interrupt number 573 * @param dev_id interrupt data 574 * 575 * complete the work 576 */ 577static irqreturn_t onenand_interrupt(int irq, void *data) 578{ 579 struct onenand_chip *this = data; 580 581 /* To handle shared interrupt */ 582 if (!this->complete.done) 583 complete(&this->complete); 584 585 return IRQ_HANDLED; 586} 587 588/* 589 * onenand_interrupt_wait - [DEFAULT] wait until the command is done 590 * @param mtd MTD device structure 591 * @param state state to select the max. timeout value 592 * 593 * Wait for command done. 594 */ 595static int onenand_interrupt_wait(struct mtd_info *mtd, int state) 596{ 597 struct onenand_chip *this = mtd->priv; 598 599 wait_for_completion(&this->complete); 600 601 return onenand_wait(mtd, state); 602} 603 604/* 605 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait 606 * @param mtd MTD device structure 607 * @param state state to select the max. timeout value 608 * 609 * Try interrupt based wait (It is used one-time) 610 */ 611static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state) 612{ 613 struct onenand_chip *this = mtd->priv; 614 unsigned long remain, timeout; 615 616 /* We use interrupt wait first */ 617 this->wait = onenand_interrupt_wait; 618 619 timeout = msecs_to_jiffies(100); 620 remain = wait_for_completion_timeout(&this->complete, timeout); 621 if (!remain) { 622 printk(KERN_INFO "OneNAND: There's no interrupt. " 623 "We use the normal wait\n"); 624 625 /* Release the irq */ 626 free_irq(this->irq, this); 627 628 this->wait = onenand_wait; 629 } 630 631 return onenand_wait(mtd, state); 632} 633 634/* 635 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method 636 * @param mtd MTD device structure 637 * 638 * There's two method to wait onenand work 639 * 1. polling - read interrupt status register 640 * 2. interrupt - use the kernel interrupt method 641 */ 642static void onenand_setup_wait(struct mtd_info *mtd) 643{ 644 struct onenand_chip *this = mtd->priv; 645 int syscfg; 646 647 init_completion(&this->complete); 648 649 if (this->irq <= 0) { 650 this->wait = onenand_wait; 651 return; 652 } 653 654 if (request_irq(this->irq, &onenand_interrupt, 655 IRQF_SHARED, "onenand", this)) { 656 /* If we can't get irq, use the normal wait */ 657 this->wait = onenand_wait; 658 return; 659 } 660 661 /* Enable interrupt */ 662 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 663 syscfg |= ONENAND_SYS_CFG1_IOBE; 664 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 665 666 this->wait = onenand_try_interrupt_wait; 667} 668 669/** 670 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 671 * @param mtd MTD data structure 672 * @param area BufferRAM area 673 * @return offset given area 674 * 675 * Return BufferRAM offset given area 676 */ 677static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 678{ 679 struct onenand_chip *this = mtd->priv; 680 681 if (ONENAND_CURRENT_BUFFERRAM(this)) { 682 /* Note: the 'this->writesize' is a real page size */ 683 if (area == ONENAND_DATARAM) 684 return this->writesize; 685 if (area == ONENAND_SPARERAM) 686 return mtd->oobsize; 687 } 688 689 return 0; 690} 691 692/** 693 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 694 * @param mtd MTD data structure 695 * @param area BufferRAM area 696 * @param buffer the databuffer to put/get data 697 * @param offset offset to read from or write to 698 * @param count number of bytes to read/write 699 * 700 * Read the BufferRAM area 701 */ 702static int onenand_read_bufferram(struct mtd_info *mtd, int area, 703 unsigned char *buffer, int offset, size_t count) 704{ 705 struct onenand_chip *this = mtd->priv; 706 void __iomem *bufferram; 707 708 bufferram = this->base + area; 709 710 bufferram += onenand_bufferram_offset(mtd, area); 711 712 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 713 unsigned short word; 714 715 /* Align with word(16-bit) size */ 716 count--; 717 718 /* Read word and save byte */ 719 word = this->read_word(bufferram + offset + count); 720 buffer[count] = (word & 0xff); 721 } 722 723 memcpy(buffer, bufferram + offset, count); 724 725 return 0; 726} 727 728/** 729 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 730 * @param mtd MTD data structure 731 * @param area BufferRAM area 732 * @param buffer the databuffer to put/get data 733 * @param offset offset to read from or write to 734 * @param count number of bytes to read/write 735 * 736 * Read the BufferRAM area with Sync. Burst Mode 737 */ 738static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, 739 unsigned char *buffer, int offset, size_t count) 740{ 741 struct onenand_chip *this = mtd->priv; 742 void __iomem *bufferram; 743 744 bufferram = this->base + area; 745 746 bufferram += onenand_bufferram_offset(mtd, area); 747 748 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 749 750 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 751 unsigned short word; 752 753 /* Align with word(16-bit) size */ 754 count--; 755 756 /* Read word and save byte */ 757 word = this->read_word(bufferram + offset + count); 758 buffer[count] = (word & 0xff); 759 } 760 761 memcpy(buffer, bufferram + offset, count); 762 763 this->mmcontrol(mtd, 0); 764 765 return 0; 766} 767 768/** 769 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 770 * @param mtd MTD data structure 771 * @param area BufferRAM area 772 * @param buffer the databuffer to put/get data 773 * @param offset offset to read from or write to 774 * @param count number of bytes to read/write 775 * 776 * Write the BufferRAM area 777 */ 778static int onenand_write_bufferram(struct mtd_info *mtd, int area, 779 const unsigned char *buffer, int offset, size_t count) 780{ 781 struct onenand_chip *this = mtd->priv; 782 void __iomem *bufferram; 783 784 bufferram = this->base + area; 785 786 bufferram += onenand_bufferram_offset(mtd, area); 787 788 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 789 unsigned short word; 790 int byte_offset; 791 792 /* Align with word(16-bit) size */ 793 count--; 794 795 /* Calculate byte access offset */ 796 byte_offset = offset + count; 797 798 /* Read word and save byte */ 799 word = this->read_word(bufferram + byte_offset); 800 word = (word & ~0xff) | buffer[count]; 801 this->write_word(word, bufferram + byte_offset); 802 } 803 804 memcpy(bufferram + offset, buffer, count); 805 806 return 0; 807} 808 809/** 810 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode 811 * @param mtd MTD data structure 812 * @param addr address to check 813 * @return blockpage address 814 * 815 * Get blockpage address at 2x program mode 816 */ 817static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) 818{ 819 struct onenand_chip *this = mtd->priv; 820 int blockpage, block, page; 821 822 /* Calculate the even block number */ 823 block = (int) (addr >> this->erase_shift) & ~1; 824 /* Is it the odd plane? */ 825 if (addr & this->writesize) 826 block++; 827 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; 828 blockpage = (block << 7) | page; 829 830 return blockpage; 831} 832 833/** 834 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 835 * @param mtd MTD data structure 836 * @param addr address to check 837 * @return 1 if there are valid data, otherwise 0 838 * 839 * Check bufferram if there is data we required 840 */ 841static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 842{ 843 struct onenand_chip *this = mtd->priv; 844 int blockpage, found = 0; 845 unsigned int i; 846 847 if (ONENAND_IS_2PLANE(this)) 848 blockpage = onenand_get_2x_blockpage(mtd, addr); 849 else 850 blockpage = (int) (addr >> this->page_shift); 851 852 /* Is there valid data? */ 853 i = ONENAND_CURRENT_BUFFERRAM(this); 854 if (this->bufferram[i].blockpage == blockpage) 855 found = 1; 856 else { 857 /* Check another BufferRAM */ 858 i = ONENAND_NEXT_BUFFERRAM(this); 859 if (this->bufferram[i].blockpage == blockpage) { 860 ONENAND_SET_NEXT_BUFFERRAM(this); 861 found = 1; 862 } 863 } 864 865 if (found && ONENAND_IS_DDP(this)) { 866 /* Select DataRAM for DDP */ 867 int block = onenand_block(this, addr); 868 int value = onenand_bufferram_address(this, block); 869 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 870 } 871 872 return found; 873} 874 875/** 876 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 877 * @param mtd MTD data structure 878 * @param addr address to update 879 * @param valid valid flag 880 * 881 * Update BufferRAM information 882 */ 883static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 884 int valid) 885{ 886 struct onenand_chip *this = mtd->priv; 887 int blockpage; 888 unsigned int i; 889 890 if (ONENAND_IS_2PLANE(this)) 891 blockpage = onenand_get_2x_blockpage(mtd, addr); 892 else 893 blockpage = (int) (addr >> this->page_shift); 894 895 /* Invalidate another BufferRAM */ 896 i = ONENAND_NEXT_BUFFERRAM(this); 897 if (this->bufferram[i].blockpage == blockpage) 898 this->bufferram[i].blockpage = -1; 899 900 /* Update BufferRAM */ 901 i = ONENAND_CURRENT_BUFFERRAM(this); 902 if (valid) 903 this->bufferram[i].blockpage = blockpage; 904 else 905 this->bufferram[i].blockpage = -1; 906} 907 908/** 909 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information 910 * @param mtd MTD data structure 911 * @param addr start address to invalidate 912 * @param len length to invalidate 913 * 914 * Invalidate BufferRAM information 915 */ 916static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, 917 unsigned int len) 918{ 919 struct onenand_chip *this = mtd->priv; 920 int i; 921 loff_t end_addr = addr + len; 922 923 /* Invalidate BufferRAM */ 924 for (i = 0; i < MAX_BUFFERRAM; i++) { 925 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; 926 if (buf_addr >= addr && buf_addr < end_addr) 927 this->bufferram[i].blockpage = -1; 928 } 929} 930 931/** 932 * onenand_get_device - [GENERIC] Get chip for selected access 933 * @param mtd MTD device structure 934 * @param new_state the state which is requested 935 * 936 * Get the device and lock it for exclusive access 937 */ 938static int onenand_get_device(struct mtd_info *mtd, int new_state) 939{ 940 struct onenand_chip *this = mtd->priv; 941 DECLARE_WAITQUEUE(wait, current); 942 943 /* 944 * Grab the lock and see if the device is available 945 */ 946 while (1) { 947 spin_lock(&this->chip_lock); 948 if (this->state == FL_READY) { 949 this->state = new_state; 950 spin_unlock(&this->chip_lock); 951 break; 952 } 953 if (new_state == FL_PM_SUSPENDED) { 954 spin_unlock(&this->chip_lock); 955 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; 956 } 957 set_current_state(TASK_UNINTERRUPTIBLE); 958 add_wait_queue(&this->wq, &wait); 959 spin_unlock(&this->chip_lock); 960 schedule(); 961 remove_wait_queue(&this->wq, &wait); 962 } 963 964 return 0; 965} 966 967/** 968 * onenand_release_device - [GENERIC] release chip 969 * @param mtd MTD device structure 970 * 971 * Deselect, release chip lock and wake up anyone waiting on the device 972 */ 973static void onenand_release_device(struct mtd_info *mtd) 974{ 975 struct onenand_chip *this = mtd->priv; 976 977 /* Release the chip */ 978 spin_lock(&this->chip_lock); 979 this->state = FL_READY; 980 wake_up(&this->wq); 981 spin_unlock(&this->chip_lock); 982} 983 984/** 985 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer 986 * @param mtd MTD device structure 987 * @param buf destination address 988 * @param column oob offset to read from 989 * @param thislen oob length to read 990 */ 991static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column, 992 int thislen) 993{ 994 struct onenand_chip *this = mtd->priv; 995 struct nand_oobfree *free; 996 int readcol = column; 997 int readend = column + thislen; 998 int lastgap = 0; 999 unsigned int i; 1000 uint8_t *oob_buf = this->oob_buf; 1001 1002 free = this->ecclayout->oobfree; 1003 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1004 if (readcol >= lastgap) 1005 readcol += free->offset - lastgap; 1006 if (readend >= lastgap) 1007 readend += free->offset - lastgap; 1008 lastgap = free->offset + free->length; 1009 } 1010 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1011 free = this->ecclayout->oobfree; 1012 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1013 int free_end = free->offset + free->length; 1014 if (free->offset < readend && free_end > readcol) { 1015 int st = max_t(int,free->offset,readcol); 1016 int ed = min_t(int,free_end,readend); 1017 int n = ed - st; 1018 memcpy(buf, oob_buf + st, n); 1019 buf += n; 1020 } else if (column == 0) 1021 break; 1022 } 1023 return 0; 1024} 1025 1026/** 1027 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data 1028 * @param mtd MTD device structure 1029 * @param addr address to recover 1030 * @param status return value from onenand_wait / onenand_bbt_wait 1031 * 1032 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has 1033 * lower page address and MSB page has higher page address in paired pages. 1034 * If power off occurs during MSB page program, the paired LSB page data can 1035 * become corrupt. LSB page recovery read is a way to read LSB page though page 1036 * data are corrupted. When uncorrectable error occurs as a result of LSB page 1037 * read after power up, issue LSB page recovery read. 1038 */ 1039static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status) 1040{ 1041 struct onenand_chip *this = mtd->priv; 1042 int i; 1043 1044 /* Recovery is only for Flex-OneNAND */ 1045 if (!FLEXONENAND(this)) 1046 return status; 1047 1048 /* check if we failed due to uncorrectable error */ 1049 if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR) 1050 return status; 1051 1052 /* check if address lies in MLC region */ 1053 i = flexonenand_region(mtd, addr); 1054 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift)) 1055 return status; 1056 1057 /* We are attempting to reread, so decrement stats.failed 1058 * which was incremented by onenand_wait due to read failure 1059 */ 1060 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n", 1061 __func__); 1062 mtd->ecc_stats.failed--; 1063 1064 /* Issue the LSB page recovery command */ 1065 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize); 1066 return this->wait(mtd, FL_READING); 1067} 1068 1069/** 1070 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band 1071 * @param mtd MTD device structure 1072 * @param from offset to read from 1073 * @param ops: oob operation description structure 1074 * 1075 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram. 1076 * So, read-while-load is not present. 1077 */ 1078static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1079 struct mtd_oob_ops *ops) 1080{ 1081 struct onenand_chip *this = mtd->priv; 1082 struct mtd_ecc_stats stats; 1083 size_t len = ops->len; 1084 size_t ooblen = ops->ooblen; 1085 u_char *buf = ops->datbuf; 1086 u_char *oobbuf = ops->oobbuf; 1087 int read = 0, column, thislen; 1088 int oobread = 0, oobcolumn, thisooblen, oobsize; 1089 int ret = 0; 1090 int writesize = this->writesize; 1091 1092 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", 1093 __func__, (unsigned int) from, (int) len); 1094 1095 if (ops->mode == MTD_OOB_AUTO) 1096 oobsize = this->ecclayout->oobavail; 1097 else 1098 oobsize = mtd->oobsize; 1099 1100 oobcolumn = from & (mtd->oobsize - 1); 1101 1102 /* Do not allow reads past end of device */ 1103 if (from + len > mtd->size) { 1104 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1105 __func__); 1106 ops->retlen = 0; 1107 ops->oobretlen = 0; 1108 return -EINVAL; 1109 } 1110 1111 stats = mtd->ecc_stats; 1112 1113 while (read < len) { 1114 cond_resched(); 1115 1116 thislen = min_t(int, writesize, len - read); 1117 1118 column = from & (writesize - 1); 1119 if (column + thislen > writesize) 1120 thislen = writesize - column; 1121 1122 if (!onenand_check_bufferram(mtd, from)) { 1123 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1124 1125 ret = this->wait(mtd, FL_READING); 1126 if (unlikely(ret)) 1127 ret = onenand_recover_lsb(mtd, from, ret); 1128 onenand_update_bufferram(mtd, from, !ret); 1129 if (ret == -EBADMSG) 1130 ret = 0; 1131 } 1132 1133 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1134 if (oobbuf) { 1135 thisooblen = oobsize - oobcolumn; 1136 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1137 1138 if (ops->mode == MTD_OOB_AUTO) 1139 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1140 else 1141 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1142 oobread += thisooblen; 1143 oobbuf += thisooblen; 1144 oobcolumn = 0; 1145 } 1146 1147 read += thislen; 1148 if (read == len) 1149 break; 1150 1151 from += thislen; 1152 buf += thislen; 1153 } 1154 1155 /* 1156 * Return success, if no ECC failures, else -EBADMSG 1157 * fs driver will take care of that, because 1158 * retlen == desired len and result == -EBADMSG 1159 */ 1160 ops->retlen = read; 1161 ops->oobretlen = oobread; 1162 1163 if (ret) 1164 return ret; 1165 1166 if (mtd->ecc_stats.failed - stats.failed) 1167 return -EBADMSG; 1168 1169 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; 1170} 1171 1172/** 1173 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band 1174 * @param mtd MTD device structure 1175 * @param from offset to read from 1176 * @param ops: oob operation description structure 1177 * 1178 * OneNAND read main and/or out-of-band data 1179 */ 1180static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1181 struct mtd_oob_ops *ops) 1182{ 1183 struct onenand_chip *this = mtd->priv; 1184 struct mtd_ecc_stats stats; 1185 size_t len = ops->len; 1186 size_t ooblen = ops->ooblen; 1187 u_char *buf = ops->datbuf; 1188 u_char *oobbuf = ops->oobbuf; 1189 int read = 0, column, thislen; 1190 int oobread = 0, oobcolumn, thisooblen, oobsize; 1191 int ret = 0, boundary = 0; 1192 int writesize = this->writesize; 1193 1194 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", 1195 __func__, (unsigned int) from, (int) len); 1196 1197 if (ops->mode == MTD_OOB_AUTO) 1198 oobsize = this->ecclayout->oobavail; 1199 else 1200 oobsize = mtd->oobsize; 1201 1202 oobcolumn = from & (mtd->oobsize - 1); 1203 1204 /* Do not allow reads past end of device */ 1205 if ((from + len) > mtd->size) { 1206 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1207 __func__); 1208 ops->retlen = 0; 1209 ops->oobretlen = 0; 1210 return -EINVAL; 1211 } 1212 1213 stats = mtd->ecc_stats; 1214 1215 /* Read-while-load method */ 1216 1217 /* Do first load to bufferRAM */ 1218 if (read < len) { 1219 if (!onenand_check_bufferram(mtd, from)) { 1220 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1221 ret = this->wait(mtd, FL_READING); 1222 onenand_update_bufferram(mtd, from, !ret); 1223 if (ret == -EBADMSG) 1224 ret = 0; 1225 } 1226 } 1227 1228 thislen = min_t(int, writesize, len - read); 1229 column = from & (writesize - 1); 1230 if (column + thislen > writesize) 1231 thislen = writesize - column; 1232 1233 while (!ret) { 1234 /* If there is more to load then start next load */ 1235 from += thislen; 1236 if (read + thislen < len) { 1237 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1238 /* 1239 * Chip boundary handling in DDP 1240 * Now we issued chip 1 read and pointed chip 1 1241 * bufferram so we have to point chip 0 bufferram. 1242 */ 1243 if (ONENAND_IS_DDP(this) && 1244 unlikely(from == (this->chipsize >> 1))) { 1245 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); 1246 boundary = 1; 1247 } else 1248 boundary = 0; 1249 ONENAND_SET_PREV_BUFFERRAM(this); 1250 } 1251 /* While load is going, read from last bufferRAM */ 1252 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1253 1254 /* Read oob area if needed */ 1255 if (oobbuf) { 1256 thisooblen = oobsize - oobcolumn; 1257 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1258 1259 if (ops->mode == MTD_OOB_AUTO) 1260 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1261 else 1262 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1263 oobread += thisooblen; 1264 oobbuf += thisooblen; 1265 oobcolumn = 0; 1266 } 1267 1268 /* See if we are done */ 1269 read += thislen; 1270 if (read == len) 1271 break; 1272 /* Set up for next read from bufferRAM */ 1273 if (unlikely(boundary)) 1274 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); 1275 ONENAND_SET_NEXT_BUFFERRAM(this); 1276 buf += thislen; 1277 thislen = min_t(int, writesize, len - read); 1278 column = 0; 1279 cond_resched(); 1280 /* Now wait for load */ 1281 ret = this->wait(mtd, FL_READING); 1282 onenand_update_bufferram(mtd, from, !ret); 1283 if (ret == -EBADMSG) 1284 ret = 0; 1285 } 1286 1287 /* 1288 * Return success, if no ECC failures, else -EBADMSG 1289 * fs driver will take care of that, because 1290 * retlen == desired len and result == -EBADMSG 1291 */ 1292 ops->retlen = read; 1293 ops->oobretlen = oobread; 1294 1295 if (ret) 1296 return ret; 1297 1298 if (mtd->ecc_stats.failed - stats.failed) 1299 return -EBADMSG; 1300 1301 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; 1302} 1303 1304/** 1305 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band 1306 * @param mtd MTD device structure 1307 * @param from offset to read from 1308 * @param ops: oob operation description structure 1309 * 1310 * OneNAND read out-of-band data from the spare area 1311 */ 1312static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, 1313 struct mtd_oob_ops *ops) 1314{ 1315 struct onenand_chip *this = mtd->priv; 1316 struct mtd_ecc_stats stats; 1317 int read = 0, thislen, column, oobsize; 1318 size_t len = ops->ooblen; 1319 mtd_oob_mode_t mode = ops->mode; 1320 u_char *buf = ops->oobbuf; 1321 int ret = 0, readcmd; 1322 1323 from += ops->ooboffs; 1324 1325 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n", 1326 __func__, (unsigned int) from, (int) len); 1327 1328 /* Initialize return length value */ 1329 ops->oobretlen = 0; 1330 1331 if (mode == MTD_OOB_AUTO) 1332 oobsize = this->ecclayout->oobavail; 1333 else 1334 oobsize = mtd->oobsize; 1335 1336 column = from & (mtd->oobsize - 1); 1337 1338 if (unlikely(column >= oobsize)) { 1339 printk(KERN_ERR "%s: Attempted to start read outside oob\n", 1340 __func__); 1341 return -EINVAL; 1342 } 1343 1344 /* Do not allow reads past end of device */ 1345 if (unlikely(from >= mtd->size || 1346 column + len > ((mtd->size >> this->page_shift) - 1347 (from >> this->page_shift)) * oobsize)) { 1348 printk(KERN_ERR "%s: Attempted to read beyond end of device\n", 1349 __func__); 1350 return -EINVAL; 1351 } 1352 1353 stats = mtd->ecc_stats; 1354 1355 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1356 1357 while (read < len) { 1358 cond_resched(); 1359 1360 thislen = oobsize - column; 1361 thislen = min_t(int, thislen, len); 1362 1363 this->command(mtd, readcmd, from, mtd->oobsize); 1364 1365 onenand_update_bufferram(mtd, from, 0); 1366 1367 ret = this->wait(mtd, FL_READING); 1368 if (unlikely(ret)) 1369 ret = onenand_recover_lsb(mtd, from, ret); 1370 1371 if (ret && ret != -EBADMSG) { 1372 printk(KERN_ERR "%s: read failed = 0x%x\n", 1373 __func__, ret); 1374 break; 1375 } 1376 1377 if (mode == MTD_OOB_AUTO) 1378 onenand_transfer_auto_oob(mtd, buf, column, thislen); 1379 else 1380 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1381 1382 read += thislen; 1383 1384 if (read == len) 1385 break; 1386 1387 buf += thislen; 1388 1389 /* Read more? */ 1390 if (read < len) { 1391 /* Page size */ 1392 from += mtd->writesize; 1393 column = 0; 1394 } 1395 } 1396 1397 ops->oobretlen = read; 1398 1399 if (ret) 1400 return ret; 1401 1402 if (mtd->ecc_stats.failed - stats.failed) 1403 return -EBADMSG; 1404 1405 return 0; 1406} 1407 1408/** 1409 * onenand_read - [MTD Interface] Read data from flash 1410 * @param mtd MTD device structure 1411 * @param from offset to read from 1412 * @param len number of bytes to read 1413 * @param retlen pointer to variable to store the number of read bytes 1414 * @param buf the databuffer to put data 1415 * 1416 * Read with ecc 1417*/ 1418static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, 1419 size_t *retlen, u_char *buf) 1420{ 1421 struct onenand_chip *this = mtd->priv; 1422 struct mtd_oob_ops ops = { 1423 .len = len, 1424 .ooblen = 0, 1425 .datbuf = buf, 1426 .oobbuf = NULL, 1427 }; 1428 int ret; 1429 1430 onenand_get_device(mtd, FL_READING); 1431 ret = ONENAND_IS_4KB_PAGE(this) ? 1432 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 1433 onenand_read_ops_nolock(mtd, from, &ops); 1434 onenand_release_device(mtd); 1435 1436 *retlen = ops.retlen; 1437 return ret; 1438} 1439 1440/** 1441 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band 1442 * @param mtd: MTD device structure 1443 * @param from: offset to read from 1444 * @param ops: oob operation description structure 1445 1446 * Read main and/or out-of-band 1447 */ 1448static int onenand_read_oob(struct mtd_info *mtd, loff_t from, 1449 struct mtd_oob_ops *ops) 1450{ 1451 struct onenand_chip *this = mtd->priv; 1452 int ret; 1453 1454 switch (ops->mode) { 1455 case MTD_OOB_PLACE: 1456 case MTD_OOB_AUTO: 1457 break; 1458 case MTD_OOB_RAW: 1459 /* Not implemented yet */ 1460 default: 1461 return -EINVAL; 1462 } 1463 1464 onenand_get_device(mtd, FL_READING); 1465 if (ops->datbuf) 1466 ret = ONENAND_IS_4KB_PAGE(this) ? 1467 onenand_mlc_read_ops_nolock(mtd, from, ops) : 1468 onenand_read_ops_nolock(mtd, from, ops); 1469 else 1470 ret = onenand_read_oob_nolock(mtd, from, ops); 1471 onenand_release_device(mtd); 1472 1473 return ret; 1474} 1475 1476/** 1477 * onenand_bbt_wait - [DEFAULT] wait until the command is done 1478 * @param mtd MTD device structure 1479 * @param state state to select the max. timeout value 1480 * 1481 * Wait for command done. 1482 */ 1483static int onenand_bbt_wait(struct mtd_info *mtd, int state) 1484{ 1485 struct onenand_chip *this = mtd->priv; 1486 unsigned long timeout; 1487 unsigned int interrupt, ctrl, ecc, addr1, addr8; 1488 1489 /* The 20 msec is enough */ 1490 timeout = jiffies + msecs_to_jiffies(20); 1491 while (time_before(jiffies, timeout)) { 1492 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1493 if (interrupt & ONENAND_INT_MASTER) 1494 break; 1495 } 1496 /* To get correct interrupt status in timeout case */ 1497 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1498 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1499 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1); 1500 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8); 1501 1502 if (interrupt & ONENAND_INT_READ) { 1503 ecc = onenand_read_ecc(this); 1504 if (ecc & ONENAND_ECC_2BIT_ALL) { 1505 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x " 1506 "intr 0x%04x addr1 %#x addr8 %#x\n", 1507 __func__, ecc, ctrl, interrupt, addr1, addr8); 1508 return ONENAND_BBT_READ_ECC_ERROR; 1509 } 1510 } else { 1511 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x " 1512 "intr 0x%04x addr1 %#x addr8 %#x\n", 1513 __func__, ctrl, interrupt, addr1, addr8); 1514 return ONENAND_BBT_READ_FATAL_ERROR; 1515 } 1516 1517 /* Initial bad block case: 0x2400 or 0x0400 */ 1518 if (ctrl & ONENAND_CTRL_ERROR) { 1519 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x " 1520 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8); 1521 return ONENAND_BBT_READ_ERROR; 1522 } 1523 1524 return 0; 1525} 1526 1527/** 1528 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan 1529 * @param mtd MTD device structure 1530 * @param from offset to read from 1531 * @param ops oob operation description structure 1532 * 1533 * OneNAND read out-of-band data from the spare area for bbt scan 1534 */ 1535int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 1536 struct mtd_oob_ops *ops) 1537{ 1538 struct onenand_chip *this = mtd->priv; 1539 int read = 0, thislen, column; 1540 int ret = 0, readcmd; 1541 size_t len = ops->ooblen; 1542 u_char *buf = ops->oobbuf; 1543 1544 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n", 1545 __func__, (unsigned int) from, len); 1546 1547 /* Initialize return value */ 1548 ops->oobretlen = 0; 1549 1550 /* Do not allow reads past end of device */ 1551 if (unlikely((from + len) > mtd->size)) { 1552 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1553 __func__); 1554 return ONENAND_BBT_READ_FATAL_ERROR; 1555 } 1556 1557 /* Grab the lock and see if the device is available */ 1558 onenand_get_device(mtd, FL_READING); 1559 1560 column = from & (mtd->oobsize - 1); 1561 1562 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1563 1564 while (read < len) { 1565 cond_resched(); 1566 1567 thislen = mtd->oobsize - column; 1568 thislen = min_t(int, thislen, len); 1569 1570 this->command(mtd, readcmd, from, mtd->oobsize); 1571 1572 onenand_update_bufferram(mtd, from, 0); 1573 1574 ret = this->bbt_wait(mtd, FL_READING); 1575 if (unlikely(ret)) 1576 ret = onenand_recover_lsb(mtd, from, ret); 1577 1578 if (ret) 1579 break; 1580 1581 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1582 read += thislen; 1583 if (read == len) 1584 break; 1585 1586 buf += thislen; 1587 1588 /* Read more? */ 1589 if (read < len) { 1590 /* Update Page size */ 1591 from += this->writesize; 1592 column = 0; 1593 } 1594 } 1595 1596 /* Deselect and wake up anyone waiting on the device */ 1597 onenand_release_device(mtd); 1598 1599 ops->oobretlen = read; 1600 return ret; 1601} 1602 1603#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 1604/** 1605 * onenand_verify_oob - [GENERIC] verify the oob contents after a write 1606 * @param mtd MTD device structure 1607 * @param buf the databuffer to verify 1608 * @param to offset to read from 1609 */ 1610static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) 1611{ 1612 struct onenand_chip *this = mtd->priv; 1613 u_char *oob_buf = this->oob_buf; 1614 int status, i, readcmd; 1615 1616 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1617 1618 this->command(mtd, readcmd, to, mtd->oobsize); 1619 onenand_update_bufferram(mtd, to, 0); 1620 status = this->wait(mtd, FL_READING); 1621 if (status) 1622 return status; 1623 1624 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1625 for (i = 0; i < mtd->oobsize; i++) 1626 if (buf[i] != 0xFF && buf[i] != oob_buf[i]) 1627 return -EBADMSG; 1628 1629 return 0; 1630} 1631 1632/** 1633 * onenand_verify - [GENERIC] verify the chip contents after a write 1634 * @param mtd MTD device structure 1635 * @param buf the databuffer to verify 1636 * @param addr offset to read from 1637 * @param len number of bytes to read and compare 1638 */ 1639static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) 1640{ 1641 struct onenand_chip *this = mtd->priv; 1642 int ret = 0; 1643 int thislen, column; 1644 1645 while (len != 0) { 1646 thislen = min_t(int, this->writesize, len); 1647 column = addr & (this->writesize - 1); 1648 if (column + thislen > this->writesize) 1649 thislen = this->writesize - column; 1650 1651 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize); 1652 1653 onenand_update_bufferram(mtd, addr, 0); 1654 1655 ret = this->wait(mtd, FL_READING); 1656 if (ret) 1657 return ret; 1658 1659 onenand_update_bufferram(mtd, addr, 1); 1660 1661 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize); 1662 1663 if (memcmp(buf, this->verify_buf, thislen)) 1664 return -EBADMSG; 1665 1666 len -= thislen; 1667 buf += thislen; 1668 addr += thislen; 1669 } 1670 1671 return 0; 1672} 1673#else 1674#define onenand_verify(...) (0) 1675#define onenand_verify_oob(...) (0) 1676#endif 1677 1678#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) 1679 1680static void onenand_panic_wait(struct mtd_info *mtd) 1681{ 1682 struct onenand_chip *this = mtd->priv; 1683 unsigned int interrupt; 1684 int i; 1685 1686 for (i = 0; i < 2000; i++) { 1687 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1688 if (interrupt & ONENAND_INT_MASTER) 1689 break; 1690 udelay(10); 1691 } 1692} 1693 1694/** 1695 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context 1696 * @param mtd MTD device structure 1697 * @param to offset to write to 1698 * @param len number of bytes to write 1699 * @param retlen pointer to variable to store the number of written bytes 1700 * @param buf the data to write 1701 * 1702 * Write with ECC 1703 */ 1704static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, 1705 size_t *retlen, const u_char *buf) 1706{ 1707 struct onenand_chip *this = mtd->priv; 1708 int column, subpage; 1709 int written = 0; 1710 int ret = 0; 1711 1712 if (this->state == FL_PM_SUSPENDED) 1713 return -EBUSY; 1714 1715 /* Wait for any existing operation to clear */ 1716 onenand_panic_wait(mtd); 1717 1718 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", 1719 __func__, (unsigned int) to, (int) len); 1720 1721 /* Initialize retlen, in case of early exit */ 1722 *retlen = 0; 1723 1724 /* Do not allow writes past end of device */ 1725 if (unlikely((to + len) > mtd->size)) { 1726 printk(KERN_ERR "%s: Attempt write to past end of device\n", 1727 __func__); 1728 return -EINVAL; 1729 } 1730 1731 /* Reject writes, which are not page aligned */ 1732 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1733 printk(KERN_ERR "%s: Attempt to write not page aligned data\n", 1734 __func__); 1735 return -EINVAL; 1736 } 1737 1738 column = to & (mtd->writesize - 1); 1739 1740 /* Loop until all data write */ 1741 while (written < len) { 1742 int thislen = min_t(int, mtd->writesize - column, len - written); 1743 u_char *wbuf = (u_char *) buf; 1744 1745 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1746 1747 /* Partial page write */ 1748 subpage = thislen < mtd->writesize; 1749 if (subpage) { 1750 memset(this->page_buf, 0xff, mtd->writesize); 1751 memcpy(this->page_buf + column, buf, thislen); 1752 wbuf = this->page_buf; 1753 } 1754 1755 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1756 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); 1757 1758 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1759 1760 onenand_panic_wait(mtd); 1761 1762 /* In partial page write we don't update bufferram */ 1763 onenand_update_bufferram(mtd, to, !ret && !subpage); 1764 if (ONENAND_IS_2PLANE(this)) { 1765 ONENAND_SET_BUFFERRAM1(this); 1766 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage); 1767 } 1768 1769 if (ret) { 1770 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 1771 break; 1772 } 1773 1774 written += thislen; 1775 1776 if (written == len) 1777 break; 1778 1779 column = 0; 1780 to += thislen; 1781 buf += thislen; 1782 } 1783 1784 *retlen = written; 1785 return ret; 1786} 1787 1788/** 1789 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer 1790 * @param mtd MTD device structure 1791 * @param oob_buf oob buffer 1792 * @param buf source address 1793 * @param column oob offset to write to 1794 * @param thislen oob length to write 1795 */ 1796static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, 1797 const u_char *buf, int column, int thislen) 1798{ 1799 struct onenand_chip *this = mtd->priv; 1800 struct nand_oobfree *free; 1801 int writecol = column; 1802 int writeend = column + thislen; 1803 int lastgap = 0; 1804 unsigned int i; 1805 1806 free = this->ecclayout->oobfree; 1807 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1808 if (writecol >= lastgap) 1809 writecol += free->offset - lastgap; 1810 if (writeend >= lastgap) 1811 writeend += free->offset - lastgap; 1812 lastgap = free->offset + free->length; 1813 } 1814 free = this->ecclayout->oobfree; 1815 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1816 int free_end = free->offset + free->length; 1817 if (free->offset < writeend && free_end > writecol) { 1818 int st = max_t(int,free->offset,writecol); 1819 int ed = min_t(int,free_end,writeend); 1820 int n = ed - st; 1821 memcpy(oob_buf + st, buf, n); 1822 buf += n; 1823 } else if (column == 0) 1824 break; 1825 } 1826 return 0; 1827} 1828 1829/** 1830 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band 1831 * @param mtd MTD device structure 1832 * @param to offset to write to 1833 * @param ops oob operation description structure 1834 * 1835 * Write main and/or oob with ECC 1836 */ 1837static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, 1838 struct mtd_oob_ops *ops) 1839{ 1840 struct onenand_chip *this = mtd->priv; 1841 int written = 0, column, thislen = 0, subpage = 0; 1842 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1; 1843 int oobwritten = 0, oobcolumn, thisooblen, oobsize; 1844 size_t len = ops->len; 1845 size_t ooblen = ops->ooblen; 1846 const u_char *buf = ops->datbuf; 1847 const u_char *oob = ops->oobbuf; 1848 u_char *oobbuf; 1849 int ret = 0, cmd; 1850 1851 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", 1852 __func__, (unsigned int) to, (int) len); 1853 1854 /* Initialize retlen, in case of early exit */ 1855 ops->retlen = 0; 1856 ops->oobretlen = 0; 1857 1858 /* Do not allow writes past end of device */ 1859 if (unlikely((to + len) > mtd->size)) { 1860 printk(KERN_ERR "%s: Attempt write to past end of device\n", 1861 __func__); 1862 return -EINVAL; 1863 } 1864 1865 /* Reject writes, which are not page aligned */ 1866 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1867 printk(KERN_ERR "%s: Attempt to write not page aligned data\n", 1868 __func__); 1869 return -EINVAL; 1870 } 1871 1872 /* Check zero length */ 1873 if (!len) 1874 return 0; 1875 1876 if (ops->mode == MTD_OOB_AUTO) 1877 oobsize = this->ecclayout->oobavail; 1878 else 1879 oobsize = mtd->oobsize; 1880 1881 oobcolumn = to & (mtd->oobsize - 1); 1882 1883 column = to & (mtd->writesize - 1); 1884 1885 /* Loop until all data write */ 1886 while (1) { 1887 if (written < len) { 1888 u_char *wbuf = (u_char *) buf; 1889 1890 thislen = min_t(int, mtd->writesize - column, len - written); 1891 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten); 1892 1893 cond_resched(); 1894 1895 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1896 1897 /* Partial page write */ 1898 subpage = thislen < mtd->writesize; 1899 if (subpage) { 1900 memset(this->page_buf, 0xff, mtd->writesize); 1901 memcpy(this->page_buf + column, buf, thislen); 1902 wbuf = this->page_buf; 1903 } 1904 1905 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1906 1907 if (oob) { 1908 oobbuf = this->oob_buf; 1909 1910 /* We send data to spare ram with oobsize 1911 * to prevent byte access */ 1912 memset(oobbuf, 0xff, mtd->oobsize); 1913 if (ops->mode == MTD_OOB_AUTO) 1914 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen); 1915 else 1916 memcpy(oobbuf + oobcolumn, oob, thisooblen); 1917 1918 oobwritten += thisooblen; 1919 oob += thisooblen; 1920 oobcolumn = 0; 1921 } else 1922 oobbuf = (u_char *) ffchars; 1923 1924 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1925 } else 1926 ONENAND_SET_NEXT_BUFFERRAM(this); 1927 1928 /* 1929 * 2 PLANE, MLC, and Flex-OneNAND do not support 1930 * write-while-program feature. 1931 */ 1932 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) { 1933 ONENAND_SET_PREV_BUFFERRAM(this); 1934 1935 ret = this->wait(mtd, FL_WRITING); 1936 1937 /* In partial page write we don't update bufferram */ 1938 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage); 1939 if (ret) { 1940 written -= prevlen; 1941 printk(KERN_ERR "%s: write failed %d\n", 1942 __func__, ret); 1943 break; 1944 } 1945 1946 if (written == len) { 1947 /* Only check verify write turn on */ 1948 ret = onenand_verify(mtd, buf - len, to - len, len); 1949 if (ret) 1950 printk(KERN_ERR "%s: verify failed %d\n", 1951 __func__, ret); 1952 break; 1953 } 1954 1955 ONENAND_SET_NEXT_BUFFERRAM(this); 1956 } 1957 1958 this->ongoing = 0; 1959 cmd = ONENAND_CMD_PROG; 1960 1961 /* Exclude 1st OTP and OTP blocks for cache program feature */ 1962 if (ONENAND_IS_CACHE_PROGRAM(this) && 1963 likely(onenand_block(this, to) != 0) && 1964 ONENAND_IS_4KB_PAGE(this) && 1965 ((written + thislen) < len)) { 1966 cmd = ONENAND_CMD_2X_CACHE_PROG; 1967 this->ongoing = 1; 1968 } 1969 1970 this->command(mtd, cmd, to, mtd->writesize); 1971 1972 /* 1973 * 2 PLANE, MLC, and Flex-OneNAND wait here 1974 */ 1975 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) { 1976 ret = this->wait(mtd, FL_WRITING); 1977 1978 /* In partial page write we don't update bufferram */ 1979 onenand_update_bufferram(mtd, to, !ret && !subpage); 1980 if (ret) { 1981 printk(KERN_ERR "%s: write failed %d\n", 1982 __func__, ret); 1983 break; 1984 } 1985 1986 /* Only check verify write turn on */ 1987 ret = onenand_verify(mtd, buf, to, thislen); 1988 if (ret) { 1989 printk(KERN_ERR "%s: verify failed %d\n", 1990 __func__, ret); 1991 break; 1992 } 1993 1994 written += thislen; 1995 1996 if (written == len) 1997 break; 1998 1999 } else 2000 written += thislen; 2001 2002 column = 0; 2003 prev_subpage = subpage; 2004 prev = to; 2005 prevlen = thislen; 2006 to += thislen; 2007 buf += thislen; 2008 first = 0; 2009 } 2010 2011 /* In error case, clear all bufferrams */ 2012 if (written != len) 2013 onenand_invalidate_bufferram(mtd, 0, -1); 2014 2015 ops->retlen = written; 2016 ops->oobretlen = oobwritten; 2017 2018 return ret; 2019} 2020 2021 2022/** 2023 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band 2024 * @param mtd MTD device structure 2025 * @param to offset to write to 2026 * @param len number of bytes to write 2027 * @param retlen pointer to variable to store the number of written bytes 2028 * @param buf the data to write 2029 * @param mode operation mode 2030 * 2031 * OneNAND write out-of-band 2032 */ 2033static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, 2034 struct mtd_oob_ops *ops) 2035{ 2036 struct onenand_chip *this = mtd->priv; 2037 int column, ret = 0, oobsize; 2038 int written = 0, oobcmd; 2039 u_char *oobbuf; 2040 size_t len = ops->ooblen; 2041 const u_char *buf = ops->oobbuf; 2042 mtd_oob_mode_t mode = ops->mode; 2043 2044 to += ops->ooboffs; 2045 2046 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", 2047 __func__, (unsigned int) to, (int) len); 2048 2049 /* Initialize retlen, in case of early exit */ 2050 ops->oobretlen = 0; 2051 2052 if (mode == MTD_OOB_AUTO) 2053 oobsize = this->ecclayout->oobavail; 2054 else 2055 oobsize = mtd->oobsize; 2056 2057 column = to & (mtd->oobsize - 1); 2058 2059 if (unlikely(column >= oobsize)) { 2060 printk(KERN_ERR "%s: Attempted to start write outside oob\n", 2061 __func__); 2062 return -EINVAL; 2063 } 2064 2065 /* For compatibility with NAND: Do not allow write past end of page */ 2066 if (unlikely(column + len > oobsize)) { 2067 printk(KERN_ERR "%s: Attempt to write past end of page\n", 2068 __func__); 2069 return -EINVAL; 2070 } 2071 2072 /* Do not allow reads past end of device */ 2073 if (unlikely(to >= mtd->size || 2074 column + len > ((mtd->size >> this->page_shift) - 2075 (to >> this->page_shift)) * oobsize)) { 2076 printk(KERN_ERR "%s: Attempted to write past end of device\n", 2077 __func__); 2078 return -EINVAL; 2079 } 2080 2081 oobbuf = this->oob_buf; 2082 2083 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; 2084 2085 /* Loop until all data write */ 2086 while (written < len) { 2087 int thislen = min_t(int, oobsize, len - written); 2088 2089 cond_resched(); 2090 2091 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 2092 2093 /* We send data to spare ram with oobsize 2094 * to prevent byte access */ 2095 memset(oobbuf, 0xff, mtd->oobsize); 2096 if (mode == MTD_OOB_AUTO) 2097 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); 2098 else 2099 memcpy(oobbuf + column, buf, thislen); 2100 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 2101 2102 if (ONENAND_IS_4KB_PAGE(this)) { 2103 /* Set main area of DataRAM to 0xff*/ 2104 memset(this->page_buf, 0xff, mtd->writesize); 2105 this->write_bufferram(mtd, ONENAND_DATARAM, 2106 this->page_buf, 0, mtd->writesize); 2107 } 2108 2109 this->command(mtd, oobcmd, to, mtd->oobsize); 2110 2111 onenand_update_bufferram(mtd, to, 0); 2112 if (ONENAND_IS_2PLANE(this)) { 2113 ONENAND_SET_BUFFERRAM1(this); 2114 onenand_update_bufferram(mtd, to + this->writesize, 0); 2115 } 2116 2117 ret = this->wait(mtd, FL_WRITING); 2118 if (ret) { 2119 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 2120 break; 2121 } 2122 2123 ret = onenand_verify_oob(mtd, oobbuf, to); 2124 if (ret) { 2125 printk(KERN_ERR "%s: verify failed %d\n", 2126 __func__, ret); 2127 break; 2128 } 2129 2130 written += thislen; 2131 if (written == len) 2132 break; 2133 2134 to += mtd->writesize; 2135 buf += thislen; 2136 column = 0; 2137 } 2138 2139 ops->oobretlen = written; 2140 2141 return ret; 2142} 2143 2144/** 2145 * onenand_write - [MTD Interface] write buffer to FLASH 2146 * @param mtd MTD device structure 2147 * @param to offset to write to 2148 * @param len number of bytes to write 2149 * @param retlen pointer to variable to store the number of written bytes 2150 * @param buf the data to write 2151 * 2152 * Write with ECC 2153 */ 2154static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, 2155 size_t *retlen, const u_char *buf) 2156{ 2157 struct mtd_oob_ops ops = { 2158 .len = len, 2159 .ooblen = 0, 2160 .datbuf = (u_char *) buf, 2161 .oobbuf = NULL, 2162 }; 2163 int ret; 2164 2165 onenand_get_device(mtd, FL_WRITING); 2166 ret = onenand_write_ops_nolock(mtd, to, &ops); 2167 onenand_release_device(mtd); 2168 2169 *retlen = ops.retlen; 2170 return ret; 2171} 2172 2173/** 2174 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band 2175 * @param mtd: MTD device structure 2176 * @param to: offset to write 2177 * @param ops: oob operation description structure 2178 */ 2179static int onenand_write_oob(struct mtd_info *mtd, loff_t to, 2180 struct mtd_oob_ops *ops) 2181{ 2182 int ret; 2183 2184 switch (ops->mode) { 2185 case MTD_OOB_PLACE: 2186 case MTD_OOB_AUTO: 2187 break; 2188 case MTD_OOB_RAW: 2189 /* Not implemented yet */ 2190 default: 2191 return -EINVAL; 2192 } 2193 2194 onenand_get_device(mtd, FL_WRITING); 2195 if (ops->datbuf) 2196 ret = onenand_write_ops_nolock(mtd, to, ops); 2197 else 2198 ret = onenand_write_oob_nolock(mtd, to, ops); 2199 onenand_release_device(mtd); 2200 2201 return ret; 2202} 2203 2204/** 2205 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad 2206 * @param mtd MTD device structure 2207 * @param ofs offset from device start 2208 * @param allowbbt 1, if its allowed to access the bbt area 2209 * 2210 * Check, if the block is bad. Either by reading the bad block table or 2211 * calling of the scan function. 2212 */ 2213static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt) 2214{ 2215 struct onenand_chip *this = mtd->priv; 2216 struct bbm_info *bbm = this->bbm; 2217 2218 /* Return info from the table */ 2219 return bbm->isbad_bbt(mtd, ofs, allowbbt); 2220} 2221 2222 2223static int onenand_multiblock_erase_verify(struct mtd_info *mtd, 2224 struct erase_info *instr) 2225{ 2226 struct onenand_chip *this = mtd->priv; 2227 loff_t addr = instr->addr; 2228 int len = instr->len; 2229 unsigned int block_size = (1 << this->erase_shift); 2230 int ret = 0; 2231 2232 while (len) { 2233 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size); 2234 ret = this->wait(mtd, FL_VERIFYING_ERASE); 2235 if (ret) { 2236 printk(KERN_ERR "%s: Failed verify, block %d\n", 2237 __func__, onenand_block(this, addr)); 2238 instr->state = MTD_ERASE_FAILED; 2239 instr->fail_addr = addr; 2240 return -1; 2241 } 2242 len -= block_size; 2243 addr += block_size; 2244 } 2245 return 0; 2246} 2247 2248/** 2249 * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase 2250 * @param mtd MTD device structure 2251 * @param instr erase instruction 2252 * @param region erase region 2253 * 2254 * Erase one or more blocks up to 64 block at a time 2255 */ 2256static int onenand_multiblock_erase(struct mtd_info *mtd, 2257 struct erase_info *instr, 2258 unsigned int block_size) 2259{ 2260 struct onenand_chip *this = mtd->priv; 2261 loff_t addr = instr->addr; 2262 int len = instr->len; 2263 int eb_count = 0; 2264 int ret = 0; 2265 int bdry_block = 0; 2266 2267 instr->state = MTD_ERASING; 2268 2269 if (ONENAND_IS_DDP(this)) { 2270 loff_t bdry_addr = this->chipsize >> 1; 2271 if (addr < bdry_addr && (addr + len) > bdry_addr) 2272 bdry_block = bdry_addr >> this->erase_shift; 2273 } 2274 2275 /* Pre-check bbs */ 2276 while (len) { 2277 /* Check if we have a bad block, we do not erase bad blocks */ 2278 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2279 printk(KERN_WARNING "%s: attempt to erase a bad block " 2280 "at addr 0x%012llx\n", 2281 __func__, (unsigned long long) addr); 2282 instr->state = MTD_ERASE_FAILED; 2283 return -EIO; 2284 } 2285 len -= block_size; 2286 addr += block_size; 2287 } 2288 2289 len = instr->len; 2290 addr = instr->addr; 2291 2292 /* loop over 64 eb batches */ 2293 while (len) { 2294 struct erase_info verify_instr = *instr; 2295 int max_eb_count = MB_ERASE_MAX_BLK_COUNT; 2296 2297 verify_instr.addr = addr; 2298 verify_instr.len = 0; 2299 2300 /* do not cross chip boundary */ 2301 if (bdry_block) { 2302 int this_block = (addr >> this->erase_shift); 2303 2304 if (this_block < bdry_block) { 2305 max_eb_count = min(max_eb_count, 2306 (bdry_block - this_block)); 2307 } 2308 } 2309 2310 eb_count = 0; 2311 2312 while (len > block_size && eb_count < (max_eb_count - 1)) { 2313 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE, 2314 addr, block_size); 2315 onenand_invalidate_bufferram(mtd, addr, block_size); 2316 2317 ret = this->wait(mtd, FL_PREPARING_ERASE); 2318 if (ret) { 2319 printk(KERN_ERR "%s: Failed multiblock erase, " 2320 "block %d\n", __func__, 2321 onenand_block(this, addr)); 2322 instr->state = MTD_ERASE_FAILED; 2323 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2324 return -EIO; 2325 } 2326 2327 len -= block_size; 2328 addr += block_size; 2329 eb_count++; 2330 } 2331 2332 /* last block of 64-eb series */ 2333 cond_resched(); 2334 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2335 onenand_invalidate_bufferram(mtd, addr, block_size); 2336 2337 ret = this->wait(mtd, FL_ERASING); 2338 /* Check if it is write protected */ 2339 if (ret) { 2340 printk(KERN_ERR "%s: Failed erase, block %d\n", 2341 __func__, onenand_block(this, addr)); 2342 instr->state = MTD_ERASE_FAILED; 2343 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2344 return -EIO; 2345 } 2346 2347 len -= block_size; 2348 addr += block_size; 2349 eb_count++; 2350 2351 /* verify */ 2352 verify_instr.len = eb_count * block_size; 2353 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) { 2354 instr->state = verify_instr.state; 2355 instr->fail_addr = verify_instr.fail_addr; 2356 return -EIO; 2357 } 2358 2359 } 2360 return 0; 2361} 2362 2363 2364/** 2365 * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase 2366 * @param mtd MTD device structure 2367 * @param instr erase instruction 2368 * @param region erase region 2369 * @param block_size erase block size 2370 * 2371 * Erase one or more blocks one block at a time 2372 */ 2373static int onenand_block_by_block_erase(struct mtd_info *mtd, 2374 struct erase_info *instr, 2375 struct mtd_erase_region_info *region, 2376 unsigned int block_size) 2377{ 2378 struct onenand_chip *this = mtd->priv; 2379 loff_t addr = instr->addr; 2380 int len = instr->len; 2381 loff_t region_end = 0; 2382 int ret = 0; 2383 2384 if (region) { 2385 /* region is set for Flex-OneNAND */ 2386 region_end = region->offset + region->erasesize * region->numblocks; 2387 } 2388 2389 instr->state = MTD_ERASING; 2390 2391 /* Loop through the blocks */ 2392 while (len) { 2393 cond_resched(); 2394 2395 /* Check if we have a bad block, we do not erase bad blocks */ 2396 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2397 printk(KERN_WARNING "%s: attempt to erase a bad block " 2398 "at addr 0x%012llx\n", 2399 __func__, (unsigned long long) addr); 2400 instr->state = MTD_ERASE_FAILED; 2401 return -EIO; 2402 } 2403 2404 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2405 2406 onenand_invalidate_bufferram(mtd, addr, block_size); 2407 2408 ret = this->wait(mtd, FL_ERASING); 2409 /* Check, if it is write protected */ 2410 if (ret) { 2411 printk(KERN_ERR "%s: Failed erase, block %d\n", 2412 __func__, onenand_block(this, addr)); 2413 instr->state = MTD_ERASE_FAILED; 2414 instr->fail_addr = addr; 2415 return -EIO; 2416 } 2417 2418 len -= block_size; 2419 addr += block_size; 2420 2421 if (addr == region_end) { 2422 if (!len) 2423 break; 2424 region++; 2425 2426 block_size = region->erasesize; 2427 region_end = region->offset + region->erasesize * region->numblocks; 2428 2429 if (len & (block_size - 1)) { 2430 /* FIXME: This should be handled at MTD partitioning level. */ 2431 printk(KERN_ERR "%s: Unaligned address\n", 2432 __func__); 2433 return -EIO; 2434 } 2435 } 2436 } 2437 return 0; 2438} 2439 2440/** 2441 * onenand_erase - [MTD Interface] erase block(s) 2442 * @param mtd MTD device structure 2443 * @param instr erase instruction 2444 * 2445 * Erase one or more blocks 2446 */ 2447static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 2448{ 2449 struct onenand_chip *this = mtd->priv; 2450 unsigned int block_size; 2451 loff_t addr = instr->addr; 2452 loff_t len = instr->len; 2453 int ret = 0; 2454 struct mtd_erase_region_info *region = NULL; 2455 loff_t region_offset = 0; 2456 2457 DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__, 2458 (unsigned long long) instr->addr, (unsigned long long) instr->len); 2459 2460 /* Do not allow erase past end of device */ 2461 if (unlikely((len + addr) > mtd->size)) { 2462 printk(KERN_ERR "%s: Erase past end of device\n", __func__); 2463 return -EINVAL; 2464 } 2465 2466 if (FLEXONENAND(this)) { 2467 /* Find the eraseregion of this address */ 2468 int i = flexonenand_region(mtd, addr); 2469 2470 region = &mtd->eraseregions[i]; 2471 block_size = region->erasesize; 2472 2473 /* Start address within region must align on block boundary. 2474 * Erase region's start offset is always block start address. 2475 */ 2476 region_offset = region->offset; 2477 } else 2478 block_size = 1 << this->erase_shift; 2479 2480 /* Start address must align on block boundary */ 2481 if (unlikely((addr - region_offset) & (block_size - 1))) { 2482 printk(KERN_ERR "%s: Unaligned address\n", __func__); 2483 return -EINVAL; 2484 } 2485 2486 /* Length must align on block boundary */ 2487 if (unlikely(len & (block_size - 1))) { 2488 printk(KERN_ERR "%s: Length not block aligned\n", __func__); 2489 return -EINVAL; 2490 } 2491 2492 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2493 2494 /* Grab the lock and see if the device is available */ 2495 onenand_get_device(mtd, FL_ERASING); 2496 2497 if (ONENAND_IS_4KB_PAGE(this) || region || 2498 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) { 2499 /* region is set for Flex-OneNAND (no mb erase) */ 2500 ret = onenand_block_by_block_erase(mtd, instr, 2501 region, block_size); 2502 } else { 2503 ret = onenand_multiblock_erase(mtd, instr, block_size); 2504 } 2505 2506 /* Deselect and wake up anyone waiting on the device */ 2507 onenand_release_device(mtd); 2508 2509 /* Do call back function */ 2510 if (!ret) { 2511 instr->state = MTD_ERASE_DONE; 2512 mtd_erase_callback(instr); 2513 } 2514 2515 return ret; 2516} 2517 2518/** 2519 * onenand_sync - [MTD Interface] sync 2520 * @param mtd MTD device structure 2521 * 2522 * Sync is actually a wait for chip ready function 2523 */ 2524static void onenand_sync(struct mtd_info *mtd) 2525{ 2526 DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__); 2527 2528 /* Grab the lock and see if the device is available */ 2529 onenand_get_device(mtd, FL_SYNCING); 2530 2531 /* Release it and go back */ 2532 onenand_release_device(mtd); 2533} 2534 2535/** 2536 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 2537 * @param mtd MTD device structure 2538 * @param ofs offset relative to mtd start 2539 * 2540 * Check whether the block is bad 2541 */ 2542static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 2543{ 2544 int ret; 2545 2546 /* Check for invalid offset */ 2547 if (ofs > mtd->size) 2548 return -EINVAL; 2549 2550 onenand_get_device(mtd, FL_READING); 2551 ret = onenand_block_isbad_nolock(mtd, ofs, 0); 2552 onenand_release_device(mtd); 2553 return ret; 2554} 2555 2556/** 2557 * onenand_default_block_markbad - [DEFAULT] mark a block bad 2558 * @param mtd MTD device structure 2559 * @param ofs offset from device start 2560 * 2561 * This is the default implementation, which can be overridden by 2562 * a hardware specific driver. 2563 */ 2564static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 2565{ 2566 struct onenand_chip *this = mtd->priv; 2567 struct bbm_info *bbm = this->bbm; 2568 u_char buf[2] = {0, 0}; 2569 struct mtd_oob_ops ops = { 2570 .mode = MTD_OOB_PLACE, 2571 .ooblen = 2, 2572 .oobbuf = buf, 2573 .ooboffs = 0, 2574 }; 2575 int block; 2576 2577 /* Get block number */ 2578 block = onenand_block(this, ofs); 2579 if (bbm->bbt) 2580 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 2581 2582 /* We write two bytes, so we don't have to mess with 16-bit access */ 2583 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); 2584 /* FIXME : What to do when marking SLC block in partition 2585 * with MLC erasesize? For now, it is not advisable to 2586 * create partitions containing both SLC and MLC regions. 2587 */ 2588 return onenand_write_oob_nolock(mtd, ofs, &ops); 2589} 2590 2591/** 2592 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 2593 * @param mtd MTD device structure 2594 * @param ofs offset relative to mtd start 2595 * 2596 * Mark the block as bad 2597 */ 2598static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 2599{ 2600 struct onenand_chip *this = mtd->priv; 2601 int ret; 2602 2603 ret = onenand_block_isbad(mtd, ofs); 2604 if (ret) { 2605 /* If it was bad already, return success and do nothing */ 2606 if (ret > 0) 2607 return 0; 2608 return ret; 2609 } 2610 2611 onenand_get_device(mtd, FL_WRITING); 2612 ret = this->block_markbad(mtd, ofs); 2613 onenand_release_device(mtd); 2614 return ret; 2615} 2616 2617/** 2618 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) 2619 * @param mtd MTD device structure 2620 * @param ofs offset relative to mtd start 2621 * @param len number of bytes to lock or unlock 2622 * @param cmd lock or unlock command 2623 * 2624 * Lock or unlock one or more blocks 2625 */ 2626static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) 2627{ 2628 struct onenand_chip *this = mtd->priv; 2629 int start, end, block, value, status; 2630 int wp_status_mask; 2631 2632 start = onenand_block(this, ofs); 2633 end = onenand_block(this, ofs + len) - 1; 2634 2635 if (cmd == ONENAND_CMD_LOCK) 2636 wp_status_mask = ONENAND_WP_LS; 2637 else 2638 wp_status_mask = ONENAND_WP_US; 2639 2640 /* Continuous lock scheme */ 2641 if (this->options & ONENAND_HAS_CONT_LOCK) { 2642 /* Set start block address */ 2643 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2644 /* Set end block address */ 2645 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS); 2646 /* Write lock command */ 2647 this->command(mtd, cmd, 0, 0); 2648 2649 /* There's no return value */ 2650 this->wait(mtd, FL_LOCKING); 2651 2652 /* Sanity check */ 2653 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2654 & ONENAND_CTRL_ONGO) 2655 continue; 2656 2657 /* Check lock status */ 2658 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2659 if (!(status & wp_status_mask)) 2660 printk(KERN_ERR "%s: wp status = 0x%x\n", 2661 __func__, status); 2662 2663 return 0; 2664 } 2665 2666 /* Block lock scheme */ 2667 for (block = start; block < end + 1; block++) { 2668 /* Set block address */ 2669 value = onenand_block_address(this, block); 2670 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2671 /* Select DataRAM for DDP */ 2672 value = onenand_bufferram_address(this, block); 2673 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2674 /* Set start block address */ 2675 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2676 /* Write lock command */ 2677 this->command(mtd, cmd, 0, 0); 2678 2679 /* There's no return value */ 2680 this->wait(mtd, FL_LOCKING); 2681 2682 /* Sanity check */ 2683 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2684 & ONENAND_CTRL_ONGO) 2685 continue; 2686 2687 /* Check lock status */ 2688 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2689 if (!(status & wp_status_mask)) 2690 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", 2691 __func__, block, status); 2692 } 2693 2694 return 0; 2695} 2696 2697/** 2698 * onenand_lock - [MTD Interface] Lock block(s) 2699 * @param mtd MTD device structure 2700 * @param ofs offset relative to mtd start 2701 * @param len number of bytes to unlock 2702 * 2703 * Lock one or more blocks 2704 */ 2705static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2706{ 2707 int ret; 2708 2709 onenand_get_device(mtd, FL_LOCKING); 2710 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); 2711 onenand_release_device(mtd); 2712 return ret; 2713} 2714 2715/** 2716 * onenand_unlock - [MTD Interface] Unlock block(s) 2717 * @param mtd MTD device structure 2718 * @param ofs offset relative to mtd start 2719 * @param len number of bytes to unlock 2720 * 2721 * Unlock one or more blocks 2722 */ 2723static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2724{ 2725 int ret; 2726 2727 onenand_get_device(mtd, FL_LOCKING); 2728 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2729 onenand_release_device(mtd); 2730 return ret; 2731} 2732 2733/** 2734 * onenand_check_lock_status - [OneNAND Interface] Check lock status 2735 * @param this onenand chip data structure 2736 * 2737 * Check lock status 2738 */ 2739static int onenand_check_lock_status(struct onenand_chip *this) 2740{ 2741 unsigned int value, block, status; 2742 unsigned int end; 2743 2744 end = this->chipsize >> this->erase_shift; 2745 for (block = 0; block < end; block++) { 2746 /* Set block address */ 2747 value = onenand_block_address(this, block); 2748 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2749 /* Select DataRAM for DDP */ 2750 value = onenand_bufferram_address(this, block); 2751 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2752 /* Set start block address */ 2753 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2754 2755 /* Check lock status */ 2756 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2757 if (!(status & ONENAND_WP_US)) { 2758 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", 2759 __func__, block, status); 2760 return 0; 2761 } 2762 } 2763 2764 return 1; 2765} 2766 2767/** 2768 * onenand_unlock_all - [OneNAND Interface] unlock all blocks 2769 * @param mtd MTD device structure 2770 * 2771 * Unlock all blocks 2772 */ 2773static void onenand_unlock_all(struct mtd_info *mtd) 2774{ 2775 struct onenand_chip *this = mtd->priv; 2776 loff_t ofs = 0; 2777 loff_t len = mtd->size; 2778 2779 if (this->options & ONENAND_HAS_UNLOCK_ALL) { 2780 /* Set start block address */ 2781 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2782 /* Write unlock command */ 2783 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); 2784 2785 /* There's no return value */ 2786 this->wait(mtd, FL_LOCKING); 2787 2788 /* Sanity check */ 2789 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2790 & ONENAND_CTRL_ONGO) 2791 continue; 2792 2793 /* Don't check lock status */ 2794 if (this->options & ONENAND_SKIP_UNLOCK_CHECK) 2795 return; 2796 2797 /* Check lock status */ 2798 if (onenand_check_lock_status(this)) 2799 return; 2800 2801 /* Workaround for all block unlock in DDP */ 2802 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) { 2803 /* All blocks on another chip */ 2804 ofs = this->chipsize >> 1; 2805 len = this->chipsize >> 1; 2806 } 2807 } 2808 2809 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2810} 2811 2812#ifdef CONFIG_MTD_ONENAND_OTP 2813 2814/** 2815 * onenand_otp_command - Send OTP specific command to OneNAND device 2816 * @param mtd MTD device structure 2817 * @param cmd the command to be sent 2818 * @param addr offset to read from or write to 2819 * @param len number of bytes to read or write 2820 */ 2821static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr, 2822 size_t len) 2823{ 2824 struct onenand_chip *this = mtd->priv; 2825 int value, block, page; 2826 2827 /* Address translation */ 2828 switch (cmd) { 2829 case ONENAND_CMD_OTP_ACCESS: 2830 block = (int) (addr >> this->erase_shift); 2831 page = -1; 2832 break; 2833 2834 default: 2835 block = (int) (addr >> this->erase_shift); 2836 page = (int) (addr >> this->page_shift); 2837 2838 if (ONENAND_IS_2PLANE(this)) { 2839 /* Make the even block number */ 2840 block &= ~1; 2841 /* Is it the odd plane? */ 2842 if (addr & this->writesize) 2843 block++; 2844 page >>= 1; 2845 } 2846 page &= this->page_mask; 2847 break; 2848 } 2849 2850 if (block != -1) { 2851 /* Write 'DFS, FBA' of Flash */ 2852 value = onenand_block_address(this, block); 2853 this->write_word(value, this->base + 2854 ONENAND_REG_START_ADDRESS1); 2855 } 2856 2857 if (page != -1) { 2858 /* Now we use page size operation */ 2859 int sectors = 4, count = 4; 2860 int dataram; 2861 2862 switch (cmd) { 2863 default: 2864 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 2865 cmd = ONENAND_CMD_2X_PROG; 2866 dataram = ONENAND_CURRENT_BUFFERRAM(this); 2867 break; 2868 } 2869 2870 /* Write 'FPA, FSA' of Flash */ 2871 value = onenand_page_address(page, sectors); 2872 this->write_word(value, this->base + 2873 ONENAND_REG_START_ADDRESS8); 2874 2875 /* Write 'BSA, BSC' of DataRAM */ 2876 value = onenand_buffer_address(dataram, sectors, count); 2877 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 2878 } 2879 2880 /* Interrupt clear */ 2881 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 2882 2883 /* Write command */ 2884 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 2885 2886 return 0; 2887} 2888 2889/** 2890 * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP 2891 * @param mtd MTD device structure 2892 * @param to offset to write to 2893 * @param len number of bytes to write 2894 * @param retlen pointer to variable to store the number of written bytes 2895 * @param buf the data to write 2896 * 2897 * OneNAND write out-of-band only for OTP 2898 */ 2899static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to, 2900 struct mtd_oob_ops *ops) 2901{ 2902 struct onenand_chip *this = mtd->priv; 2903 int column, ret = 0, oobsize; 2904 int written = 0; 2905 u_char *oobbuf; 2906 size_t len = ops->ooblen; 2907 const u_char *buf = ops->oobbuf; 2908 int block, value, status; 2909 2910 to += ops->ooboffs; 2911 2912 /* Initialize retlen, in case of early exit */ 2913 ops->oobretlen = 0; 2914 2915 oobsize = mtd->oobsize; 2916 2917 column = to & (mtd->oobsize - 1); 2918 2919 oobbuf = this->oob_buf; 2920 2921 /* Loop until all data write */ 2922 while (written < len) { 2923 int thislen = min_t(int, oobsize, len - written); 2924 2925 cond_resched(); 2926 2927 block = (int) (to >> this->erase_shift); 2928 /* 2929 * Write 'DFS, FBA' of Flash 2930 * Add: F100h DQ=DFS, FBA 2931 */ 2932 2933 value = onenand_block_address(this, block); 2934 this->write_word(value, this->base + 2935 ONENAND_REG_START_ADDRESS1); 2936 2937 /* 2938 * Select DataRAM for DDP 2939 * Add: F101h DQ=DBS 2940 */ 2941 2942 value = onenand_bufferram_address(this, block); 2943 this->write_word(value, this->base + 2944 ONENAND_REG_START_ADDRESS2); 2945 ONENAND_SET_NEXT_BUFFERRAM(this); 2946 2947 /* 2948 * Enter OTP access mode 2949 */ 2950 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2951 this->wait(mtd, FL_OTPING); 2952 2953 /* We send data to spare ram with oobsize 2954 * to prevent byte access */ 2955 memcpy(oobbuf + column, buf, thislen); 2956 2957 /* 2958 * Write Data into DataRAM 2959 * Add: 8th Word 2960 * in sector0/spare/page0 2961 * DQ=XXFCh 2962 */ 2963 this->write_bufferram(mtd, ONENAND_SPARERAM, 2964 oobbuf, 0, mtd->oobsize); 2965 2966 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); 2967 onenand_update_bufferram(mtd, to, 0); 2968 if (ONENAND_IS_2PLANE(this)) { 2969 ONENAND_SET_BUFFERRAM1(this); 2970 onenand_update_bufferram(mtd, to + this->writesize, 0); 2971 } 2972 2973 ret = this->wait(mtd, FL_WRITING); 2974 if (ret) { 2975 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 2976 break; 2977 } 2978 2979 /* Exit OTP access mode */ 2980 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2981 this->wait(mtd, FL_RESETING); 2982 2983 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 2984 status &= 0x60; 2985 2986 if (status == 0x60) { 2987 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2988 printk(KERN_DEBUG "1st Block\tLOCKED\n"); 2989 printk(KERN_DEBUG "OTP Block\tLOCKED\n"); 2990 } else if (status == 0x20) { 2991 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2992 printk(KERN_DEBUG "1st Block\tLOCKED\n"); 2993 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n"); 2994 } else if (status == 0x40) { 2995 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2996 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n"); 2997 printk(KERN_DEBUG "OTP Block\tLOCKED\n"); 2998 } else { 2999 printk(KERN_DEBUG "Reboot to check\n"); 3000 } 3001 3002 written += thislen; 3003 if (written == len) 3004 break; 3005 3006 to += mtd->writesize; 3007 buf += thislen; 3008 column = 0; 3009 } 3010 3011 ops->oobretlen = written; 3012 3013 return ret; 3014} 3015 3016/* Internal OTP operation */ 3017typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, 3018 size_t *retlen, u_char *buf); 3019 3020/** 3021 * do_otp_read - [DEFAULT] Read OTP block area 3022 * @param mtd MTD device structure 3023 * @param from The offset to read 3024 * @param len number of bytes to read 3025 * @param retlen pointer to variable to store the number of readbytes 3026 * @param buf the databuffer to put/get data 3027 * 3028 * Read OTP block area. 3029 */ 3030static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, 3031 size_t *retlen, u_char *buf) 3032{ 3033 struct onenand_chip *this = mtd->priv; 3034 struct mtd_oob_ops ops = { 3035 .len = len, 3036 .ooblen = 0, 3037 .datbuf = buf, 3038 .oobbuf = NULL, 3039 }; 3040 int ret; 3041 3042 /* Enter OTP access mode */ 3043 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 3044 this->wait(mtd, FL_OTPING); 3045 3046 ret = ONENAND_IS_4KB_PAGE(this) ? 3047 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 3048 onenand_read_ops_nolock(mtd, from, &ops); 3049 3050 /* Exit OTP access mode */ 3051 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3052 this->wait(mtd, FL_RESETING); 3053 3054 return ret; 3055} 3056 3057/** 3058 * do_otp_write - [DEFAULT] Write OTP block area 3059 * @param mtd MTD device structure 3060 * @param to The offset to write 3061 * @param len number of bytes to write 3062 * @param retlen pointer to variable to store the number of write bytes 3063 * @param buf the databuffer to put/get data 3064 * 3065 * Write OTP block area. 3066 */ 3067static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len, 3068 size_t *retlen, u_char *buf) 3069{ 3070 struct onenand_chip *this = mtd->priv; 3071 unsigned char *pbuf = buf; 3072 int ret; 3073 struct mtd_oob_ops ops; 3074 3075 /* Force buffer page aligned */ 3076 if (len < mtd->writesize) { 3077 memcpy(this->page_buf, buf, len); 3078 memset(this->page_buf + len, 0xff, mtd->writesize - len); 3079 pbuf = this->page_buf; 3080 len = mtd->writesize; 3081 } 3082 3083 /* Enter OTP access mode */ 3084 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 3085 this->wait(mtd, FL_OTPING); 3086 3087 ops.len = len; 3088 ops.ooblen = 0; 3089 ops.datbuf = pbuf; 3090 ops.oobbuf = NULL; 3091 ret = onenand_write_ops_nolock(mtd, to, &ops); 3092 *retlen = ops.retlen; 3093 3094 /* Exit OTP access mode */ 3095 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3096 this->wait(mtd, FL_RESETING); 3097 3098 return ret; 3099} 3100 3101/** 3102 * do_otp_lock - [DEFAULT] Lock OTP block area 3103 * @param mtd MTD device structure 3104 * @param from The offset to lock 3105 * @param len number of bytes to lock 3106 * @param retlen pointer to variable to store the number of lock bytes 3107 * @param buf the databuffer to put/get data 3108 * 3109 * Lock OTP block area. 3110 */ 3111static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len, 3112 size_t *retlen, u_char *buf) 3113{ 3114 struct onenand_chip *this = mtd->priv; 3115 struct mtd_oob_ops ops; 3116 int ret; 3117 3118 if (FLEXONENAND(this)) { 3119 3120 /* Enter OTP access mode */ 3121 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 3122 this->wait(mtd, FL_OTPING); 3123 /* 3124 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3125 * main area of page 49. 3126 */ 3127 ops.len = mtd->writesize; 3128 ops.ooblen = 0; 3129 ops.datbuf = buf; 3130 ops.oobbuf = NULL; 3131 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops); 3132 *retlen = ops.retlen; 3133 3134 /* Exit OTP access mode */ 3135 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3136 this->wait(mtd, FL_RESETING); 3137 } else { 3138 ops.mode = MTD_OOB_PLACE; 3139 ops.ooblen = len; 3140 ops.oobbuf = buf; 3141 ops.ooboffs = 0; 3142 ret = onenand_otp_write_oob_nolock(mtd, from, &ops); 3143 *retlen = ops.oobretlen; 3144 } 3145 3146 return ret; 3147} 3148 3149/** 3150 * onenand_otp_walk - [DEFAULT] Handle OTP operation 3151 * @param mtd MTD device structure 3152 * @param from The offset to read/write 3153 * @param len number of bytes to read/write 3154 * @param retlen pointer to variable to store the number of read bytes 3155 * @param buf the databuffer to put/get data 3156 * @param action do given action 3157 * @param mode specify user and factory 3158 * 3159 * Handle OTP operation. 3160 */ 3161static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len, 3162 size_t *retlen, u_char *buf, 3163 otp_op_t action, int mode) 3164{ 3165 struct onenand_chip *this = mtd->priv; 3166 int otp_pages; 3167 int density; 3168 int ret = 0; 3169 3170 *retlen = 0; 3171 3172 density = onenand_get_density(this->device_id); 3173 if (density < ONENAND_DEVICE_DENSITY_512Mb) 3174 otp_pages = 20; 3175 else 3176 otp_pages = 50; 3177 3178 if (mode == MTD_OTP_FACTORY) { 3179 from += mtd->writesize * otp_pages; 3180 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages; 3181 } 3182 3183 /* Check User/Factory boundary */ 3184 if (mode == MTD_OTP_USER) { 3185 if (mtd->writesize * otp_pages < from + len) 3186 return 0; 3187 } else { 3188 if (mtd->writesize * otp_pages < len) 3189 return 0; 3190 } 3191 3192 onenand_get_device(mtd, FL_OTPING); 3193 while (len > 0 && otp_pages > 0) { 3194 if (!action) { /* OTP Info functions */ 3195 struct otp_info *otpinfo; 3196 3197 len -= sizeof(struct otp_info); 3198 if (len <= 0) { 3199 ret = -ENOSPC; 3200 break; 3201 } 3202 3203 otpinfo = (struct otp_info *) buf; 3204 otpinfo->start = from; 3205 otpinfo->length = mtd->writesize; 3206 otpinfo->locked = 0; 3207 3208 from += mtd->writesize; 3209 buf += sizeof(struct otp_info); 3210 *retlen += sizeof(struct otp_info); 3211 } else { 3212 size_t tmp_retlen; 3213 3214 ret = action(mtd, from, len, &tmp_retlen, buf); 3215 3216 buf += tmp_retlen; 3217 len -= tmp_retlen; 3218 *retlen += tmp_retlen; 3219 3220 if (ret) 3221 break; 3222 } 3223 otp_pages--; 3224 } 3225 onenand_release_device(mtd); 3226 3227 return ret; 3228} 3229 3230/** 3231 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info 3232 * @param mtd MTD device structure 3233 * @param buf the databuffer to put/get data 3234 * @param len number of bytes to read 3235 * 3236 * Read factory OTP info. 3237 */ 3238static int onenand_get_fact_prot_info(struct mtd_info *mtd, 3239 struct otp_info *buf, size_t len) 3240{ 3241 size_t retlen; 3242 int ret; 3243 3244 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY); 3245 3246 return ret ? : retlen; 3247} 3248 3249/** 3250 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area 3251 * @param mtd MTD device structure 3252 * @param from The offset to read 3253 * @param len number of bytes to read 3254 * @param retlen pointer to variable to store the number of read bytes 3255 * @param buf the databuffer to put/get data 3256 * 3257 * Read factory OTP area. 3258 */ 3259static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, 3260 size_t len, size_t *retlen, u_char *buf) 3261{ 3262 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY); 3263} 3264 3265/** 3266 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info 3267 * @param mtd MTD device structure 3268 * @param buf the databuffer to put/get data 3269 * @param len number of bytes to read 3270 * 3271 * Read user OTP info. 3272 */ 3273static int onenand_get_user_prot_info(struct mtd_info *mtd, 3274 struct otp_info *buf, size_t len) 3275{ 3276 size_t retlen; 3277 int ret; 3278 3279 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER); 3280 3281 return ret ? : retlen; 3282} 3283 3284/** 3285 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area 3286 * @param mtd MTD device structure 3287 * @param from The offset to read 3288 * @param len number of bytes to read 3289 * @param retlen pointer to variable to store the number of read bytes 3290 * @param buf the databuffer to put/get data 3291 * 3292 * Read user OTP area. 3293 */ 3294static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from, 3295 size_t len, size_t *retlen, u_char *buf) 3296{ 3297 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER); 3298} 3299 3300/** 3301 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area 3302 * @param mtd MTD device structure 3303 * @param from The offset to write 3304 * @param len number of bytes to write 3305 * @param retlen pointer to variable to store the number of write bytes 3306 * @param buf the databuffer to put/get data 3307 * 3308 * Write user OTP area. 3309 */ 3310static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from, 3311 size_t len, size_t *retlen, u_char *buf) 3312{ 3313 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER); 3314} 3315 3316/** 3317 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area 3318 * @param mtd MTD device structure 3319 * @param from The offset to lock 3320 * @param len number of bytes to unlock 3321 * 3322 * Write lock mark on spare area in page 0 in OTP block 3323 */ 3324static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, 3325 size_t len) 3326{ 3327 struct onenand_chip *this = mtd->priv; 3328 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf; 3329 size_t retlen; 3330 int ret; 3331 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET; 3332 3333 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize 3334 : mtd->oobsize); 3335 /* 3336 * Write lock mark to 8th word of sector0 of page0 of the spare0. 3337 * We write 16 bytes spare area instead of 2 bytes. 3338 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3339 * main area of page 49. 3340 */ 3341 3342 from = 0; 3343 len = FLEXONENAND(this) ? mtd->writesize : 16; 3344 3345 /* 3346 * Note: OTP lock operation 3347 * OTP block : 0xXXFC XX 1111 1100 3348 * 1st block : 0xXXF3 (If chip support) XX 1111 0011 3349 * Both : 0xXXF0 (If chip support) XX 1111 0000 3350 */ 3351 if (FLEXONENAND(this)) 3352 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET; 3353 3354 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */ 3355 if (otp == 1) 3356 buf[otp_lock_offset] = 0xFC; 3357 else if (otp == 2) 3358 buf[otp_lock_offset] = 0xF3; 3359 else if (otp == 3) 3360 buf[otp_lock_offset] = 0xF0; 3361 else if (otp != 0) 3362 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n"); 3363 3364 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER); 3365 3366 return ret ? : retlen; 3367} 3368 3369#endif /* CONFIG_MTD_ONENAND_OTP */ 3370 3371/** 3372 * onenand_check_features - Check and set OneNAND features 3373 * @param mtd MTD data structure 3374 * 3375 * Check and set OneNAND features 3376 * - lock scheme 3377 * - two plane 3378 */ 3379static void onenand_check_features(struct mtd_info *mtd) 3380{ 3381 struct onenand_chip *this = mtd->priv; 3382 unsigned int density, process, numbufs; 3383 3384 /* Lock scheme depends on density and process */ 3385 density = onenand_get_density(this->device_id); 3386 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; 3387 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8; 3388 3389 /* Lock scheme */ 3390 switch (density) { 3391 case ONENAND_DEVICE_DENSITY_4Gb: 3392 if (ONENAND_IS_DDP(this)) 3393 this->options |= ONENAND_HAS_2PLANE; 3394 else if (numbufs == 1) { 3395 this->options |= ONENAND_HAS_4KB_PAGE; 3396 this->options |= ONENAND_HAS_CACHE_PROGRAM; 3397 } 3398 3399 case ONENAND_DEVICE_DENSITY_2Gb: 3400 /* 2Gb DDP does not have 2 plane */ 3401 if (!ONENAND_IS_DDP(this)) 3402 this->options |= ONENAND_HAS_2PLANE; 3403 this->options |= ONENAND_HAS_UNLOCK_ALL; 3404 3405 case ONENAND_DEVICE_DENSITY_1Gb: 3406 /* A-Die has all block unlock */ 3407 if (process) 3408 this->options |= ONENAND_HAS_UNLOCK_ALL; 3409 break; 3410 3411 default: 3412 /* Some OneNAND has continuous lock scheme */ 3413 if (!process) 3414 this->options |= ONENAND_HAS_CONT_LOCK; 3415 break; 3416 } 3417 3418 /* The MLC has 4KiB pagesize. */ 3419 if (ONENAND_IS_MLC(this)) 3420 this->options |= ONENAND_HAS_4KB_PAGE; 3421 3422 if (ONENAND_IS_4KB_PAGE(this)) 3423 this->options &= ~ONENAND_HAS_2PLANE; 3424 3425 if (FLEXONENAND(this)) { 3426 this->options &= ~ONENAND_HAS_CONT_LOCK; 3427 this->options |= ONENAND_HAS_UNLOCK_ALL; 3428 } 3429 3430 if (this->options & ONENAND_HAS_CONT_LOCK) 3431 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); 3432 if (this->options & ONENAND_HAS_UNLOCK_ALL) 3433 printk(KERN_DEBUG "Chip support all block unlock\n"); 3434 if (this->options & ONENAND_HAS_2PLANE) 3435 printk(KERN_DEBUG "Chip has 2 plane\n"); 3436 if (this->options & ONENAND_HAS_4KB_PAGE) 3437 printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); 3438 if (this->options & ONENAND_HAS_CACHE_PROGRAM) 3439 printk(KERN_DEBUG "Chip has cache program feature\n"); 3440} 3441 3442/** 3443 * onenand_print_device_info - Print device & version ID 3444 * @param device device ID 3445 * @param version version ID 3446 * 3447 * Print device & version ID 3448 */ 3449static void onenand_print_device_info(int device, int version) 3450{ 3451 int vcc, demuxed, ddp, density, flexonenand; 3452 3453 vcc = device & ONENAND_DEVICE_VCC_MASK; 3454 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 3455 ddp = device & ONENAND_DEVICE_IS_DDP; 3456 density = onenand_get_density(device); 3457 flexonenand = device & DEVICE_IS_FLEXONENAND; 3458 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", 3459 demuxed ? "" : "Muxed ", 3460 flexonenand ? "Flex-" : "", 3461 ddp ? "(DDP)" : "", 3462 (16 << density), 3463 vcc ? "2.65/3.3" : "1.8", 3464 device); 3465 printk(KERN_INFO "OneNAND version = 0x%04x\n", version); 3466} 3467 3468static const struct onenand_manufacturers onenand_manuf_ids[] = { 3469 {ONENAND_MFR_SAMSUNG, "Samsung"}, 3470 {ONENAND_MFR_NUMONYX, "Numonyx"}, 3471}; 3472 3473/** 3474 * onenand_check_maf - Check manufacturer ID 3475 * @param manuf manufacturer ID 3476 * 3477 * Check manufacturer ID 3478 */ 3479static int onenand_check_maf(int manuf) 3480{ 3481 int size = ARRAY_SIZE(onenand_manuf_ids); 3482 char *name; 3483 int i; 3484 3485 for (i = 0; i < size; i++) 3486 if (manuf == onenand_manuf_ids[i].id) 3487 break; 3488 3489 if (i < size) 3490 name = onenand_manuf_ids[i].name; 3491 else 3492 name = "Unknown"; 3493 3494 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); 3495 3496 return (i == size); 3497} 3498 3499/** 3500* flexonenand_get_boundary - Reads the SLC boundary 3501* @param onenand_info - onenand info structure 3502**/ 3503static int flexonenand_get_boundary(struct mtd_info *mtd) 3504{ 3505 struct onenand_chip *this = mtd->priv; 3506 unsigned die, bdry; 3507 int ret, syscfg, locked; 3508 3509 /* Disable ECC */ 3510 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3511 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1); 3512 3513 for (die = 0; die < this->dies; die++) { 3514 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3515 this->wait(mtd, FL_SYNCING); 3516 3517 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3518 ret = this->wait(mtd, FL_READING); 3519 3520 bdry = this->read_word(this->base + ONENAND_DATARAM); 3521 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3) 3522 locked = 0; 3523 else 3524 locked = 1; 3525 this->boundary[die] = bdry & FLEXONENAND_PI_MASK; 3526 3527 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3528 ret = this->wait(mtd, FL_RESETING); 3529 3530 printk(KERN_INFO "Die %d boundary: %d%s\n", die, 3531 this->boundary[die], locked ? "(Locked)" : "(Unlocked)"); 3532 } 3533 3534 /* Enable ECC */ 3535 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3536 return 0; 3537} 3538 3539/** 3540 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info 3541 * boundary[], diesize[], mtd->size, mtd->erasesize 3542 * @param mtd - MTD device structure 3543 */ 3544static void flexonenand_get_size(struct mtd_info *mtd) 3545{ 3546 struct onenand_chip *this = mtd->priv; 3547 int die, i, eraseshift, density; 3548 int blksperdie, maxbdry; 3549 loff_t ofs; 3550 3551 density = onenand_get_density(this->device_id); 3552 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift); 3553 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3554 maxbdry = blksperdie - 1; 3555 eraseshift = this->erase_shift - 1; 3556 3557 mtd->numeraseregions = this->dies << 1; 3558 3559 /* This fills up the device boundary */ 3560 flexonenand_get_boundary(mtd); 3561 die = ofs = 0; 3562 i = -1; 3563 for (; die < this->dies; die++) { 3564 if (!die || this->boundary[die-1] != maxbdry) { 3565 i++; 3566 mtd->eraseregions[i].offset = ofs; 3567 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3568 mtd->eraseregions[i].numblocks = 3569 this->boundary[die] + 1; 3570 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3571 eraseshift++; 3572 } else { 3573 mtd->numeraseregions -= 1; 3574 mtd->eraseregions[i].numblocks += 3575 this->boundary[die] + 1; 3576 ofs += (this->boundary[die] + 1) << (eraseshift - 1); 3577 } 3578 if (this->boundary[die] != maxbdry) { 3579 i++; 3580 mtd->eraseregions[i].offset = ofs; 3581 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3582 mtd->eraseregions[i].numblocks = maxbdry ^ 3583 this->boundary[die]; 3584 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3585 eraseshift--; 3586 } else 3587 mtd->numeraseregions -= 1; 3588 } 3589 3590 /* Expose MLC erase size except when all blocks are SLC */ 3591 mtd->erasesize = 1 << this->erase_shift; 3592 if (mtd->numeraseregions == 1) 3593 mtd->erasesize >>= 1; 3594 3595 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions); 3596 for (i = 0; i < mtd->numeraseregions; i++) 3597 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x," 3598 " numblocks: %04u]\n", 3599 (unsigned int) mtd->eraseregions[i].offset, 3600 mtd->eraseregions[i].erasesize, 3601 mtd->eraseregions[i].numblocks); 3602 3603 for (die = 0, mtd->size = 0; die < this->dies; die++) { 3604 this->diesize[die] = (loff_t)blksperdie << this->erase_shift; 3605 this->diesize[die] -= (loff_t)(this->boundary[die] + 1) 3606 << (this->erase_shift - 1); 3607 mtd->size += this->diesize[die]; 3608 } 3609} 3610 3611/** 3612 * flexonenand_check_blocks_erased - Check if blocks are erased 3613 * @param mtd_info - mtd info structure 3614 * @param start - first erase block to check 3615 * @param end - last erase block to check 3616 * 3617 * Converting an unerased block from MLC to SLC 3618 * causes byte values to change. Since both data and its ECC 3619 * have changed, reads on the block give uncorrectable error. 3620 * This might lead to the block being detected as bad. 3621 * 3622 * Avoid this by ensuring that the block to be converted is 3623 * erased. 3624 */ 3625static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end) 3626{ 3627 struct onenand_chip *this = mtd->priv; 3628 int i, ret; 3629 int block; 3630 struct mtd_oob_ops ops = { 3631 .mode = MTD_OOB_PLACE, 3632 .ooboffs = 0, 3633 .ooblen = mtd->oobsize, 3634 .datbuf = NULL, 3635 .oobbuf = this->oob_buf, 3636 }; 3637 loff_t addr; 3638 3639 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end); 3640 3641 for (block = start; block <= end; block++) { 3642 addr = flexonenand_addr(this, block); 3643 if (onenand_block_isbad_nolock(mtd, addr, 0)) 3644 continue; 3645 3646 /* 3647 * Since main area write results in ECC write to spare, 3648 * it is sufficient to check only ECC bytes for change. 3649 */ 3650 ret = onenand_read_oob_nolock(mtd, addr, &ops); 3651 if (ret) 3652 return ret; 3653 3654 for (i = 0; i < mtd->oobsize; i++) 3655 if (this->oob_buf[i] != 0xff) 3656 break; 3657 3658 if (i != mtd->oobsize) { 3659 printk(KERN_WARNING "%s: Block %d not erased.\n", 3660 __func__, block); 3661 return 1; 3662 } 3663 } 3664 3665 return 0; 3666} 3667 3668/** 3669 * flexonenand_set_boundary - Writes the SLC boundary 3670 * @param mtd - mtd info structure 3671 */ 3672int flexonenand_set_boundary(struct mtd_info *mtd, int die, 3673 int boundary, int lock) 3674{ 3675 struct onenand_chip *this = mtd->priv; 3676 int ret, density, blksperdie, old, new, thisboundary; 3677 loff_t addr; 3678 3679 /* Change only once for SDP Flex-OneNAND */ 3680 if (die && (!ONENAND_IS_DDP(this))) 3681 return 0; 3682 3683 /* boundary value of -1 indicates no required change */ 3684 if (boundary < 0 || boundary == this->boundary[die]) 3685 return 0; 3686 3687 density = onenand_get_density(this->device_id); 3688 blksperdie = ((16 << density) << 20) >> this->erase_shift; 3689 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3690 3691 if (boundary >= blksperdie) { 3692 printk(KERN_ERR "%s: Invalid boundary value. " 3693 "Boundary not changed.\n", __func__); 3694 return -EINVAL; 3695 } 3696 3697 /* Check if converting blocks are erased */ 3698 old = this->boundary[die] + (die * this->density_mask); 3699 new = boundary + (die * this->density_mask); 3700 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new)); 3701 if (ret) { 3702 printk(KERN_ERR "%s: Please erase blocks " 3703 "before boundary change\n", __func__); 3704 return ret; 3705 } 3706 3707 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3708 this->wait(mtd, FL_SYNCING); 3709 3710 /* Check is boundary is locked */ 3711 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3712 ret = this->wait(mtd, FL_READING); 3713 3714 thisboundary = this->read_word(this->base + ONENAND_DATARAM); 3715 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) { 3716 printk(KERN_ERR "%s: boundary locked\n", __func__); 3717 ret = 1; 3718 goto out; 3719 } 3720 3721 printk(KERN_INFO "Changing die %d boundary: %d%s\n", 3722 die, boundary, lock ? "(Locked)" : "(Unlocked)"); 3723 3724 addr = die ? this->diesize[0] : 0; 3725 3726 boundary &= FLEXONENAND_PI_MASK; 3727 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT); 3728 3729 this->command(mtd, ONENAND_CMD_ERASE, addr, 0); 3730 ret = this->wait(mtd, FL_ERASING); 3731 if (ret) { 3732 printk(KERN_ERR "%s: Failed PI erase for Die %d\n", 3733 __func__, die); 3734 goto out; 3735 } 3736 3737 this->write_word(boundary, this->base + ONENAND_DATARAM); 3738 this->command(mtd, ONENAND_CMD_PROG, addr, 0); 3739 ret = this->wait(mtd, FL_WRITING); 3740 if (ret) { 3741 printk(KERN_ERR "%s: Failed PI write for Die %d\n", 3742 __func__, die); 3743 goto out; 3744 } 3745 3746 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0); 3747 ret = this->wait(mtd, FL_WRITING); 3748out: 3749 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND); 3750 this->wait(mtd, FL_RESETING); 3751 if (!ret) 3752 /* Recalculate device size on boundary change*/ 3753 flexonenand_get_size(mtd); 3754 3755 return ret; 3756} 3757 3758/** 3759 * onenand_chip_probe - [OneNAND Interface] The generic chip probe 3760 * @param mtd MTD device structure 3761 * 3762 * OneNAND detection method: 3763 * Compare the values from command with ones from register 3764 */ 3765static int onenand_chip_probe(struct mtd_info *mtd) 3766{ 3767 struct onenand_chip *this = mtd->priv; 3768 int bram_maf_id, bram_dev_id, maf_id, dev_id; 3769 int syscfg; 3770 3771 /* Save system configuration 1 */ 3772 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3773 /* Clear Sync. Burst Read mode to read BootRAM */ 3774 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1); 3775 3776 /* Send the command for reading device ID from BootRAM */ 3777 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 3778 3779 /* Read manufacturer and device IDs from BootRAM */ 3780 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 3781 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 3782 3783 /* Reset OneNAND to read default register values */ 3784 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 3785 /* Wait reset */ 3786 this->wait(mtd, FL_RESETING); 3787 3788 /* Restore system configuration 1 */ 3789 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3790 3791 /* Check manufacturer ID */ 3792 if (onenand_check_maf(bram_maf_id)) 3793 return -ENXIO; 3794 3795 /* Read manufacturer and device IDs from Register */ 3796 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 3797 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3798 3799 /* Check OneNAND device */ 3800 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 3801 return -ENXIO; 3802 3803 return 0; 3804} 3805 3806/** 3807 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 3808 * @param mtd MTD device structure 3809 */ 3810static int onenand_probe(struct mtd_info *mtd) 3811{ 3812 struct onenand_chip *this = mtd->priv; 3813 int maf_id, dev_id, ver_id; 3814 int density; 3815 int ret; 3816 3817 ret = this->chip_probe(mtd); 3818 if (ret) 3819 return ret; 3820 3821 /* Read manufacturer and device IDs from Register */ 3822 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 3823 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3824 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 3825 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); 3826 3827 /* Flash device information */ 3828 onenand_print_device_info(dev_id, ver_id); 3829 this->device_id = dev_id; 3830 this->version_id = ver_id; 3831 3832 /* Check OneNAND features */ 3833 onenand_check_features(mtd); 3834 3835 density = onenand_get_density(dev_id); 3836 if (FLEXONENAND(this)) { 3837 this->dies = ONENAND_IS_DDP(this) ? 2 : 1; 3838 /* Maximum possible erase regions */ 3839 mtd->numeraseregions = this->dies << 1; 3840 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info) 3841 * (this->dies << 1), GFP_KERNEL); 3842 if (!mtd->eraseregions) 3843 return -ENOMEM; 3844 } 3845 3846 /* 3847 * For Flex-OneNAND, chipsize represents maximum possible device size. 3848 * mtd->size represents the actual device size. 3849 */ 3850 this->chipsize = (16 << density) << 20; 3851 3852 /* OneNAND page size & block size */ 3853 /* The data buffer size is equal to page size */ 3854 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 3855 /* We use the full BufferRAM */ 3856 if (ONENAND_IS_4KB_PAGE(this)) 3857 mtd->writesize <<= 1; 3858 3859 mtd->oobsize = mtd->writesize >> 5; 3860 /* Pages per a block are always 64 in OneNAND */ 3861 mtd->erasesize = mtd->writesize << 6; 3862 /* 3863 * Flex-OneNAND SLC area has 64 pages per block. 3864 * Flex-OneNAND MLC area has 128 pages per block. 3865 * Expose MLC erase size to find erase_shift and page_mask. 3866 */ 3867 if (FLEXONENAND(this)) 3868 mtd->erasesize <<= 1; 3869 3870 this->erase_shift = ffs(mtd->erasesize) - 1; 3871 this->page_shift = ffs(mtd->writesize) - 1; 3872 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1; 3873 /* Set density mask. it is used for DDP */ 3874 if (ONENAND_IS_DDP(this)) 3875 this->density_mask = this->chipsize >> (this->erase_shift + 1); 3876 /* It's real page size */ 3877 this->writesize = mtd->writesize; 3878 3879 /* REVISIT: Multichip handling */ 3880 3881 if (FLEXONENAND(this)) 3882 flexonenand_get_size(mtd); 3883 else 3884 mtd->size = this->chipsize; 3885 3886 /* 3887 * We emulate the 4KiB page and 256KiB erase block size 3888 * But oobsize is still 64 bytes. 3889 * It is only valid if you turn on 2X program support, 3890 * Otherwise it will be ignored by compiler. 3891 */ 3892 if (ONENAND_IS_2PLANE(this)) { 3893 mtd->writesize <<= 1; 3894 mtd->erasesize <<= 1; 3895 } 3896 3897 return 0; 3898} 3899 3900/** 3901 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash 3902 * @param mtd MTD device structure 3903 */ 3904static int onenand_suspend(struct mtd_info *mtd) 3905{ 3906 return onenand_get_device(mtd, FL_PM_SUSPENDED); 3907} 3908 3909/** 3910 * onenand_resume - [MTD Interface] Resume the OneNAND flash 3911 * @param mtd MTD device structure 3912 */ 3913static void onenand_resume(struct mtd_info *mtd) 3914{ 3915 struct onenand_chip *this = mtd->priv; 3916 3917 if (this->state == FL_PM_SUSPENDED) 3918 onenand_release_device(mtd); 3919 else 3920 printk(KERN_ERR "%s: resume() called for the chip which is not " 3921 "in suspended state\n", __func__); 3922} 3923 3924/** 3925 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 3926 * @param mtd MTD device structure 3927 * @param maxchips Number of chips to scan for 3928 * 3929 * This fills out all the not initialized function pointers 3930 * with the defaults. 3931 * The flash ID is read and the mtd/chip structures are 3932 * filled with the appropriate values. 3933 */ 3934int onenand_scan(struct mtd_info *mtd, int maxchips) 3935{ 3936 int i, ret; 3937 struct onenand_chip *this = mtd->priv; 3938 3939 if (!this->read_word) 3940 this->read_word = onenand_readw; 3941 if (!this->write_word) 3942 this->write_word = onenand_writew; 3943 3944 if (!this->command) 3945 this->command = onenand_command; 3946 if (!this->wait) 3947 onenand_setup_wait(mtd); 3948 if (!this->bbt_wait) 3949 this->bbt_wait = onenand_bbt_wait; 3950 if (!this->unlock_all) 3951 this->unlock_all = onenand_unlock_all; 3952 3953 if (!this->chip_probe) 3954 this->chip_probe = onenand_chip_probe; 3955 3956 if (!this->read_bufferram) 3957 this->read_bufferram = onenand_read_bufferram; 3958 if (!this->write_bufferram) 3959 this->write_bufferram = onenand_write_bufferram; 3960 3961 if (!this->block_markbad) 3962 this->block_markbad = onenand_default_block_markbad; 3963 if (!this->scan_bbt) 3964 this->scan_bbt = onenand_default_bbt; 3965 3966 if (onenand_probe(mtd)) 3967 return -ENXIO; 3968 3969 /* Set Sync. Burst Read after probing */ 3970 if (this->mmcontrol) { 3971 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 3972 this->read_bufferram = onenand_sync_read_bufferram; 3973 } 3974 3975 /* Allocate buffers, if necessary */ 3976 if (!this->page_buf) { 3977 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3978 if (!this->page_buf) { 3979 printk(KERN_ERR "%s: Can't allocate page_buf\n", 3980 __func__); 3981 return -ENOMEM; 3982 } 3983#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 3984 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3985 if (!this->verify_buf) { 3986 kfree(this->page_buf); 3987 return -ENOMEM; 3988 } 3989#endif 3990 this->options |= ONENAND_PAGEBUF_ALLOC; 3991 } 3992 if (!this->oob_buf) { 3993 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); 3994 if (!this->oob_buf) { 3995 printk(KERN_ERR "%s: Can't allocate oob_buf\n", 3996 __func__); 3997 if (this->options & ONENAND_PAGEBUF_ALLOC) { 3998 this->options &= ~ONENAND_PAGEBUF_ALLOC; 3999 kfree(this->page_buf); 4000 } 4001 return -ENOMEM; 4002 } 4003 this->options |= ONENAND_OOBBUF_ALLOC; 4004 } 4005 4006 this->state = FL_READY; 4007 init_waitqueue_head(&this->wq); 4008 spin_lock_init(&this->chip_lock); 4009 4010 /* 4011 * Allow subpage writes up to oobsize. 4012 */ 4013 switch (mtd->oobsize) { 4014 case 128: 4015 this->ecclayout = &onenand_oob_128; 4016 mtd->subpage_sft = 0; 4017 break; 4018 case 64: 4019 this->ecclayout = &onenand_oob_64; 4020 mtd->subpage_sft = 2; 4021 break; 4022 4023 case 32: 4024 this->ecclayout = &onenand_oob_32; 4025 mtd->subpage_sft = 1; 4026 break; 4027 4028 default: 4029 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n", 4030 __func__, mtd->oobsize); 4031 mtd->subpage_sft = 0; 4032 /* To prevent kernel oops */ 4033 this->ecclayout = &onenand_oob_32; 4034 break; 4035 } 4036 4037 this->subpagesize = mtd->writesize >> mtd->subpage_sft; 4038 4039 /* 4040 * The number of bytes available for a client to place data into 4041 * the out of band area 4042 */ 4043 this->ecclayout->oobavail = 0; 4044 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && 4045 this->ecclayout->oobfree[i].length; i++) 4046 this->ecclayout->oobavail += 4047 this->ecclayout->oobfree[i].length; 4048 mtd->oobavail = this->ecclayout->oobavail; 4049 4050 mtd->ecclayout = this->ecclayout; 4051 4052 /* Fill in remaining MTD driver data */ 4053 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH; 4054 mtd->flags = MTD_CAP_NANDFLASH; 4055 mtd->erase = onenand_erase; 4056 mtd->point = NULL; 4057 mtd->unpoint = NULL; 4058 mtd->read = onenand_read; 4059 mtd->write = onenand_write; 4060 mtd->read_oob = onenand_read_oob; 4061 mtd->write_oob = onenand_write_oob; 4062 mtd->panic_write = onenand_panic_write; 4063#ifdef CONFIG_MTD_ONENAND_OTP 4064 mtd->get_fact_prot_info = onenand_get_fact_prot_info; 4065 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg; 4066 mtd->get_user_prot_info = onenand_get_user_prot_info; 4067 mtd->read_user_prot_reg = onenand_read_user_prot_reg; 4068 mtd->write_user_prot_reg = onenand_write_user_prot_reg; 4069 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg; 4070#endif 4071 mtd->sync = onenand_sync; 4072 mtd->lock = onenand_lock; 4073 mtd->unlock = onenand_unlock; 4074 mtd->suspend = onenand_suspend; 4075 mtd->resume = onenand_resume; 4076 mtd->block_isbad = onenand_block_isbad; 4077 mtd->block_markbad = onenand_block_markbad; 4078 mtd->owner = THIS_MODULE; 4079 4080 /* Unlock whole block */ 4081 this->unlock_all(mtd); 4082 4083 ret = this->scan_bbt(mtd); 4084 if ((!FLEXONENAND(this)) || ret) 4085 return ret; 4086 4087 /* Change Flex-OneNAND boundaries if required */ 4088 for (i = 0; i < MAX_DIES; i++) 4089 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i], 4090 flex_bdry[(2 * i) + 1]); 4091 4092 return 0; 4093} 4094 4095/** 4096 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 4097 * @param mtd MTD device structure 4098 */ 4099void onenand_release(struct mtd_info *mtd) 4100{ 4101 struct onenand_chip *this = mtd->priv; 4102 4103#ifdef CONFIG_MTD_PARTITIONS 4104 /* Deregister partitions */ 4105 del_mtd_partitions (mtd); 4106#endif 4107 /* Deregister the device */ 4108 del_mtd_device (mtd); 4109 4110 /* Free bad block table memory, if allocated */ 4111 if (this->bbm) { 4112 struct bbm_info *bbm = this->bbm; 4113 kfree(bbm->bbt); 4114 kfree(this->bbm); 4115 } 4116 /* Buffers allocated by onenand_scan */ 4117 if (this->options & ONENAND_PAGEBUF_ALLOC) { 4118 kfree(this->page_buf); 4119#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 4120 kfree(this->verify_buf); 4121#endif 4122 } 4123 if (this->options & ONENAND_OOBBUF_ALLOC) 4124 kfree(this->oob_buf); 4125 kfree(mtd->eraseregions); 4126} 4127 4128EXPORT_SYMBOL_GPL(onenand_scan); 4129EXPORT_SYMBOL_GPL(onenand_release); 4130 4131MODULE_LICENSE("GPL"); 4132MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); 4133MODULE_DESCRIPTION("Generic OneNAND flash driver code"); 4134