16aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7990.h -- LANCE ethernet IC generic routines. 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This is an attempt to separate out the bits of various ethernet 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * drivers that are common because they all use the AMD 7990 LANCE 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (Local Area Network Controller for Ethernet) chip. 66aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik * 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk> 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Most of this stuff was obtained by looking at other LANCE drivers, 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful. 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef _7990_H 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _7990_H 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* The lance only has two register locations. We communicate mostly via memory. */ 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LANCE_RDP 0 /* Register Data Port */ 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LANCE_RAP 2 /* Register Address Port */ 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Transmit/receive ring definitions. 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * We allow the specific drivers to override these defaults if they want to. 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * NB: according to lance.c, increasing the number of buffers is a waste 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * of space and reduces the chance that an upper layer will be able to 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * reorder queued Tx packets based on priority. [Clearly there is a minimum 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * limit too: too small and we drop rx packets and can't tx at full speed.] 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4+4 seems to be the usual setting; the atarilance driver uses 3 and 5. 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Blast! This won't work. The problem is that we can't specify a default 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * setting because that would cause the lance_init_block struct to be 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * too long (and overflow the RAM on shared-memory cards like the HP LANCE. 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef LANCE_LOG_TX_BUFFERS 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LANCE_LOG_TX_BUFFERS 1 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LANCE_LOG_RX_BUFFERS 3 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_RING_SIZE (1<<LANCE_LOG_TX_BUFFERS) 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RX_RING_SIZE (1<<LANCE_LOG_RX_BUFFERS) 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_BUFF_SIZE (1544) 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RX_BUFF_SIZE PKT_BUFF_SIZE 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_BUFF_SIZE PKT_BUFF_SIZE 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Each receive buffer is described by a receive message descriptor (RMD) */ 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct lance_rx_desc { 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short rmd0; /* low address of packet */ 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char rmd1_bits; /* descriptor bits */ 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char rmd1_hadr; /* high address of packet */ 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile short length; /* This length is 2s complement (negative)! 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Buffer length 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short mblength; /* Actual number of bytes received */ 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 586aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Ditto for TMD: */ 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct lance_tx_desc { 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short tmd0; /* low address of packet */ 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char tmd1_bits; /* descriptor bits */ 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char tmd1_hadr; /* high address of packet */ 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile short length; /* Length is 2s complement (negative)! */ 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short misc; 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* There are three memory structures accessed by the LANCE: 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the initialization block, the receive and transmit descriptor rings, 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * and the data buffers themselves. In fact we might as well put the 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * init block,the Tx and Rx rings and the buffers together in memory: 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct lance_init_block { 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short mode; /* Pre-set mode (reg. 15) */ 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned char phys_addr[6]; /* Physical ethernet address */ 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned filter[2]; /* Multicast filter (64 bits) */ 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Receive and transmit ring base, along with extra bits. */ 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short rx_ptr; /* receive descriptor addr */ 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short rx_len; /* receive len and high addr */ 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short tx_ptr; /* transmit descriptor addr */ 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile unsigned short tx_len; /* transmit len and high addr */ 836aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik 846aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This will be true if this whole struct is 8-byte aligned. 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile struct lance_tx_desc btx_ring[TX_RING_SIZE]; 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile struct lance_rx_desc brx_ring[RX_RING_SIZE]; 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile char tx_buf [TX_RING_SIZE][TX_BUFF_SIZE]; 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile char rx_buf [RX_RING_SIZE][RX_BUFF_SIZE]; 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* we use this just to make the struct big enough that we can move its startaddr 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * in order to force alignment to an eight byte boundary. 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* This is where we keep all the stuff the driver needs to know about. 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * I'm definitely unhappy about the mechanism for allowing specific 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * drivers to add things... 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct lance_private 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char *name; 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long base; 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile struct lance_init_block *init_block; /* CPU address of RAM */ 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile struct lance_init_block *lance_init_block; /* LANCE address of RAM */ 1076aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rx_new, tx_new; 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rx_old, tx_old; 1106aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int lance_log_rx_bufs, lance_log_tx_bufs; 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rx_ring_mod_mask, tx_ring_mod_mask; 1136aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int tpe; /* TPE is selected */ 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int auto_select; /* cable-selection is by carrier */ 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned short busmaster_regval; 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int irq; /* IRQ to register */ 1196aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik 1206aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik /* This is because the HP LANCE is disgusting and you have to check 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * a DIO-specific register every time you read/write the LANCE regs :-< 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * [could we get away with making these some sort of macro?] 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void (*writerap)(void *, unsigned short); 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void (*writerdp)(void *, unsigned short); 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned short (*readrdp)(void *); 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spinlock_t devlock; 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char tx_full; 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Am7990 Control and Status Registers 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_CSR0 0x0000 /* LANCE Controller Status */ 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_CSR1 0x0001 /* IADR[15:0] (bit0==0 ie word aligned) */ 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_CSR2 0x0002 /* IADR[23:16] (high bits reserved) */ 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_CSR3 0x0003 /* Misc */ 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bit definitions for CSR0 (LANCE Controller Status) 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_ERR 0x8000 /* Error = BABL | CERR | MISS | MERR */ 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_BABL 0x4000 /* Babble: Transmitted too many bits */ 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_CERR 0x2000 /* No Heartbeat (10BASE-T) */ 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_MISS 0x1000 /* Missed Frame (no rx buffer to put it in) */ 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_MERR 0x0800 /* Memory Error */ 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_RINT 0x0400 /* Receive Interrupt */ 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_TINT 0x0200 /* Transmit Interrupt */ 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_IDON 0x0100 /* Initialization Done */ 1506aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik#define LE_C0_INTR 0x0080 /* Interrupt Flag 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds = BABL | MISS | MERR | RINT | TINT | IDON */ 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_INEA 0x0040 /* Interrupt Enable */ 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_RXON 0x0020 /* Receive On */ 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_TXON 0x0010 /* Transmit On */ 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_TDMD 0x0008 /* Transmit Demand */ 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_STOP 0x0004 /* Stop */ 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_STRT 0x0002 /* Start */ 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C0_INIT 0x0001 /* Initialize */ 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bit definitions for CSR3 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C3_BSWP 0x0004 /* Byte Swap 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (on for big endian byte order) */ 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C3_ACON 0x0002 /* ALE Control 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (on for active low ALE) */ 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_C3_BCON 0x0001 /* Byte Control */ 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Mode Flags 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_PROM 0x8000 /* Promiscuous Mode */ 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* these next ones 0x4000 -- 0x0080 are not available on the LANCE 7990, 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * but they are in NetBSD's am7990.h, presumably for backwards-compatible chips 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_DRCVBC 0x4000 /* disable receive broadcast */ 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_DRCVPA 0x2000 /* disable physical address detection */ 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_DLNKTST 0x1000 /* disable link status */ 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_DAPC 0x0800 /* disable automatic polarity correction */ 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_MENDECL 0x0400 /* MENDEC loopback mode */ 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_LRTTSEL 0x0200 /* lower RX threshold / TX mode selection */ 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_PSEL1 0x0100 /* port selection bit1 */ 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_PSEL0 0x0080 /* port selection bit0 */ 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* and this one is from the C-LANCE data sheet... */ 1876aa20a2235535605db6d6d2bd850298b2fe7f31eJeff Garzik#define LE_MO_EMBA 0x0080 /* Enable Modified Backoff Algorithm 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (C-LANCE, not original LANCE) */ 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_INTL 0x0040 /* Internal Loopback */ 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_DRTY 0x0020 /* Disable Retry */ 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_FCOLL 0x0010 /* Force Collision */ 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_DXMTFCS 0x0008 /* Disable Transmit CRC */ 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_LOOP 0x0004 /* Loopback Enable */ 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_DTX 0x0002 /* Disable Transmitter */ 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_MO_DRX 0x0001 /* Disable Receiver */ 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Receive Flags 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_OWN 0x80 /* LANCE owns the descriptor */ 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_ERR 0x40 /* Error */ 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_FRA 0x20 /* Framing Error */ 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_OFL 0x10 /* Overflow Error */ 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_CRC 0x08 /* CRC Error */ 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_BUF 0x04 /* Buffer Error */ 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_SOP 0x02 /* Start of Packet */ 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_EOP 0x01 /* End of Packet */ 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */ 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Transmit Flags 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_OWN 0x80 /* LANCE owns the descriptor */ 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_ERR 0x40 /* Error */ 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_RES 0x20 /* Reserved, LANCE writes this with a zero */ 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_EMORE 0x10 /* More than one retry needed */ 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_EONE 0x08 /* One retry needed */ 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_EDEF 0x04 /* Deferred */ 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_SOP 0x02 /* Start of Packet */ 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_EOP 0x01 /* End of Packet */ 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */ 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Error Flags 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T3_BUF 0x8000 /* Buffer Error */ 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T3_UFL 0x4000 /* Underflow Error */ 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T3_LCOL 0x1000 /* Late Collision */ 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T3_CLOS 0x0800 /* Loss of Carrier */ 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T3_RTY 0x0400 /* Retry Error */ 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry */ 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Miscellaneous useful macros */ 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds lp->tx_old+lp->tx_ring_mod_mask-lp->tx_new:\ 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds lp->tx_old - lp->tx_new-1) 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* The LANCE only uses 24 bit addresses. This does the obvious thing. */ 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LANCE_ADDR(x) ((int)(x) & ~0xff000000) 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Now the prototypes we export */ 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int lance_open(struct net_device *dev); 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int lance_close (struct net_device *dev); 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int lance_start_xmit (struct sk_buff *skb, struct net_device *dev); 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void lance_set_multicast (struct net_device *dev); 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void lance_tx_timeout(struct net_device *dev); 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_NET_POLL_CONTROLLER 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void lance_poll(struct net_device *dev); 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* ndef _7990_H */ 255