1/* 2 * Linux network driver for Brocade Converged Network Adapter. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License (GPL) Version 2 as 6 * published by the Free Software Foundation 7 * 8 * This program is distributed in the hope that it will be useful, but 9 * WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11 * General Public License for more details. 12 */ 13/* 14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 15 * All rights reserved 16 * www.brocade.com 17 */ 18 19#ifndef __BFA_DEFS_H__ 20#define __BFA_DEFS_H__ 21 22#include "cna.h" 23#include "bfa_defs_status.h" 24#include "bfa_defs_mfg_comm.h" 25 26#define BFA_STRING_32 32 27#define BFA_VERSION_LEN 64 28 29/** 30 * ---------------------- adapter definitions ------------ 31 */ 32 33/** 34 * BFA adapter level attributes. 35 */ 36enum { 37 BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE), 38 /* 39 *!< adapter serial num length 40 */ 41 BFA_ADAPTER_MODEL_NAME_LEN = 16, /*!< model name length */ 42 BFA_ADAPTER_MODEL_DESCR_LEN = 128, /*!< model description length */ 43 BFA_ADAPTER_MFG_NAME_LEN = 8, /*!< manufacturer name length */ 44 BFA_ADAPTER_SYM_NAME_LEN = 64, /*!< adapter symbolic name length */ 45 BFA_ADAPTER_OS_TYPE_LEN = 64, /*!< adapter os type length */ 46}; 47 48struct bfa_adapter_attr { 49 char manufacturer[BFA_ADAPTER_MFG_NAME_LEN]; 50 char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN]; 51 u32 card_type; 52 char model[BFA_ADAPTER_MODEL_NAME_LEN]; 53 char model_descr[BFA_ADAPTER_MODEL_DESCR_LEN]; 54 u64 pwwn; 55 char node_symname[FC_SYMNAME_MAX]; 56 char hw_ver[BFA_VERSION_LEN]; 57 char fw_ver[BFA_VERSION_LEN]; 58 char optrom_ver[BFA_VERSION_LEN]; 59 char os_type[BFA_ADAPTER_OS_TYPE_LEN]; 60 struct bfa_mfg_vpd vpd; 61 struct mac mac; 62 63 u8 nports; 64 u8 max_speed; 65 u8 prototype; 66 char asic_rev; 67 68 u8 pcie_gen; 69 u8 pcie_lanes_orig; 70 u8 pcie_lanes; 71 u8 cna_capable; 72 73 u8 is_mezz; 74 u8 trunk_capable; 75}; 76 77/** 78 * ---------------------- IOC definitions ------------ 79 */ 80 81enum { 82 BFA_IOC_DRIVER_LEN = 16, 83 BFA_IOC_CHIP_REV_LEN = 8, 84}; 85 86/** 87 * Driver and firmware versions. 88 */ 89struct bfa_ioc_driver_attr { 90 char driver[BFA_IOC_DRIVER_LEN]; /*!< driver name */ 91 char driver_ver[BFA_VERSION_LEN]; /*!< driver version */ 92 char fw_ver[BFA_VERSION_LEN]; /*!< firmware version */ 93 char bios_ver[BFA_VERSION_LEN]; /*!< bios version */ 94 char efi_ver[BFA_VERSION_LEN]; /*!< EFI version */ 95 char ob_ver[BFA_VERSION_LEN]; /*!< openboot version */ 96}; 97 98/** 99 * IOC PCI device attributes 100 */ 101struct bfa_ioc_pci_attr { 102 u16 vendor_id; /*!< PCI vendor ID */ 103 u16 device_id; /*!< PCI device ID */ 104 u16 ssid; /*!< subsystem ID */ 105 u16 ssvid; /*!< subsystem vendor ID */ 106 u32 pcifn; /*!< PCI device function */ 107 u32 rsvd; /* padding */ 108 char chip_rev[BFA_IOC_CHIP_REV_LEN]; /*!< chip revision */ 109}; 110 111/** 112 * IOC states 113 */ 114enum bfa_ioc_state { 115 BFA_IOC_UNINIT = 1, /*!< IOC is in uninit state */ 116 BFA_IOC_RESET = 2, /*!< IOC is in reset state */ 117 BFA_IOC_SEMWAIT = 3, /*!< Waiting for IOC h/w semaphore */ 118 BFA_IOC_HWINIT = 4, /*!< IOC h/w is being initialized */ 119 BFA_IOC_GETATTR = 5, /*!< IOC is being configured */ 120 BFA_IOC_OPERATIONAL = 6, /*!< IOC is operational */ 121 BFA_IOC_INITFAIL = 7, /*!< IOC hardware failure */ 122 BFA_IOC_FAIL = 8, /*!< IOC heart-beat failure */ 123 BFA_IOC_DISABLING = 9, /*!< IOC is being disabled */ 124 BFA_IOC_DISABLED = 10, /*!< IOC is disabled */ 125 BFA_IOC_FWMISMATCH = 11, /*!< IOC f/w different from drivers */ 126 BFA_IOC_ENABLING = 12, /*!< IOC is being enabled */ 127 BFA_IOC_HWFAIL = 13, /*!< PCI mapping doesn't exist */ 128}; 129 130/** 131 * IOC firmware stats 132 */ 133struct bfa_fw_ioc_stats { 134 u32 enable_reqs; 135 u32 disable_reqs; 136 u32 get_attr_reqs; 137 u32 dbg_sync; 138 u32 dbg_dump; 139 u32 unknown_reqs; 140}; 141 142/** 143 * IOC driver stats 144 */ 145struct bfa_ioc_drv_stats { 146 u32 ioc_isrs; 147 u32 ioc_enables; 148 u32 ioc_disables; 149 u32 ioc_hbfails; 150 u32 ioc_boots; 151 u32 stats_tmos; 152 u32 hb_count; 153 u32 disable_reqs; 154 u32 enable_reqs; 155 u32 disable_replies; 156 u32 enable_replies; 157 u32 rsvd; 158}; 159 160/** 161 * IOC statistics 162 */ 163struct bfa_ioc_stats { 164 struct bfa_ioc_drv_stats drv_stats; /*!< driver IOC stats */ 165 struct bfa_fw_ioc_stats fw_stats; /*!< firmware IOC stats */ 166}; 167 168enum bfa_ioc_type { 169 BFA_IOC_TYPE_FC = 1, 170 BFA_IOC_TYPE_FCoE = 2, 171 BFA_IOC_TYPE_LL = 3, 172}; 173 174/** 175 * IOC attributes returned in queries 176 */ 177struct bfa_ioc_attr { 178 enum bfa_ioc_type ioc_type; 179 enum bfa_ioc_state state; /*!< IOC state */ 180 struct bfa_adapter_attr adapter_attr; /*!< HBA attributes */ 181 struct bfa_ioc_driver_attr driver_attr; /*!< driver attr */ 182 struct bfa_ioc_pci_attr pci_attr; 183 u8 port_id; /*!< port number */ 184 u8 port_mode; /*!< enum bfa_mode */ 185 u8 cap_bm; /*!< capability */ 186 u8 port_mode_cfg; /*!< enum bfa_mode */ 187 u8 rsvd[4]; /*!< 64bit align */ 188}; 189 190/** 191 * Adapter capability mask definition 192 */ 193enum { 194 BFA_CM_HBA = 0x01, 195 BFA_CM_CNA = 0x02, 196 BFA_CM_NIC = 0x04, 197}; 198 199/** 200 * ---------------------- mfg definitions ------------ 201 */ 202 203/** 204 * Checksum size 205 */ 206#define BFA_MFG_CHKSUM_SIZE 16 207 208#define BFA_MFG_PARTNUM_SIZE 14 209#define BFA_MFG_SUPPLIER_ID_SIZE 10 210#define BFA_MFG_SUPPLIER_PARTNUM_SIZE 20 211#define BFA_MFG_SUPPLIER_SERIALNUM_SIZE 20 212#define BFA_MFG_SUPPLIER_REVISION_SIZE 4 213 214#pragma pack(1) 215 216/** 217 * @brief BFA adapter manufacturing block definition. 218 * 219 * All numerical fields are in big-endian format. 220 */ 221struct bfa_mfg_block { 222 u8 version; /* manufacturing block version */ 223 u8 mfg_sig[3]; /* characters 'M', 'F', 'G' */ 224 u16 mfgsize; /* mfg block size */ 225 u16 u16_chksum; /* old u16 checksum */ 226 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; 227 char brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)]; 228 u8 mfg_day; /* manufacturing day */ 229 u8 mfg_month; /* manufacturing month */ 230 u16 mfg_year; /* manufacturing year */ 231 u64 mfg_wwn; /* wwn base for this adapter */ 232 u8 num_wwn; /* number of wwns assigned */ 233 u8 mfg_speeds; /* speeds allowed for this adapter */ 234 u8 rsv[2]; 235 char supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)]; 236 char supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)]; 237 char supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)]; 238 char supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)]; 239 mac_t mfg_mac; /* base mac address */ 240 u8 num_mac; /* number of mac addresses */ 241 u8 rsv2; 242 u32 card_type; /* card type */ 243 char cap_nic; /* capability nic */ 244 char cap_cna; /* capability cna */ 245 char cap_hba; /* capability hba */ 246 char cap_fc16g; /* capability fc 16g */ 247 char cap_sriov; /* capability sriov */ 248 char cap_mezz; /* capability mezz */ 249 u8 rsv3; 250 u8 mfg_nports; /* number of ports */ 251 char media[8]; /* xfi/xaui */ 252 char initial_mode[8]; /* initial mode: hba/cna/nic */ 253 u8 rsv4[84]; 254 u8 md5_chksum[BFA_MFG_CHKSUM_SIZE]; /* md5 checksum */ 255}; 256 257#pragma pack() 258 259/** 260 * ---------------------- pci definitions ------------ 261 */ 262 263/* 264 * PCI device ID information 265 */ 266enum { 267 BFA_PCI_DEVICE_ID_CT2 = 0x22, 268}; 269 270#define bfa_asic_id_ct(device) \ 271 ((device) == PCI_DEVICE_ID_BROCADE_CT || \ 272 (device) == PCI_DEVICE_ID_BROCADE_CT_FC) 273#define bfa_asic_id_ct2(device) \ 274 ((device) == BFA_PCI_DEVICE_ID_CT2) 275#define bfa_asic_id_ctc(device) \ 276 (bfa_asic_id_ct(device) || bfa_asic_id_ct2(device)) 277 278/** 279 * PCI sub-system device and vendor ID information 280 */ 281enum { 282 BFA_PCI_FCOE_SSDEVICE_ID = 0x14, 283 BFA_PCI_CT2_SSID_FCoE = 0x22, 284 BFA_PCI_CT2_SSID_ETH = 0x23, 285 BFA_PCI_CT2_SSID_FC = 0x24, 286}; 287 288enum bfa_mode { 289 BFA_MODE_HBA = 1, 290 BFA_MODE_CNA = 2, 291 BFA_MODE_NIC = 3 292}; 293 294/* 295 * Flash module specific 296 */ 297#define BFA_FLASH_PART_ENTRY_SIZE 32 /* partition entry size */ 298#define BFA_FLASH_PART_MAX 32 /* maximal # of partitions */ 299#define BFA_TOTAL_FLASH_SIZE 0x400000 300#define BFA_FLASH_PART_FWIMG 2 301#define BFA_FLASH_PART_MFG 7 302 303/* 304 * flash partition attributes 305 */ 306struct bfa_flash_part_attr { 307 u32 part_type; /* partition type */ 308 u32 part_instance; /* partition instance */ 309 u32 part_off; /* partition offset */ 310 u32 part_size; /* partition size */ 311 u32 part_len; /* partition content length */ 312 u32 part_status; /* partition status */ 313 char rsv[BFA_FLASH_PART_ENTRY_SIZE - 24]; 314}; 315 316/* 317 * flash attributes 318 */ 319struct bfa_flash_attr { 320 u32 status; /* flash overall status */ 321 u32 npart; /* num of partitions */ 322 struct bfa_flash_part_attr part[BFA_FLASH_PART_MAX]; 323}; 324 325#endif /* __BFA_DEFS_H__ */ 326