be.h revision 24307eef74bd38e3fc6a6df8f8a1bfc48967f9f6
16b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla/* 26b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * Copyright (C) 2005 - 2009 ServerEngines 36b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * All rights reserved. 46b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * 56b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * This program is free software; you can redistribute it and/or 66b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * modify it under the terms of the GNU General Public License version 2 76b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * as published by the Free Software Foundation. The full GNU General 86b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * Public License is included in this distribution in the file called COPYING. 96b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * 106b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * Contact Information: 116b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * linux-drivers@serverengines.com 126b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * 136b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * ServerEngines 146b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * 209 N. Fair Oaks Ave 156b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * Sunnyvale, CA 94085 166b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla */ 176b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 186b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#ifndef BE_H 196b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_H 206b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 216b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <linux/pci.h> 226b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <linux/etherdevice.h> 236b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <linux/version.h> 246b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <linux/delay.h> 256b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <net/tcp.h> 266b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <net/ip.h> 276b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <net/ipv6.h> 286b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <linux/if_vlan.h> 296b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <linux/workqueue.h> 306b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <linux/interrupt.h> 316b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include <linux/inet_lro.h> 326b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 336b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include "be_hw.h" 346b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 356b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define DRV_VER "2.0.348" 366b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define DRV_NAME "be2net" 376b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC" 38c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde#define OC_NAME "Emulex OneConnect 10Gbps NIC" 396b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define DRV_DESC BE_NAME "Driver" 406b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 41c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde#define BE_VENDOR_ID 0x19a2 42c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde#define BE_DEVICE_ID1 0x211 43c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde#define OC_DEVICE_ID1 0x700 44c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde#define OC_DEVICE_ID2 0x701 45c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde 46c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khapardestatic inline char *nic_name(struct pci_dev *pdev) 47c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde{ 48c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde if (pdev->device == OC_DEVICE_ID1 || pdev->device == OC_DEVICE_ID2) 49c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde return OC_NAME; 50c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde else 51c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde return BE_NAME; 52c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde} 53c4ca2374312b4de819dd700e72a68395eddb5fcbAjit Khaparde 546b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla/* Number of bytes of an RX frame that are copied to skb->data */ 556b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_HDR_LEN 64 566b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_MAX_JUMBO_FRAME_SIZE 9018 576b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_MIN_MTU 256 586b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 596b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_NUM_VLANS_SUPPORTED 64 606b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_MAX_EQD 96 616b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_MAX_TX_FRAG_COUNT 30 626b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 636b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define EVNT_Q_LEN 1024 646b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define TX_Q_LEN 2048 656b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define TX_CQ_LEN 1024 666b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define RX_Q_LEN 1024 /* Does not support any other value */ 676b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define RX_CQ_LEN 1024 685fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla#define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ 696b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define MCC_CQ_LEN 256 706b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 716b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_NAPI_WEIGHT 64 726b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ 736b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) 746b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 756b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_MAX_LRO_DESCRIPTORS 16 766b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_MAX_FRAGS_PER_FRAME 16 776b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 786b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_dma_mem { 796b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla void *va; 806b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla dma_addr_t dma; 816b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 size; 826b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 836b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 846b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_queue_info { 856b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_dma_mem dma_mem; 866b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u16 len; 876b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u16 entry_size; /* Size of an element in the queue */ 886b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u16 id; 896b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u16 tail, head; 906b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla bool created; 916b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla atomic_t used; /* Number of valid elements in the queue */ 926b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 936b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 945fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastatic inline u32 MODULO(u16 val, u16 limit) 955fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla{ 965fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla BUG_ON(limit & (limit - 1)); 975fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla return val & (limit - 1); 985fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla} 995fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1005fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastatic inline void index_adv(u16 *index, u16 val, u16 limit) 1015fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla{ 1025fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla *index = MODULO((*index + val), limit); 1035fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla} 1045fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1055fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastatic inline void index_inc(u16 *index, u16 limit) 1065fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla{ 1075fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla *index = MODULO((*index + 1), limit); 1085fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla} 1095fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1105fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastatic inline void *queue_head_node(struct be_queue_info *q) 1115fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla{ 1125fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla return q->dma_mem.va + q->head * q->entry_size; 1135fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla} 1145fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1155fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastatic inline void *queue_tail_node(struct be_queue_info *q) 1165fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla{ 1175fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla return q->dma_mem.va + q->tail * q->entry_size; 1185fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla} 1195fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1205fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastatic inline void queue_head_inc(struct be_queue_info *q) 1215fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla{ 1225fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla index_inc(&q->head, q->len); 1235fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla} 1245fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1255fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastatic inline void queue_tail_inc(struct be_queue_info *q) 1265fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla{ 1275fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla index_inc(&q->tail, q->len); 1285fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla} 1295fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1305fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1315fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastruct be_eq_obj { 1325fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla struct be_queue_info q; 1335fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla char desc[32]; 1345fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1355fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla /* Adaptive interrupt coalescing (AIC) info */ 1365fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla bool enable_aic; 1375fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla u16 min_eqd; /* in usecs */ 1385fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla u16 max_eqd; /* in usecs */ 1395fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla u16 cur_eqd; /* in usecs */ 1405fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1415fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla struct napi_struct napi; 1425fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla}; 1435fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1445fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlastruct be_mcc_obj { 1455fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla struct be_queue_info q; 1465fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla struct be_queue_info cq; 1475fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla}; 1485fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1496b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_ctrl_info { 1506b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u8 __iomem *csr; 1516b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u8 __iomem *db; /* Door Bell */ 1526b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u8 __iomem *pcicfg; /* PCI config space */ 1536b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla int pci_func; 1546b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 1556b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* Mbox used for cmd request/response */ 1565fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla spinlock_t mbox_lock; /* For serializing mbox cmds to BE card */ 1576b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_dma_mem mbox_mem; 1586b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* Mbox mem is adjusted to align to 16 bytes. The allocated addr 1596b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * is stored for freeing purpose */ 1606b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_dma_mem mbox_mem_alloced; 1615fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla 1625fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla /* MCC Rings */ 1635fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla struct be_mcc_obj mcc_obj; 1645fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ 1655fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla spinlock_t mcc_cq_lock; 1666b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 1676b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 1686b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#include "be_cmds.h" 1696b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 1706b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_drvr_stats { 1716b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_tx_reqs; /* number of TX requests initiated */ 1726b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_tx_stops; /* number of times TX Q was stopped */ 1736b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_fwd_reqs; /* number of send reqs through forwarding i/f */ 1746b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_tx_wrbs; /* number of tx WRBs used */ 1756b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_tx_events; /* number of tx completion events */ 1766b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_tx_compl; /* number of tx completion entries processed */ 1774097f663cbe9e58de7ebed222f8af33267f297a8Sathya Perla ulong be_tx_jiffies; 1784097f663cbe9e58de7ebed222f8af33267f297a8Sathya Perla u64 be_tx_bytes; 1794097f663cbe9e58de7ebed222f8af33267f297a8Sathya Perla u64 be_tx_bytes_prev; 1806b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_tx_rate; 1816b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 1826b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 cache_barrier[16]; 1836b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 1846b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_ethrx_post_fail;/* number of ethrx buffer alloc failures */ 1856b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_polls; /* number of times NAPI called poll function */ 1866b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_rx_events; /* number of ucast rx completion events */ 1876b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_rx_compl; /* number of rx completion entries processed */ 1886b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_lro_hgram_data[8]; /* histogram of LRO data packets */ 1896b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_lro_hgram_ack[8]; /* histogram of LRO ACKs */ 1904097f663cbe9e58de7ebed222f8af33267f297a8Sathya Perla ulong be_rx_jiffies; 1914097f663cbe9e58de7ebed222f8af33267f297a8Sathya Perla u64 be_rx_bytes; 1924097f663cbe9e58de7ebed222f8af33267f297a8Sathya Perla u64 be_rx_bytes_prev; 1936b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_rx_rate; 1946b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* number of non ether type II frames dropped where 1956b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * frame len > length field of Mac Hdr */ 1966b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_802_3_dropped_frames; 1976b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* number of non ether type II frames malformed where 1986b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla * in frame len < length field of Mac Hdr */ 1996b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_802_3_malformed_frames; 2006b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_rxcp_err; /* Num rx completion entries w/ err set. */ 2016b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla ulong rx_fps_jiffies; /* jiffies at last FPS calc */ 2026b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_rx_frags; 2036b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_prev_rx_frags; 2046b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 be_rx_fps; /* Rx frags per second */ 2056b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 2066b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2076b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_stats_obj { 2086b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_drvr_stats drvr_stats; 2096b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct net_device_stats net_stats; 2106b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_dma_mem cmd; 2116b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 2126b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2136b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_tx_obj { 2146b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_queue_info q; 2156b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_queue_info cq; 2166b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* Remember the skbs that were transmitted */ 2176b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct sk_buff *sent_skb_list[TX_Q_LEN]; 2186b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 2196b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2206b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla/* Struct to remember the pages posted for rx frags */ 2216b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_rx_page_info { 2226b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct page *page; 2236b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla dma_addr_t bus; 2246b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u16 page_offset; 2256b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla bool last_page_user; 2266b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 2276b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2286b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_rx_obj { 2296b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_queue_info q; 2306b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_queue_info cq; 2316b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_rx_page_info page_info_tbl[RX_Q_LEN]; 2326b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct net_lro_mgr lro_mgr; 2336b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS]; 2346b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 2356b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2366b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_NUM_MSIX_VECTORS 2 /* 1 each for Tx and Rx */ 2376b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastruct be_adapter { 2386b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct pci_dev *pdev; 2396b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct net_device *netdev; 2406b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2416b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* Mbox, pci config, csr address information */ 2426b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_ctrl_info ctrl; 2436b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2446b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct msix_entry msix_entries[BE_NUM_MSIX_VECTORS]; 2456b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla bool msix_enabled; 2466b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla bool isr_registered; 2476b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2486b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* TX Rings */ 2496b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_eq_obj tx_eq; 2506b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_tx_obj tx_obj; 2516b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2526b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 cache_line_break[8]; 2536b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2546b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* Rx rings */ 2556b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_eq_obj rx_eq; 2566b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_rx_obj rx_obj; 2576b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 big_page_size; /* Compounded page size shared by rx wrbs */ 258ea1dae11e0baca5d633207fe50fc3cd30a5d68eeSathya Perla bool rx_post_starved; /* Zero rx frags have been posted to BE */ 2596b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2606b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct vlan_group *vlan_grp; 2616b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u16 num_vlans; 2626b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u8 vlan_tag[VLAN_GROUP_ARRAY_LEN]; 2636b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2646b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_stats_obj stats; 2656b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* Work queue used to perform periodic tasks like getting statistics */ 2666b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct delayed_work work; 2676b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2686b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla /* Ethtool knobs and info */ 2696b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla bool rx_csum; /* BE card must perform rx-checksumming */ 2706b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 max_rx_coal; 2716b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla char fw_ver[FW_VER_LEN]; 2726b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 if_handle; /* Used to configure filtering */ 2736b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 pmac_id; /* MAC addr handle used by BE card */ 2746b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2756b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla struct be_link_info link; 2766b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 port_num; 27724307eef74bd38e3fc6a6df8f8a1bfc48967f9f6Sathya Perla bool promiscuous; 2786b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla}; 2796b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2806b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlaextern struct ethtool_ops be_ethtool_ops; 2816b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2826b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define drvr_stats(adapter) (&adapter->stats.drvr_stats) 2836b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2846b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops) 2856b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2866b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define PAGE_SHIFT_4K 12 2876b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 2886b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2896b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla/* Returns number of pages spanned by the data starting at the given addr */ 2906b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define PAGES_4K_SPANNED(_address, size) \ 2916b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 2926b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 2936b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2946b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla/* Byte offset into the page corresponding to given address */ 2956b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define OFFSET_IN_PAGE(addr) \ 2966b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla ((size_t)(addr) & (PAGE_SIZE_4K-1)) 2976b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 2986b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla/* Returns bit offset within a DWORD of a bitfield */ 2996b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define AMAP_BIT_OFFSET(_struct, field) \ 3006b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla (((size_t)&(((_struct *)0)->field))%32) 3016b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3026b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla/* Returns the bit mask of the field that is NOT shifted into location. */ 3036b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastatic inline u32 amap_mask(u32 bitsize) 3046b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla{ 3056b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); 3066b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla} 3076b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3086b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastatic inline void 3096b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlaamap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) 3106b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla{ 3116b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 *dw = (u32 *) ptr + dw_offset; 3126b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla *dw &= ~(mask << offset); 3136b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla *dw |= (mask & value) << offset; 3146b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla} 3156b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3166b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define AMAP_SET_BITS(_struct, field, ptr, val) \ 3176b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla amap_set(ptr, \ 3186b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla offsetof(_struct, field)/32, \ 3196b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla amap_mask(sizeof(((_struct *)0)->field)), \ 3206b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla AMAP_BIT_OFFSET(_struct, field), \ 3216b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla val) 3226b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3236b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastatic inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) 3246b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla{ 3256b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 *dw = (u32 *) ptr; 3266b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla return mask & (*(dw + dw_offset) >> offset); 3276b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla} 3286b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3296b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define AMAP_GET_BITS(_struct, field, ptr) \ 3306b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla amap_get(ptr, \ 3316b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla offsetof(_struct, field)/32, \ 3326b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla amap_mask(sizeof(((_struct *)0)->field)), \ 3336b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla AMAP_BIT_OFFSET(_struct, field)) 3346b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3356b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) 3366b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) 3376b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastatic inline void swap_dws(void *wrb, int len) 3386b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla{ 3396b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#ifdef __BIG_ENDIAN 3406b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u32 *dw = wrb; 3416b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla BUG_ON(len % 4); 3426b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla do { 3436b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla *dw = cpu_to_le32(*dw); 3446b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla dw++; 3456b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla len -= 4; 3466b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla } while (len); 3476b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#endif /* __BIG_ENDIAN */ 3486b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla} 3496b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3506b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastatic inline u8 is_tcp_pkt(struct sk_buff *skb) 3516b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla{ 3526b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u8 val = 0; 3536b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3546b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla if (ip_hdr(skb)->version == 4) 3556b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla val = (ip_hdr(skb)->protocol == IPPROTO_TCP); 3566b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla else if (ip_hdr(skb)->version == 6) 3576b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); 3586b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3596b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla return val; 3606b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla} 3616b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3626b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perlastatic inline u8 is_udp_pkt(struct sk_buff *skb) 3636b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla{ 3646b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla u8 val = 0; 3656b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3666b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla if (ip_hdr(skb)->version == 4) 3676b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla val = (ip_hdr(skb)->protocol == IPPROTO_UDP); 3686b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla else if (ip_hdr(skb)->version == 6) 3696b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); 3706b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3716b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla return val; 3726b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla} 3736b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla 3745fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perlaextern void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid, bool arm, 3755fb379ee67a7ec55ff65b467b472f3d69b60ba16Sathya Perla u16 num_popped); 3766b7c5b947c671a96e39f9526a5fd70c178b8dfd1Sathya Perla#endif /* BE_H */ 377