be.h revision db3ea7819d035ff01c8260fce364511adfae0eaa 
1/*
2 * Copyright (C) 2005 - 2011 Emulex
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation.  The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@emulex.com
12 *
13 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
16 */
17
18#ifndef BE_H
19#define BE_H
20
21#include <linux/pci.h>
22#include <linux/etherdevice.h>
23#include <linux/delay.h>
24#include <net/tcp.h>
25#include <net/ip.h>
26#include <net/ipv6.h>
27#include <linux/if_vlan.h>
28#include <linux/workqueue.h>
29#include <linux/interrupt.h>
30#include <linux/firmware.h>
31#include <linux/slab.h>
32#include <linux/u64_stats_sync.h>
33
34#include "be_hw.h"
35
36#define DRV_VER			"4.0.100u"
37#define DRV_NAME		"be2net"
38#define BE_NAME			"ServerEngines BladeEngine2 10Gbps NIC"
39#define BE3_NAME		"ServerEngines BladeEngine3 10Gbps NIC"
40#define OC_NAME			"Emulex OneConnect 10Gbps NIC"
41#define OC_NAME_BE		OC_NAME	"(be3)"
42#define OC_NAME_LANCER		OC_NAME "(Lancer)"
43#define DRV_DESC		"ServerEngines BladeEngine 10Gbps NIC Driver"
44
45#define BE_VENDOR_ID 		0x19a2
46#define EMULEX_VENDOR_ID	0x10df
47#define BE_DEVICE_ID1		0x211
48#define BE_DEVICE_ID2		0x221
49#define OC_DEVICE_ID1		0x700	/* Device Id for BE2 cards */
50#define OC_DEVICE_ID2		0x710	/* Device Id for BE3 cards */
51#define OC_DEVICE_ID3		0xe220	/* Device id for Lancer cards */
52#define OC_DEVICE_ID4           0xe228   /* Device id for VF in Lancer */
53
54static inline char *nic_name(struct pci_dev *pdev)
55{
56	switch (pdev->device) {
57	case OC_DEVICE_ID1:
58		return OC_NAME;
59	case OC_DEVICE_ID2:
60		return OC_NAME_BE;
61	case OC_DEVICE_ID3:
62	case OC_DEVICE_ID4:
63		return OC_NAME_LANCER;
64	case BE_DEVICE_ID2:
65		return BE3_NAME;
66	default:
67		return BE_NAME;
68	}
69}
70
71/* Number of bytes of an RX frame that are copied to skb->data */
72#define BE_HDR_LEN		((u16) 64)
73#define BE_MAX_JUMBO_FRAME_SIZE	9018
74#define BE_MIN_MTU		256
75
76#define BE_NUM_VLANS_SUPPORTED	64
77#define BE_MAX_EQD		96
78#define	BE_MAX_TX_FRAG_COUNT	30
79
80#define EVNT_Q_LEN		1024
81#define TX_Q_LEN		2048
82#define TX_CQ_LEN		1024
83#define RX_Q_LEN		1024	/* Does not support any other value */
84#define RX_CQ_LEN		1024
85#define MCC_Q_LEN		128	/* total size not to exceed 8 pages */
86#define MCC_CQ_LEN		256
87
88#define MAX_RSS_QS		4	/* BE limit is 4 queues/port */
89#define MAX_RX_QS		(MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
90#define MAX_TX_QS		8
91#define BE_MAX_MSIX_VECTORS	(MAX_RX_QS + 1)/* RX + TX */
92#define BE_NAPI_WEIGHT		64
93#define MAX_RX_POST 		BE_NAPI_WEIGHT /* Frags posted at a time */
94#define RX_FRAGS_REFILL_WM	(RX_Q_LEN - MAX_RX_POST)
95
96#define FW_VER_LEN		32
97
98struct be_dma_mem {
99	void *va;
100	dma_addr_t dma;
101	u32 size;
102};
103
104struct be_queue_info {
105	struct be_dma_mem dma_mem;
106	u16 len;
107	u16 entry_size;	/* Size of an element in the queue */
108	u16 id;
109	u16 tail, head;
110	bool created;
111	atomic_t used;	/* Number of valid elements in the queue */
112};
113
114static inline u32 MODULO(u16 val, u16 limit)
115{
116	BUG_ON(limit & (limit - 1));
117	return val & (limit - 1);
118}
119
120static inline void index_adv(u16 *index, u16 val, u16 limit)
121{
122	*index = MODULO((*index + val), limit);
123}
124
125static inline void index_inc(u16 *index, u16 limit)
126{
127	*index = MODULO((*index + 1), limit);
128}
129
130static inline void *queue_head_node(struct be_queue_info *q)
131{
132	return q->dma_mem.va + q->head * q->entry_size;
133}
134
135static inline void *queue_tail_node(struct be_queue_info *q)
136{
137	return q->dma_mem.va + q->tail * q->entry_size;
138}
139
140static inline void queue_head_inc(struct be_queue_info *q)
141{
142	index_inc(&q->head, q->len);
143}
144
145static inline void queue_tail_inc(struct be_queue_info *q)
146{
147	index_inc(&q->tail, q->len);
148}
149
150struct be_eq_obj {
151	struct be_queue_info q;
152	char desc[32];
153
154	/* Adaptive interrupt coalescing (AIC) info */
155	bool enable_aic;
156	u16 min_eqd;		/* in usecs */
157	u16 max_eqd;		/* in usecs */
158	u16 cur_eqd;		/* in usecs */
159	u8  eq_idx;
160
161	struct napi_struct napi;
162};
163
164struct be_mcc_obj {
165	struct be_queue_info q;
166	struct be_queue_info cq;
167	bool rearm_cq;
168};
169
170struct be_tx_stats {
171	u64 tx_bytes;
172	u64 tx_pkts;
173	u64 tx_reqs;
174	u64 tx_wrbs;
175	u64 tx_compl;
176	ulong tx_jiffies;
177	u32 tx_stops;
178	struct u64_stats_sync sync;
179	struct u64_stats_sync sync_compl;
180};
181
182struct be_tx_obj {
183	struct be_queue_info q;
184	struct be_queue_info cq;
185	/* Remember the skbs that were transmitted */
186	struct sk_buff *sent_skb_list[TX_Q_LEN];
187	struct be_tx_stats stats;
188};
189
190/* Struct to remember the pages posted for rx frags */
191struct be_rx_page_info {
192	struct page *page;
193	DEFINE_DMA_UNMAP_ADDR(bus);
194	u16 page_offset;
195	bool last_page_user;
196};
197
198struct be_rx_stats {
199	u64 rx_bytes;
200	u64 rx_pkts;
201	u64 rx_pkts_prev;
202	ulong rx_jiffies;
203	u32 rx_drops_no_skbs;	/* skb allocation errors */
204	u32 rx_drops_no_frags;	/* HW has no fetched frags */
205	u32 rx_post_fail;	/* page post alloc failures */
206	u32 rx_polls;		/* NAPI calls */
207	u32 rx_events;
208	u32 rx_compl;
209	u32 rx_mcast_pkts;
210	u32 rx_compl_err;	/* completions with err set */
211	u32 rx_pps;		/* pkts per second */
212	struct u64_stats_sync sync;
213};
214
215struct be_rx_compl_info {
216	u32 rss_hash;
217	u16 vlan_tag;
218	u16 pkt_size;
219	u16 rxq_idx;
220	u16 port;
221	u8 vlanf;
222	u8 num_rcvd;
223	u8 err;
224	u8 ipf;
225	u8 tcpf;
226	u8 udpf;
227	u8 ip_csum;
228	u8 l4_csum;
229	u8 ipv6;
230	u8 vtm;
231	u8 pkt_type;
232};
233
234struct be_rx_obj {
235	struct be_adapter *adapter;
236	struct be_queue_info q;
237	struct be_queue_info cq;
238	struct be_rx_compl_info rxcp;
239	struct be_rx_page_info page_info_tbl[RX_Q_LEN];
240	struct be_eq_obj rx_eq;
241	struct be_rx_stats stats;
242	u8 rss_id;
243	bool rx_post_starved;	/* Zero rx frags have been posted to BE */
244	u32 cache_line_barrier[16];
245};
246
247struct be_drv_stats {
248	u8 be_on_die_temperature;
249	u32 tx_events;
250	u32 eth_red_drops;
251	u32 rx_drops_no_pbuf;
252	u32 rx_drops_no_txpb;
253	u32 rx_drops_no_erx_descr;
254	u32 rx_drops_no_tpre_descr;
255	u32 rx_drops_too_many_frags;
256	u32 rx_drops_invalid_ring;
257	u32 forwarded_packets;
258	u32 rx_drops_mtu;
259	u32 rx_crc_errors;
260	u32 rx_alignment_symbol_errors;
261	u32 rx_pause_frames;
262	u32 rx_priority_pause_frames;
263	u32 rx_control_frames;
264	u32 rx_in_range_errors;
265	u32 rx_out_range_errors;
266	u32 rx_frame_too_long;
267	u32 rx_address_match_errors;
268	u32 rx_dropped_too_small;
269	u32 rx_dropped_too_short;
270	u32 rx_dropped_header_too_small;
271	u32 rx_dropped_tcp_length;
272	u32 rx_dropped_runt;
273	u32 rx_ip_checksum_errs;
274	u32 rx_tcp_checksum_errs;
275	u32 rx_udp_checksum_errs;
276	u32 tx_pauseframes;
277	u32 tx_priority_pauseframes;
278	u32 tx_controlframes;
279	u32 rxpp_fifo_overflow_drop;
280	u32 rx_input_fifo_overflow_drop;
281	u32 pmem_fifo_overflow_drop;
282	u32 jabber_events;
283};
284
285struct be_vf_cfg {
286	unsigned char vf_mac_addr[ETH_ALEN];
287	u32 vf_if_handle;
288	u32 vf_pmac_id;
289	u16 vf_vlan_tag;
290	u32 vf_tx_rate;
291};
292
293#define BE_INVALID_PMAC_ID		0xffffffff
294
295struct be_adapter {
296	struct pci_dev *pdev;
297	struct net_device *netdev;
298
299	u8 __iomem *csr;
300	u8 __iomem *db;		/* Door Bell */
301
302	struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
303	struct be_dma_mem mbox_mem;
304	/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
305	 * is stored for freeing purpose */
306	struct be_dma_mem mbox_mem_alloced;
307
308	struct be_mcc_obj mcc_obj;
309	spinlock_t mcc_lock;	/* For serializing mcc cmds to BE card */
310	spinlock_t mcc_cq_lock;
311
312	struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
313	u32 num_msix_vec;
314	bool isr_registered;
315
316	/* TX Rings */
317	struct be_eq_obj tx_eq;
318	struct be_tx_obj tx_obj[MAX_TX_QS];
319	u8 num_tx_qs;
320
321	u32 cache_line_break[8];
322
323	/* Rx rings */
324	struct be_rx_obj rx_obj[MAX_RX_QS];
325	u32 num_rx_qs;
326	u32 big_page_size;	/* Compounded page size shared by rx wrbs */
327
328	u8 eq_next_idx;
329	struct be_drv_stats drv_stats;
330
331	u16 vlans_added;
332	u16 max_vlans;	/* Number of vlans supported */
333	u8 vlan_tag[VLAN_N_VID];
334	u8 vlan_prio_bmap;	/* Available Priority BitMap */
335	u16 recommended_prio;	/* Recommended Priority */
336	struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
337
338	struct be_dma_mem stats_cmd;
339	/* Work queue used to perform periodic tasks like getting statistics */
340	struct delayed_work work;
341	u16 work_counter;
342
343	/* Ethtool knobs and info */
344	char fw_ver[FW_VER_LEN];
345	u32 if_handle;		/* Used to configure filtering */
346	u32 pmac_id;		/* MAC addr handle used by BE card */
347	u32 beacon_state;	/* for set_phys_id */
348
349	bool eeh_err;
350	bool link_up;
351	u32 port_num;
352	bool promiscuous;
353	bool wol;
354	u32 function_mode;
355	u32 function_caps;
356	u32 rx_fc;		/* Rx flow control */
357	u32 tx_fc;		/* Tx flow control */
358	bool ue_detected;
359	bool stats_cmd_sent;
360	int link_speed;
361	u8 port_type;
362	u8 transceiver;
363	u8 autoneg;
364	u8 generation;		/* BladeEngine ASIC generation */
365	u32 flash_status;
366	struct completion flash_compl;
367
368	bool be3_native;
369	bool sriov_enabled;
370	struct be_vf_cfg *vf_cfg;
371	u8 is_virtfn;
372	u32 sli_family;
373	u8 hba_port_num;
374	u16 pvid;
375};
376
377#define be_physfn(adapter) (!adapter->is_virtfn)
378
379/* BladeEngine Generation numbers */
380#define BE_GEN2 2
381#define BE_GEN3 3
382
383#define ON				1
384#define OFF				0
385#define lancer_chip(adapter)	((adapter->pdev->device == OC_DEVICE_ID3) || \
386				 (adapter->pdev->device == OC_DEVICE_ID4))
387
388extern const struct ethtool_ops be_ethtool_ops;
389
390#define msix_enabled(adapter)		(adapter->num_msix_vec > 0)
391#define tx_stats(txo)			(&txo->stats)
392#define rx_stats(rxo)			(&rxo->stats)
393
394#define BE_SET_NETDEV_OPS(netdev, ops)	(netdev->netdev_ops = ops)
395
396#define for_all_rx_queues(adapter, rxo, i)				\
397	for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;	\
398		i++, rxo++)
399
400/* Just skip the first default non-rss queue */
401#define for_all_rss_queues(adapter, rxo, i)				\
402	for (i = 0, rxo = &adapter->rx_obj[i+1]; i < (adapter->num_rx_qs - 1);\
403		i++, rxo++)
404
405#define for_all_tx_queues(adapter, txo, i)				\
406	for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;	\
407		i++, txo++)
408
409#define PAGE_SHIFT_4K		12
410#define PAGE_SIZE_4K		(1 << PAGE_SHIFT_4K)
411
412/* Returns number of pages spanned by the data starting at the given addr */
413#define PAGES_4K_SPANNED(_address, size) 				\
414		((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + 	\
415			(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
416
417/* Byte offset into the page corresponding to given address */
418#define OFFSET_IN_PAGE(addr)						\
419		 ((size_t)(addr) & (PAGE_SIZE_4K-1))
420
421/* Returns bit offset within a DWORD of a bitfield */
422#define AMAP_BIT_OFFSET(_struct, field)  				\
423		(((size_t)&(((_struct *)0)->field))%32)
424
425/* Returns the bit mask of the field that is NOT shifted into location. */
426static inline u32 amap_mask(u32 bitsize)
427{
428	return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
429}
430
431static inline void
432amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
433{
434	u32 *dw = (u32 *) ptr + dw_offset;
435	*dw &= ~(mask << offset);
436	*dw |= (mask & value) << offset;
437}
438
439#define AMAP_SET_BITS(_struct, field, ptr, val)				\
440		amap_set(ptr,						\
441			offsetof(_struct, field)/32,			\
442			amap_mask(sizeof(((_struct *)0)->field)),	\
443			AMAP_BIT_OFFSET(_struct, field),		\
444			val)
445
446static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
447{
448	u32 *dw = (u32 *) ptr;
449	return mask & (*(dw + dw_offset) >> offset);
450}
451
452#define AMAP_GET_BITS(_struct, field, ptr)				\
453		amap_get(ptr,						\
454			offsetof(_struct, field)/32,			\
455			amap_mask(sizeof(((_struct *)0)->field)),	\
456			AMAP_BIT_OFFSET(_struct, field))
457
458#define be_dws_cpu_to_le(wrb, len)	swap_dws(wrb, len)
459#define be_dws_le_to_cpu(wrb, len)	swap_dws(wrb, len)
460static inline void swap_dws(void *wrb, int len)
461{
462#ifdef __BIG_ENDIAN
463	u32 *dw = wrb;
464	BUG_ON(len % 4);
465	do {
466		*dw = cpu_to_le32(*dw);
467		dw++;
468		len -= 4;
469	} while (len);
470#endif				/* __BIG_ENDIAN */
471}
472
473static inline u8 is_tcp_pkt(struct sk_buff *skb)
474{
475	u8 val = 0;
476
477	if (ip_hdr(skb)->version == 4)
478		val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
479	else if (ip_hdr(skb)->version == 6)
480		val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
481
482	return val;
483}
484
485static inline u8 is_udp_pkt(struct sk_buff *skb)
486{
487	u8 val = 0;
488
489	if (ip_hdr(skb)->version == 4)
490		val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
491	else if (ip_hdr(skb)->version == 6)
492		val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
493
494	return val;
495}
496
497static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
498{
499	u32 sli_intf;
500
501	pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
502	adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
503}
504
505static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
506{
507	u32 addr;
508
509	addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
510
511	mac[5] = (u8)(addr & 0xFF);
512	mac[4] = (u8)((addr >> 8) & 0xFF);
513	mac[3] = (u8)((addr >> 16) & 0xFF);
514	/* Use the OUI from the current MAC address */
515	memcpy(mac, adapter->netdev->dev_addr, 3);
516}
517
518static inline bool be_multi_rxq(const struct be_adapter *adapter)
519{
520	return adapter->num_rx_qs > 1;
521}
522
523extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
524		u16 num_popped);
525extern void be_link_status_update(struct be_adapter *adapter, u32 link_status);
526extern void be_parse_stats(struct be_adapter *adapter);
527extern int be_load_fw(struct be_adapter *adapter, u8 *func);
528#endif				/* BE_H */
529