fs_enet.h revision 5b4b8454344a0391bb0f69fda0f4ec8e1f0d2fed
1#ifndef FS_ENET_H 2#define FS_ENET_H 3 4#include <linux/mii.h> 5#include <linux/netdevice.h> 6#include <linux/types.h> 7#include <linux/list.h> 8#include <linux/phy.h> 9 10#include <linux/fs_enet_pd.h> 11 12#include <asm/dma-mapping.h> 13 14#ifdef CONFIG_CPM1 15#include <asm/commproc.h> 16 17struct fec_info { 18 fec_t* fecp; 19 u32 mii_speed; 20}; 21#endif 22 23#ifdef CONFIG_CPM2 24#include <asm/cpm2.h> 25#endif 26 27/* This is used to operate with pins. 28 Note that the actual port size may 29 be different; cpm(s) handle it OK */ 30struct bb_info { 31 u8 mdio_dat_msk; 32 u8 mdio_dir_msk; 33 u8 *mdio_dir; 34 u8 *mdio_dat; 35 u8 mdc_msk; 36 u8 *mdc_dat; 37 int delay; 38}; 39 40/* hw driver ops */ 41struct fs_ops { 42 int (*setup_data)(struct net_device *dev); 43 int (*allocate_bd)(struct net_device *dev); 44 void (*free_bd)(struct net_device *dev); 45 void (*cleanup_data)(struct net_device *dev); 46 void (*set_multicast_list)(struct net_device *dev); 47 void (*adjust_link)(struct net_device *dev); 48 void (*restart)(struct net_device *dev); 49 void (*stop)(struct net_device *dev); 50 void (*pre_request_irq)(struct net_device *dev, int irq); 51 void (*post_free_irq)(struct net_device *dev, int irq); 52 void (*napi_clear_rx_event)(struct net_device *dev); 53 void (*napi_enable_rx)(struct net_device *dev); 54 void (*napi_disable_rx)(struct net_device *dev); 55 void (*rx_bd_done)(struct net_device *dev); 56 void (*tx_kickstart)(struct net_device *dev); 57 u32 (*get_int_events)(struct net_device *dev); 58 void (*clear_int_events)(struct net_device *dev, u32 int_events); 59 void (*ev_error)(struct net_device *dev, u32 int_events); 60 int (*get_regs)(struct net_device *dev, void *p, int *sizep); 61 int (*get_regs_len)(struct net_device *dev); 62 void (*tx_restart)(struct net_device *dev); 63}; 64 65struct phy_info { 66 unsigned int id; 67 const char *name; 68 void (*startup) (struct net_device * dev); 69 void (*shutdown) (struct net_device * dev); 70 void (*ack_int) (struct net_device * dev); 71}; 72 73/* The FEC stores dest/src/type, data, and checksum for receive packets. 74 */ 75#define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */ 76#define MIN_MTU 46 /* this is data size */ 77#define CRC_LEN 4 78 79#define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN) 80#define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN) 81 82/* Must be a multiple of 32 (to cover both FEC & FCC) */ 83#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE + 31) & ~31) 84/* This is needed so that invalidate_xxx wont invalidate too much */ 85#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE) 86 87struct fs_enet_mii_bus { 88 struct list_head list; 89 spinlock_t mii_lock; 90 const struct fs_mii_bus_info *bus_info; 91 int refs; 92 u32 usage_map; 93 94 int (*mii_read)(struct fs_enet_mii_bus *bus, 95 int phy_id, int location); 96 97 void (*mii_write)(struct fs_enet_mii_bus *bus, 98 int phy_id, int location, int value); 99 100 union { 101 struct { 102 unsigned int mii_speed; 103 void *fecp; 104 } fec; 105 106 struct { 107 /* note that the actual port size may */ 108 /* be different; cpm(s) handle it OK */ 109 u8 mdio_msk; 110 u8 *mdio_dir; 111 u8 *mdio_dat; 112 u8 mdc_msk; 113 u8 *mdc_dir; 114 u8 *mdc_dat; 115 } bitbang; 116 117 struct { 118 u16 lpa; 119 } fixed; 120 }; 121}; 122 123struct fs_enet_private { 124 struct device *dev; /* pointer back to the device (must be initialized first) */ 125 spinlock_t lock; /* during all ops except TX pckt processing */ 126 spinlock_t tx_lock; /* during fs_start_xmit and fs_tx */ 127 const struct fs_platform_info *fpi; 128 const struct fs_ops *ops; 129 int rx_ring, tx_ring; 130 dma_addr_t ring_mem_addr; 131 void *ring_base; 132 struct sk_buff **rx_skbuff; 133 struct sk_buff **tx_skbuff; 134 cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ 135 cbd_t *tx_bd_base; 136 cbd_t *dirty_tx; /* ring entries to be free()ed. */ 137 cbd_t *cur_rx; 138 cbd_t *cur_tx; 139 int tx_free; 140 struct net_device_stats stats; 141 struct timer_list phy_timer_list; 142 const struct phy_info *phy; 143 u32 msg_enable; 144 struct mii_if_info mii_if; 145 unsigned int last_mii_status; 146 struct fs_enet_mii_bus *mii_bus; 147 int interrupt; 148 149 struct phy_device *phydev; 150 int oldduplex, oldspeed, oldlink; /* current settings */ 151 152 /* event masks */ 153 u32 ev_napi_rx; /* mask of NAPI rx events */ 154 u32 ev_rx; /* rx event mask */ 155 u32 ev_tx; /* tx event mask */ 156 u32 ev_err; /* error event mask */ 157 158 u16 bd_rx_empty; /* mask of BD rx empty */ 159 u16 bd_rx_err; /* mask of BD rx errors */ 160 161 union { 162 struct { 163 int idx; /* FEC1 = 0, FEC2 = 1 */ 164 void *fecp; /* hw registers */ 165 u32 hthi, htlo; /* state for multicast */ 166 } fec; 167 168 struct { 169 int idx; /* FCC1-3 = 0-2 */ 170 void *fccp; /* hw registers */ 171 void *ep; /* parameter ram */ 172 void *fcccp; /* hw registers cont. */ 173 void *mem; /* FCC DPRAM */ 174 u32 gaddrh, gaddrl; /* group address */ 175 } fcc; 176 177 struct { 178 int idx; /* FEC1 = 0, FEC2 = 1 */ 179 void *sccp; /* hw registers */ 180 void *ep; /* parameter ram */ 181 u32 hthi, htlo; /* state for multicast */ 182 } scc; 183 184 }; 185}; 186 187/***************************************************************************/ 188int fs_enet_mdio_bb_init(void); 189int fs_mii_fixed_init(struct fs_enet_mii_bus *bus); 190int fs_enet_mdio_fec_init(void); 191 192void fs_init_bds(struct net_device *dev); 193void fs_cleanup_bds(struct net_device *dev); 194 195/***************************************************************************/ 196 197#define DRV_MODULE_NAME "fs_enet" 198#define PFX DRV_MODULE_NAME ": " 199#define DRV_MODULE_VERSION "1.0" 200#define DRV_MODULE_RELDATE "Aug 8, 2005" 201 202/***************************************************************************/ 203 204int fs_enet_platform_init(void); 205void fs_enet_platform_cleanup(void); 206 207/***************************************************************************/ 208/* buffer descriptor access macros */ 209 210/* access macros */ 211#if defined(CONFIG_CPM1) 212/* for a a CPM1 __raw_xxx's are sufficient */ 213#define __cbd_out32(addr, x) __raw_writel(x, addr) 214#define __cbd_out16(addr, x) __raw_writew(x, addr) 215#define __cbd_in32(addr) __raw_readl(addr) 216#define __cbd_in16(addr) __raw_readw(addr) 217#else 218/* for others play it safe */ 219#define __cbd_out32(addr, x) out_be32(addr, x) 220#define __cbd_out16(addr, x) out_be16(addr, x) 221#define __cbd_in32(addr) in_be32(addr) 222#define __cbd_in16(addr) in_be16(addr) 223#endif 224 225/* write */ 226#define CBDW_SC(_cbd, _sc) __cbd_out16(&(_cbd)->cbd_sc, (_sc)) 227#define CBDW_DATLEN(_cbd, _datlen) __cbd_out16(&(_cbd)->cbd_datlen, (_datlen)) 228#define CBDW_BUFADDR(_cbd, _bufaddr) __cbd_out32(&(_cbd)->cbd_bufaddr, (_bufaddr)) 229 230/* read */ 231#define CBDR_SC(_cbd) __cbd_in16(&(_cbd)->cbd_sc) 232#define CBDR_DATLEN(_cbd) __cbd_in16(&(_cbd)->cbd_datlen) 233#define CBDR_BUFADDR(_cbd) __cbd_in32(&(_cbd)->cbd_bufaddr) 234 235/* set bits */ 236#define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc)) 237 238/* clear bits */ 239#define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc)) 240 241/*******************************************************************/ 242 243extern const struct fs_ops fs_fec_ops; 244extern const struct fs_ops fs_fcc_ops; 245extern const struct fs_ops fs_scc_ops; 246 247/*******************************************************************/ 248 249/* handy pointer to the immap */ 250extern void *fs_enet_immap; 251 252/*******************************************************************/ 253 254#endif 255