yam.c revision eb33ae248682ecfdf44d693c72bc4f523f2fb6e3
1/*****************************************************************************/ 2 3/* 4 * yam.c -- YAM radio modem driver. 5 * 6 * Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr) 7 * Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * Please note that the GPL allows you to use the driver, NOT the radio. 24 * In order to use the radio, you need a license from the communications 25 * authority of your country. 26 * 27 * 28 * History: 29 * 0.0 F1OAT 06.06.98 Begin of work with baycom.c source code V 0.3 30 * 0.1 F1OAT 07.06.98 Add timer polling routine for channel arbitration 31 * 0.2 F6FBB 08.06.98 Added delay after FPGA programming 32 * 0.3 F6FBB 29.07.98 Delayed PTT implementation for dupmode=2 33 * 0.4 F6FBB 30.07.98 Added TxTail, Slottime and Persistance 34 * 0.5 F6FBB 01.08.98 Shared IRQs, /proc/net and network statistics 35 * 0.6 F6FBB 25.08.98 Added 1200Bds format 36 * 0.7 F6FBB 12.09.98 Added to the kernel configuration 37 * 0.8 F6FBB 14.10.98 Fixed slottime/persistence timing bug 38 * OK1ZIA 2.09.01 Fixed "kfree_skb on hard IRQ" 39 * using dev_kfree_skb_any(). (important in 2.4 kernel) 40 * 41 */ 42 43/*****************************************************************************/ 44 45#include <linux/module.h> 46#include <linux/types.h> 47#include <linux/net.h> 48#include <linux/in.h> 49#include <linux/if.h> 50#include <linux/slab.h> 51#include <linux/errno.h> 52#include <linux/bitops.h> 53#include <linux/random.h> 54#include <asm/io.h> 55#include <asm/system.h> 56#include <linux/interrupt.h> 57#include <linux/ioport.h> 58 59#include <linux/netdevice.h> 60#include <linux/if_arp.h> 61#include <linux/etherdevice.h> 62#include <linux/skbuff.h> 63#include <net/ax25.h> 64 65#include <linux/kernel.h> 66#include <linux/proc_fs.h> 67#include <linux/seq_file.h> 68#include <net/net_namespace.h> 69 70#include <asm/uaccess.h> 71#include <linux/init.h> 72 73#include <linux/yam.h> 74#include "yam9600.h" 75#include "yam1200.h" 76 77/* --------------------------------------------------------------------- */ 78 79static const char yam_drvname[] = "yam"; 80static const char yam_drvinfo[] __initdata = KERN_INFO \ 81 "YAM driver version 0.8 by F1OAT/F6FBB\n"; 82 83/* --------------------------------------------------------------------- */ 84 85#define YAM_9600 1 86#define YAM_1200 2 87 88#define NR_PORTS 4 89#define YAM_MAGIC 0xF10A7654 90 91/* Transmitter states */ 92 93#define TX_OFF 0 94#define TX_HEAD 1 95#define TX_DATA 2 96#define TX_CRC1 3 97#define TX_CRC2 4 98#define TX_TAIL 5 99 100#define YAM_MAX_FRAME 1024 101 102#define DEFAULT_BITRATE 9600 /* bps */ 103#define DEFAULT_HOLDD 10 /* sec */ 104#define DEFAULT_TXD 300 /* ms */ 105#define DEFAULT_TXTAIL 10 /* ms */ 106#define DEFAULT_SLOT 100 /* ms */ 107#define DEFAULT_PERS 64 /* 0->255 */ 108 109struct yam_port { 110 int magic; 111 int bitrate; 112 int baudrate; 113 int iobase; 114 int irq; 115 int dupmode; 116 117 struct net_device *dev; 118 119 int nb_rxint; 120 int nb_mdint; 121 122 /* Parameters section */ 123 124 int txd; /* tx delay */ 125 int holdd; /* duplex ptt delay */ 126 int txtail; /* txtail delay */ 127 int slot; /* slottime */ 128 int pers; /* persistence */ 129 130 /* Tx section */ 131 132 int tx_state; 133 int tx_count; 134 int slotcnt; 135 unsigned char tx_buf[YAM_MAX_FRAME]; 136 int tx_len; 137 int tx_crcl, tx_crch; 138 struct sk_buff_head send_queue; /* Packets awaiting transmission */ 139 140 /* Rx section */ 141 142 int dcd; 143 unsigned char rx_buf[YAM_MAX_FRAME]; 144 int rx_len; 145 int rx_crcl, rx_crch; 146}; 147 148struct yam_mcs { 149 unsigned char bits[YAM_FPGA_SIZE]; 150 int bitrate; 151 struct yam_mcs *next; 152}; 153 154static struct net_device *yam_devs[NR_PORTS]; 155 156static struct yam_mcs *yam_data; 157 158static DEFINE_TIMER(yam_timer, NULL, 0, 0); 159 160/* --------------------------------------------------------------------- */ 161 162#define RBR(iobase) (iobase+0) 163#define THR(iobase) (iobase+0) 164#define IER(iobase) (iobase+1) 165#define IIR(iobase) (iobase+2) 166#define FCR(iobase) (iobase+2) 167#define LCR(iobase) (iobase+3) 168#define MCR(iobase) (iobase+4) 169#define LSR(iobase) (iobase+5) 170#define MSR(iobase) (iobase+6) 171#define SCR(iobase) (iobase+7) 172#define DLL(iobase) (iobase+0) 173#define DLM(iobase) (iobase+1) 174 175#define YAM_EXTENT 8 176 177/* Interrupt Identification Register Bit Masks */ 178#define IIR_NOPEND 1 179#define IIR_MSR 0 180#define IIR_TX 2 181#define IIR_RX 4 182#define IIR_LSR 6 183#define IIR_TIMEOUT 12 /* Fifo mode only */ 184 185#define IIR_MASK 0x0F 186 187/* Interrupt Enable Register Bit Masks */ 188#define IER_RX 1 /* enable rx interrupt */ 189#define IER_TX 2 /* enable tx interrupt */ 190#define IER_LSR 4 /* enable line status interrupts */ 191#define IER_MSR 8 /* enable modem status interrupts */ 192 193/* Modem Control Register Bit Masks */ 194#define MCR_DTR 0x01 /* DTR output */ 195#define MCR_RTS 0x02 /* RTS output */ 196#define MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */ 197#define MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */ 198#define MCR_LOOP 0x10 /* Loopback enable */ 199 200/* Modem Status Register Bit Masks */ 201#define MSR_DCTS 0x01 /* Delta CTS input */ 202#define MSR_DDSR 0x02 /* Delta DSR */ 203#define MSR_DRIN 0x04 /* Delta RI */ 204#define MSR_DDCD 0x08 /* Delta DCD */ 205#define MSR_CTS 0x10 /* CTS input */ 206#define MSR_DSR 0x20 /* DSR input */ 207#define MSR_RING 0x40 /* RI input */ 208#define MSR_DCD 0x80 /* DCD input */ 209 210/* line status register bit mask */ 211#define LSR_RXC 0x01 212#define LSR_OE 0x02 213#define LSR_PE 0x04 214#define LSR_FE 0x08 215#define LSR_BREAK 0x10 216#define LSR_THRE 0x20 217#define LSR_TSRE 0x40 218 219/* Line Control Register Bit Masks */ 220#define LCR_DLAB 0x80 221#define LCR_BREAK 0x40 222#define LCR_PZERO 0x28 223#define LCR_PEVEN 0x18 224#define LCR_PODD 0x08 225#define LCR_STOP1 0x00 226#define LCR_STOP2 0x04 227#define LCR_BIT5 0x00 228#define LCR_BIT6 0x02 229#define LCR_BIT7 0x01 230#define LCR_BIT8 0x03 231 232/* YAM Modem <-> UART Port mapping */ 233 234#define TX_RDY MSR_DCTS /* transmitter ready to send */ 235#define RX_DCD MSR_DCD /* carrier detect */ 236#define RX_FLAG MSR_RING /* hdlc flag received */ 237#define FPGA_DONE MSR_DSR /* FPGA is configured */ 238#define PTT_ON (MCR_RTS|MCR_OUT2) /* activate PTT */ 239#define PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */ 240 241#define ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */ 242#define ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */ 243#define ENABLE_RTXINT (IER_RX|IER_MSR) /* full duplex operations */ 244 245 246/************************************************************************* 247* CRC Tables 248************************************************************************/ 249 250static const unsigned char chktabl[256] = 251{0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e, 252 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64, 253 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e, 254 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50, 255 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e, 256 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44, 257 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e, 258 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38, 259 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e, 260 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24, 261 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e, 262 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10, 263 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e, 264 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04, 265 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e, 266 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9, 267 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1, 268 0x78}; 269static const unsigned char chktabh[256] = 270{0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9, 271 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb, 272 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb, 273 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f, 274 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed, 275 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf, 276 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef, 277 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07, 278 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1, 279 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3, 280 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3, 281 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87, 282 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5, 283 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7, 284 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7, 285 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f, 286 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e, 287 0x0f}; 288 289/************************************************************************* 290* FPGA functions 291************************************************************************/ 292 293static void delay(int ms) 294{ 295 unsigned long timeout = jiffies + ((ms * HZ) / 1000); 296 while (time_before(jiffies, timeout)) 297 cpu_relax(); 298} 299 300/* 301 * reset FPGA 302 */ 303 304static void fpga_reset(int iobase) 305{ 306 outb(0, IER(iobase)); 307 outb(LCR_DLAB | LCR_BIT5, LCR(iobase)); 308 outb(1, DLL(iobase)); 309 outb(0, DLM(iobase)); 310 311 outb(LCR_BIT5, LCR(iobase)); 312 inb(LSR(iobase)); 313 inb(MSR(iobase)); 314 /* turn off FPGA supply voltage */ 315 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase)); 316 delay(100); 317 /* turn on FPGA supply voltage again */ 318 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase)); 319 delay(100); 320} 321 322/* 323 * send one byte to FPGA 324 */ 325 326static int fpga_write(int iobase, unsigned char wrd) 327{ 328 unsigned char bit; 329 int k; 330 unsigned long timeout = jiffies + HZ / 10; 331 332 for (k = 0; k < 8; k++) { 333 bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR; 334 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase)); 335 wrd <<= 1; 336 outb(0xfc, THR(iobase)); 337 while ((inb(LSR(iobase)) & LSR_TSRE) == 0) 338 if (time_after(jiffies, timeout)) 339 return -1; 340 } 341 342 return 0; 343} 344 345static unsigned char *add_mcs(unsigned char *bits, int bitrate) 346{ 347 struct yam_mcs *p; 348 349 /* If it already exists, replace the bit data */ 350 p = yam_data; 351 while (p) { 352 if (p->bitrate == bitrate) { 353 memcpy(p->bits, bits, YAM_FPGA_SIZE); 354 return p->bits; 355 } 356 p = p->next; 357 } 358 359 /* Allocate a new mcs */ 360 if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) { 361 printk(KERN_WARNING "YAM: no memory to allocate mcs\n"); 362 return NULL; 363 } 364 memcpy(p->bits, bits, YAM_FPGA_SIZE); 365 p->bitrate = bitrate; 366 p->next = yam_data; 367 yam_data = p; 368 369 return p->bits; 370} 371 372static unsigned char *get_mcs(int bitrate) 373{ 374 struct yam_mcs *p; 375 376 p = yam_data; 377 while (p) { 378 if (p->bitrate == bitrate) 379 return p->bits; 380 p = p->next; 381 } 382 383 /* Load predefined mcs data */ 384 switch (bitrate) { 385 case 1200: 386 return add_mcs(bits_1200, bitrate); 387 default: 388 return add_mcs(bits_9600, bitrate); 389 } 390} 391 392/* 393 * download bitstream to FPGA 394 * data is contained in bits[] array in yam1200.h resp. yam9600.h 395 */ 396 397static int fpga_download(int iobase, int bitrate) 398{ 399 int i, rc; 400 unsigned char *pbits; 401 402 pbits = get_mcs(bitrate); 403 if (pbits == NULL) 404 return -1; 405 406 fpga_reset(iobase); 407 for (i = 0; i < YAM_FPGA_SIZE; i++) { 408 if (fpga_write(iobase, pbits[i])) { 409 printk(KERN_ERR "yam: error in write cycle\n"); 410 return -1; /* write... */ 411 } 412 } 413 414 fpga_write(iobase, 0xFF); 415 rc = inb(MSR(iobase)); /* check DONE signal */ 416 417 /* Needed for some hardwares */ 418 delay(50); 419 420 return (rc & MSR_DSR) ? 0 : -1; 421} 422 423 424/************************************************************************ 425* Serial port init 426************************************************************************/ 427 428static void yam_set_uart(struct net_device *dev) 429{ 430 struct yam_port *yp = netdev_priv(dev); 431 int divisor = 115200 / yp->baudrate; 432 433 outb(0, IER(dev->base_addr)); 434 outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr)); 435 outb(divisor, DLL(dev->base_addr)); 436 outb(0, DLM(dev->base_addr)); 437 outb(LCR_BIT8, LCR(dev->base_addr)); 438 outb(PTT_OFF, MCR(dev->base_addr)); 439 outb(0x00, FCR(dev->base_addr)); 440 441 /* Flush pending irq */ 442 443 inb(RBR(dev->base_addr)); 444 inb(MSR(dev->base_addr)); 445 446 /* Enable rx irq */ 447 448 outb(ENABLE_RTXINT, IER(dev->base_addr)); 449} 450 451 452/* --------------------------------------------------------------------- */ 453 454enum uart { 455 c_uart_unknown, c_uart_8250, 456 c_uart_16450, c_uart_16550, c_uart_16550A 457}; 458 459static const char *uart_str[] = 460{"unknown", "8250", "16450", "16550", "16550A"}; 461 462static enum uart yam_check_uart(unsigned int iobase) 463{ 464 unsigned char b1, b2, b3; 465 enum uart u; 466 enum uart uart_tab[] = 467 {c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A}; 468 469 b1 = inb(MCR(iobase)); 470 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ 471 b2 = inb(MSR(iobase)); 472 outb(0x1a, MCR(iobase)); 473 b3 = inb(MSR(iobase)) & 0xf0; 474 outb(b1, MCR(iobase)); /* restore old values */ 475 outb(b2, MSR(iobase)); 476 if (b3 != 0x90) 477 return c_uart_unknown; 478 inb(RBR(iobase)); 479 inb(RBR(iobase)); 480 outb(0x01, FCR(iobase)); /* enable FIFOs */ 481 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3]; 482 if (u == c_uart_16450) { 483 outb(0x5a, SCR(iobase)); 484 b1 = inb(SCR(iobase)); 485 outb(0xa5, SCR(iobase)); 486 b2 = inb(SCR(iobase)); 487 if ((b1 != 0x5a) || (b2 != 0xa5)) 488 u = c_uart_8250; 489 } 490 return u; 491} 492 493/****************************************************************************** 494* Rx Section 495******************************************************************************/ 496static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp) 497{ 498 if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) { 499 int pkt_len = yp->rx_len - 2 + 1; /* -CRC + kiss */ 500 struct sk_buff *skb; 501 502 if ((yp->rx_crch & yp->rx_crcl) != 0xFF) { 503 /* Bad crc */ 504 } else { 505 if (!(skb = dev_alloc_skb(pkt_len))) { 506 printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name); 507 ++dev->stats.rx_dropped; 508 } else { 509 unsigned char *cp; 510 cp = skb_put(skb, pkt_len); 511 *cp++ = 0; /* KISS kludge */ 512 memcpy(cp, yp->rx_buf, pkt_len - 1); 513 skb->protocol = ax25_type_trans(skb, dev); 514 netif_rx(skb); 515 ++dev->stats.rx_packets; 516 } 517 } 518 } 519 yp->rx_len = 0; 520 yp->rx_crcl = 0x21; 521 yp->rx_crch = 0xf3; 522} 523 524static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb) 525{ 526 if (yp->rx_len < YAM_MAX_FRAME) { 527 unsigned char c = yp->rx_crcl; 528 yp->rx_crcl = (chktabl[c] ^ yp->rx_crch); 529 yp->rx_crch = (chktabh[c] ^ rxb); 530 yp->rx_buf[yp->rx_len++] = rxb; 531 } 532} 533 534/******************************************************************************** 535* TX Section 536********************************************************************************/ 537 538static void ptt_on(struct net_device *dev) 539{ 540 outb(PTT_ON, MCR(dev->base_addr)); 541} 542 543static void ptt_off(struct net_device *dev) 544{ 545 outb(PTT_OFF, MCR(dev->base_addr)); 546} 547 548static int yam_send_packet(struct sk_buff *skb, struct net_device *dev) 549{ 550 struct yam_port *yp = netdev_priv(dev); 551 552 skb_queue_tail(&yp->send_queue, skb); 553 dev->trans_start = jiffies; 554 return 0; 555} 556 557static void yam_start_tx(struct net_device *dev, struct yam_port *yp) 558{ 559 if ((yp->tx_state == TX_TAIL) || (yp->txd == 0)) 560 yp->tx_count = 1; 561 else 562 yp->tx_count = (yp->bitrate * yp->txd) / 8000; 563 yp->tx_state = TX_HEAD; 564 ptt_on(dev); 565} 566 567static void yam_arbitrate(struct net_device *dev) 568{ 569 struct yam_port *yp = netdev_priv(dev); 570 571 if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF || 572 skb_queue_empty(&yp->send_queue)) 573 return; 574 /* tx_state is TX_OFF and there is data to send */ 575 576 if (yp->dupmode) { 577 /* Full duplex mode, don't wait */ 578 yam_start_tx(dev, yp); 579 return; 580 } 581 if (yp->dcd) { 582 /* DCD on, wait slotime ... */ 583 yp->slotcnt = yp->slot / 10; 584 return; 585 } 586 /* Is slottime passed ? */ 587 if ((--yp->slotcnt) > 0) 588 return; 589 590 yp->slotcnt = yp->slot / 10; 591 592 /* is random > persist ? */ 593 if ((random32() % 256) > yp->pers) 594 return; 595 596 yam_start_tx(dev, yp); 597} 598 599static void yam_dotimer(unsigned long dummy) 600{ 601 int i; 602 603 for (i = 0; i < NR_PORTS; i++) { 604 struct net_device *dev = yam_devs[i]; 605 if (dev && netif_running(dev)) 606 yam_arbitrate(dev); 607 } 608 yam_timer.expires = jiffies + HZ / 100; 609 add_timer(&yam_timer); 610} 611 612static void yam_tx_byte(struct net_device *dev, struct yam_port *yp) 613{ 614 struct sk_buff *skb; 615 unsigned char b, temp; 616 617 switch (yp->tx_state) { 618 case TX_OFF: 619 break; 620 case TX_HEAD: 621 if (--yp->tx_count <= 0) { 622 if (!(skb = skb_dequeue(&yp->send_queue))) { 623 ptt_off(dev); 624 yp->tx_state = TX_OFF; 625 break; 626 } 627 yp->tx_state = TX_DATA; 628 if (skb->data[0] != 0) { 629/* do_kiss_params(s, skb->data, skb->len); */ 630 dev_kfree_skb_any(skb); 631 break; 632 } 633 yp->tx_len = skb->len - 1; /* strip KISS byte */ 634 if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) { 635 dev_kfree_skb_any(skb); 636 break; 637 } 638 skb_copy_from_linear_data_offset(skb, 1, 639 yp->tx_buf, 640 yp->tx_len); 641 dev_kfree_skb_any(skb); 642 yp->tx_count = 0; 643 yp->tx_crcl = 0x21; 644 yp->tx_crch = 0xf3; 645 yp->tx_state = TX_DATA; 646 } 647 break; 648 case TX_DATA: 649 b = yp->tx_buf[yp->tx_count++]; 650 outb(b, THR(dev->base_addr)); 651 temp = yp->tx_crcl; 652 yp->tx_crcl = chktabl[temp] ^ yp->tx_crch; 653 yp->tx_crch = chktabh[temp] ^ b; 654 if (yp->tx_count >= yp->tx_len) { 655 yp->tx_state = TX_CRC1; 656 } 657 break; 658 case TX_CRC1: 659 yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch; 660 yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff; 661 outb(yp->tx_crcl, THR(dev->base_addr)); 662 yp->tx_state = TX_CRC2; 663 break; 664 case TX_CRC2: 665 outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr)); 666 if (skb_queue_empty(&yp->send_queue)) { 667 yp->tx_count = (yp->bitrate * yp->txtail) / 8000; 668 if (yp->dupmode == 2) 669 yp->tx_count += (yp->bitrate * yp->holdd) / 8; 670 if (yp->tx_count == 0) 671 yp->tx_count = 1; 672 yp->tx_state = TX_TAIL; 673 } else { 674 yp->tx_count = 1; 675 yp->tx_state = TX_HEAD; 676 } 677 ++dev->stats.tx_packets; 678 break; 679 case TX_TAIL: 680 if (--yp->tx_count <= 0) { 681 yp->tx_state = TX_OFF; 682 ptt_off(dev); 683 } 684 break; 685 } 686} 687 688/*********************************************************************************** 689* ISR routine 690************************************************************************************/ 691 692static irqreturn_t yam_interrupt(int irq, void *dev_id) 693{ 694 struct net_device *dev; 695 struct yam_port *yp; 696 unsigned char iir; 697 int counter = 100; 698 int i; 699 int handled = 0; 700 701 for (i = 0; i < NR_PORTS; i++) { 702 dev = yam_devs[i]; 703 yp = netdev_priv(dev); 704 705 if (!netif_running(dev)) 706 continue; 707 708 while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) { 709 unsigned char msr = inb(MSR(dev->base_addr)); 710 unsigned char lsr = inb(LSR(dev->base_addr)); 711 unsigned char rxb; 712 713 handled = 1; 714 715 if (lsr & LSR_OE) 716 ++dev->stats.rx_fifo_errors; 717 718 yp->dcd = (msr & RX_DCD) ? 1 : 0; 719 720 if (--counter <= 0) { 721 printk(KERN_ERR "%s: too many irq iir=%d\n", 722 dev->name, iir); 723 goto out; 724 } 725 if (msr & TX_RDY) { 726 ++yp->nb_mdint; 727 yam_tx_byte(dev, yp); 728 } 729 if (lsr & LSR_RXC) { 730 ++yp->nb_rxint; 731 rxb = inb(RBR(dev->base_addr)); 732 if (msr & RX_FLAG) 733 yam_rx_flag(dev, yp); 734 else 735 yam_rx_byte(dev, yp, rxb); 736 } 737 } 738 } 739out: 740 return IRQ_RETVAL(handled); 741} 742 743#ifdef CONFIG_PROC_FS 744 745static void *yam_seq_start(struct seq_file *seq, loff_t *pos) 746{ 747 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL; 748} 749 750static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos) 751{ 752 ++*pos; 753 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL; 754} 755 756static void yam_seq_stop(struct seq_file *seq, void *v) 757{ 758} 759 760static int yam_seq_show(struct seq_file *seq, void *v) 761{ 762 struct net_device *dev = v; 763 const struct yam_port *yp = netdev_priv(dev); 764 765 seq_printf(seq, "Device %s\n", dev->name); 766 seq_printf(seq, " Up %d\n", netif_running(dev)); 767 seq_printf(seq, " Speed %u\n", yp->bitrate); 768 seq_printf(seq, " IoBase 0x%x\n", yp->iobase); 769 seq_printf(seq, " BaudRate %u\n", yp->baudrate); 770 seq_printf(seq, " IRQ %u\n", yp->irq); 771 seq_printf(seq, " TxState %u\n", yp->tx_state); 772 seq_printf(seq, " Duplex %u\n", yp->dupmode); 773 seq_printf(seq, " HoldDly %u\n", yp->holdd); 774 seq_printf(seq, " TxDelay %u\n", yp->txd); 775 seq_printf(seq, " TxTail %u\n", yp->txtail); 776 seq_printf(seq, " SlotTime %u\n", yp->slot); 777 seq_printf(seq, " Persist %u\n", yp->pers); 778 seq_printf(seq, " TxFrames %lu\n", dev->stats.tx_packets); 779 seq_printf(seq, " RxFrames %lu\n", dev->stats.rx_packets); 780 seq_printf(seq, " TxInt %u\n", yp->nb_mdint); 781 seq_printf(seq, " RxInt %u\n", yp->nb_rxint); 782 seq_printf(seq, " RxOver %lu\n", dev->stats.rx_fifo_errors); 783 seq_printf(seq, "\n"); 784 return 0; 785} 786 787static const struct seq_operations yam_seqops = { 788 .start = yam_seq_start, 789 .next = yam_seq_next, 790 .stop = yam_seq_stop, 791 .show = yam_seq_show, 792}; 793 794static int yam_info_open(struct inode *inode, struct file *file) 795{ 796 return seq_open(file, &yam_seqops); 797} 798 799static const struct file_operations yam_info_fops = { 800 .owner = THIS_MODULE, 801 .open = yam_info_open, 802 .read = seq_read, 803 .llseek = seq_lseek, 804 .release = seq_release, 805}; 806 807#endif 808 809 810/* --------------------------------------------------------------------- */ 811 812static int yam_open(struct net_device *dev) 813{ 814 struct yam_port *yp = netdev_priv(dev); 815 enum uart u; 816 int i; 817 int ret=0; 818 819 printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq); 820 821 if (!dev || !yp->bitrate) 822 return -ENXIO; 823 if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT || 824 dev->irq < 2 || dev->irq > 15) { 825 return -ENXIO; 826 } 827 if (!request_region(dev->base_addr, YAM_EXTENT, dev->name)) 828 { 829 printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr); 830 return -EACCES; 831 } 832 if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) { 833 printk(KERN_ERR "%s: cannot find uart type\n", dev->name); 834 ret = -EIO; 835 goto out_release_base; 836 } 837 if (fpga_download(dev->base_addr, yp->bitrate)) { 838 printk(KERN_ERR "%s: cannot init FPGA\n", dev->name); 839 ret = -EIO; 840 goto out_release_base; 841 } 842 outb(0, IER(dev->base_addr)); 843 if (request_irq(dev->irq, yam_interrupt, IRQF_DISABLED | IRQF_SHARED, dev->name, dev)) { 844 printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq); 845 ret = -EBUSY; 846 goto out_release_base; 847 } 848 849 yam_set_uart(dev); 850 851 netif_start_queue(dev); 852 853 yp->slotcnt = yp->slot / 10; 854 855 /* Reset overruns for all ports - FPGA programming makes overruns */ 856 for (i = 0; i < NR_PORTS; i++) { 857 struct net_device *dev = yam_devs[i]; 858 859 inb(LSR(dev->base_addr)); 860 dev->stats.rx_fifo_errors = 0; 861 } 862 863 printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq, 864 uart_str[u]); 865 return 0; 866 867out_release_base: 868 release_region(dev->base_addr, YAM_EXTENT); 869 return ret; 870} 871 872/* --------------------------------------------------------------------- */ 873 874static int yam_close(struct net_device *dev) 875{ 876 struct sk_buff *skb; 877 struct yam_port *yp = netdev_priv(dev); 878 879 if (!dev) 880 return -EINVAL; 881 882 /* 883 * disable interrupts 884 */ 885 outb(0, IER(dev->base_addr)); 886 outb(1, MCR(dev->base_addr)); 887 /* Remove IRQ handler if last */ 888 free_irq(dev->irq,dev); 889 release_region(dev->base_addr, YAM_EXTENT); 890 netif_stop_queue(dev); 891 while ((skb = skb_dequeue(&yp->send_queue))) 892 dev_kfree_skb(skb); 893 894 printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n", 895 yam_drvname, dev->base_addr, dev->irq); 896 return 0; 897} 898 899/* --------------------------------------------------------------------- */ 900 901static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 902{ 903 struct yam_port *yp = netdev_priv(dev); 904 struct yamdrv_ioctl_cfg yi; 905 struct yamdrv_ioctl_mcs *ym; 906 int ioctl_cmd; 907 908 if (copy_from_user(&ioctl_cmd, ifr->ifr_data, sizeof(int))) 909 return -EFAULT; 910 911 if (yp->magic != YAM_MAGIC) 912 return -EINVAL; 913 914 if (!capable(CAP_NET_ADMIN)) 915 return -EPERM; 916 917 if (cmd != SIOCDEVPRIVATE) 918 return -EINVAL; 919 920 switch (ioctl_cmd) { 921 922 case SIOCYAMRESERVED: 923 return -EINVAL; /* unused */ 924 925 case SIOCYAMSMCS: 926 if (netif_running(dev)) 927 return -EINVAL; /* Cannot change this parameter when up */ 928 if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL) 929 return -ENOBUFS; 930 ym->bitrate = 9600; 931 if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) { 932 kfree(ym); 933 return -EFAULT; 934 } 935 if (ym->bitrate > YAM_MAXBITRATE) { 936 kfree(ym); 937 return -EINVAL; 938 } 939 add_mcs(ym->bits, ym->bitrate); 940 kfree(ym); 941 break; 942 943 case SIOCYAMSCFG: 944 if (!capable(CAP_SYS_RAWIO)) 945 return -EPERM; 946 if (copy_from_user(&yi, ifr->ifr_data, sizeof(struct yamdrv_ioctl_cfg))) 947 return -EFAULT; 948 949 if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev)) 950 return -EINVAL; /* Cannot change this parameter when up */ 951 if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev)) 952 return -EINVAL; /* Cannot change this parameter when up */ 953 if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev)) 954 return -EINVAL; /* Cannot change this parameter when up */ 955 if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev)) 956 return -EINVAL; /* Cannot change this parameter when up */ 957 958 if (yi.cfg.mask & YAM_IOBASE) { 959 yp->iobase = yi.cfg.iobase; 960 dev->base_addr = yi.cfg.iobase; 961 } 962 if (yi.cfg.mask & YAM_IRQ) { 963 if (yi.cfg.irq > 15) 964 return -EINVAL; 965 yp->irq = yi.cfg.irq; 966 dev->irq = yi.cfg.irq; 967 } 968 if (yi.cfg.mask & YAM_BITRATE) { 969 if (yi.cfg.bitrate > YAM_MAXBITRATE) 970 return -EINVAL; 971 yp->bitrate = yi.cfg.bitrate; 972 } 973 if (yi.cfg.mask & YAM_BAUDRATE) { 974 if (yi.cfg.baudrate > YAM_MAXBAUDRATE) 975 return -EINVAL; 976 yp->baudrate = yi.cfg.baudrate; 977 } 978 if (yi.cfg.mask & YAM_MODE) { 979 if (yi.cfg.mode > YAM_MAXMODE) 980 return -EINVAL; 981 yp->dupmode = yi.cfg.mode; 982 } 983 if (yi.cfg.mask & YAM_HOLDDLY) { 984 if (yi.cfg.holddly > YAM_MAXHOLDDLY) 985 return -EINVAL; 986 yp->holdd = yi.cfg.holddly; 987 } 988 if (yi.cfg.mask & YAM_TXDELAY) { 989 if (yi.cfg.txdelay > YAM_MAXTXDELAY) 990 return -EINVAL; 991 yp->txd = yi.cfg.txdelay; 992 } 993 if (yi.cfg.mask & YAM_TXTAIL) { 994 if (yi.cfg.txtail > YAM_MAXTXTAIL) 995 return -EINVAL; 996 yp->txtail = yi.cfg.txtail; 997 } 998 if (yi.cfg.mask & YAM_PERSIST) { 999 if (yi.cfg.persist > YAM_MAXPERSIST) 1000 return -EINVAL; 1001 yp->pers = yi.cfg.persist; 1002 } 1003 if (yi.cfg.mask & YAM_SLOTTIME) { 1004 if (yi.cfg.slottime > YAM_MAXSLOTTIME) 1005 return -EINVAL; 1006 yp->slot = yi.cfg.slottime; 1007 yp->slotcnt = yp->slot / 10; 1008 } 1009 break; 1010 1011 case SIOCYAMGCFG: 1012 yi.cfg.mask = 0xffffffff; 1013 yi.cfg.iobase = yp->iobase; 1014 yi.cfg.irq = yp->irq; 1015 yi.cfg.bitrate = yp->bitrate; 1016 yi.cfg.baudrate = yp->baudrate; 1017 yi.cfg.mode = yp->dupmode; 1018 yi.cfg.txdelay = yp->txd; 1019 yi.cfg.holddly = yp->holdd; 1020 yi.cfg.txtail = yp->txtail; 1021 yi.cfg.persist = yp->pers; 1022 yi.cfg.slottime = yp->slot; 1023 if (copy_to_user(ifr->ifr_data, &yi, sizeof(struct yamdrv_ioctl_cfg))) 1024 return -EFAULT; 1025 break; 1026 1027 default: 1028 return -EINVAL; 1029 1030 } 1031 1032 return 0; 1033} 1034 1035/* --------------------------------------------------------------------- */ 1036 1037static int yam_set_mac_address(struct net_device *dev, void *addr) 1038{ 1039 struct sockaddr *sa = (struct sockaddr *) addr; 1040 1041 /* addr is an AX.25 shifted ASCII mac address */ 1042 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); 1043 return 0; 1044} 1045 1046/* --------------------------------------------------------------------- */ 1047 1048static const struct net_device_ops yam_netdev_ops = { 1049 .ndo_open = yam_open, 1050 .ndo_stop = yam_close, 1051 .ndo_start_xmit = yam_send_packet, 1052 .ndo_do_ioctl = yam_ioctl, 1053 .ndo_set_mac_address = yam_set_mac_address, 1054}; 1055 1056static void yam_setup(struct net_device *dev) 1057{ 1058 struct yam_port *yp = netdev_priv(dev); 1059 1060 yp->magic = YAM_MAGIC; 1061 yp->bitrate = DEFAULT_BITRATE; 1062 yp->baudrate = DEFAULT_BITRATE * 2; 1063 yp->iobase = 0; 1064 yp->irq = 0; 1065 yp->dupmode = 0; 1066 yp->holdd = DEFAULT_HOLDD; 1067 yp->txd = DEFAULT_TXD; 1068 yp->txtail = DEFAULT_TXTAIL; 1069 yp->slot = DEFAULT_SLOT; 1070 yp->pers = DEFAULT_PERS; 1071 yp->dev = dev; 1072 1073 dev->base_addr = yp->iobase; 1074 dev->irq = yp->irq; 1075 1076 skb_queue_head_init(&yp->send_queue); 1077 1078 dev->netdev_ops = &yam_netdev_ops; 1079 dev->header_ops = &ax25_header_ops; 1080 1081 dev->type = ARPHRD_AX25; 1082 dev->hard_header_len = AX25_MAX_HEADER_LEN; 1083 dev->mtu = AX25_MTU; 1084 dev->addr_len = AX25_ADDR_LEN; 1085 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN); 1086 memcpy(dev->dev_addr, &ax25_defaddr, AX25_ADDR_LEN); 1087} 1088 1089static int __init yam_init_driver(void) 1090{ 1091 struct net_device *dev; 1092 int i, err; 1093 char name[IFNAMSIZ]; 1094 1095 printk(yam_drvinfo); 1096 1097 for (i = 0; i < NR_PORTS; i++) { 1098 sprintf(name, "yam%d", i); 1099 1100 dev = alloc_netdev(sizeof(struct yam_port), name, 1101 yam_setup); 1102 if (!dev) { 1103 printk(KERN_ERR "yam: cannot allocate net device %s\n", 1104 dev->name); 1105 err = -ENOMEM; 1106 goto error; 1107 } 1108 1109 err = register_netdev(dev); 1110 if (err) { 1111 printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name); 1112 goto error; 1113 } 1114 yam_devs[i] = dev; 1115 1116 } 1117 1118 yam_timer.function = yam_dotimer; 1119 yam_timer.expires = jiffies + HZ / 100; 1120 add_timer(&yam_timer); 1121 1122 proc_net_fops_create(&init_net, "yam", S_IRUGO, &yam_info_fops); 1123 return 0; 1124 error: 1125 while (--i >= 0) { 1126 unregister_netdev(yam_devs[i]); 1127 free_netdev(yam_devs[i]); 1128 } 1129 return err; 1130} 1131 1132/* --------------------------------------------------------------------- */ 1133 1134static void __exit yam_cleanup_driver(void) 1135{ 1136 struct yam_mcs *p; 1137 int i; 1138 1139 del_timer(&yam_timer); 1140 for (i = 0; i < NR_PORTS; i++) { 1141 struct net_device *dev = yam_devs[i]; 1142 if (dev) { 1143 unregister_netdev(dev); 1144 free_netdev(dev); 1145 } 1146 } 1147 1148 while (yam_data) { 1149 p = yam_data; 1150 yam_data = yam_data->next; 1151 kfree(p); 1152 } 1153 1154 proc_net_remove(&init_net, "yam"); 1155} 1156 1157/* --------------------------------------------------------------------- */ 1158 1159MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr"); 1160MODULE_DESCRIPTION("Yam amateur radio modem driver"); 1161MODULE_LICENSE("GPL"); 1162 1163module_init(yam_init_driver); 1164module_exit(yam_cleanup_driver); 1165 1166/* --------------------------------------------------------------------- */ 1167 1168