lmc_main.c revision 5c41542bdeaafe922a07bcdebc10d96a3b8ffeee
1 /* 2 * Copyright (c) 1997-2000 LAN Media Corporation (LMC) 3 * All rights reserved. www.lanmedia.com 4 * 5 * This code is written by: 6 * Andrew Stanley-Jones (asj@cban.com) 7 * Rob Braun (bbraun@vix.com), 8 * Michael Graff (explorer@vix.com) and 9 * Matt Thomas (matt@3am-software.com). 10 * 11 * With Help By: 12 * David Boggs 13 * Ron Crane 14 * Alan Cox 15 * 16 * This software may be used and distributed according to the terms 17 * of the GNU General Public License version 2, incorporated herein by reference. 18 * 19 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards. 20 * 21 * To control link specific options lmcctl is required. 22 * It can be obtained from ftp.lanmedia.com. 23 * 24 * Linux driver notes: 25 * Linux uses the device struct lmc_private to pass private information 26 * arround. 27 * 28 * The initialization portion of this driver (the lmc_reset() and the 29 * lmc_dec_reset() functions, as well as the led controls and the 30 * lmc_initcsrs() functions. 31 * 32 * The watchdog function runs every second and checks to see if 33 * we still have link, and that the timing source is what we expected 34 * it to be. If link is lost, the interface is marked down, and 35 * we no longer can transmit. 36 * 37 */ 38 39/* $Id: lmc_main.c,v 1.36 2000/04/11 05:25:25 asj Exp $ */ 40 41#include <linux/kernel.h> 42#include <linux/module.h> 43#include <linux/string.h> 44#include <linux/timer.h> 45#include <linux/ptrace.h> 46#include <linux/errno.h> 47#include <linux/ioport.h> 48#include <linux/slab.h> 49#include <linux/interrupt.h> 50#include <linux/pci.h> 51#include <linux/delay.h> 52#include <linux/init.h> 53#include <linux/in.h> 54#include <linux/if_arp.h> 55#include <linux/netdevice.h> 56#include <linux/etherdevice.h> 57#include <linux/skbuff.h> 58#include <linux/inet.h> 59#include <linux/bitops.h> 60 61#include <net/syncppp.h> 62 63#include <asm/processor.h> /* Processor type for cache alignment. */ 64#include <asm/io.h> 65#include <asm/dma.h> 66#include <asm/uaccess.h> 67//#include <asm/spinlock.h> 68 69#define DRIVER_MAJOR_VERSION 1 70#define DRIVER_MINOR_VERSION 34 71#define DRIVER_SUB_VERSION 0 72 73#define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION) 74 75#include "lmc.h" 76#include "lmc_var.h" 77#include "lmc_ioctl.h" 78#include "lmc_debug.h" 79#include "lmc_proto.h" 80 81static int lmc_first_load = 0; 82 83static int LMC_PKT_BUF_SZ = 1542; 84 85static struct pci_device_id lmc_pci_tbl[] = { 86 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST, 87 PCI_VENDOR_ID_LMC, PCI_ANY_ID }, 88 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST, 89 PCI_ANY_ID, PCI_VENDOR_ID_LMC }, 90 { 0 } 91}; 92 93MODULE_DEVICE_TABLE(pci, lmc_pci_tbl); 94MODULE_LICENSE("GPL"); 95 96 97static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev); 98static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev); 99static int lmc_rx (struct net_device *dev); 100static int lmc_open(struct net_device *dev); 101static int lmc_close(struct net_device *dev); 102static struct net_device_stats *lmc_get_stats(struct net_device *dev); 103static irqreturn_t lmc_interrupt(int irq, void *dev_instance); 104static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size); 105static void lmc_softreset(lmc_softc_t * const); 106static void lmc_running_reset(struct net_device *dev); 107static int lmc_ifdown(struct net_device * const); 108static void lmc_watchdog(unsigned long data); 109static void lmc_reset(lmc_softc_t * const sc); 110static void lmc_dec_reset(lmc_softc_t * const sc); 111static void lmc_driver_timeout(struct net_device *dev); 112 113/* 114 * linux reserves 16 device specific IOCTLs. We call them 115 * LMCIOC* to control various bits of our world. 116 */ 117int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/ 118{ 119 lmc_softc_t *sc; 120 lmc_ctl_t ctl; 121 int ret; 122 u_int16_t regVal; 123 unsigned long flags; 124 125 struct sppp *sp; 126 127 ret = -EOPNOTSUPP; 128 129 sc = dev->priv; 130 131 lmc_trace(dev, "lmc_ioctl in"); 132 133 /* 134 * Most functions mess with the structure 135 * Disable interrupts while we do the polling 136 */ 137 spin_lock_irqsave(&sc->lmc_lock, flags); 138 139 switch (cmd) { 140 /* 141 * Return current driver state. Since we keep this up 142 * To date internally, just copy this out to the user. 143 */ 144 case LMCIOCGINFO: /*fold01*/ 145 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t))) 146 ret = -EFAULT; 147 else 148 ret = 0; 149 break; 150 151 case LMCIOCSINFO: /*fold01*/ 152 sp = &((struct ppp_device *) dev)->sppp; 153 if (!capable(CAP_NET_ADMIN)) { 154 ret = -EPERM; 155 break; 156 } 157 158 if(dev->flags & IFF_UP){ 159 ret = -EBUSY; 160 break; 161 } 162 163 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) { 164 ret = -EFAULT; 165 break; 166 } 167 168 sc->lmc_media->set_status (sc, &ctl); 169 170 if(ctl.crc_length != sc->ictl.crc_length) { 171 sc->lmc_media->set_crc_length(sc, ctl.crc_length); 172 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) 173 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE; 174 else 175 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE; 176 } 177 178 if (ctl.keepalive_onoff == LMC_CTL_OFF) 179 sp->pp_flags &= ~PP_KEEPALIVE; /* Turn off */ 180 else 181 sp->pp_flags |= PP_KEEPALIVE; /* Turn on */ 182 183 ret = 0; 184 break; 185 186 case LMCIOCIFTYPE: /*fold01*/ 187 { 188 u_int16_t old_type = sc->if_type; 189 u_int16_t new_type; 190 191 if (!capable(CAP_NET_ADMIN)) { 192 ret = -EPERM; 193 break; 194 } 195 196 if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u_int16_t))) { 197 ret = -EFAULT; 198 break; 199 } 200 201 202 if (new_type == old_type) 203 { 204 ret = 0 ; 205 break; /* no change */ 206 } 207 208 lmc_proto_close(sc); 209 lmc_proto_detach(sc); 210 211 sc->if_type = new_type; 212// lmc_proto_init(sc); 213 lmc_proto_attach(sc); 214 lmc_proto_open(sc); 215 216 ret = 0 ; 217 break ; 218 } 219 220 case LMCIOCGETXINFO: /*fold01*/ 221 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE; 222 223 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype; 224 sc->lmc_xinfo.PciSlotNumber = 0; 225 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION; 226 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION; 227 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION; 228 sc->lmc_xinfo.XilinxRevisionNumber = 229 lmc_mii_readreg (sc, 0, 3) & 0xf; 230 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ; 231 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc); 232 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16); 233 234 sc->lmc_xinfo.Magic1 = 0xDEADBEEF; 235 236 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo, 237 sizeof(struct lmc_xinfo))) 238 ret = -EFAULT; 239 else 240 ret = 0; 241 242 break; 243 244 case LMCIOCGETLMCSTATS: /*fold01*/ 245 if (sc->lmc_cardtype == LMC_CARDTYPE_T1){ 246 lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_LSB); 247 sc->stats.framingBitErrorCount += 248 lmc_mii_readreg (sc, 0, 18) & 0xff; 249 lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_MSB); 250 sc->stats.framingBitErrorCount += 251 (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8; 252 lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_LSB); 253 sc->stats.lineCodeViolationCount += 254 lmc_mii_readreg (sc, 0, 18) & 0xff; 255 lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_MSB); 256 sc->stats.lineCodeViolationCount += 257 (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8; 258 lmc_mii_writereg (sc, 0, 17, T1FRAMER_AERR); 259 regVal = lmc_mii_readreg (sc, 0, 18) & 0xff; 260 261 sc->stats.lossOfFrameCount += 262 (regVal & T1FRAMER_LOF_MASK) >> 4; 263 sc->stats.changeOfFrameAlignmentCount += 264 (regVal & T1FRAMER_COFA_MASK) >> 2; 265 sc->stats.severelyErroredFrameCount += 266 regVal & T1FRAMER_SEF_MASK; 267 } 268 269 if (copy_to_user(ifr->ifr_data, &sc->stats, 270 sizeof (struct lmc_statistics))) 271 ret = -EFAULT; 272 else 273 ret = 0; 274 break; 275 276 case LMCIOCCLEARLMCSTATS: /*fold01*/ 277 if (!capable(CAP_NET_ADMIN)){ 278 ret = -EPERM; 279 break; 280 } 281 282 memset (&sc->stats, 0, sizeof (struct lmc_statistics)); 283 sc->stats.check = STATCHECK; 284 sc->stats.version_size = (DRIVER_VERSION << 16) + 285 sizeof (struct lmc_statistics); 286 sc->stats.lmc_cardtype = sc->lmc_cardtype; 287 ret = 0; 288 break; 289 290 case LMCIOCSETCIRCUIT: /*fold01*/ 291 if (!capable(CAP_NET_ADMIN)){ 292 ret = -EPERM; 293 break; 294 } 295 296 if(dev->flags & IFF_UP){ 297 ret = -EBUSY; 298 break; 299 } 300 301 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) { 302 ret = -EFAULT; 303 break; 304 } 305 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type); 306 sc->ictl.circuit_type = ctl.circuit_type; 307 ret = 0; 308 309 break; 310 311 case LMCIOCRESET: /*fold01*/ 312 if (!capable(CAP_NET_ADMIN)){ 313 ret = -EPERM; 314 break; 315 } 316 317 /* Reset driver and bring back to current state */ 318 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16)); 319 lmc_running_reset (dev); 320 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16)); 321 322 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16)); 323 324 ret = 0; 325 break; 326 327#ifdef DEBUG 328 case LMCIOCDUMPEVENTLOG: 329 if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) { 330 ret = -EFAULT; 331 break; 332 } 333 if (copy_to_user(ifr->ifr_data + sizeof (u32), lmcEventLogBuf, sizeof (lmcEventLogBuf))) 334 ret = -EFAULT; 335 else 336 ret = 0; 337 338 break; 339#endif /* end ifdef _DBG_EVENTLOG */ 340 case LMCIOCT1CONTROL: /*fold01*/ 341 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){ 342 ret = -EOPNOTSUPP; 343 break; 344 } 345 break; 346 case LMCIOCXILINX: /*fold01*/ 347 { 348 struct lmc_xilinx_control xc; /*fold02*/ 349 350 if (!capable(CAP_NET_ADMIN)){ 351 ret = -EPERM; 352 break; 353 } 354 355 /* 356 * Stop the xwitter whlie we restart the hardware 357 */ 358 netif_stop_queue(dev); 359 360 if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) { 361 ret = -EFAULT; 362 break; 363 } 364 switch(xc.command){ 365 case lmc_xilinx_reset: /*fold02*/ 366 { 367 u16 mii; 368 mii = lmc_mii_readreg (sc, 0, 16); 369 370 /* 371 * Make all of them 0 and make input 372 */ 373 lmc_gpio_mkinput(sc, 0xff); 374 375 /* 376 * make the reset output 377 */ 378 lmc_gpio_mkoutput(sc, LMC_GEP_RESET); 379 380 /* 381 * RESET low to force configuration. This also forces 382 * the transmitter clock to be internal, but we expect to reset 383 * that later anyway. 384 */ 385 386 sc->lmc_gpio &= ~LMC_GEP_RESET; 387 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 388 389 390 /* 391 * hold for more than 10 microseconds 392 */ 393 udelay(50); 394 395 sc->lmc_gpio |= LMC_GEP_RESET; 396 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 397 398 399 /* 400 * stop driving Xilinx-related signals 401 */ 402 lmc_gpio_mkinput(sc, 0xff); 403 404 /* Reset the frammer hardware */ 405 sc->lmc_media->set_link_status (sc, 1); 406 sc->lmc_media->set_status (sc, NULL); 407// lmc_softreset(sc); 408 409 { 410 int i; 411 for(i = 0; i < 5; i++){ 412 lmc_led_on(sc, LMC_DS3_LED0); 413 mdelay(100); 414 lmc_led_off(sc, LMC_DS3_LED0); 415 lmc_led_on(sc, LMC_DS3_LED1); 416 mdelay(100); 417 lmc_led_off(sc, LMC_DS3_LED1); 418 lmc_led_on(sc, LMC_DS3_LED3); 419 mdelay(100); 420 lmc_led_off(sc, LMC_DS3_LED3); 421 lmc_led_on(sc, LMC_DS3_LED2); 422 mdelay(100); 423 lmc_led_off(sc, LMC_DS3_LED2); 424 } 425 } 426 427 428 429 ret = 0x0; 430 431 } 432 433 break; 434 case lmc_xilinx_load_prom: /*fold02*/ 435 { 436 u16 mii; 437 int timeout = 500000; 438 mii = lmc_mii_readreg (sc, 0, 16); 439 440 /* 441 * Make all of them 0 and make input 442 */ 443 lmc_gpio_mkinput(sc, 0xff); 444 445 /* 446 * make the reset output 447 */ 448 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET); 449 450 /* 451 * RESET low to force configuration. This also forces 452 * the transmitter clock to be internal, but we expect to reset 453 * that later anyway. 454 */ 455 456 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP); 457 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 458 459 460 /* 461 * hold for more than 10 microseconds 462 */ 463 udelay(50); 464 465 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET; 466 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 467 468 /* 469 * busy wait for the chip to reset 470 */ 471 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 && 472 (timeout-- > 0)) 473 ; 474 475 476 /* 477 * stop driving Xilinx-related signals 478 */ 479 lmc_gpio_mkinput(sc, 0xff); 480 481 ret = 0x0; 482 483 484 break; 485 486 } 487 488 case lmc_xilinx_load: /*fold02*/ 489 { 490 char *data; 491 int pos; 492 int timeout = 500000; 493 494 if(xc.data == 0x0){ 495 ret = -EINVAL; 496 break; 497 } 498 499 data = kmalloc(xc.len, GFP_KERNEL); 500 if(data == 0x0){ 501 printk(KERN_WARNING "%s: Failed to allocate memory for copy\n", dev->name); 502 ret = -ENOMEM; 503 break; 504 } 505 506 if(copy_from_user(data, xc.data, xc.len)) 507 { 508 kfree(data); 509 ret = -ENOMEM; 510 break; 511 } 512 513 printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data); 514 515 lmc_gpio_mkinput(sc, 0xff); 516 517 /* 518 * Clear the Xilinx and start prgramming from the DEC 519 */ 520 521 /* 522 * Set ouput as: 523 * Reset: 0 (active) 524 * DP: 0 (active) 525 * Mode: 1 526 * 527 */ 528 sc->lmc_gpio = 0x00; 529 sc->lmc_gpio &= ~LMC_GEP_DP; 530 sc->lmc_gpio &= ~LMC_GEP_RESET; 531 sc->lmc_gpio |= LMC_GEP_MODE; 532 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 533 534 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET); 535 536 /* 537 * Wait at least 10 us 20 to be safe 538 */ 539 udelay(50); 540 541 /* 542 * Clear reset and activate programming lines 543 * Reset: Input 544 * DP: Input 545 * Clock: Output 546 * Data: Output 547 * Mode: Output 548 */ 549 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET); 550 551 /* 552 * Set LOAD, DATA, Clock to 1 553 */ 554 sc->lmc_gpio = 0x00; 555 sc->lmc_gpio |= LMC_GEP_MODE; 556 sc->lmc_gpio |= LMC_GEP_DATA; 557 sc->lmc_gpio |= LMC_GEP_CLK; 558 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 559 560 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE ); 561 562 /* 563 * busy wait for the chip to reset 564 */ 565 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 && 566 (timeout-- > 0)) 567 ; 568 569 printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout); 570 571 for(pos = 0; pos < xc.len; pos++){ 572 switch(data[pos]){ 573 case 0: 574 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */ 575 break; 576 case 1: 577 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */ 578 break; 579 default: 580 printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]); 581 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */ 582 } 583 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */ 584 sc->lmc_gpio |= LMC_GEP_MODE; 585 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 586 udelay(1); 587 588 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */ 589 sc->lmc_gpio |= LMC_GEP_MODE; 590 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 591 udelay(1); 592 } 593 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){ 594 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name); 595 } 596 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){ 597 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name); 598 } 599 else { 600 printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos); 601 } 602 603 lmc_gpio_mkinput(sc, 0xff); 604 605 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET; 606 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 607 608 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET; 609 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 610 611 kfree(data); 612 613 ret = 0; 614 615 break; 616 } 617 default: /*fold02*/ 618 ret = -EBADE; 619 break; 620 } 621 622 netif_wake_queue(dev); 623 sc->lmc_txfull = 0; 624 625 } 626 break; 627 default: /*fold01*/ 628 /* If we don't know what to do, give the protocol a shot. */ 629 ret = lmc_proto_ioctl (sc, ifr, cmd); 630 break; 631 } 632 633 spin_unlock_irqrestore(&sc->lmc_lock, flags); /*fold01*/ 634 635 lmc_trace(dev, "lmc_ioctl out"); 636 637 return ret; 638} 639 640 641/* the watchdog process that cruises around */ 642static void lmc_watchdog (unsigned long data) /*fold00*/ 643{ 644 struct net_device *dev = (struct net_device *) data; 645 lmc_softc_t *sc; 646 int link_status; 647 u_int32_t ticks; 648 unsigned long flags; 649 650 sc = dev->priv; 651 652 lmc_trace(dev, "lmc_watchdog in"); 653 654 spin_lock_irqsave(&sc->lmc_lock, flags); 655 656 if(sc->check != 0xBEAFCAFE){ 657 printk("LMC: Corrupt net_device struct, breaking out\n"); 658 spin_unlock_irqrestore(&sc->lmc_lock, flags); 659 return; 660 } 661 662 663 /* Make sure the tx jabber and rx watchdog are off, 664 * and the transmit and receive processes are running. 665 */ 666 667 LMC_CSR_WRITE (sc, csr_15, 0x00000011); 668 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN; 669 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 670 671 if (sc->lmc_ok == 0) 672 goto kick_timer; 673 674 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16)); 675 676 /* --- begin time out check ----------------------------------- 677 * check for a transmit interrupt timeout 678 * Has the packet xmt vs xmt serviced threshold been exceeded */ 679 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx && 680 sc->stats.tx_packets > sc->lasttx_packets && 681 sc->tx_TimeoutInd == 0) 682 { 683 684 /* wait for the watchdog to come around again */ 685 sc->tx_TimeoutInd = 1; 686 } 687 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx && 688 sc->stats.tx_packets > sc->lasttx_packets && 689 sc->tx_TimeoutInd) 690 { 691 692 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0); 693 694 sc->tx_TimeoutDisplay = 1; 695 sc->stats.tx_TimeoutCnt++; 696 697 /* DEC chip is stuck, hit it with a RESET!!!! */ 698 lmc_running_reset (dev); 699 700 701 /* look at receive & transmit process state to make sure they are running */ 702 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 703 704 /* look at: DSR - 02 for Reg 16 705 * CTS - 08 706 * DCD - 10 707 * RI - 20 708 * for Reg 17 709 */ 710 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17)); 711 712 /* reset the transmit timeout detection flag */ 713 sc->tx_TimeoutInd = 0; 714 sc->lastlmc_taint_tx = sc->lmc_taint_tx; 715 sc->lasttx_packets = sc->stats.tx_packets; 716 } 717 else 718 { 719 sc->tx_TimeoutInd = 0; 720 sc->lastlmc_taint_tx = sc->lmc_taint_tx; 721 sc->lasttx_packets = sc->stats.tx_packets; 722 } 723 724 /* --- end time out check ----------------------------------- */ 725 726 727 link_status = sc->lmc_media->get_link_status (sc); 728 729 /* 730 * hardware level link lost, but the interface is marked as up. 731 * Mark it as down. 732 */ 733 if ((link_status == 0) && (sc->last_link_status != 0)) { 734 printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name); 735 sc->last_link_status = 0; 736 /* lmc_reset (sc); Why reset??? The link can go down ok */ 737 738 /* Inform the world that link has been lost */ 739 netif_carrier_off(dev); 740 } 741 742 /* 743 * hardware link is up, but the interface is marked as down. 744 * Bring it back up again. 745 */ 746 if (link_status != 0 && sc->last_link_status == 0) { 747 printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name); 748 sc->last_link_status = 1; 749 /* lmc_reset (sc); Again why reset??? */ 750 751 /* Inform the world that link protocol is back up. */ 752 netif_carrier_on(dev); 753 754 /* Now we have to tell the syncppp that we had an outage 755 * and that it should deal. Calling sppp_reopen here 756 * should do the trick, but we may have to call sppp_close 757 * when the link goes down, and call sppp_open here. 758 * Subject to more testing. 759 * --bbraun 760 */ 761 762 lmc_proto_reopen(sc); 763 764 } 765 766 /* Call media specific watchdog functions */ 767 sc->lmc_media->watchdog(sc); 768 769 /* 770 * Poke the transmitter to make sure it 771 * never stops, even if we run out of mem 772 */ 773 LMC_CSR_WRITE(sc, csr_rxpoll, 0); 774 775 /* 776 * Check for code that failed 777 * and try and fix it as appropriate 778 */ 779 if(sc->failed_ring == 1){ 780 /* 781 * Failed to setup the recv/xmit rin 782 * Try again 783 */ 784 sc->failed_ring = 0; 785 lmc_softreset(sc); 786 } 787 if(sc->failed_recv_alloc == 1){ 788 /* 789 * We failed to alloc mem in the 790 * interrupt handler, go through the rings 791 * and rebuild them 792 */ 793 sc->failed_recv_alloc = 0; 794 lmc_softreset(sc); 795 } 796 797 798 /* 799 * remember the timer value 800 */ 801kick_timer: 802 803 ticks = LMC_CSR_READ (sc, csr_gp_timer); 804 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL); 805 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff); 806 807 /* 808 * restart this timer. 809 */ 810 sc->timer.expires = jiffies + (HZ); 811 add_timer (&sc->timer); 812 813 spin_unlock_irqrestore(&sc->lmc_lock, flags); 814 815 lmc_trace(dev, "lmc_watchdog out"); 816 817} 818 819static void lmc_setup(struct net_device * const dev) /*fold00*/ 820{ 821 lmc_trace(dev, "lmc_setup in"); 822 823 dev->type = ARPHRD_HDLC; 824 dev->hard_start_xmit = lmc_start_xmit; 825 dev->open = lmc_open; 826 dev->stop = lmc_close; 827 dev->get_stats = lmc_get_stats; 828 dev->do_ioctl = lmc_ioctl; 829 dev->tx_timeout = lmc_driver_timeout; 830 dev->watchdog_timeo = (HZ); /* 1 second */ 831 832 lmc_trace(dev, "lmc_setup out"); 833} 834 835 836static int __devinit lmc_init_one(struct pci_dev *pdev, 837 const struct pci_device_id *ent) 838{ 839 struct net_device *dev; 840 lmc_softc_t *sc; 841 u16 subdevice; 842 u_int16_t AdapModelNum; 843 int err = -ENOMEM; 844 static int cards_found; 845#ifndef GCOM 846 /* We name by type not by vendor */ 847 static const char lmcname[] = "hdlc%d"; 848#else 849 /* 850 * GCOM uses LMC vendor name so that clients can know which card 851 * to attach to. 852 */ 853 static const char lmcname[] = "lmc%d"; 854#endif 855 856 857 /* 858 * Allocate our own device structure 859 */ 860 dev = alloc_netdev(sizeof(lmc_softc_t), lmcname, lmc_setup); 861 if (!dev) { 862 printk (KERN_ERR "lmc:alloc_netdev for device failed\n"); 863 goto out1; 864 } 865 866 lmc_trace(dev, "lmc_init_one in"); 867 868 err = pci_enable_device(pdev); 869 if (err) { 870 printk(KERN_ERR "lmc: pci enable failed:%d\n", err); 871 goto out2; 872 } 873 874 if (pci_request_regions(pdev, "lmc")) { 875 printk(KERN_ERR "lmc: pci_request_region failed\n"); 876 err = -EIO; 877 goto out3; 878 } 879 880 pci_set_drvdata(pdev, dev); 881 882 if(lmc_first_load == 0){ 883 printk(KERN_INFO "Lan Media Corporation WAN Driver Version %d.%d.%d\n", 884 DRIVER_MAJOR_VERSION, DRIVER_MINOR_VERSION,DRIVER_SUB_VERSION); 885 lmc_first_load = 1; 886 } 887 888 sc = dev->priv; 889 sc->lmc_device = dev; 890 sc->name = dev->name; 891 892 /* Initialize the sppp layer */ 893 /* An ioctl can cause a subsequent detach for raw frame interface */ 894 sc->if_type = LMC_PPP; 895 sc->check = 0xBEAFCAFE; 896 dev->base_addr = pci_resource_start(pdev, 0); 897 dev->irq = pdev->irq; 898 899 SET_NETDEV_DEV(dev, &pdev->dev); 900 901 /* 902 * This will get the protocol layer ready and do any 1 time init's 903 * Must have a valid sc and dev structure 904 */ 905 lmc_proto_init(sc); 906 907 lmc_proto_attach(sc); 908 909 /* 910 * Why were we changing this??? 911 dev->tx_queue_len = 100; 912 */ 913 914 /* Init the spin lock so can call it latter */ 915 916 spin_lock_init(&sc->lmc_lock); 917 pci_set_master(pdev); 918 919 printk ("%s: detected at %lx, irq %d\n", dev->name, 920 dev->base_addr, dev->irq); 921 922 if (register_netdev (dev) != 0) { 923 printk (KERN_ERR "%s: register_netdev failed.\n", dev->name); 924 goto out4; 925 } 926 927 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN; 928 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; 929 930 /* 931 * 932 * Check either the subvendor or the subdevice, some systems reverse 933 * the setting in the bois, seems to be version and arch dependent? 934 * Fix the error, exchange the two values 935 */ 936 if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC) 937 subdevice = pdev->subsystem_vendor; 938 939 switch (subdevice) { 940 case PCI_DEVICE_ID_LMC_HSSI: 941 printk ("%s: LMC HSSI\n", dev->name); 942 sc->lmc_cardtype = LMC_CARDTYPE_HSSI; 943 sc->lmc_media = &lmc_hssi_media; 944 break; 945 case PCI_DEVICE_ID_LMC_DS3: 946 printk ("%s: LMC DS3\n", dev->name); 947 sc->lmc_cardtype = LMC_CARDTYPE_DS3; 948 sc->lmc_media = &lmc_ds3_media; 949 break; 950 case PCI_DEVICE_ID_LMC_SSI: 951 printk ("%s: LMC SSI\n", dev->name); 952 sc->lmc_cardtype = LMC_CARDTYPE_SSI; 953 sc->lmc_media = &lmc_ssi_media; 954 break; 955 case PCI_DEVICE_ID_LMC_T1: 956 printk ("%s: LMC T1\n", dev->name); 957 sc->lmc_cardtype = LMC_CARDTYPE_T1; 958 sc->lmc_media = &lmc_t1_media; 959 break; 960 default: 961 printk (KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name); 962 break; 963 } 964 965 lmc_initcsrs (sc, dev->base_addr, 8); 966 967 lmc_gpio_mkinput (sc, 0xff); 968 sc->lmc_gpio = 0; /* drive no signals yet */ 969 970 sc->lmc_media->defaults (sc); 971 972 sc->lmc_media->set_link_status (sc, LMC_LINK_UP); 973 974 /* verify that the PCI Sub System ID matches the Adapter Model number 975 * from the MII register 976 */ 977 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4; 978 979 if ((AdapModelNum == LMC_ADAP_T1 980 && subdevice == PCI_DEVICE_ID_LMC_T1) || /* detect LMC1200 */ 981 (AdapModelNum == LMC_ADAP_SSI 982 && subdevice == PCI_DEVICE_ID_LMC_SSI) || /* detect LMC1000 */ 983 (AdapModelNum == LMC_ADAP_DS3 984 && subdevice == PCI_DEVICE_ID_LMC_DS3) || /* detect LMC5245 */ 985 (AdapModelNum == LMC_ADAP_HSSI 986 && subdevice == PCI_DEVICE_ID_LMC_HSSI)) 987 { /* detect LMC5200 */ 988 989 } 990 else { 991 printk ("%s: Model number (%d) miscompare for PCI Subsystem ID = 0x%04x\n", 992 dev->name, AdapModelNum, subdevice); 993// return (NULL); 994 } 995 /* 996 * reset clock 997 */ 998 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL); 999 1000 sc->board_idx = cards_found++; 1001 sc->stats.check = STATCHECK; 1002 sc->stats.version_size = (DRIVER_VERSION << 16) + 1003 sizeof (struct lmc_statistics); 1004 sc->stats.lmc_cardtype = sc->lmc_cardtype; 1005 1006 sc->lmc_ok = 0; 1007 sc->last_link_status = 0; 1008 1009 lmc_trace(dev, "lmc_init_one out"); 1010 return 0; 1011 1012 out4: 1013 lmc_proto_detach(sc); 1014 out3: 1015 if (pdev) { 1016 pci_release_regions(pdev); 1017 pci_set_drvdata(pdev, NULL); 1018 } 1019 out2: 1020 free_netdev(dev); 1021 out1: 1022 return err; 1023} 1024 1025/* 1026 * Called from pci when removing module. 1027 */ 1028static void __devexit lmc_remove_one (struct pci_dev *pdev) 1029{ 1030 struct net_device *dev = pci_get_drvdata(pdev); 1031 1032 if (dev) { 1033 lmc_softc_t *sc = dev->priv; 1034 1035 printk("%s: removing...\n", dev->name); 1036 lmc_proto_detach(sc); 1037 unregister_netdev(dev); 1038 free_netdev(dev); 1039 pci_release_regions(pdev); 1040 pci_disable_device(pdev); 1041 pci_set_drvdata(pdev, NULL); 1042 } 1043} 1044 1045/* After this is called, packets can be sent. 1046 * Does not initialize the addresses 1047 */ 1048static int lmc_open (struct net_device *dev) /*fold00*/ 1049{ 1050 lmc_softc_t *sc = dev->priv; 1051 1052 lmc_trace(dev, "lmc_open in"); 1053 1054 lmc_led_on(sc, LMC_DS3_LED0); 1055 1056 lmc_dec_reset (sc); 1057 lmc_reset (sc); 1058 1059 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 1060 LMC_EVENT_LOG(LMC_EVENT_RESET2, 1061 lmc_mii_readreg (sc, 0, 16), 1062 lmc_mii_readreg (sc, 0, 17)); 1063 1064 1065 if (sc->lmc_ok){ 1066 lmc_trace(dev, "lmc_open lmc_ok out"); 1067 return (0); 1068 } 1069 1070 lmc_softreset (sc); 1071 1072 /* Since we have to use PCI bus, this should work on x86,alpha,ppc */ 1073 if (request_irq (dev->irq, &lmc_interrupt, IRQF_SHARED, dev->name, dev)){ 1074 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq); 1075 lmc_trace(dev, "lmc_open irq failed out"); 1076 return -EAGAIN; 1077 } 1078 sc->got_irq = 1; 1079 1080 /* Assert Terminal Active */ 1081 sc->lmc_miireg16 |= LMC_MII16_LED_ALL; 1082 sc->lmc_media->set_link_status (sc, LMC_LINK_UP); 1083 1084 /* 1085 * reset to last state. 1086 */ 1087 sc->lmc_media->set_status (sc, NULL); 1088 1089 /* setup default bits to be used in tulip_desc_t transmit descriptor 1090 * -baz */ 1091 sc->TxDescriptControlInit = ( 1092 LMC_TDES_INTERRUPT_ON_COMPLETION 1093 | LMC_TDES_FIRST_SEGMENT 1094 | LMC_TDES_LAST_SEGMENT 1095 | LMC_TDES_SECOND_ADDR_CHAINED 1096 | LMC_TDES_DISABLE_PADDING 1097 ); 1098 1099 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) { 1100 /* disable 32 bit CRC generated by ASIC */ 1101 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE; 1102 } 1103 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length); 1104 /* Acknoledge the Terminal Active and light LEDs */ 1105 1106 /* dev->flags |= IFF_UP; */ 1107 1108 lmc_proto_open(sc); 1109 1110 dev->do_ioctl = lmc_ioctl; 1111 1112 1113 netif_start_queue(dev); 1114 1115 sc->stats.tx_tbusy0++ ; 1116 1117 /* 1118 * select what interrupts we want to get 1119 */ 1120 sc->lmc_intrmask = 0; 1121 /* Should be using the default interrupt mask defined in the .h file. */ 1122 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR 1123 | TULIP_STS_RXINTR 1124 | TULIP_STS_TXINTR 1125 | TULIP_STS_ABNRMLINTR 1126 | TULIP_STS_SYSERROR 1127 | TULIP_STS_TXSTOPPED 1128 | TULIP_STS_TXUNDERFLOW 1129 | TULIP_STS_RXSTOPPED 1130 | TULIP_STS_RXNOBUF 1131 ); 1132 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask); 1133 1134 sc->lmc_cmdmode |= TULIP_CMD_TXRUN; 1135 sc->lmc_cmdmode |= TULIP_CMD_RXRUN; 1136 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 1137 1138 sc->lmc_ok = 1; /* Run watchdog */ 1139 1140 /* 1141 * Set the if up now - pfb 1142 */ 1143 1144 sc->last_link_status = 1; 1145 1146 /* 1147 * Setup a timer for the watchdog on probe, and start it running. 1148 * Since lmc_ok == 0, it will be a NOP for now. 1149 */ 1150 init_timer (&sc->timer); 1151 sc->timer.expires = jiffies + HZ; 1152 sc->timer.data = (unsigned long) dev; 1153 sc->timer.function = &lmc_watchdog; 1154 add_timer (&sc->timer); 1155 1156 lmc_trace(dev, "lmc_open out"); 1157 1158 return (0); 1159} 1160 1161/* Total reset to compensate for the AdTran DSU doing bad things 1162 * under heavy load 1163 */ 1164 1165static void lmc_running_reset (struct net_device *dev) /*fold00*/ 1166{ 1167 1168 lmc_softc_t *sc = (lmc_softc_t *) dev->priv; 1169 1170 lmc_trace(dev, "lmc_runnig_reset in"); 1171 1172 /* stop interrupts */ 1173 /* Clear the interrupt mask */ 1174 LMC_CSR_WRITE (sc, csr_intr, 0x00000000); 1175 1176 lmc_dec_reset (sc); 1177 lmc_reset (sc); 1178 lmc_softreset (sc); 1179 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */ 1180 sc->lmc_media->set_link_status (sc, 1); 1181 sc->lmc_media->set_status (sc, NULL); 1182 1183 netif_wake_queue(dev); 1184 1185 sc->lmc_txfull = 0; 1186 sc->stats.tx_tbusy0++ ; 1187 1188 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK; 1189 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask); 1190 1191 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN); 1192 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 1193 1194 lmc_trace(dev, "lmc_runnin_reset_out"); 1195} 1196 1197 1198/* This is what is called when you ifconfig down a device. 1199 * This disables the timer for the watchdog and keepalives, 1200 * and disables the irq for dev. 1201 */ 1202static int lmc_close (struct net_device *dev) /*fold00*/ 1203{ 1204 /* not calling release_region() as we should */ 1205 lmc_softc_t *sc; 1206 1207 lmc_trace(dev, "lmc_close in"); 1208 1209 sc = dev->priv; 1210 sc->lmc_ok = 0; 1211 sc->lmc_media->set_link_status (sc, 0); 1212 del_timer (&sc->timer); 1213 lmc_proto_close(sc); 1214 lmc_ifdown (dev); 1215 1216 lmc_trace(dev, "lmc_close out"); 1217 1218 return 0; 1219} 1220 1221/* Ends the transfer of packets */ 1222/* When the interface goes down, this is called */ 1223static int lmc_ifdown (struct net_device *dev) /*fold00*/ 1224{ 1225 lmc_softc_t *sc = dev->priv; 1226 u32 csr6; 1227 int i; 1228 1229 lmc_trace(dev, "lmc_ifdown in"); 1230 1231 /* Don't let anything else go on right now */ 1232 // dev->start = 0; 1233 netif_stop_queue(dev); 1234 sc->stats.tx_tbusy1++ ; 1235 1236 /* stop interrupts */ 1237 /* Clear the interrupt mask */ 1238 LMC_CSR_WRITE (sc, csr_intr, 0x00000000); 1239 1240 /* Stop Tx and Rx on the chip */ 1241 csr6 = LMC_CSR_READ (sc, csr_command); 1242 csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */ 1243 csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */ 1244 LMC_CSR_WRITE (sc, csr_command, csr6); 1245 1246 sc->stats.rx_missed_errors += 1247 LMC_CSR_READ (sc, csr_missed_frames) & 0xffff; 1248 1249 /* release the interrupt */ 1250 if(sc->got_irq == 1){ 1251 free_irq (dev->irq, dev); 1252 sc->got_irq = 0; 1253 } 1254 1255 /* free skbuffs in the Rx queue */ 1256 for (i = 0; i < LMC_RXDESCS; i++) 1257 { 1258 struct sk_buff *skb = sc->lmc_rxq[i]; 1259 sc->lmc_rxq[i] = NULL; 1260 sc->lmc_rxring[i].status = 0; 1261 sc->lmc_rxring[i].length = 0; 1262 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF; 1263 if (skb != NULL) 1264 dev_kfree_skb(skb); 1265 sc->lmc_rxq[i] = NULL; 1266 } 1267 1268 for (i = 0; i < LMC_TXDESCS; i++) 1269 { 1270 if (sc->lmc_txq[i] != NULL) 1271 dev_kfree_skb(sc->lmc_txq[i]); 1272 sc->lmc_txq[i] = NULL; 1273 } 1274 1275 lmc_led_off (sc, LMC_MII16_LED_ALL); 1276 1277 netif_wake_queue(dev); 1278 sc->stats.tx_tbusy0++ ; 1279 1280 lmc_trace(dev, "lmc_ifdown out"); 1281 1282 return 0; 1283} 1284 1285/* Interrupt handling routine. This will take an incoming packet, or clean 1286 * up after a trasmit. 1287 */ 1288static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/ 1289{ 1290 struct net_device *dev = (struct net_device *) dev_instance; 1291 lmc_softc_t *sc; 1292 u32 csr; 1293 int i; 1294 s32 stat; 1295 unsigned int badtx; 1296 u32 firstcsr; 1297 int max_work = LMC_RXDESCS; 1298 int handled = 0; 1299 1300 lmc_trace(dev, "lmc_interrupt in"); 1301 1302 sc = dev->priv; 1303 1304 spin_lock(&sc->lmc_lock); 1305 1306 /* 1307 * Read the csr to find what interrupts we have (if any) 1308 */ 1309 csr = LMC_CSR_READ (sc, csr_status); 1310 1311 /* 1312 * Make sure this is our interrupt 1313 */ 1314 if ( ! (csr & sc->lmc_intrmask)) { 1315 goto lmc_int_fail_out; 1316 } 1317 1318 firstcsr = csr; 1319 1320 /* always go through this loop at least once */ 1321 while (csr & sc->lmc_intrmask) { 1322 handled = 1; 1323 1324 /* 1325 * Clear interrupt bits, we handle all case below 1326 */ 1327 LMC_CSR_WRITE (sc, csr_status, csr); 1328 1329 /* 1330 * One of 1331 * - Transmit process timed out CSR5<1> 1332 * - Transmit jabber timeout CSR5<3> 1333 * - Transmit underflow CSR5<5> 1334 * - Transmit Receiver buffer unavailable CSR5<7> 1335 * - Receive process stopped CSR5<8> 1336 * - Receive watchdog timeout CSR5<9> 1337 * - Early transmit interrupt CSR5<10> 1338 * 1339 * Is this really right? Should we do a running reset for jabber? 1340 * (being a WAN card and all) 1341 */ 1342 if (csr & TULIP_STS_ABNRMLINTR){ 1343 lmc_running_reset (dev); 1344 break; 1345 } 1346 1347 if (csr & TULIP_STS_RXINTR){ 1348 lmc_trace(dev, "rx interrupt"); 1349 lmc_rx (dev); 1350 1351 } 1352 if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) { 1353 1354 int n_compl = 0 ; 1355 /* reset the transmit timeout detection flag -baz */ 1356 sc->stats.tx_NoCompleteCnt = 0; 1357 1358 badtx = sc->lmc_taint_tx; 1359 i = badtx % LMC_TXDESCS; 1360 1361 while ((badtx < sc->lmc_next_tx)) { 1362 stat = sc->lmc_txring[i].status; 1363 1364 LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat, 1365 sc->lmc_txring[i].length); 1366 /* 1367 * If bit 31 is 1 the tulip owns it break out of the loop 1368 */ 1369 if (stat & 0x80000000) 1370 break; 1371 1372 n_compl++ ; /* i.e., have an empty slot in ring */ 1373 /* 1374 * If we have no skbuff or have cleared it 1375 * Already continue to the next buffer 1376 */ 1377 if (sc->lmc_txq[i] == NULL) 1378 continue; 1379 1380 /* 1381 * Check the total error summary to look for any errors 1382 */ 1383 if (stat & 0x8000) { 1384 sc->stats.tx_errors++; 1385 if (stat & 0x4104) 1386 sc->stats.tx_aborted_errors++; 1387 if (stat & 0x0C00) 1388 sc->stats.tx_carrier_errors++; 1389 if (stat & 0x0200) 1390 sc->stats.tx_window_errors++; 1391 if (stat & 0x0002) 1392 sc->stats.tx_fifo_errors++; 1393 } 1394 else { 1395 1396 sc->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff; 1397 1398 sc->stats.tx_packets++; 1399 } 1400 1401 // dev_kfree_skb(sc->lmc_txq[i]); 1402 dev_kfree_skb_irq(sc->lmc_txq[i]); 1403 sc->lmc_txq[i] = NULL; 1404 1405 badtx++; 1406 i = badtx % LMC_TXDESCS; 1407 } 1408 1409 if (sc->lmc_next_tx - badtx > LMC_TXDESCS) 1410 { 1411 printk ("%s: out of sync pointer\n", dev->name); 1412 badtx += LMC_TXDESCS; 1413 } 1414 LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0); 1415 sc->lmc_txfull = 0; 1416 netif_wake_queue(dev); 1417 sc->stats.tx_tbusy0++ ; 1418 1419 1420#ifdef DEBUG 1421 sc->stats.dirtyTx = badtx; 1422 sc->stats.lmc_next_tx = sc->lmc_next_tx; 1423 sc->stats.lmc_txfull = sc->lmc_txfull; 1424#endif 1425 sc->lmc_taint_tx = badtx; 1426 1427 /* 1428 * Why was there a break here??? 1429 */ 1430 } /* end handle transmit interrupt */ 1431 1432 if (csr & TULIP_STS_SYSERROR) { 1433 u32 error; 1434 printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr); 1435 error = csr>>23 & 0x7; 1436 switch(error){ 1437 case 0x000: 1438 printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name); 1439 break; 1440 case 0x001: 1441 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name); 1442 break; 1443 case 0x010: 1444 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name); 1445 break; 1446 default: 1447 printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name); 1448 } 1449 lmc_dec_reset (sc); 1450 lmc_reset (sc); 1451 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 1452 LMC_EVENT_LOG(LMC_EVENT_RESET2, 1453 lmc_mii_readreg (sc, 0, 16), 1454 lmc_mii_readreg (sc, 0, 17)); 1455 1456 } 1457 1458 1459 if(max_work-- <= 0) 1460 break; 1461 1462 /* 1463 * Get current csr status to make sure 1464 * we've cleared all interrupts 1465 */ 1466 csr = LMC_CSR_READ (sc, csr_status); 1467 } /* end interrupt loop */ 1468 LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr); 1469 1470lmc_int_fail_out: 1471 1472 spin_unlock(&sc->lmc_lock); 1473 1474 lmc_trace(dev, "lmc_interrupt out"); 1475 return IRQ_RETVAL(handled); 1476} 1477 1478static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00*/ 1479{ 1480 lmc_softc_t *sc; 1481 u32 flag; 1482 int entry; 1483 int ret = 0; 1484 unsigned long flags; 1485 1486 lmc_trace(dev, "lmc_start_xmit in"); 1487 1488 sc = dev->priv; 1489 1490 spin_lock_irqsave(&sc->lmc_lock, flags); 1491 1492 /* normal path, tbusy known to be zero */ 1493 1494 entry = sc->lmc_next_tx % LMC_TXDESCS; 1495 1496 sc->lmc_txq[entry] = skb; 1497 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data); 1498 1499 LMC_CONSOLE_LOG("xmit", skb->data, skb->len); 1500 1501#ifndef GCOM 1502 /* If the queue is less than half full, don't interrupt */ 1503 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2) 1504 { 1505 /* Do not interrupt on completion of this packet */ 1506 flag = 0x60000000; 1507 netif_wake_queue(dev); 1508 } 1509 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2) 1510 { 1511 /* This generates an interrupt on completion of this packet */ 1512 flag = 0xe0000000; 1513 netif_wake_queue(dev); 1514 } 1515 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1) 1516 { 1517 /* Do not interrupt on completion of this packet */ 1518 flag = 0x60000000; 1519 netif_wake_queue(dev); 1520 } 1521 else 1522 { 1523 /* This generates an interrupt on completion of this packet */ 1524 flag = 0xe0000000; 1525 sc->lmc_txfull = 1; 1526 netif_stop_queue(dev); 1527 } 1528#else 1529 flag = LMC_TDES_INTERRUPT_ON_COMPLETION; 1530 1531 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1) 1532 { /* ring full, go busy */ 1533 sc->lmc_txfull = 1; 1534 netif_stop_queue(dev); 1535 sc->stats.tx_tbusy1++ ; 1536 LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0); 1537 } 1538#endif 1539 1540 1541 if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */ 1542 flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */ 1543 1544 /* don't pad small packets either */ 1545 flag = sc->lmc_txring[entry].length = (skb->len) | flag | 1546 sc->TxDescriptControlInit; 1547 1548 /* set the transmit timeout flag to be checked in 1549 * the watchdog timer handler. -baz 1550 */ 1551 1552 sc->stats.tx_NoCompleteCnt++; 1553 sc->lmc_next_tx++; 1554 1555 /* give ownership to the chip */ 1556 LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry); 1557 sc->lmc_txring[entry].status = 0x80000000; 1558 1559 /* send now! */ 1560 LMC_CSR_WRITE (sc, csr_txpoll, 0); 1561 1562 dev->trans_start = jiffies; 1563 1564 spin_unlock_irqrestore(&sc->lmc_lock, flags); 1565 1566 lmc_trace(dev, "lmc_start_xmit_out"); 1567 return ret; 1568} 1569 1570 1571static int lmc_rx (struct net_device *dev) /*fold00*/ 1572{ 1573 lmc_softc_t *sc; 1574 int i; 1575 int rx_work_limit = LMC_RXDESCS; 1576 unsigned int next_rx; 1577 int rxIntLoopCnt; /* debug -baz */ 1578 int localLengthErrCnt = 0; 1579 long stat; 1580 struct sk_buff *skb, *nsb; 1581 u16 len; 1582 1583 lmc_trace(dev, "lmc_rx in"); 1584 1585 sc = dev->priv; 1586 1587 lmc_led_on(sc, LMC_DS3_LED3); 1588 1589 rxIntLoopCnt = 0; /* debug -baz */ 1590 1591 i = sc->lmc_next_rx % LMC_RXDESCS; 1592 next_rx = sc->lmc_next_rx; 1593 1594 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4) 1595 { 1596 rxIntLoopCnt++; /* debug -baz */ 1597 len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER); 1598 if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */ 1599 if ((stat & 0x0000ffff) != 0x7fff) { 1600 /* Oversized frame */ 1601 sc->stats.rx_length_errors++; 1602 goto skip_packet; 1603 } 1604 } 1605 1606 if(stat & 0x00000008){ /* Catch a dribbling bit error */ 1607 sc->stats.rx_errors++; 1608 sc->stats.rx_frame_errors++; 1609 goto skip_packet; 1610 } 1611 1612 1613 if(stat & 0x00000004){ /* Catch a CRC error by the Xilinx */ 1614 sc->stats.rx_errors++; 1615 sc->stats.rx_crc_errors++; 1616 goto skip_packet; 1617 } 1618 1619 1620 if (len > LMC_PKT_BUF_SZ){ 1621 sc->stats.rx_length_errors++; 1622 localLengthErrCnt++; 1623 goto skip_packet; 1624 } 1625 1626 if (len < sc->lmc_crcSize + 2) { 1627 sc->stats.rx_length_errors++; 1628 sc->stats.rx_SmallPktCnt++; 1629 localLengthErrCnt++; 1630 goto skip_packet; 1631 } 1632 1633 if(stat & 0x00004000){ 1634 printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name); 1635 } 1636 1637 len -= sc->lmc_crcSize; 1638 1639 skb = sc->lmc_rxq[i]; 1640 1641 /* 1642 * We ran out of memory at some point 1643 * just allocate an skb buff and continue. 1644 */ 1645 1646 if(skb == 0x0){ 1647 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1648 if (nsb) { 1649 sc->lmc_rxq[i] = nsb; 1650 nsb->dev = dev; 1651 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb)); 1652 } 1653 sc->failed_recv_alloc = 1; 1654 goto skip_packet; 1655 } 1656 1657 dev->last_rx = jiffies; 1658 sc->stats.rx_packets++; 1659 sc->stats.rx_bytes += len; 1660 1661 LMC_CONSOLE_LOG("recv", skb->data, len); 1662 1663 /* 1664 * I'm not sure of the sanity of this 1665 * Packets could be arriving at a constant 1666 * 44.210mbits/sec and we're going to copy 1667 * them into a new buffer?? 1668 */ 1669 1670 if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */ 1671 /* 1672 * If it's a large packet don't copy it just hand it up 1673 */ 1674 give_it_anyways: 1675 1676 sc->lmc_rxq[i] = NULL; 1677 sc->lmc_rxring[i].buffer1 = 0x0; 1678 1679 skb_put (skb, len); 1680 skb->protocol = lmc_proto_type(sc, skb); 1681 skb->protocol = htons(ETH_P_WAN_PPP); 1682 skb_reset_mac_header(skb); 1683 /* skb_reset_network_header(skb); */ 1684 skb->dev = dev; 1685 lmc_proto_netif(sc, skb); 1686 1687 /* 1688 * This skb will be destroyed by the upper layers, make a new one 1689 */ 1690 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1691 if (nsb) { 1692 sc->lmc_rxq[i] = nsb; 1693 nsb->dev = dev; 1694 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb)); 1695 /* Transferred to 21140 below */ 1696 } 1697 else { 1698 /* 1699 * We've run out of memory, stop trying to allocate 1700 * memory and exit the interrupt handler 1701 * 1702 * The chip may run out of receivers and stop 1703 * in which care we'll try to allocate the buffer 1704 * again. (once a second) 1705 */ 1706 sc->stats.rx_BuffAllocErr++; 1707 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len); 1708 sc->failed_recv_alloc = 1; 1709 goto skip_out_of_mem; 1710 } 1711 } 1712 else { 1713 nsb = dev_alloc_skb(len); 1714 if(!nsb) { 1715 goto give_it_anyways; 1716 } 1717 skb_copy_from_linear_data(skb, skb_put(nsb, len), len); 1718 1719 nsb->protocol = lmc_proto_type(sc, skb); 1720 skb_reset_mac_header(nsb); 1721 /* skb_reset_network_header(nsb); */ 1722 nsb->dev = dev; 1723 lmc_proto_netif(sc, nsb); 1724 } 1725 1726 skip_packet: 1727 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len); 1728 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4; 1729 1730 sc->lmc_next_rx++; 1731 i = sc->lmc_next_rx % LMC_RXDESCS; 1732 rx_work_limit--; 1733 if (rx_work_limit < 0) 1734 break; 1735 } 1736 1737 /* detect condition for LMC1000 where DSU cable attaches and fills 1738 * descriptors with bogus packets 1739 * 1740 if (localLengthErrCnt > LMC_RXDESCS - 3) { 1741 sc->stats.rx_BadPktSurgeCnt++; 1742 LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, 1743 localLengthErrCnt, 1744 sc->stats.rx_BadPktSurgeCnt); 1745 } */ 1746 1747 /* save max count of receive descriptors serviced */ 1748 if (rxIntLoopCnt > sc->stats.rxIntLoopCnt) { 1749 sc->stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */ 1750 } 1751 1752#ifdef DEBUG 1753 if (rxIntLoopCnt == 0) 1754 { 1755 for (i = 0; i < LMC_RXDESCS; i++) 1756 { 1757 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT) 1758 != DESC_OWNED_BY_DC21X4) 1759 { 1760 rxIntLoopCnt++; 1761 } 1762 } 1763 LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0); 1764 } 1765#endif 1766 1767 1768 lmc_led_off(sc, LMC_DS3_LED3); 1769 1770skip_out_of_mem: 1771 1772 lmc_trace(dev, "lmc_rx out"); 1773 1774 return 0; 1775} 1776 1777static struct net_device_stats *lmc_get_stats (struct net_device *dev) /*fold00*/ 1778{ 1779 lmc_softc_t *sc = dev->priv; 1780 unsigned long flags; 1781 1782 lmc_trace(dev, "lmc_get_stats in"); 1783 1784 1785 spin_lock_irqsave(&sc->lmc_lock, flags); 1786 1787 sc->stats.rx_missed_errors += LMC_CSR_READ (sc, csr_missed_frames) & 0xffff; 1788 1789 spin_unlock_irqrestore(&sc->lmc_lock, flags); 1790 1791 lmc_trace(dev, "lmc_get_stats out"); 1792 1793 return (struct net_device_stats *) &sc->stats; 1794} 1795 1796static struct pci_driver lmc_driver = { 1797 .name = "lmc", 1798 .id_table = lmc_pci_tbl, 1799 .probe = lmc_init_one, 1800 .remove = __devexit_p(lmc_remove_one), 1801}; 1802 1803static int __init init_lmc(void) 1804{ 1805 return pci_register_driver(&lmc_driver); 1806} 1807 1808static void __exit exit_lmc(void) 1809{ 1810 pci_unregister_driver(&lmc_driver); 1811} 1812 1813module_init(init_lmc); 1814module_exit(exit_lmc); 1815 1816unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/ 1817{ 1818 int i; 1819 int command = (0xf6 << 10) | (devaddr << 5) | regno; 1820 int retval = 0; 1821 1822 lmc_trace(sc->lmc_device, "lmc_mii_readreg in"); 1823 1824 LMC_MII_SYNC (sc); 1825 1826 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync"); 1827 1828 for (i = 15; i >= 0; i--) 1829 { 1830 int dataval = (command & (1 << i)) ? 0x20000 : 0; 1831 1832 LMC_CSR_WRITE (sc, csr_9, dataval); 1833 lmc_delay (); 1834 /* __SLOW_DOWN_IO; */ 1835 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000); 1836 lmc_delay (); 1837 /* __SLOW_DOWN_IO; */ 1838 } 1839 1840 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1"); 1841 1842 for (i = 19; i > 0; i--) 1843 { 1844 LMC_CSR_WRITE (sc, csr_9, 0x40000); 1845 lmc_delay (); 1846 /* __SLOW_DOWN_IO; */ 1847 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0); 1848 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000); 1849 lmc_delay (); 1850 /* __SLOW_DOWN_IO; */ 1851 } 1852 1853 lmc_trace(sc->lmc_device, "lmc_mii_readreg out"); 1854 1855 return (retval >> 1) & 0xffff; 1856} 1857 1858void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/ 1859{ 1860 int i = 32; 1861 int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data; 1862 1863 lmc_trace(sc->lmc_device, "lmc_mii_writereg in"); 1864 1865 LMC_MII_SYNC (sc); 1866 1867 i = 31; 1868 while (i >= 0) 1869 { 1870 int datav; 1871 1872 if (command & (1 << i)) 1873 datav = 0x20000; 1874 else 1875 datav = 0x00000; 1876 1877 LMC_CSR_WRITE (sc, csr_9, datav); 1878 lmc_delay (); 1879 /* __SLOW_DOWN_IO; */ 1880 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000)); 1881 lmc_delay (); 1882 /* __SLOW_DOWN_IO; */ 1883 i--; 1884 } 1885 1886 i = 2; 1887 while (i > 0) 1888 { 1889 LMC_CSR_WRITE (sc, csr_9, 0x40000); 1890 lmc_delay (); 1891 /* __SLOW_DOWN_IO; */ 1892 LMC_CSR_WRITE (sc, csr_9, 0x50000); 1893 lmc_delay (); 1894 /* __SLOW_DOWN_IO; */ 1895 i--; 1896 } 1897 1898 lmc_trace(sc->lmc_device, "lmc_mii_writereg out"); 1899} 1900 1901static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/ 1902{ 1903 int i; 1904 1905 lmc_trace(sc->lmc_device, "lmc_softreset in"); 1906 1907 /* Initialize the receive rings and buffers. */ 1908 sc->lmc_txfull = 0; 1909 sc->lmc_next_rx = 0; 1910 sc->lmc_next_tx = 0; 1911 sc->lmc_taint_rx = 0; 1912 sc->lmc_taint_tx = 0; 1913 1914 /* 1915 * Setup each one of the receiver buffers 1916 * allocate an skbuff for each one, setup the descriptor table 1917 * and point each buffer at the next one 1918 */ 1919 1920 for (i = 0; i < LMC_RXDESCS; i++) 1921 { 1922 struct sk_buff *skb; 1923 1924 if (sc->lmc_rxq[i] == NULL) 1925 { 1926 skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1927 if(skb == NULL){ 1928 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name); 1929 sc->failed_ring = 1; 1930 break; 1931 } 1932 else{ 1933 sc->lmc_rxq[i] = skb; 1934 } 1935 } 1936 else 1937 { 1938 skb = sc->lmc_rxq[i]; 1939 } 1940 1941 skb->dev = sc->lmc_device; 1942 1943 /* owned by 21140 */ 1944 sc->lmc_rxring[i].status = 0x80000000; 1945 1946 /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */ 1947 sc->lmc_rxring[i].length = skb_tailroom(skb); 1948 1949 /* use to be tail which is dumb since you're thinking why write 1950 * to the end of the packj,et but since there's nothing there tail == data 1951 */ 1952 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data); 1953 1954 /* This is fair since the structure is static and we have the next address */ 1955 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]); 1956 1957 } 1958 1959 /* 1960 * Sets end of ring 1961 */ 1962 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */ 1963 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus (&sc->lmc_rxring[0]); /* Point back to the start */ 1964 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */ 1965 1966 1967 /* Initialize the transmit rings and buffers */ 1968 for (i = 0; i < LMC_TXDESCS; i++) 1969 { 1970 if (sc->lmc_txq[i] != NULL){ /* have buffer */ 1971 dev_kfree_skb(sc->lmc_txq[i]); /* free it */ 1972 sc->stats.tx_dropped++; /* We just dropped a packet */ 1973 } 1974 sc->lmc_txq[i] = NULL; 1975 sc->lmc_txring[i].status = 0x00000000; 1976 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]); 1977 } 1978 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]); 1979 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring)); 1980 1981 lmc_trace(sc->lmc_device, "lmc_softreset out"); 1982} 1983 1984void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/ 1985{ 1986 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in"); 1987 sc->lmc_gpio_io &= ~bits; 1988 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io)); 1989 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out"); 1990} 1991 1992void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/ 1993{ 1994 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in"); 1995 sc->lmc_gpio_io |= bits; 1996 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io)); 1997 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out"); 1998} 1999 2000void lmc_led_on(lmc_softc_t * const sc, u_int32_t led) /*fold00*/ 2001{ 2002 lmc_trace(sc->lmc_device, "lmc_led_on in"); 2003 if((~sc->lmc_miireg16) & led){ /* Already on! */ 2004 lmc_trace(sc->lmc_device, "lmc_led_on aon out"); 2005 return; 2006 } 2007 2008 sc->lmc_miireg16 &= ~led; 2009 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 2010 lmc_trace(sc->lmc_device, "lmc_led_on out"); 2011} 2012 2013void lmc_led_off(lmc_softc_t * const sc, u_int32_t led) /*fold00*/ 2014{ 2015 lmc_trace(sc->lmc_device, "lmc_led_off in"); 2016 if(sc->lmc_miireg16 & led){ /* Already set don't do anything */ 2017 lmc_trace(sc->lmc_device, "lmc_led_off aoff out"); 2018 return; 2019 } 2020 2021 sc->lmc_miireg16 |= led; 2022 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 2023 lmc_trace(sc->lmc_device, "lmc_led_off out"); 2024} 2025 2026static void lmc_reset(lmc_softc_t * const sc) /*fold00*/ 2027{ 2028 lmc_trace(sc->lmc_device, "lmc_reset in"); 2029 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET; 2030 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 2031 2032 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET; 2033 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 2034 2035 /* 2036 * make some of the GPIO pins be outputs 2037 */ 2038 lmc_gpio_mkoutput(sc, LMC_GEP_RESET); 2039 2040 /* 2041 * RESET low to force state reset. This also forces 2042 * the transmitter clock to be internal, but we expect to reset 2043 * that later anyway. 2044 */ 2045 sc->lmc_gpio &= ~(LMC_GEP_RESET); 2046 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 2047 2048 /* 2049 * hold for more than 10 microseconds 2050 */ 2051 udelay(50); 2052 2053 /* 2054 * stop driving Xilinx-related signals 2055 */ 2056 lmc_gpio_mkinput(sc, LMC_GEP_RESET); 2057 2058 /* 2059 * Call media specific init routine 2060 */ 2061 sc->lmc_media->init(sc); 2062 2063 sc->stats.resetCount++; 2064 lmc_trace(sc->lmc_device, "lmc_reset out"); 2065} 2066 2067static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/ 2068{ 2069 u_int32_t val; 2070 lmc_trace(sc->lmc_device, "lmc_dec_reset in"); 2071 2072 /* 2073 * disable all interrupts 2074 */ 2075 sc->lmc_intrmask = 0; 2076 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask); 2077 2078 /* 2079 * Reset the chip with a software reset command. 2080 * Wait 10 microseconds (actually 50 PCI cycles but at 2081 * 33MHz that comes to two microseconds but wait a 2082 * bit longer anyways) 2083 */ 2084 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET); 2085 udelay(25); 2086#ifdef __sparc__ 2087 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode); 2088 sc->lmc_busmode = 0x00100000; 2089 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET; 2090 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode); 2091#endif 2092 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command); 2093 2094 /* 2095 * We want: 2096 * no ethernet address in frames we write 2097 * disable padding (txdesc, padding disable) 2098 * ignore runt frames (rdes0 bit 15) 2099 * no receiver watchdog or transmitter jabber timer 2100 * (csr15 bit 0,14 == 1) 2101 * if using 16-bit CRC, turn off CRC (trans desc, crc disable) 2102 */ 2103 2104 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS 2105 | TULIP_CMD_FULLDUPLEX 2106 | TULIP_CMD_PASSBADPKT 2107 | TULIP_CMD_NOHEARTBEAT 2108 | TULIP_CMD_PORTSELECT 2109 | TULIP_CMD_RECEIVEALL 2110 | TULIP_CMD_MUSTBEONE 2111 ); 2112 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE 2113 | TULIP_CMD_THRESHOLDCTL 2114 | TULIP_CMD_STOREFWD 2115 | TULIP_CMD_TXTHRSHLDCTL 2116 ); 2117 2118 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode); 2119 2120 /* 2121 * disable receiver watchdog and transmit jabber 2122 */ 2123 val = LMC_CSR_READ(sc, csr_sia_general); 2124 val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE); 2125 LMC_CSR_WRITE(sc, csr_sia_general, val); 2126 2127 lmc_trace(sc->lmc_device, "lmc_dec_reset out"); 2128} 2129 2130static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/ 2131 size_t csr_size) 2132{ 2133 lmc_trace(sc->lmc_device, "lmc_initcsrs in"); 2134 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size; 2135 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size; 2136 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size; 2137 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size; 2138 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size; 2139 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size; 2140 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size; 2141 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size; 2142 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size; 2143 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size; 2144 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size; 2145 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size; 2146 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size; 2147 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size; 2148 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size; 2149 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size; 2150 lmc_trace(sc->lmc_device, "lmc_initcsrs out"); 2151} 2152 2153static void lmc_driver_timeout(struct net_device *dev) { /*fold00*/ 2154 lmc_softc_t *sc; 2155 u32 csr6; 2156 unsigned long flags; 2157 2158 lmc_trace(dev, "lmc_driver_timeout in"); 2159 2160 sc = dev->priv; 2161 2162 spin_lock_irqsave(&sc->lmc_lock, flags); 2163 2164 printk("%s: Xmitter busy|\n", dev->name); 2165 2166 sc->stats.tx_tbusy_calls++ ; 2167 if (jiffies - dev->trans_start < TX_TIMEOUT) { 2168 goto bug_out; 2169 } 2170 2171 /* 2172 * Chip seems to have locked up 2173 * Reset it 2174 * This whips out all our decriptor 2175 * table and starts from scartch 2176 */ 2177 2178 LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO, 2179 LMC_CSR_READ (sc, csr_status), 2180 sc->stats.tx_ProcTimeout); 2181 2182 lmc_running_reset (dev); 2183 2184 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 2185 LMC_EVENT_LOG(LMC_EVENT_RESET2, 2186 lmc_mii_readreg (sc, 0, 16), 2187 lmc_mii_readreg (sc, 0, 17)); 2188 2189 /* restart the tx processes */ 2190 csr6 = LMC_CSR_READ (sc, csr_command); 2191 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002); 2192 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002); 2193 2194 /* immediate transmit */ 2195 LMC_CSR_WRITE (sc, csr_txpoll, 0); 2196 2197 sc->stats.tx_errors++; 2198 sc->stats.tx_ProcTimeout++; /* -baz */ 2199 2200 dev->trans_start = jiffies; 2201 2202bug_out: 2203 2204 spin_unlock_irqrestore(&sc->lmc_lock, flags); 2205 2206 lmc_trace(dev, "lmc_driver_timout out"); 2207 2208 2209} 2210