lmc_main.c revision 64bef7630ad5b0ccfdd73973e95cf7b7e39224d0
1 /* 2 * Copyright (c) 1997-2000 LAN Media Corporation (LMC) 3 * All rights reserved. www.lanmedia.com 4 * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl> 5 * 6 * This code is written by: 7 * Andrew Stanley-Jones (asj@cban.com) 8 * Rob Braun (bbraun@vix.com), 9 * Michael Graff (explorer@vix.com) and 10 * Matt Thomas (matt@3am-software.com). 11 * 12 * With Help By: 13 * David Boggs 14 * Ron Crane 15 * Alan Cox 16 * 17 * This software may be used and distributed according to the terms 18 * of the GNU General Public License version 2, incorporated herein by reference. 19 * 20 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards. 21 * 22 * To control link specific options lmcctl is required. 23 * It can be obtained from ftp.lanmedia.com. 24 * 25 * Linux driver notes: 26 * Linux uses the device struct lmc_private to pass private information 27 * arround. 28 * 29 * The initialization portion of this driver (the lmc_reset() and the 30 * lmc_dec_reset() functions, as well as the led controls and the 31 * lmc_initcsrs() functions. 32 * 33 * The watchdog function runs every second and checks to see if 34 * we still have link, and that the timing source is what we expected 35 * it to be. If link is lost, the interface is marked down, and 36 * we no longer can transmit. 37 * 38 */ 39 40#include <linux/kernel.h> 41#include <linux/module.h> 42#include <linux/string.h> 43#include <linux/timer.h> 44#include <linux/ptrace.h> 45#include <linux/errno.h> 46#include <linux/ioport.h> 47#include <linux/slab.h> 48#include <linux/interrupt.h> 49#include <linux/pci.h> 50#include <linux/delay.h> 51#include <linux/hdlc.h> 52#include <linux/init.h> 53#include <linux/in.h> 54#include <linux/if_arp.h> 55#include <linux/netdevice.h> 56#include <linux/etherdevice.h> 57#include <linux/skbuff.h> 58#include <linux/inet.h> 59#include <linux/bitops.h> 60#include <asm/processor.h> /* Processor type for cache alignment. */ 61#include <asm/io.h> 62#include <asm/dma.h> 63#include <asm/uaccess.h> 64//#include <asm/spinlock.h> 65 66#define DRIVER_MAJOR_VERSION 1 67#define DRIVER_MINOR_VERSION 34 68#define DRIVER_SUB_VERSION 0 69 70#define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION) 71 72#include "lmc.h" 73#include "lmc_var.h" 74#include "lmc_ioctl.h" 75#include "lmc_debug.h" 76#include "lmc_proto.h" 77 78static int LMC_PKT_BUF_SZ = 1542; 79 80static struct pci_device_id lmc_pci_tbl[] = { 81 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST, 82 PCI_VENDOR_ID_LMC, PCI_ANY_ID }, 83 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST, 84 PCI_ANY_ID, PCI_VENDOR_ID_LMC }, 85 { 0 } 86}; 87 88MODULE_DEVICE_TABLE(pci, lmc_pci_tbl); 89MODULE_LICENSE("GPL v2"); 90 91 92static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev); 93static int lmc_rx (struct net_device *dev); 94static int lmc_open(struct net_device *dev); 95static int lmc_close(struct net_device *dev); 96static struct net_device_stats *lmc_get_stats(struct net_device *dev); 97static irqreturn_t lmc_interrupt(int irq, void *dev_instance); 98static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size); 99static void lmc_softreset(lmc_softc_t * const); 100static void lmc_running_reset(struct net_device *dev); 101static int lmc_ifdown(struct net_device * const); 102static void lmc_watchdog(unsigned long data); 103static void lmc_reset(lmc_softc_t * const sc); 104static void lmc_dec_reset(lmc_softc_t * const sc); 105static void lmc_driver_timeout(struct net_device *dev); 106 107/* 108 * linux reserves 16 device specific IOCTLs. We call them 109 * LMCIOC* to control various bits of our world. 110 */ 111int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/ 112{ 113 lmc_softc_t *sc = dev_to_sc(dev); 114 lmc_ctl_t ctl; 115 int ret = -EOPNOTSUPP; 116 u16 regVal; 117 unsigned long flags; 118 119 lmc_trace(dev, "lmc_ioctl in"); 120 121 /* 122 * Most functions mess with the structure 123 * Disable interrupts while we do the polling 124 */ 125 spin_lock_irqsave(&sc->lmc_lock, flags); 126 127 switch (cmd) { 128 /* 129 * Return current driver state. Since we keep this up 130 * To date internally, just copy this out to the user. 131 */ 132 case LMCIOCGINFO: /*fold01*/ 133 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t))) 134 ret = -EFAULT; 135 else 136 ret = 0; 137 break; 138 139 case LMCIOCSINFO: /*fold01*/ 140 if (!capable(CAP_NET_ADMIN)) { 141 ret = -EPERM; 142 break; 143 } 144 145 if(dev->flags & IFF_UP){ 146 ret = -EBUSY; 147 break; 148 } 149 150 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) { 151 ret = -EFAULT; 152 break; 153 } 154 155 sc->lmc_media->set_status (sc, &ctl); 156 157 if(ctl.crc_length != sc->ictl.crc_length) { 158 sc->lmc_media->set_crc_length(sc, ctl.crc_length); 159 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) 160 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE; 161 else 162 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE; 163 } 164 165 ret = 0; 166 break; 167 168 case LMCIOCIFTYPE: /*fold01*/ 169 { 170 u16 old_type = sc->if_type; 171 u16 new_type; 172 173 if (!capable(CAP_NET_ADMIN)) { 174 ret = -EPERM; 175 break; 176 } 177 178 if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) { 179 ret = -EFAULT; 180 break; 181 } 182 183 184 if (new_type == old_type) 185 { 186 ret = 0 ; 187 break; /* no change */ 188 } 189 190 lmc_proto_close(sc); 191 192 sc->if_type = new_type; 193 lmc_proto_attach(sc); 194 ret = lmc_proto_open(sc); 195 break; 196 } 197 198 case LMCIOCGETXINFO: /*fold01*/ 199 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE; 200 201 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype; 202 sc->lmc_xinfo.PciSlotNumber = 0; 203 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION; 204 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION; 205 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION; 206 sc->lmc_xinfo.XilinxRevisionNumber = 207 lmc_mii_readreg (sc, 0, 3) & 0xf; 208 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ; 209 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc); 210 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16); 211 212 sc->lmc_xinfo.Magic1 = 0xDEADBEEF; 213 214 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo, 215 sizeof(struct lmc_xinfo))) 216 ret = -EFAULT; 217 else 218 ret = 0; 219 220 break; 221 222 case LMCIOCGETLMCSTATS: 223 if (sc->lmc_cardtype == LMC_CARDTYPE_T1) { 224 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB); 225 sc->extra_stats.framingBitErrorCount += 226 lmc_mii_readreg(sc, 0, 18) & 0xff; 227 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB); 228 sc->extra_stats.framingBitErrorCount += 229 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8; 230 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB); 231 sc->extra_stats.lineCodeViolationCount += 232 lmc_mii_readreg(sc, 0, 18) & 0xff; 233 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB); 234 sc->extra_stats.lineCodeViolationCount += 235 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8; 236 lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR); 237 regVal = lmc_mii_readreg(sc, 0, 18) & 0xff; 238 239 sc->extra_stats.lossOfFrameCount += 240 (regVal & T1FRAMER_LOF_MASK) >> 4; 241 sc->extra_stats.changeOfFrameAlignmentCount += 242 (regVal & T1FRAMER_COFA_MASK) >> 2; 243 sc->extra_stats.severelyErroredFrameCount += 244 regVal & T1FRAMER_SEF_MASK; 245 } 246 if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats, 247 sizeof(sc->lmc_device->stats)) || 248 copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats), 249 &sc->extra_stats, sizeof(sc->extra_stats))) 250 ret = -EFAULT; 251 else 252 ret = 0; 253 break; 254 255 case LMCIOCCLEARLMCSTATS: 256 if (!capable(CAP_NET_ADMIN)) { 257 ret = -EPERM; 258 break; 259 } 260 261 memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats)); 262 memset(&sc->extra_stats, 0, sizeof(sc->extra_stats)); 263 sc->extra_stats.check = STATCHECK; 264 sc->extra_stats.version_size = (DRIVER_VERSION << 16) + 265 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats); 266 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype; 267 ret = 0; 268 break; 269 270 case LMCIOCSETCIRCUIT: /*fold01*/ 271 if (!capable(CAP_NET_ADMIN)){ 272 ret = -EPERM; 273 break; 274 } 275 276 if(dev->flags & IFF_UP){ 277 ret = -EBUSY; 278 break; 279 } 280 281 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) { 282 ret = -EFAULT; 283 break; 284 } 285 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type); 286 sc->ictl.circuit_type = ctl.circuit_type; 287 ret = 0; 288 289 break; 290 291 case LMCIOCRESET: /*fold01*/ 292 if (!capable(CAP_NET_ADMIN)){ 293 ret = -EPERM; 294 break; 295 } 296 297 /* Reset driver and bring back to current state */ 298 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16)); 299 lmc_running_reset (dev); 300 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16)); 301 302 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16)); 303 304 ret = 0; 305 break; 306 307#ifdef DEBUG 308 case LMCIOCDUMPEVENTLOG: 309 if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) { 310 ret = -EFAULT; 311 break; 312 } 313 if (copy_to_user(ifr->ifr_data + sizeof (u32), lmcEventLogBuf, sizeof (lmcEventLogBuf))) 314 ret = -EFAULT; 315 else 316 ret = 0; 317 318 break; 319#endif /* end ifdef _DBG_EVENTLOG */ 320 case LMCIOCT1CONTROL: /*fold01*/ 321 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){ 322 ret = -EOPNOTSUPP; 323 break; 324 } 325 break; 326 case LMCIOCXILINX: /*fold01*/ 327 { 328 struct lmc_xilinx_control xc; /*fold02*/ 329 330 if (!capable(CAP_NET_ADMIN)){ 331 ret = -EPERM; 332 break; 333 } 334 335 /* 336 * Stop the xwitter whlie we restart the hardware 337 */ 338 netif_stop_queue(dev); 339 340 if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) { 341 ret = -EFAULT; 342 break; 343 } 344 switch(xc.command){ 345 case lmc_xilinx_reset: /*fold02*/ 346 { 347 u16 mii; 348 mii = lmc_mii_readreg (sc, 0, 16); 349 350 /* 351 * Make all of them 0 and make input 352 */ 353 lmc_gpio_mkinput(sc, 0xff); 354 355 /* 356 * make the reset output 357 */ 358 lmc_gpio_mkoutput(sc, LMC_GEP_RESET); 359 360 /* 361 * RESET low to force configuration. This also forces 362 * the transmitter clock to be internal, but we expect to reset 363 * that later anyway. 364 */ 365 366 sc->lmc_gpio &= ~LMC_GEP_RESET; 367 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 368 369 370 /* 371 * hold for more than 10 microseconds 372 */ 373 udelay(50); 374 375 sc->lmc_gpio |= LMC_GEP_RESET; 376 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 377 378 379 /* 380 * stop driving Xilinx-related signals 381 */ 382 lmc_gpio_mkinput(sc, 0xff); 383 384 /* Reset the frammer hardware */ 385 sc->lmc_media->set_link_status (sc, 1); 386 sc->lmc_media->set_status (sc, NULL); 387// lmc_softreset(sc); 388 389 { 390 int i; 391 for(i = 0; i < 5; i++){ 392 lmc_led_on(sc, LMC_DS3_LED0); 393 mdelay(100); 394 lmc_led_off(sc, LMC_DS3_LED0); 395 lmc_led_on(sc, LMC_DS3_LED1); 396 mdelay(100); 397 lmc_led_off(sc, LMC_DS3_LED1); 398 lmc_led_on(sc, LMC_DS3_LED3); 399 mdelay(100); 400 lmc_led_off(sc, LMC_DS3_LED3); 401 lmc_led_on(sc, LMC_DS3_LED2); 402 mdelay(100); 403 lmc_led_off(sc, LMC_DS3_LED2); 404 } 405 } 406 407 408 409 ret = 0x0; 410 411 } 412 413 break; 414 case lmc_xilinx_load_prom: /*fold02*/ 415 { 416 u16 mii; 417 int timeout = 500000; 418 mii = lmc_mii_readreg (sc, 0, 16); 419 420 /* 421 * Make all of them 0 and make input 422 */ 423 lmc_gpio_mkinput(sc, 0xff); 424 425 /* 426 * make the reset output 427 */ 428 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET); 429 430 /* 431 * RESET low to force configuration. This also forces 432 * the transmitter clock to be internal, but we expect to reset 433 * that later anyway. 434 */ 435 436 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP); 437 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 438 439 440 /* 441 * hold for more than 10 microseconds 442 */ 443 udelay(50); 444 445 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET; 446 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 447 448 /* 449 * busy wait for the chip to reset 450 */ 451 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 && 452 (timeout-- > 0)) 453 ; 454 455 456 /* 457 * stop driving Xilinx-related signals 458 */ 459 lmc_gpio_mkinput(sc, 0xff); 460 461 ret = 0x0; 462 463 464 break; 465 466 } 467 468 case lmc_xilinx_load: /*fold02*/ 469 { 470 char *data; 471 int pos; 472 int timeout = 500000; 473 474 if (!xc.data) { 475 ret = -EINVAL; 476 break; 477 } 478 479 data = kmalloc(xc.len, GFP_KERNEL); 480 if (!data) { 481 printk(KERN_WARNING "%s: Failed to allocate memory for copy\n", dev->name); 482 ret = -ENOMEM; 483 break; 484 } 485 486 if(copy_from_user(data, xc.data, xc.len)) 487 { 488 kfree(data); 489 ret = -ENOMEM; 490 break; 491 } 492 493 printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data); 494 495 lmc_gpio_mkinput(sc, 0xff); 496 497 /* 498 * Clear the Xilinx and start prgramming from the DEC 499 */ 500 501 /* 502 * Set ouput as: 503 * Reset: 0 (active) 504 * DP: 0 (active) 505 * Mode: 1 506 * 507 */ 508 sc->lmc_gpio = 0x00; 509 sc->lmc_gpio &= ~LMC_GEP_DP; 510 sc->lmc_gpio &= ~LMC_GEP_RESET; 511 sc->lmc_gpio |= LMC_GEP_MODE; 512 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 513 514 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET); 515 516 /* 517 * Wait at least 10 us 20 to be safe 518 */ 519 udelay(50); 520 521 /* 522 * Clear reset and activate programming lines 523 * Reset: Input 524 * DP: Input 525 * Clock: Output 526 * Data: Output 527 * Mode: Output 528 */ 529 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET); 530 531 /* 532 * Set LOAD, DATA, Clock to 1 533 */ 534 sc->lmc_gpio = 0x00; 535 sc->lmc_gpio |= LMC_GEP_MODE; 536 sc->lmc_gpio |= LMC_GEP_DATA; 537 sc->lmc_gpio |= LMC_GEP_CLK; 538 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 539 540 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE ); 541 542 /* 543 * busy wait for the chip to reset 544 */ 545 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 && 546 (timeout-- > 0)) 547 ; 548 549 printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout); 550 551 for(pos = 0; pos < xc.len; pos++){ 552 switch(data[pos]){ 553 case 0: 554 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */ 555 break; 556 case 1: 557 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */ 558 break; 559 default: 560 printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]); 561 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */ 562 } 563 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */ 564 sc->lmc_gpio |= LMC_GEP_MODE; 565 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 566 udelay(1); 567 568 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */ 569 sc->lmc_gpio |= LMC_GEP_MODE; 570 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 571 udelay(1); 572 } 573 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){ 574 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name); 575 } 576 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){ 577 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name); 578 } 579 else { 580 printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos); 581 } 582 583 lmc_gpio_mkinput(sc, 0xff); 584 585 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET; 586 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 587 588 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET; 589 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 590 591 kfree(data); 592 593 ret = 0; 594 595 break; 596 } 597 default: /*fold02*/ 598 ret = -EBADE; 599 break; 600 } 601 602 netif_wake_queue(dev); 603 sc->lmc_txfull = 0; 604 605 } 606 break; 607 default: /*fold01*/ 608 /* If we don't know what to do, give the protocol a shot. */ 609 ret = lmc_proto_ioctl (sc, ifr, cmd); 610 break; 611 } 612 613 spin_unlock_irqrestore(&sc->lmc_lock, flags); /*fold01*/ 614 615 lmc_trace(dev, "lmc_ioctl out"); 616 617 return ret; 618} 619 620 621/* the watchdog process that cruises around */ 622static void lmc_watchdog (unsigned long data) /*fold00*/ 623{ 624 struct net_device *dev = (struct net_device *)data; 625 lmc_softc_t *sc = dev_to_sc(dev); 626 int link_status; 627 u_int32_t ticks; 628 unsigned long flags; 629 630 lmc_trace(dev, "lmc_watchdog in"); 631 632 spin_lock_irqsave(&sc->lmc_lock, flags); 633 634 if(sc->check != 0xBEAFCAFE){ 635 printk("LMC: Corrupt net_device struct, breaking out\n"); 636 spin_unlock_irqrestore(&sc->lmc_lock, flags); 637 return; 638 } 639 640 641 /* Make sure the tx jabber and rx watchdog are off, 642 * and the transmit and receive processes are running. 643 */ 644 645 LMC_CSR_WRITE (sc, csr_15, 0x00000011); 646 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN; 647 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 648 649 if (sc->lmc_ok == 0) 650 goto kick_timer; 651 652 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16)); 653 654 /* --- begin time out check ----------------------------------- 655 * check for a transmit interrupt timeout 656 * Has the packet xmt vs xmt serviced threshold been exceeded */ 657 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx && 658 sc->lmc_device->stats.tx_packets > sc->lasttx_packets && 659 sc->tx_TimeoutInd == 0) 660 { 661 662 /* wait for the watchdog to come around again */ 663 sc->tx_TimeoutInd = 1; 664 } 665 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx && 666 sc->lmc_device->stats.tx_packets > sc->lasttx_packets && 667 sc->tx_TimeoutInd) 668 { 669 670 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0); 671 672 sc->tx_TimeoutDisplay = 1; 673 sc->extra_stats.tx_TimeoutCnt++; 674 675 /* DEC chip is stuck, hit it with a RESET!!!! */ 676 lmc_running_reset (dev); 677 678 679 /* look at receive & transmit process state to make sure they are running */ 680 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 681 682 /* look at: DSR - 02 for Reg 16 683 * CTS - 08 684 * DCD - 10 685 * RI - 20 686 * for Reg 17 687 */ 688 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17)); 689 690 /* reset the transmit timeout detection flag */ 691 sc->tx_TimeoutInd = 0; 692 sc->lastlmc_taint_tx = sc->lmc_taint_tx; 693 sc->lasttx_packets = sc->lmc_device->stats.tx_packets; 694 } else { 695 sc->tx_TimeoutInd = 0; 696 sc->lastlmc_taint_tx = sc->lmc_taint_tx; 697 sc->lasttx_packets = sc->lmc_device->stats.tx_packets; 698 } 699 700 /* --- end time out check ----------------------------------- */ 701 702 703 link_status = sc->lmc_media->get_link_status (sc); 704 705 /* 706 * hardware level link lost, but the interface is marked as up. 707 * Mark it as down. 708 */ 709 if ((link_status == 0) && (sc->last_link_status != 0)) { 710 printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name); 711 sc->last_link_status = 0; 712 /* lmc_reset (sc); Why reset??? The link can go down ok */ 713 714 /* Inform the world that link has been lost */ 715 netif_carrier_off(dev); 716 } 717 718 /* 719 * hardware link is up, but the interface is marked as down. 720 * Bring it back up again. 721 */ 722 if (link_status != 0 && sc->last_link_status == 0) { 723 printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name); 724 sc->last_link_status = 1; 725 /* lmc_reset (sc); Again why reset??? */ 726 727 netif_carrier_on(dev); 728 } 729 730 /* Call media specific watchdog functions */ 731 sc->lmc_media->watchdog(sc); 732 733 /* 734 * Poke the transmitter to make sure it 735 * never stops, even if we run out of mem 736 */ 737 LMC_CSR_WRITE(sc, csr_rxpoll, 0); 738 739 /* 740 * Check for code that failed 741 * and try and fix it as appropriate 742 */ 743 if(sc->failed_ring == 1){ 744 /* 745 * Failed to setup the recv/xmit rin 746 * Try again 747 */ 748 sc->failed_ring = 0; 749 lmc_softreset(sc); 750 } 751 if(sc->failed_recv_alloc == 1){ 752 /* 753 * We failed to alloc mem in the 754 * interrupt handler, go through the rings 755 * and rebuild them 756 */ 757 sc->failed_recv_alloc = 0; 758 lmc_softreset(sc); 759 } 760 761 762 /* 763 * remember the timer value 764 */ 765kick_timer: 766 767 ticks = LMC_CSR_READ (sc, csr_gp_timer); 768 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL); 769 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff); 770 771 /* 772 * restart this timer. 773 */ 774 sc->timer.expires = jiffies + (HZ); 775 add_timer (&sc->timer); 776 777 spin_unlock_irqrestore(&sc->lmc_lock, flags); 778 779 lmc_trace(dev, "lmc_watchdog out"); 780 781} 782 783static int lmc_attach(struct net_device *dev, unsigned short encoding, 784 unsigned short parity) 785{ 786 if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT) 787 return 0; 788 return -EINVAL; 789} 790 791static int __devinit lmc_init_one(struct pci_dev *pdev, 792 const struct pci_device_id *ent) 793{ 794 lmc_softc_t *sc; 795 struct net_device *dev; 796 u16 subdevice; 797 u16 AdapModelNum; 798 int err; 799 static int cards_found; 800 801 /* lmc_trace(dev, "lmc_init_one in"); */ 802 803 err = pci_enable_device(pdev); 804 if (err) { 805 printk(KERN_ERR "lmc: pci enable failed: %d\n", err); 806 return err; 807 } 808 809 err = pci_request_regions(pdev, "lmc"); 810 if (err) { 811 printk(KERN_ERR "lmc: pci_request_region failed\n"); 812 goto err_req_io; 813 } 814 815 /* 816 * Allocate our own device structure 817 */ 818 sc = kzalloc(sizeof(lmc_softc_t), GFP_KERNEL); 819 if (!sc) { 820 err = -ENOMEM; 821 goto err_kzalloc; 822 } 823 824 dev = alloc_hdlcdev(sc); 825 if (!dev) { 826 printk(KERN_ERR "lmc:alloc_netdev for device failed\n"); 827 goto err_hdlcdev; 828 } 829 830 831 dev->type = ARPHRD_HDLC; 832 dev_to_hdlc(dev)->xmit = lmc_start_xmit; 833 dev_to_hdlc(dev)->attach = lmc_attach; 834 dev->open = lmc_open; 835 dev->stop = lmc_close; 836 dev->get_stats = lmc_get_stats; 837 dev->do_ioctl = lmc_ioctl; 838 dev->tx_timeout = lmc_driver_timeout; 839 dev->watchdog_timeo = HZ; /* 1 second */ 840 dev->tx_queue_len = 100; 841 sc->lmc_device = dev; 842 sc->name = dev->name; 843 sc->if_type = LMC_PPP; 844 sc->check = 0xBEAFCAFE; 845 dev->base_addr = pci_resource_start(pdev, 0); 846 dev->irq = pdev->irq; 847 pci_set_drvdata(pdev, dev); 848 SET_NETDEV_DEV(dev, &pdev->dev); 849 850 /* 851 * This will get the protocol layer ready and do any 1 time init's 852 * Must have a valid sc and dev structure 853 */ 854 lmc_proto_attach(sc); 855 856 /* Init the spin lock so can call it latter */ 857 858 spin_lock_init(&sc->lmc_lock); 859 pci_set_master(pdev); 860 861 printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name, 862 dev->base_addr, dev->irq); 863 864 err = register_hdlc_device(dev); 865 if (err) { 866 printk(KERN_ERR "%s: register_netdev failed.\n", dev->name); 867 free_netdev(dev); 868 goto err_hdlcdev; 869 } 870 871 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN; 872 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; 873 874 /* 875 * 876 * Check either the subvendor or the subdevice, some systems reverse 877 * the setting in the bois, seems to be version and arch dependent? 878 * Fix the error, exchange the two values 879 */ 880 if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC) 881 subdevice = pdev->subsystem_vendor; 882 883 switch (subdevice) { 884 case PCI_DEVICE_ID_LMC_HSSI: 885 printk(KERN_INFO "%s: LMC HSSI\n", dev->name); 886 sc->lmc_cardtype = LMC_CARDTYPE_HSSI; 887 sc->lmc_media = &lmc_hssi_media; 888 break; 889 case PCI_DEVICE_ID_LMC_DS3: 890 printk(KERN_INFO "%s: LMC DS3\n", dev->name); 891 sc->lmc_cardtype = LMC_CARDTYPE_DS3; 892 sc->lmc_media = &lmc_ds3_media; 893 break; 894 case PCI_DEVICE_ID_LMC_SSI: 895 printk(KERN_INFO "%s: LMC SSI\n", dev->name); 896 sc->lmc_cardtype = LMC_CARDTYPE_SSI; 897 sc->lmc_media = &lmc_ssi_media; 898 break; 899 case PCI_DEVICE_ID_LMC_T1: 900 printk(KERN_INFO "%s: LMC T1\n", dev->name); 901 sc->lmc_cardtype = LMC_CARDTYPE_T1; 902 sc->lmc_media = &lmc_t1_media; 903 break; 904 default: 905 printk(KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name); 906 break; 907 } 908 909 lmc_initcsrs (sc, dev->base_addr, 8); 910 911 lmc_gpio_mkinput (sc, 0xff); 912 sc->lmc_gpio = 0; /* drive no signals yet */ 913 914 sc->lmc_media->defaults (sc); 915 916 sc->lmc_media->set_link_status (sc, LMC_LINK_UP); 917 918 /* verify that the PCI Sub System ID matches the Adapter Model number 919 * from the MII register 920 */ 921 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4; 922 923 if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */ 924 subdevice != PCI_DEVICE_ID_LMC_T1) && 925 (AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */ 926 subdevice != PCI_DEVICE_ID_LMC_SSI) && 927 (AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */ 928 subdevice != PCI_DEVICE_ID_LMC_DS3) && 929 (AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */ 930 subdevice != PCI_DEVICE_ID_LMC_HSSI)) 931 printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI" 932 " Subsystem ID = 0x%04x\n", 933 dev->name, AdapModelNum, subdevice); 934 935 /* 936 * reset clock 937 */ 938 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL); 939 940 sc->board_idx = cards_found++; 941 sc->extra_stats.check = STATCHECK; 942 sc->extra_stats.version_size = (DRIVER_VERSION << 16) + 943 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats); 944 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype; 945 946 sc->lmc_ok = 0; 947 sc->last_link_status = 0; 948 949 lmc_trace(dev, "lmc_init_one out"); 950 return 0; 951 952err_hdlcdev: 953 pci_set_drvdata(pdev, NULL); 954 kfree(sc); 955err_kzalloc: 956 pci_release_regions(pdev); 957err_req_io: 958 pci_disable_device(pdev); 959 return err; 960} 961 962/* 963 * Called from pci when removing module. 964 */ 965static void __devexit lmc_remove_one(struct pci_dev *pdev) 966{ 967 struct net_device *dev = pci_get_drvdata(pdev); 968 969 if (dev) { 970 printk(KERN_DEBUG "%s: removing...\n", dev->name); 971 unregister_hdlc_device(dev); 972 free_netdev(dev); 973 pci_release_regions(pdev); 974 pci_disable_device(pdev); 975 pci_set_drvdata(pdev, NULL); 976 } 977} 978 979/* After this is called, packets can be sent. 980 * Does not initialize the addresses 981 */ 982static int lmc_open(struct net_device *dev) 983{ 984 lmc_softc_t *sc = dev_to_sc(dev); 985 int err; 986 987 lmc_trace(dev, "lmc_open in"); 988 989 lmc_led_on(sc, LMC_DS3_LED0); 990 991 lmc_dec_reset(sc); 992 lmc_reset(sc); 993 994 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0); 995 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16), 996 lmc_mii_readreg(sc, 0, 17)); 997 998 if (sc->lmc_ok){ 999 lmc_trace(dev, "lmc_open lmc_ok out"); 1000 return (0); 1001 } 1002 1003 lmc_softreset (sc); 1004 1005 /* Since we have to use PCI bus, this should work on x86,alpha,ppc */ 1006 if (request_irq (dev->irq, &lmc_interrupt, IRQF_SHARED, dev->name, dev)){ 1007 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq); 1008 lmc_trace(dev, "lmc_open irq failed out"); 1009 return -EAGAIN; 1010 } 1011 sc->got_irq = 1; 1012 1013 /* Assert Terminal Active */ 1014 sc->lmc_miireg16 |= LMC_MII16_LED_ALL; 1015 sc->lmc_media->set_link_status (sc, LMC_LINK_UP); 1016 1017 /* 1018 * reset to last state. 1019 */ 1020 sc->lmc_media->set_status (sc, NULL); 1021 1022 /* setup default bits to be used in tulip_desc_t transmit descriptor 1023 * -baz */ 1024 sc->TxDescriptControlInit = ( 1025 LMC_TDES_INTERRUPT_ON_COMPLETION 1026 | LMC_TDES_FIRST_SEGMENT 1027 | LMC_TDES_LAST_SEGMENT 1028 | LMC_TDES_SECOND_ADDR_CHAINED 1029 | LMC_TDES_DISABLE_PADDING 1030 ); 1031 1032 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) { 1033 /* disable 32 bit CRC generated by ASIC */ 1034 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE; 1035 } 1036 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length); 1037 /* Acknoledge the Terminal Active and light LEDs */ 1038 1039 /* dev->flags |= IFF_UP; */ 1040 1041 if ((err = lmc_proto_open(sc)) != 0) 1042 return err; 1043 1044 dev->do_ioctl = lmc_ioctl; 1045 1046 1047 netif_start_queue(dev); 1048 sc->extra_stats.tx_tbusy0++; 1049 1050 /* 1051 * select what interrupts we want to get 1052 */ 1053 sc->lmc_intrmask = 0; 1054 /* Should be using the default interrupt mask defined in the .h file. */ 1055 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR 1056 | TULIP_STS_RXINTR 1057 | TULIP_STS_TXINTR 1058 | TULIP_STS_ABNRMLINTR 1059 | TULIP_STS_SYSERROR 1060 | TULIP_STS_TXSTOPPED 1061 | TULIP_STS_TXUNDERFLOW 1062 | TULIP_STS_RXSTOPPED 1063 | TULIP_STS_RXNOBUF 1064 ); 1065 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask); 1066 1067 sc->lmc_cmdmode |= TULIP_CMD_TXRUN; 1068 sc->lmc_cmdmode |= TULIP_CMD_RXRUN; 1069 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 1070 1071 sc->lmc_ok = 1; /* Run watchdog */ 1072 1073 /* 1074 * Set the if up now - pfb 1075 */ 1076 1077 sc->last_link_status = 1; 1078 1079 /* 1080 * Setup a timer for the watchdog on probe, and start it running. 1081 * Since lmc_ok == 0, it will be a NOP for now. 1082 */ 1083 init_timer (&sc->timer); 1084 sc->timer.expires = jiffies + HZ; 1085 sc->timer.data = (unsigned long) dev; 1086 sc->timer.function = &lmc_watchdog; 1087 add_timer (&sc->timer); 1088 1089 lmc_trace(dev, "lmc_open out"); 1090 1091 return (0); 1092} 1093 1094/* Total reset to compensate for the AdTran DSU doing bad things 1095 * under heavy load 1096 */ 1097 1098static void lmc_running_reset (struct net_device *dev) /*fold00*/ 1099{ 1100 lmc_softc_t *sc = dev_to_sc(dev); 1101 1102 lmc_trace(dev, "lmc_runnig_reset in"); 1103 1104 /* stop interrupts */ 1105 /* Clear the interrupt mask */ 1106 LMC_CSR_WRITE (sc, csr_intr, 0x00000000); 1107 1108 lmc_dec_reset (sc); 1109 lmc_reset (sc); 1110 lmc_softreset (sc); 1111 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */ 1112 sc->lmc_media->set_link_status (sc, 1); 1113 sc->lmc_media->set_status (sc, NULL); 1114 1115 netif_wake_queue(dev); 1116 1117 sc->lmc_txfull = 0; 1118 sc->extra_stats.tx_tbusy0++; 1119 1120 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK; 1121 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask); 1122 1123 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN); 1124 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode); 1125 1126 lmc_trace(dev, "lmc_runnin_reset_out"); 1127} 1128 1129 1130/* This is what is called when you ifconfig down a device. 1131 * This disables the timer for the watchdog and keepalives, 1132 * and disables the irq for dev. 1133 */ 1134static int lmc_close(struct net_device *dev) 1135{ 1136 /* not calling release_region() as we should */ 1137 lmc_softc_t *sc = dev_to_sc(dev); 1138 1139 lmc_trace(dev, "lmc_close in"); 1140 1141 sc->lmc_ok = 0; 1142 sc->lmc_media->set_link_status (sc, 0); 1143 del_timer (&sc->timer); 1144 lmc_proto_close(sc); 1145 lmc_ifdown (dev); 1146 1147 lmc_trace(dev, "lmc_close out"); 1148 1149 return 0; 1150} 1151 1152/* Ends the transfer of packets */ 1153/* When the interface goes down, this is called */ 1154static int lmc_ifdown (struct net_device *dev) /*fold00*/ 1155{ 1156 lmc_softc_t *sc = dev_to_sc(dev); 1157 u32 csr6; 1158 int i; 1159 1160 lmc_trace(dev, "lmc_ifdown in"); 1161 1162 /* Don't let anything else go on right now */ 1163 // dev->start = 0; 1164 netif_stop_queue(dev); 1165 sc->extra_stats.tx_tbusy1++; 1166 1167 /* stop interrupts */ 1168 /* Clear the interrupt mask */ 1169 LMC_CSR_WRITE (sc, csr_intr, 0x00000000); 1170 1171 /* Stop Tx and Rx on the chip */ 1172 csr6 = LMC_CSR_READ (sc, csr_command); 1173 csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */ 1174 csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */ 1175 LMC_CSR_WRITE (sc, csr_command, csr6); 1176 1177 sc->lmc_device->stats.rx_missed_errors += 1178 LMC_CSR_READ(sc, csr_missed_frames) & 0xffff; 1179 1180 /* release the interrupt */ 1181 if(sc->got_irq == 1){ 1182 free_irq (dev->irq, dev); 1183 sc->got_irq = 0; 1184 } 1185 1186 /* free skbuffs in the Rx queue */ 1187 for (i = 0; i < LMC_RXDESCS; i++) 1188 { 1189 struct sk_buff *skb = sc->lmc_rxq[i]; 1190 sc->lmc_rxq[i] = NULL; 1191 sc->lmc_rxring[i].status = 0; 1192 sc->lmc_rxring[i].length = 0; 1193 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF; 1194 if (skb != NULL) 1195 dev_kfree_skb(skb); 1196 sc->lmc_rxq[i] = NULL; 1197 } 1198 1199 for (i = 0; i < LMC_TXDESCS; i++) 1200 { 1201 if (sc->lmc_txq[i] != NULL) 1202 dev_kfree_skb(sc->lmc_txq[i]); 1203 sc->lmc_txq[i] = NULL; 1204 } 1205 1206 lmc_led_off (sc, LMC_MII16_LED_ALL); 1207 1208 netif_wake_queue(dev); 1209 sc->extra_stats.tx_tbusy0++; 1210 1211 lmc_trace(dev, "lmc_ifdown out"); 1212 1213 return 0; 1214} 1215 1216/* Interrupt handling routine. This will take an incoming packet, or clean 1217 * up after a trasmit. 1218 */ 1219static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/ 1220{ 1221 struct net_device *dev = (struct net_device *) dev_instance; 1222 lmc_softc_t *sc = dev_to_sc(dev); 1223 u32 csr; 1224 int i; 1225 s32 stat; 1226 unsigned int badtx; 1227 u32 firstcsr; 1228 int max_work = LMC_RXDESCS; 1229 int handled = 0; 1230 1231 lmc_trace(dev, "lmc_interrupt in"); 1232 1233 spin_lock(&sc->lmc_lock); 1234 1235 /* 1236 * Read the csr to find what interrupts we have (if any) 1237 */ 1238 csr = LMC_CSR_READ (sc, csr_status); 1239 1240 /* 1241 * Make sure this is our interrupt 1242 */ 1243 if ( ! (csr & sc->lmc_intrmask)) { 1244 goto lmc_int_fail_out; 1245 } 1246 1247 firstcsr = csr; 1248 1249 /* always go through this loop at least once */ 1250 while (csr & sc->lmc_intrmask) { 1251 handled = 1; 1252 1253 /* 1254 * Clear interrupt bits, we handle all case below 1255 */ 1256 LMC_CSR_WRITE (sc, csr_status, csr); 1257 1258 /* 1259 * One of 1260 * - Transmit process timed out CSR5<1> 1261 * - Transmit jabber timeout CSR5<3> 1262 * - Transmit underflow CSR5<5> 1263 * - Transmit Receiver buffer unavailable CSR5<7> 1264 * - Receive process stopped CSR5<8> 1265 * - Receive watchdog timeout CSR5<9> 1266 * - Early transmit interrupt CSR5<10> 1267 * 1268 * Is this really right? Should we do a running reset for jabber? 1269 * (being a WAN card and all) 1270 */ 1271 if (csr & TULIP_STS_ABNRMLINTR){ 1272 lmc_running_reset (dev); 1273 break; 1274 } 1275 1276 if (csr & TULIP_STS_RXINTR){ 1277 lmc_trace(dev, "rx interrupt"); 1278 lmc_rx (dev); 1279 1280 } 1281 if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) { 1282 1283 int n_compl = 0 ; 1284 /* reset the transmit timeout detection flag -baz */ 1285 sc->extra_stats.tx_NoCompleteCnt = 0; 1286 1287 badtx = sc->lmc_taint_tx; 1288 i = badtx % LMC_TXDESCS; 1289 1290 while ((badtx < sc->lmc_next_tx)) { 1291 stat = sc->lmc_txring[i].status; 1292 1293 LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat, 1294 sc->lmc_txring[i].length); 1295 /* 1296 * If bit 31 is 1 the tulip owns it break out of the loop 1297 */ 1298 if (stat & 0x80000000) 1299 break; 1300 1301 n_compl++ ; /* i.e., have an empty slot in ring */ 1302 /* 1303 * If we have no skbuff or have cleared it 1304 * Already continue to the next buffer 1305 */ 1306 if (sc->lmc_txq[i] == NULL) 1307 continue; 1308 1309 /* 1310 * Check the total error summary to look for any errors 1311 */ 1312 if (stat & 0x8000) { 1313 sc->lmc_device->stats.tx_errors++; 1314 if (stat & 0x4104) 1315 sc->lmc_device->stats.tx_aborted_errors++; 1316 if (stat & 0x0C00) 1317 sc->lmc_device->stats.tx_carrier_errors++; 1318 if (stat & 0x0200) 1319 sc->lmc_device->stats.tx_window_errors++; 1320 if (stat & 0x0002) 1321 sc->lmc_device->stats.tx_fifo_errors++; 1322 } else { 1323 sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff; 1324 1325 sc->lmc_device->stats.tx_packets++; 1326 } 1327 1328 // dev_kfree_skb(sc->lmc_txq[i]); 1329 dev_kfree_skb_irq(sc->lmc_txq[i]); 1330 sc->lmc_txq[i] = NULL; 1331 1332 badtx++; 1333 i = badtx % LMC_TXDESCS; 1334 } 1335 1336 if (sc->lmc_next_tx - badtx > LMC_TXDESCS) 1337 { 1338 printk ("%s: out of sync pointer\n", dev->name); 1339 badtx += LMC_TXDESCS; 1340 } 1341 LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0); 1342 sc->lmc_txfull = 0; 1343 netif_wake_queue(dev); 1344 sc->extra_stats.tx_tbusy0++; 1345 1346 1347#ifdef DEBUG 1348 sc->extra_stats.dirtyTx = badtx; 1349 sc->extra_stats.lmc_next_tx = sc->lmc_next_tx; 1350 sc->extra_stats.lmc_txfull = sc->lmc_txfull; 1351#endif 1352 sc->lmc_taint_tx = badtx; 1353 1354 /* 1355 * Why was there a break here??? 1356 */ 1357 } /* end handle transmit interrupt */ 1358 1359 if (csr & TULIP_STS_SYSERROR) { 1360 u32 error; 1361 printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr); 1362 error = csr>>23 & 0x7; 1363 switch(error){ 1364 case 0x000: 1365 printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name); 1366 break; 1367 case 0x001: 1368 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name); 1369 break; 1370 case 0x010: 1371 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name); 1372 break; 1373 default: 1374 printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name); 1375 } 1376 lmc_dec_reset (sc); 1377 lmc_reset (sc); 1378 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 1379 LMC_EVENT_LOG(LMC_EVENT_RESET2, 1380 lmc_mii_readreg (sc, 0, 16), 1381 lmc_mii_readreg (sc, 0, 17)); 1382 1383 } 1384 1385 1386 if(max_work-- <= 0) 1387 break; 1388 1389 /* 1390 * Get current csr status to make sure 1391 * we've cleared all interrupts 1392 */ 1393 csr = LMC_CSR_READ (sc, csr_status); 1394 } /* end interrupt loop */ 1395 LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr); 1396 1397lmc_int_fail_out: 1398 1399 spin_unlock(&sc->lmc_lock); 1400 1401 lmc_trace(dev, "lmc_interrupt out"); 1402 return IRQ_RETVAL(handled); 1403} 1404 1405static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev) 1406{ 1407 lmc_softc_t *sc = dev_to_sc(dev); 1408 u32 flag; 1409 int entry; 1410 int ret = 0; 1411 unsigned long flags; 1412 1413 lmc_trace(dev, "lmc_start_xmit in"); 1414 1415 spin_lock_irqsave(&sc->lmc_lock, flags); 1416 1417 /* normal path, tbusy known to be zero */ 1418 1419 entry = sc->lmc_next_tx % LMC_TXDESCS; 1420 1421 sc->lmc_txq[entry] = skb; 1422 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data); 1423 1424 LMC_CONSOLE_LOG("xmit", skb->data, skb->len); 1425 1426#ifndef GCOM 1427 /* If the queue is less than half full, don't interrupt */ 1428 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2) 1429 { 1430 /* Do not interrupt on completion of this packet */ 1431 flag = 0x60000000; 1432 netif_wake_queue(dev); 1433 } 1434 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2) 1435 { 1436 /* This generates an interrupt on completion of this packet */ 1437 flag = 0xe0000000; 1438 netif_wake_queue(dev); 1439 } 1440 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1) 1441 { 1442 /* Do not interrupt on completion of this packet */ 1443 flag = 0x60000000; 1444 netif_wake_queue(dev); 1445 } 1446 else 1447 { 1448 /* This generates an interrupt on completion of this packet */ 1449 flag = 0xe0000000; 1450 sc->lmc_txfull = 1; 1451 netif_stop_queue(dev); 1452 } 1453#else 1454 flag = LMC_TDES_INTERRUPT_ON_COMPLETION; 1455 1456 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1) 1457 { /* ring full, go busy */ 1458 sc->lmc_txfull = 1; 1459 netif_stop_queue(dev); 1460 sc->extra_stats.tx_tbusy1++; 1461 LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0); 1462 } 1463#endif 1464 1465 1466 if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */ 1467 flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */ 1468 1469 /* don't pad small packets either */ 1470 flag = sc->lmc_txring[entry].length = (skb->len) | flag | 1471 sc->TxDescriptControlInit; 1472 1473 /* set the transmit timeout flag to be checked in 1474 * the watchdog timer handler. -baz 1475 */ 1476 1477 sc->extra_stats.tx_NoCompleteCnt++; 1478 sc->lmc_next_tx++; 1479 1480 /* give ownership to the chip */ 1481 LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry); 1482 sc->lmc_txring[entry].status = 0x80000000; 1483 1484 /* send now! */ 1485 LMC_CSR_WRITE (sc, csr_txpoll, 0); 1486 1487 dev->trans_start = jiffies; 1488 1489 spin_unlock_irqrestore(&sc->lmc_lock, flags); 1490 1491 lmc_trace(dev, "lmc_start_xmit_out"); 1492 return ret; 1493} 1494 1495 1496static int lmc_rx(struct net_device *dev) 1497{ 1498 lmc_softc_t *sc = dev_to_sc(dev); 1499 int i; 1500 int rx_work_limit = LMC_RXDESCS; 1501 unsigned int next_rx; 1502 int rxIntLoopCnt; /* debug -baz */ 1503 int localLengthErrCnt = 0; 1504 long stat; 1505 struct sk_buff *skb, *nsb; 1506 u16 len; 1507 1508 lmc_trace(dev, "lmc_rx in"); 1509 1510 lmc_led_on(sc, LMC_DS3_LED3); 1511 1512 rxIntLoopCnt = 0; /* debug -baz */ 1513 1514 i = sc->lmc_next_rx % LMC_RXDESCS; 1515 next_rx = sc->lmc_next_rx; 1516 1517 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4) 1518 { 1519 rxIntLoopCnt++; /* debug -baz */ 1520 len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER); 1521 if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */ 1522 if ((stat & 0x0000ffff) != 0x7fff) { 1523 /* Oversized frame */ 1524 sc->lmc_device->stats.rx_length_errors++; 1525 goto skip_packet; 1526 } 1527 } 1528 1529 if (stat & 0x00000008) { /* Catch a dribbling bit error */ 1530 sc->lmc_device->stats.rx_errors++; 1531 sc->lmc_device->stats.rx_frame_errors++; 1532 goto skip_packet; 1533 } 1534 1535 1536 if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */ 1537 sc->lmc_device->stats.rx_errors++; 1538 sc->lmc_device->stats.rx_crc_errors++; 1539 goto skip_packet; 1540 } 1541 1542 if (len > LMC_PKT_BUF_SZ) { 1543 sc->lmc_device->stats.rx_length_errors++; 1544 localLengthErrCnt++; 1545 goto skip_packet; 1546 } 1547 1548 if (len < sc->lmc_crcSize + 2) { 1549 sc->lmc_device->stats.rx_length_errors++; 1550 sc->extra_stats.rx_SmallPktCnt++; 1551 localLengthErrCnt++; 1552 goto skip_packet; 1553 } 1554 1555 if(stat & 0x00004000){ 1556 printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name); 1557 } 1558 1559 len -= sc->lmc_crcSize; 1560 1561 skb = sc->lmc_rxq[i]; 1562 1563 /* 1564 * We ran out of memory at some point 1565 * just allocate an skb buff and continue. 1566 */ 1567 1568 if (!skb) { 1569 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1570 if (nsb) { 1571 sc->lmc_rxq[i] = nsb; 1572 nsb->dev = dev; 1573 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb)); 1574 } 1575 sc->failed_recv_alloc = 1; 1576 goto skip_packet; 1577 } 1578 1579 dev->last_rx = jiffies; 1580 sc->lmc_device->stats.rx_packets++; 1581 sc->lmc_device->stats.rx_bytes += len; 1582 1583 LMC_CONSOLE_LOG("recv", skb->data, len); 1584 1585 /* 1586 * I'm not sure of the sanity of this 1587 * Packets could be arriving at a constant 1588 * 44.210mbits/sec and we're going to copy 1589 * them into a new buffer?? 1590 */ 1591 1592 if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */ 1593 /* 1594 * If it's a large packet don't copy it just hand it up 1595 */ 1596 give_it_anyways: 1597 1598 sc->lmc_rxq[i] = NULL; 1599 sc->lmc_rxring[i].buffer1 = 0x0; 1600 1601 skb_put (skb, len); 1602 skb->protocol = lmc_proto_type(sc, skb); 1603 skb_reset_mac_header(skb); 1604 /* skb_reset_network_header(skb); */ 1605 skb->dev = dev; 1606 lmc_proto_netif(sc, skb); 1607 1608 /* 1609 * This skb will be destroyed by the upper layers, make a new one 1610 */ 1611 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1612 if (nsb) { 1613 sc->lmc_rxq[i] = nsb; 1614 nsb->dev = dev; 1615 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb)); 1616 /* Transferred to 21140 below */ 1617 } 1618 else { 1619 /* 1620 * We've run out of memory, stop trying to allocate 1621 * memory and exit the interrupt handler 1622 * 1623 * The chip may run out of receivers and stop 1624 * in which care we'll try to allocate the buffer 1625 * again. (once a second) 1626 */ 1627 sc->extra_stats.rx_BuffAllocErr++; 1628 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len); 1629 sc->failed_recv_alloc = 1; 1630 goto skip_out_of_mem; 1631 } 1632 } 1633 else { 1634 nsb = dev_alloc_skb(len); 1635 if(!nsb) { 1636 goto give_it_anyways; 1637 } 1638 skb_copy_from_linear_data(skb, skb_put(nsb, len), len); 1639 1640 nsb->protocol = lmc_proto_type(sc, skb); 1641 skb_reset_mac_header(nsb); 1642 /* skb_reset_network_header(nsb); */ 1643 nsb->dev = dev; 1644 lmc_proto_netif(sc, nsb); 1645 } 1646 1647 skip_packet: 1648 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len); 1649 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4; 1650 1651 sc->lmc_next_rx++; 1652 i = sc->lmc_next_rx % LMC_RXDESCS; 1653 rx_work_limit--; 1654 if (rx_work_limit < 0) 1655 break; 1656 } 1657 1658 /* detect condition for LMC1000 where DSU cable attaches and fills 1659 * descriptors with bogus packets 1660 * 1661 if (localLengthErrCnt > LMC_RXDESCS - 3) { 1662 sc->extra_stats.rx_BadPktSurgeCnt++; 1663 LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt, 1664 sc->extra_stats.rx_BadPktSurgeCnt); 1665 } */ 1666 1667 /* save max count of receive descriptors serviced */ 1668 if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt) 1669 sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */ 1670 1671#ifdef DEBUG 1672 if (rxIntLoopCnt == 0) 1673 { 1674 for (i = 0; i < LMC_RXDESCS; i++) 1675 { 1676 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT) 1677 != DESC_OWNED_BY_DC21X4) 1678 { 1679 rxIntLoopCnt++; 1680 } 1681 } 1682 LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0); 1683 } 1684#endif 1685 1686 1687 lmc_led_off(sc, LMC_DS3_LED3); 1688 1689skip_out_of_mem: 1690 1691 lmc_trace(dev, "lmc_rx out"); 1692 1693 return 0; 1694} 1695 1696static struct net_device_stats *lmc_get_stats(struct net_device *dev) 1697{ 1698 lmc_softc_t *sc = dev_to_sc(dev); 1699 unsigned long flags; 1700 1701 lmc_trace(dev, "lmc_get_stats in"); 1702 1703 spin_lock_irqsave(&sc->lmc_lock, flags); 1704 1705 sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff; 1706 1707 spin_unlock_irqrestore(&sc->lmc_lock, flags); 1708 1709 lmc_trace(dev, "lmc_get_stats out"); 1710 1711 return &sc->lmc_device->stats; 1712} 1713 1714static struct pci_driver lmc_driver = { 1715 .name = "lmc", 1716 .id_table = lmc_pci_tbl, 1717 .probe = lmc_init_one, 1718 .remove = __devexit_p(lmc_remove_one), 1719}; 1720 1721static int __init init_lmc(void) 1722{ 1723 return pci_register_driver(&lmc_driver); 1724} 1725 1726static void __exit exit_lmc(void) 1727{ 1728 pci_unregister_driver(&lmc_driver); 1729} 1730 1731module_init(init_lmc); 1732module_exit(exit_lmc); 1733 1734unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/ 1735{ 1736 int i; 1737 int command = (0xf6 << 10) | (devaddr << 5) | regno; 1738 int retval = 0; 1739 1740 lmc_trace(sc->lmc_device, "lmc_mii_readreg in"); 1741 1742 LMC_MII_SYNC (sc); 1743 1744 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync"); 1745 1746 for (i = 15; i >= 0; i--) 1747 { 1748 int dataval = (command & (1 << i)) ? 0x20000 : 0; 1749 1750 LMC_CSR_WRITE (sc, csr_9, dataval); 1751 lmc_delay (); 1752 /* __SLOW_DOWN_IO; */ 1753 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000); 1754 lmc_delay (); 1755 /* __SLOW_DOWN_IO; */ 1756 } 1757 1758 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1"); 1759 1760 for (i = 19; i > 0; i--) 1761 { 1762 LMC_CSR_WRITE (sc, csr_9, 0x40000); 1763 lmc_delay (); 1764 /* __SLOW_DOWN_IO; */ 1765 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0); 1766 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000); 1767 lmc_delay (); 1768 /* __SLOW_DOWN_IO; */ 1769 } 1770 1771 lmc_trace(sc->lmc_device, "lmc_mii_readreg out"); 1772 1773 return (retval >> 1) & 0xffff; 1774} 1775 1776void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/ 1777{ 1778 int i = 32; 1779 int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data; 1780 1781 lmc_trace(sc->lmc_device, "lmc_mii_writereg in"); 1782 1783 LMC_MII_SYNC (sc); 1784 1785 i = 31; 1786 while (i >= 0) 1787 { 1788 int datav; 1789 1790 if (command & (1 << i)) 1791 datav = 0x20000; 1792 else 1793 datav = 0x00000; 1794 1795 LMC_CSR_WRITE (sc, csr_9, datav); 1796 lmc_delay (); 1797 /* __SLOW_DOWN_IO; */ 1798 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000)); 1799 lmc_delay (); 1800 /* __SLOW_DOWN_IO; */ 1801 i--; 1802 } 1803 1804 i = 2; 1805 while (i > 0) 1806 { 1807 LMC_CSR_WRITE (sc, csr_9, 0x40000); 1808 lmc_delay (); 1809 /* __SLOW_DOWN_IO; */ 1810 LMC_CSR_WRITE (sc, csr_9, 0x50000); 1811 lmc_delay (); 1812 /* __SLOW_DOWN_IO; */ 1813 i--; 1814 } 1815 1816 lmc_trace(sc->lmc_device, "lmc_mii_writereg out"); 1817} 1818 1819static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/ 1820{ 1821 int i; 1822 1823 lmc_trace(sc->lmc_device, "lmc_softreset in"); 1824 1825 /* Initialize the receive rings and buffers. */ 1826 sc->lmc_txfull = 0; 1827 sc->lmc_next_rx = 0; 1828 sc->lmc_next_tx = 0; 1829 sc->lmc_taint_rx = 0; 1830 sc->lmc_taint_tx = 0; 1831 1832 /* 1833 * Setup each one of the receiver buffers 1834 * allocate an skbuff for each one, setup the descriptor table 1835 * and point each buffer at the next one 1836 */ 1837 1838 for (i = 0; i < LMC_RXDESCS; i++) 1839 { 1840 struct sk_buff *skb; 1841 1842 if (sc->lmc_rxq[i] == NULL) 1843 { 1844 skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2); 1845 if(skb == NULL){ 1846 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name); 1847 sc->failed_ring = 1; 1848 break; 1849 } 1850 else{ 1851 sc->lmc_rxq[i] = skb; 1852 } 1853 } 1854 else 1855 { 1856 skb = sc->lmc_rxq[i]; 1857 } 1858 1859 skb->dev = sc->lmc_device; 1860 1861 /* owned by 21140 */ 1862 sc->lmc_rxring[i].status = 0x80000000; 1863 1864 /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */ 1865 sc->lmc_rxring[i].length = skb_tailroom(skb); 1866 1867 /* use to be tail which is dumb since you're thinking why write 1868 * to the end of the packj,et but since there's nothing there tail == data 1869 */ 1870 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data); 1871 1872 /* This is fair since the structure is static and we have the next address */ 1873 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]); 1874 1875 } 1876 1877 /* 1878 * Sets end of ring 1879 */ 1880 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */ 1881 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus (&sc->lmc_rxring[0]); /* Point back to the start */ 1882 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */ 1883 1884 1885 /* Initialize the transmit rings and buffers */ 1886 for (i = 0; i < LMC_TXDESCS; i++) 1887 { 1888 if (sc->lmc_txq[i] != NULL){ /* have buffer */ 1889 dev_kfree_skb(sc->lmc_txq[i]); /* free it */ 1890 sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */ 1891 } 1892 sc->lmc_txq[i] = NULL; 1893 sc->lmc_txring[i].status = 0x00000000; 1894 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]); 1895 } 1896 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]); 1897 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring)); 1898 1899 lmc_trace(sc->lmc_device, "lmc_softreset out"); 1900} 1901 1902void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/ 1903{ 1904 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in"); 1905 sc->lmc_gpio_io &= ~bits; 1906 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io)); 1907 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out"); 1908} 1909 1910void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/ 1911{ 1912 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in"); 1913 sc->lmc_gpio_io |= bits; 1914 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io)); 1915 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out"); 1916} 1917 1918void lmc_led_on(lmc_softc_t * const sc, u_int32_t led) /*fold00*/ 1919{ 1920 lmc_trace(sc->lmc_device, "lmc_led_on in"); 1921 if((~sc->lmc_miireg16) & led){ /* Already on! */ 1922 lmc_trace(sc->lmc_device, "lmc_led_on aon out"); 1923 return; 1924 } 1925 1926 sc->lmc_miireg16 &= ~led; 1927 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 1928 lmc_trace(sc->lmc_device, "lmc_led_on out"); 1929} 1930 1931void lmc_led_off(lmc_softc_t * const sc, u_int32_t led) /*fold00*/ 1932{ 1933 lmc_trace(sc->lmc_device, "lmc_led_off in"); 1934 if(sc->lmc_miireg16 & led){ /* Already set don't do anything */ 1935 lmc_trace(sc->lmc_device, "lmc_led_off aoff out"); 1936 return; 1937 } 1938 1939 sc->lmc_miireg16 |= led; 1940 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 1941 lmc_trace(sc->lmc_device, "lmc_led_off out"); 1942} 1943 1944static void lmc_reset(lmc_softc_t * const sc) /*fold00*/ 1945{ 1946 lmc_trace(sc->lmc_device, "lmc_reset in"); 1947 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET; 1948 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 1949 1950 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET; 1951 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16); 1952 1953 /* 1954 * make some of the GPIO pins be outputs 1955 */ 1956 lmc_gpio_mkoutput(sc, LMC_GEP_RESET); 1957 1958 /* 1959 * RESET low to force state reset. This also forces 1960 * the transmitter clock to be internal, but we expect to reset 1961 * that later anyway. 1962 */ 1963 sc->lmc_gpio &= ~(LMC_GEP_RESET); 1964 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio); 1965 1966 /* 1967 * hold for more than 10 microseconds 1968 */ 1969 udelay(50); 1970 1971 /* 1972 * stop driving Xilinx-related signals 1973 */ 1974 lmc_gpio_mkinput(sc, LMC_GEP_RESET); 1975 1976 /* 1977 * Call media specific init routine 1978 */ 1979 sc->lmc_media->init(sc); 1980 1981 sc->extra_stats.resetCount++; 1982 lmc_trace(sc->lmc_device, "lmc_reset out"); 1983} 1984 1985static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/ 1986{ 1987 u_int32_t val; 1988 lmc_trace(sc->lmc_device, "lmc_dec_reset in"); 1989 1990 /* 1991 * disable all interrupts 1992 */ 1993 sc->lmc_intrmask = 0; 1994 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask); 1995 1996 /* 1997 * Reset the chip with a software reset command. 1998 * Wait 10 microseconds (actually 50 PCI cycles but at 1999 * 33MHz that comes to two microseconds but wait a 2000 * bit longer anyways) 2001 */ 2002 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET); 2003 udelay(25); 2004#ifdef __sparc__ 2005 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode); 2006 sc->lmc_busmode = 0x00100000; 2007 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET; 2008 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode); 2009#endif 2010 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command); 2011 2012 /* 2013 * We want: 2014 * no ethernet address in frames we write 2015 * disable padding (txdesc, padding disable) 2016 * ignore runt frames (rdes0 bit 15) 2017 * no receiver watchdog or transmitter jabber timer 2018 * (csr15 bit 0,14 == 1) 2019 * if using 16-bit CRC, turn off CRC (trans desc, crc disable) 2020 */ 2021 2022 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS 2023 | TULIP_CMD_FULLDUPLEX 2024 | TULIP_CMD_PASSBADPKT 2025 | TULIP_CMD_NOHEARTBEAT 2026 | TULIP_CMD_PORTSELECT 2027 | TULIP_CMD_RECEIVEALL 2028 | TULIP_CMD_MUSTBEONE 2029 ); 2030 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE 2031 | TULIP_CMD_THRESHOLDCTL 2032 | TULIP_CMD_STOREFWD 2033 | TULIP_CMD_TXTHRSHLDCTL 2034 ); 2035 2036 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode); 2037 2038 /* 2039 * disable receiver watchdog and transmit jabber 2040 */ 2041 val = LMC_CSR_READ(sc, csr_sia_general); 2042 val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE); 2043 LMC_CSR_WRITE(sc, csr_sia_general, val); 2044 2045 lmc_trace(sc->lmc_device, "lmc_dec_reset out"); 2046} 2047 2048static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/ 2049 size_t csr_size) 2050{ 2051 lmc_trace(sc->lmc_device, "lmc_initcsrs in"); 2052 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size; 2053 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size; 2054 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size; 2055 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size; 2056 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size; 2057 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size; 2058 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size; 2059 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size; 2060 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size; 2061 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size; 2062 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size; 2063 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size; 2064 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size; 2065 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size; 2066 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size; 2067 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size; 2068 lmc_trace(sc->lmc_device, "lmc_initcsrs out"); 2069} 2070 2071static void lmc_driver_timeout(struct net_device *dev) 2072{ 2073 lmc_softc_t *sc = dev_to_sc(dev); 2074 u32 csr6; 2075 unsigned long flags; 2076 2077 lmc_trace(dev, "lmc_driver_timeout in"); 2078 2079 spin_lock_irqsave(&sc->lmc_lock, flags); 2080 2081 printk("%s: Xmitter busy|\n", dev->name); 2082 2083 sc->extra_stats.tx_tbusy_calls++; 2084 if (jiffies - dev->trans_start < TX_TIMEOUT) 2085 goto bug_out; 2086 2087 /* 2088 * Chip seems to have locked up 2089 * Reset it 2090 * This whips out all our decriptor 2091 * table and starts from scartch 2092 */ 2093 2094 LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO, 2095 LMC_CSR_READ (sc, csr_status), 2096 sc->extra_stats.tx_ProcTimeout); 2097 2098 lmc_running_reset (dev); 2099 2100 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0); 2101 LMC_EVENT_LOG(LMC_EVENT_RESET2, 2102 lmc_mii_readreg (sc, 0, 16), 2103 lmc_mii_readreg (sc, 0, 17)); 2104 2105 /* restart the tx processes */ 2106 csr6 = LMC_CSR_READ (sc, csr_command); 2107 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002); 2108 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002); 2109 2110 /* immediate transmit */ 2111 LMC_CSR_WRITE (sc, csr_txpoll, 0); 2112 2113 sc->lmc_device->stats.tx_errors++; 2114 sc->extra_stats.tx_ProcTimeout++; /* -baz */ 2115 2116 dev->trans_start = jiffies; 2117 2118bug_out: 2119 2120 spin_unlock_irqrestore(&sc->lmc_lock, flags); 2121 2122 lmc_trace(dev, "lmc_driver_timout out"); 2123 2124 2125} 2126