11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * pc300.h Cyclades-PC300(tm) Kernel API Definitions. 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Author: Ivan Passos <ivan@cyclades.com> 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright: (c) 1999-2002 Cyclades Corp. 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This program is free software; you can redistribute it and/or 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * modify it under the terms of the GNU General Public License 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * as published by the Free Software Foundation; either version 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2 of the License, or (at your option) any later version. 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * $Log: pc300.h,v $ 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.12 2002/03/07 14:17:09 henrique 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * License data fixed 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.11 2002/01/28 21:09:39 daniela 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Included ';' after pc300hw.bus. 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.10 2002/01/17 17:58:52 ivan 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Support for PC300-TE/M (PMC). 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.9 2001/09/28 13:30:53 daniela 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Renamed dma_start routine to rx_dma_start. 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.8 2001/09/24 13:03:45 daniela 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Fixed BOF interrupt treatment. Created dma_start routine. 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.7 2001/08/10 17:19:58 daniela 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Fixed IOCTLs defines. 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.6 2001/07/18 19:24:42 daniela 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Included kernel version. 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.5 2001/07/05 18:38:08 daniela 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * DMA transmission bug fix. 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.4 2001/06/26 17:10:40 daniela 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * New configuration parameters (line code, CRC calculation and clock). 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.3 2001/06/22 13:13:02 regina 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MLPPP implementation 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.2 2001/06/18 17:56:09 daniela 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Increased DEF_MTU and TX_QUEUE_LEN. 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 3.1 2001/06/15 12:41:10 regina 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * upping major version number 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 1.1.1.1 2001/06/13 20:25:06 daniela 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PC300 initial CVS version (3.4.0-pre1) 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 2.3 2001/03/05 daniela 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Created struct pc300conf, to provide the hardware information to pc300util. 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Inclusion of 'alloc_ramsize' field on structure 'pc300hw'. 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 2.2 2000/12/22 daniela 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Structures and defines to support pc300util: statistics, status, 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * loopback tests, trace. 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 2.1 2000/09/28 ivan 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Inclusion of 'iophys' and 'iosize' fields on structure 'pc300hw', to 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * allow release of I/O region at module unload. 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Changed location of include files. 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 2.0 2000/03/27 ivan 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Added support for the PC300/TE cards. 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 1.1 2000/01/31 ivan 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Replaced 'pc300[drv|sca].h' former PC300 driver include files. 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 1.0 1999/12/16 ivan 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * First official release. 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Inclusion of 'nchan' field on structure 'pc300hw', to allow variable 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * number of ports per card. 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Inclusion of 'if_ptr' field on structure 'pc300dev'. 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 0.6 1999/11/17 ivan 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Changed X.25-specific function names to comply with adopted convention. 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 0.5 1999/11/16 Daniela Squassoni 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * X.25 support. 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 0.4 1999/11/15 ivan 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Inclusion of 'clock' field on structure 'pc300hw'. 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 0.3 1999/11/10 ivan 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * IOCTL name changing. 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Inclusion of driver function prototypes. 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 0.2 1999/11/03 ivan 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Inclusion of 'tx_skb' and union 'ifu' on structure 'pc300dev'. 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision 0.1 1999/01/15 ivan 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Initial version. 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef _PC300_H 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _PC300_H 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/hdlc.h> 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "hd64572.h" 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "pc300-falc-lh.h" 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 106ea966165a306ad4243b7bf62c848288c4286a8b7Krzysztof Hałasa#define PC300_PROTO_MLPPP 1 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_MAXCHAN 2 /* Number of channels per card */ 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_RAMSIZE 0x40000 /* RAM window size (256Kb) */ 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_FALCSIZE 0x400 /* FALC window size (1Kb) */ 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_OSC_CLOCK 24576000 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_PCI_CLOCK 33000000 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_DEF_LEN 0x0800 /* DMA buffer length (2KB) */ 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_TX_MEMSZ 0x8000 /* Total DMA Tx memory size (32KB/ch) */ 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_RX_MEMSZ 0x10000 /* Total DMA Rx memory size (64KB/ch) */ 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define N_DMA_TX_BUF (DMA_TX_MEMSZ / BD_DEF_LEN) /* DMA Tx buffers */ 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define N_DMA_RX_BUF (DMA_RX_MEMSZ / BD_DEF_LEN) /* DMA Rx buffers */ 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* DMA Buffer Offsets */ 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_TX_BASE ((N_DMA_TX_BUF + N_DMA_RX_BUF) * \ 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds PC300_MAXCHAN * sizeof(pcsca_bd_t)) 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_RX_BASE (DMA_TX_BASE + PC300_MAXCHAN*DMA_TX_MEMSZ) 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* DMA Descriptor Offsets */ 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_TX_BD_BASE 0x0000 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DMA_RX_BD_BASE (DMA_TX_BD_BASE + ((PC300_MAXCHAN*DMA_TX_MEMSZ / \ 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BD_DEF_LEN) * sizeof(pcsca_bd_t))) 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* DMA Descriptor Macros */ 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_BD_ADDR(chan, n) (DMA_TX_BD_BASE + \ 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ((N_DMA_TX_BUF*chan) + n) * sizeof(pcsca_bd_t)) 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RX_BD_ADDR(chan, n) (DMA_RX_BD_BASE + \ 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ((N_DMA_RX_BUF*chan) + n) * sizeof(pcsca_bd_t)) 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Macro to access the FALC registers (TE only) */ 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define F_REG(reg, chan) (0x200*(chan) + ((reg)<<2)) 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/*************************************** 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Memory access functions/macros * 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (required to support Alpha systems) * 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ***************************************/ 146b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa#define cpc_writeb(port,val) {writeb((u8)(val),(port)); mb();} 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define cpc_writew(port,val) {writew((ushort)(val),(port)); mb();} 148b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa#define cpc_writel(port,val) {writel((u32)(val),(port)); mb();} 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define cpc_readb(port) readb(port) 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define cpc_readw(port) readw(port) 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define cpc_readl(port) readl(port) 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/****** Data Structures *****************************************************/ 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * RUNTIME_9050 - PLX PCI9050-1 local configuration and shared runtime 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * registers. This structure can be used to access the 9050 registers 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (memory mapped). 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct RUNTIME_9050 { 162b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 loc_addr_range[4]; /* 00-0Ch : Local Address Ranges */ 163b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 loc_rom_range; /* 10h : Local ROM Range */ 164b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 loc_addr_base[4]; /* 14-20h : Local Address Base Addrs */ 165b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 loc_rom_base; /* 24h : Local ROM Base */ 166b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 loc_bus_descr[4]; /* 28-34h : Local Bus Descriptors */ 167b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 rom_bus_descr; /* 38h : ROM Bus Descriptor */ 168b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 cs_base[4]; /* 3C-48h : Chip Select Base Addrs */ 169b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 intr_ctrl_stat; /* 4Ch : Interrupt Control/Status */ 170b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 init_ctrl; /* 50h : EEPROM ctrl, Init Ctrl, etc */ 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLX_9050_LINT1_ENABLE 0x01 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLX_9050_LINT1_POL 0x02 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLX_9050_LINT1_STATUS 0x04 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLX_9050_LINT2_ENABLE 0x08 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLX_9050_LINT2_POL 0x10 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLX_9050_LINT2_STATUS 0x20 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLX_9050_INTR_ENABLE 0x40 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLX_9050_SW_INTR 0x80 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Masks to access the init_ctrl PLX register */ 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_CLKSEL_MASK (0x00000004UL) 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_CHMEDIA_MASK(chan) (0x00000020UL<<(chan*3)) 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_CTYPE_MASK (0x00000800UL) 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPLD Registers (base addr = falcbase, TE only) */ 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPLD v. 0 */ 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG1 0x140 /* Chip resets, DCD/CTS status */ 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG2 0x144 /* Clock enable , LED control */ 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPLD v. 2 or higher */ 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_V2_REG1 0x100 /* Chip resets, DCD/CTS status */ 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_V2_REG2 0x104 /* Clock enable , LED control */ 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_ID_REG 0x108 /* CPLD version */ 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPLD Register bit description: for the FALC bits, they should always be 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds set based on the channel (use (bit<<(2*ch)) to access the correct bit for 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds that channel) */ 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG1_FALC_RESET 0x01 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG1_SCA_RESET 0x02 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG1_GLOBAL_CLK 0x08 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG1_FALC_DCD 0x10 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG1_FALC_CTS 0x20 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG2_FALC_TX_CLK 0x01 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG2_FALC_RX_CLK 0x02 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG2_FALC_LED1 0x10 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPLD_REG2_FALC_LED2 0x20 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Structure with FALC-related fields (TE only) */ 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_FALC_MAXLOOP 0x0000ffff /* for falc_issue_cmd() */ 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct falc { 214b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 sync; /* If true FALC is synchronized */ 215b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 active; /* if TRUE then already active */ 216b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 loop_active; /* if TRUE a line loopback UP was received */ 217b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 loop_gen; /* if TRUE a line loopback UP was issued */ 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 219b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 num_channels; 220b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 offset; /* 1 for T1, 0 for E1 */ 221b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 full_bandwidth; 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 223b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 xmb_cause; 224b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 multiframe_mode; 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Statistics */ 227b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 pden; /* Pulse Density violation count */ 228b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 los; /* Loss of Signal count */ 229b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 losr; /* Loss of Signal recovery count */ 230b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 lfa; /* Loss of frame alignment count */ 231b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 farec; /* Frame Alignment Recovery count */ 232b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 lmfa; /* Loss of multiframe alignment count */ 233b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 ais; /* Remote Alarm indication Signal count */ 234b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 sec; /* One-second timer */ 235b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 es; /* Errored second */ 236b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 rai; /* remote alarm received */ 237b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 bec; 238b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 fec; 239b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 cvc; 240b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 cec; 241b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 ebc; 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Status */ 244b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 red_alarm; 245b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 blue_alarm; 246b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 loss_fa; 247b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 yellow_alarm; 248b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 loss_mfa; 249b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 prbs; 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} falc_t; 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct falc_status { 253b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 sync; /* If true FALC is synchronized */ 254b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 red_alarm; 255b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 blue_alarm; 256b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 loss_fa; 257b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 yellow_alarm; 258b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 loss_mfa; 259b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 prbs; 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} falc_status_t; 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct rsv_x21_status { 263b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 dcd; 264b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 dsr; 265b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 cts; 266b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 rts; 267b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 dtr; 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} rsv_x21_status_t; 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300stats { 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int hw_type; 272b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 line_on; 273b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 line_off; 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct net_device_stats gen_stats; 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds falc_t te_stats; 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300stats_t; 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300status { 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int hw_type; 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rsv_x21_status_t gen_status; 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds falc_status_t te_status; 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300status_t; 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300loopback { 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char loop_type; 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char loop_on; 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300loopback_t; 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300patterntst { 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char patrntst_on; /* 0 - off; 1 - on; 2 - read num_errors */ 291b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 num_errors; 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300patterntst_t; 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300dev { 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct pc300ch *chan; 296b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 trace_on; 297b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 line_on; /* DCD(X.21, RSV) / sync(TE) change counters */ 298b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 line_off; 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char name[16]; 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct net_device *dev; 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_PC300_MLPPP 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void *cpc_tty; /* information to PC300 TTY driver */ 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}pc300dev_t; 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300hw { 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int type; /* RSV, X21, etc. */ 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int bus; /* Bus (PCI, PMC, etc.) */ 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int nchan; /* number of channels */ 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int irq; /* interrupt request level */ 311b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 clock; /* Board clock */ 312b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 cpld_id; /* CPLD ID (TE only) */ 313b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 cpld_reg1; /* CPLD reg 1 (TE only) */ 314b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 cpld_reg2; /* CPLD reg 2 (TE only) */ 315b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 gpioc_reg; /* PLX GPIOC reg */ 316b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u16 intctl_reg; /* PLX Int Ctrl/Status reg */ 317b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 iophys; /* PLX registers I/O base */ 318b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 iosize; /* PLX registers I/O size */ 319b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 plxphys; /* PLX registers MMIO base (physical) */ 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void __iomem * plxbase; /* PLX registers MMIO base (virtual) */ 321b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 plxsize; /* PLX registers MMIO size */ 322b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 scaphys; /* SCA registers MMIO base (physical) */ 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void __iomem * scabase; /* SCA registers MMIO base (virtual) */ 324b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 scasize; /* SCA registers MMIO size */ 325b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 ramphys; /* On-board RAM MMIO base (physical) */ 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void __iomem * rambase; /* On-board RAM MMIO base (virtual) */ 327b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 alloc_ramsize; /* RAM MMIO size allocated by the PCI bridge */ 328b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 ramsize; /* On-board RAM MMIO size */ 329b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 falcphys; /* FALC registers MMIO base (physical) */ 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void __iomem * falcbase;/* FALC registers MMIO base (virtual) */ 331b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 falcsize; /* FALC registers MMIO size */ 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300hw_t; 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300chconf { 335b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa sync_serial_settings phys_settings; /* Clock type/rate (in bps), 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds loopback mode */ 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds raw_hdlc_proto proto_settings; /* Encoding, parity (CRC) */ 338b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 media; /* HW media (RS232, V.35, etc.) */ 339b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 proto; /* Protocol (PPP, X.25, etc.) */ 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* TE-specific parameters */ 342b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 lcode; /* Line Code (AMI, B8ZS, etc.) */ 343b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 fr_mode; /* Frame Mode (ESF, D4, etc.) */ 344b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 lbo; /* Line Build Out */ 345b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 rx_sens; /* Rx Sensitivity (long- or short-haul) */ 346b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u32 tslot_bitmap; /* bit[i]=1 => timeslot _i_ is active */ 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300chconf_t; 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300ch { 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct pc300 *card; 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int channel; 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pc300dev_t d; 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pc300chconf_t conf; 354b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 tx_first_bd; /* First TX DMA block descr. w/ data */ 355b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 tx_next_bd; /* Next free TX DMA block descriptor */ 356b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 rx_first_bd; /* First free RX DMA block descriptor */ 357b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 rx_last_bd; /* Last free RX DMA block descriptor */ 358b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa u8 nfree_tx_bd; /* Number of free TX DMA block descriptors */ 359b22267d3883ebc76093e9f36c4c738125e092402Krzysztof Hałasa falc_t falc; /* FALC structure (TE only) */ 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300ch_t; 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300 { 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pc300hw_t hw; /* hardware config. */ 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pc300ch_t chan[PC300_MAXCHAN]; 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spinlock_t card_lock; 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300_t; 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct pc300conf { 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pc300hw_t hw; 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pc300chconf_t conf; 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} pc300conf_t; 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* DEV ioctl() commands */ 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define N_SPPP_IOCTLS 2 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum pc300_ioctl_cmds { 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCCPCRESERVED = (SIOCDEVPRIVATE + N_SPPP_IOCTLS), 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCGPC300CONF, 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCSPC300CONF, 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCGPC300STATUS, 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCGPC300FALCSTATUS, 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCGPC300UTILSTATS, 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCGPC300UTILSTATUS, 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCSPC300TRACE, 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCSPC300LOOPBACK, 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SIOCSPC300PATTERNTEST, 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Loopback types - PC300/TE boards */ 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum pc300_loopback_cmds { 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds PC300LOCLOOP = 1, 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds PC300REMLOOP, 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds PC300PAYLOADLOOP, 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds PC300GENLOOPUP, 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds PC300GENLOOPDOWN, 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Control Constant Definitions */ 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_RSV 0x01 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_X21 0x02 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_TE 0x03 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_PCI 0x00 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_PMC 0x01 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_LC_AMI 0x01 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_LC_B8ZS 0x02 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_LC_NRZ 0x03 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_LC_HDB3 0x04 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Framing (T1) */ 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_FR_ESF 0x01 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_FR_D4 0x02 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_FR_ESF_JAPAN 0x03 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Framing (E1) */ 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_FR_MF_CRC4 0x04 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_FR_MF_NON_CRC4 0x05 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_FR_UNFRAMED 0x06 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_LBO_0_DB 0x00 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_LBO_7_5_DB 0x01 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_LBO_15_DB 0x02 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_LBO_22_5_DB 0x03 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_RX_SENS_SH 0x01 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_RX_SENS_LH 0x02 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_TX_TIMEOUT (2*HZ) 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_TX_QUEUE_LEN 100 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC300_DEF_MTU 1600 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Function Prototypes */ 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsint cpc_open(struct net_device *dev); 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* _PC300_H */ 437