15b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* 25b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * Copyright (c) 2011 Broadcom Corporation 35b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * 45b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * Permission to use, copy, modify, and/or distribute this software for any 55b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * purpose with or without fee is hereby granted, provided that the above 65b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * copyright notice and this permission notice appear in all copies. 75b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * 85b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 95b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 105b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 115b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 125b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 135b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 145b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 155b435de0d786869c95d1962121af0d7df2542009Arend van Spriel */ 165b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 175b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#ifndef _BRCM_AIUTILS_H_ 185b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define _BRCM_AIUTILS_H_ 195b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 2028a5344261753fadb1731b82c5eeecca708a877cArend van Spriel#include <linux/bcma/bcma.h> 2128a5344261753fadb1731b82c5eeecca708a877cArend van Spriel 225b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#include "types.h" 235b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 245b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* 255b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * SOC Interconnect Address Map. 265b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * All regions may not exist on all chips. 275b435de0d786869c95d1962121af0d7df2542009Arend van Spriel */ 285b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* each core gets 4Kbytes for registers */ 295b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_CORE_SIZE 0x1000 305b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* 315b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * Max cores (this is arbitrary, for software 325b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * convenience and could be changed if we 335b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * make any larger chips 345b435de0d786869c95d1962121af0d7df2542009Arend van Spriel */ 355b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_MAXCORES 16 365b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 375b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* Client Mode sb2pcitranslation2 size in bytes */ 385b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_PCI_DMA_SZ 0x40000000 395b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 405b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), high 32 bits */ 415b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_PCIE_DMA_H32 0x80000000 425b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 435b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* chipcommon being the first core: */ 445b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_CC_IDX 0 455b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 465b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* SOC Interconnect types (aka chip types) */ 475b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SOCI_AI 1 485b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 495b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* A register that is common to all cores to 505b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * communicate w/PMU regarding clock control. 515b435de0d786869c95d1962121af0d7df2542009Arend van Spriel */ 525b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ 535b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 545b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* clk_ctl_st register */ 555b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_FORCEALP 0x00000001 /* force ALP request */ 565b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_FORCEHT 0x00000002 /* force HT request */ 575b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_FORCEILP 0x00000004 /* force ILP request */ 585b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ 595b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ 605b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ 615b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ 625b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_ERSRC_REQ_SHIFT 8 635b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ 645b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_HTAVAIL 0x00020000 /* HT is available */ 655b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_BP_ON_APL 0x00040000 /* RO: running on ALP clock */ 665b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_BP_ON_HT 0x00080000 /* RO: running on HT clock */ 675b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ 685b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS_ERSRC_STS_SHIFT 24 695b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 705b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* HT avail in chipc and pcmcia on 4328a0 */ 715b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS0_HTAVAIL 0x00010000 725b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* ALP avail in chipc and pcmcia on 4328a0 */ 735b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CCS0_ALPAVAIL 0x00020000 745b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 755b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* Not really related to SOC Interconnect, but a couple of software 765b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * conventions for the use the flash space: 775b435de0d786869c95d1962121af0d7df2542009Arend van Spriel */ 785b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 795b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* Minumum amount of flash we support */ 805b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define FLASH_MIN 0x00020000 /* Minimum flash size */ 815b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 825b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CC_SROM_OTP 0x800 /* SROM/OTP address space */ 835b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 845b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* gpiotimerval */ 855b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_ONTIME_SHIFT 16 865b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 875b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* Fields in clkdiv */ 885b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CLKD_OTP 0x000f0000 895b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CLKD_OTP_SHIFT 16 905b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 915b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* Package IDs */ 925b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define BCM4717_PKG_ID 9 /* 4717 package id */ 935b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define BCM4718_PKG_ID 10 /* 4718 package id */ 945b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */ 955b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 965b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* these are router chips */ 975b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */ 985b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */ 995b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */ 1005b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1015b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* dynamic clock control defines */ 1025b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define LPOMINFREQ 25000 /* low power oscillator min */ 1035b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define LPOMAXFREQ 43000 /* low power oscillator max */ 1045b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define XTALMINFREQ 19800000 /* 20 MHz - 1% */ 1055b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define XTALMAXFREQ 20200000 /* 20 MHz + 1% */ 1065b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define PCIMINFREQ 25000000 /* 25 MHz */ 1075b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define PCIMAXFREQ 34000000 /* 33 MHz + fudge */ 1085b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1095b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define ILP_DIV_5MHZ 0 /* ILP = 5 MHz */ 1105b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define ILP_DIV_1MHZ 4 /* ILP = 1 MHz */ 1115b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1125b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* clkctl xtal what flags */ 1135b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define XTAL 0x1 /* primary crystal oscillator (2050) */ 1145b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define PLL 0x2 /* main chip pll */ 1155b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1165b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* clkctl clk mode */ 1175b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CLK_FAST 0 /* force fast (pll) clock */ 1185b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define CLK_DYNAMIC 2 /* enable dynamic clock control */ 1195b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1205b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* GPIO usage priorities */ 1215b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_DRV_PRIORITY 0 /* Driver */ 1225b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_APP_PRIORITY 1 /* Application */ 1235b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_HI_PRIORITY 2 /* Highest priority. Ignore GPIO 1245b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * reservation 1255b435de0d786869c95d1962121af0d7df2542009Arend van Spriel */ 1265b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1275b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* GPIO pull up/down */ 1285b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_PULLUP 0 1295b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_PULLDN 1 1305b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1315b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* GPIO event regtype */ 1325b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_REGEVT 0 /* GPIO register event */ 1335b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_REGEVT_INTMSK 1 /* GPIO register event int mask */ 1345b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define GPIO_REGEVT_INTPOL 2 /* GPIO register event int polarity */ 1355b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1365b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* device path */ 1375b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_DEVPATH_BUFSZ 16 /* min buffer size in bytes */ 1385b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1395b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* SI routine enumeration: to be used by update function with multiple hooks */ 1405b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_DOATTACH 1 1415b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_PCIDOWN 2 1425b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#define SI_PCIUP 3 1435b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1445b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* 1455b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * Data structure to export all chip specific common variables 1465b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * public (read-only) portion of aiutils handle returned by si_attach() 1475b435de0d786869c95d1962121af0d7df2542009Arend van Spriel */ 1485b435de0d786869c95d1962121af0d7df2542009Arend van Sprielstruct si_pub { 1495b435de0d786869c95d1962121af0d7df2542009Arend van Spriel int ccrev; /* chip common core rev */ 1505b435de0d786869c95d1962121af0d7df2542009Arend van Spriel u32 cccaps; /* chip common capabilities */ 1515b435de0d786869c95d1962121af0d7df2542009Arend van Spriel int pmurev; /* pmu core rev */ 1525b435de0d786869c95d1962121af0d7df2542009Arend van Spriel u32 pmucaps; /* pmu capabilities */ 1535b435de0d786869c95d1962121af0d7df2542009Arend van Spriel uint boardtype; /* board type */ 1545b435de0d786869c95d1962121af0d7df2542009Arend van Spriel uint boardvendor; /* board vendor */ 1555b435de0d786869c95d1962121af0d7df2542009Arend van Spriel uint chip; /* chip number */ 1565b435de0d786869c95d1962121af0d7df2542009Arend van Spriel uint chiprev; /* chip revision */ 1575b435de0d786869c95d1962121af0d7df2542009Arend van Spriel uint chippkg; /* chip package option */ 1585b435de0d786869c95d1962121af0d7df2542009Arend van Spriel}; 1595b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1605b435de0d786869c95d1962121af0d7df2542009Arend van Sprielstruct pci_dev; 1615b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1625b435de0d786869c95d1962121af0d7df2542009Arend van Sprielstruct gpioh_item { 1635b435de0d786869c95d1962121af0d7df2542009Arend van Spriel void *arg; 1645b435de0d786869c95d1962121af0d7df2542009Arend van Spriel bool level; 1655b435de0d786869c95d1962121af0d7df2542009Arend van Spriel void (*handler) (u32 stat, void *arg); 1665b435de0d786869c95d1962121af0d7df2542009Arend van Spriel u32 event; 1675b435de0d786869c95d1962121af0d7df2542009Arend van Spriel struct gpioh_item *next; 1685b435de0d786869c95d1962121af0d7df2542009Arend van Spriel}; 1695b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1705b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* misc si info needed by some of the routines */ 1715b435de0d786869c95d1962121af0d7df2542009Arend van Sprielstruct si_info { 1725b435de0d786869c95d1962121af0d7df2542009Arend van Spriel struct si_pub pub; /* back plane public state (must be first) */ 17328a5344261753fadb1731b82c5eeecca708a877cArend van Spriel struct bcma_bus *icbus; /* handle to soc interconnect bus */ 174cbc80db2922112cf3c77a6121827ad662ea78c2dArend van Spriel struct pci_dev *pcibus; /* handle to pci bus */ 1755b435de0d786869c95d1962121af0d7df2542009Arend van Spriel struct pcicore_info *pch; /* PCI/E core handle */ 176e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel struct bcma_device *buscore; 1775b435de0d786869c95d1962121af0d7df2542009Arend van Spriel struct list_head var_list; /* list of srom variables */ 1785b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1792e397c303807fadcf65f4e070603107453db4352Arend van Spriel u32 chipst; /* chip status */ 1805b435de0d786869c95d1962121af0d7df2542009Arend van Spriel}; 1815b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1825b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* 1835b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * Many of the routines below take an 'sih' handle as their first arg. 1845b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * Allocate this by calling si_attach(). Free it by calling si_detach(). 1855b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * At any one time, the sih is logically focused on one particular si core 1865b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * (the "current core"). 1875b435de0d786869c95d1962121af0d7df2542009Arend van Spriel * Use si_setcore() or si_setcoreidx() to change the association to another core 1885b435de0d786869c95d1962121af0d7df2542009Arend van Spriel */ 1895b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1905b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1915b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* AMBA Interconnect exported externs */ 192d3126c52eb7f3239b45481facc4078b08ed1027cArend van Sprielextern struct bcma_device *ai_findcore(struct si_pub *sih, 193d3126c52eb7f3239b45481facc4078b08ed1027cArend van Spriel u16 coreid, u16 coreunit); 194a8779e4a8e7f0f90ae169393cd72105134ce7c7bArend van Sprielextern u32 ai_core_cflags(struct bcma_device *core, u32 mask, u32 val); 1955b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 1965b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* === exported functions === */ 19728a5344261753fadb1731b82c5eeecca708a877cArend van Sprielextern struct si_pub *ai_attach(struct bcma_bus *pbus); 1985b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern void ai_detach(struct si_pub *sih); 1997d8e18e456466c2247abe0658e4add598f85c98eArend van Sprielextern uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val); 2005b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern void ai_pci_setup(struct si_pub *sih, uint coremask); 2015b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern void ai_clkctl_init(struct si_pub *sih); 2025b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih); 2035b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern bool ai_clkctl_cc(struct si_pub *sih, uint mode); 2045b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on); 2055b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern bool ai_deviceremoved(struct si_pub *sih); 2065b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, 2075b435de0d786869c95d1962121af0d7df2542009Arend van Spriel u8 priority); 2085b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 2095b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* OTP status */ 2105b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern bool ai_is_otp_disabled(struct si_pub *sih); 2115b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 2125b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* SPROM availability */ 2135b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern bool ai_is_sprom_available(struct si_pub *sih); 2145b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 2155b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern void ai_pci_sleep(struct si_pub *sih); 2165b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern void ai_pci_down(struct si_pub *sih); 2175b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern void ai_pci_up(struct si_pub *sih); 2185b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern int ai_pci_fixcfg(struct si_pub *sih); 2195b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 2205b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern void ai_chipcontrl_epa4331(struct si_pub *sih, bool on); 2215b435de0d786869c95d1962121af0d7df2542009Arend van Spriel/* Enable Ex-PA for 4313 */ 2225b435de0d786869c95d1962121af0d7df2542009Arend van Sprielextern void ai_epa_4313war(struct si_pub *sih); 2235b435de0d786869c95d1962121af0d7df2542009Arend van Spriel 224e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Sprielextern uint ai_get_buscoretype(struct si_pub *sih); 225e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Sprielextern uint ai_get_buscorerev(struct si_pub *sih); 226b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel 227b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline int ai_get_ccrev(struct si_pub *sih) 228b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 229b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->ccrev; 230b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 231e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel 232b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline u32 ai_get_cccaps(struct si_pub *sih) 233b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 234b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->cccaps; 235b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 236e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel 237b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline int ai_get_pmurev(struct si_pub *sih) 238b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 239b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->pmurev; 240b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 241e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel 242b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline u32 ai_get_pmucaps(struct si_pub *sih) 243b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 244b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->pmucaps; 245b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 246e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel 247b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline uint ai_get_boardtype(struct si_pub *sih) 248b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 249b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->boardtype; 250b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 251e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel 252b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline uint ai_get_boardvendor(struct si_pub *sih) 253b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 254b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->boardvendor; 255b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 256e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel 257b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline uint ai_get_chip_id(struct si_pub *sih) 258b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 259b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->chip; 260b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 261e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel 262b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline uint ai_get_chiprev(struct si_pub *sih) 263b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 264b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->chiprev; 265b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 266e922602edad30d1f225c32c1cddd80fb3740a8d3Arend van Spriel 267b2ffec46ea230acac52170dd0a747526328d25feArend van Sprielstatic inline uint ai_get_chippkg(struct si_pub *sih) 268b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel{ 269b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel return sih->chippkg; 270b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel} 271b2ffec46ea230acac52170dd0a747526328d25feArend van Spriel 2725b435de0d786869c95d1962121af0d7df2542009Arend van Spriel#endif /* _BRCM_AIUTILS_H_ */ 273