132ddf0718590f410d5f18cb4fcda419f4aeefc57Christian Lamparter#ifndef P54PCI_H 232ddf0718590f410d5f18cb4fcda419f4aeefc57Christian Lamparter#define P54PCI_H 3a6b7a407865aab9f849dd99a71072b7cd1175116Alexey Dobriyan#include <linux/interrupt.h> 4eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 5eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu/* 6eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * Defines for PCI based mac80211 Prism54 driver 7eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * 8eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> 9eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * 10eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * Based on the islsm (softmac prism54) driver, which is: 11eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. 12eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * 13eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * This program is free software; you can redistribute it and/or modify 14eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * it under the terms of the GNU General Public License version 2 as 15eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu * published by the Free Software Foundation. 16eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu */ 17eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 18eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu/* Device Interrupt register bits */ 19eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_RESET 0x0001 20eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_UPDATE 0x0002 21eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_WAKEUP 0x0008 22eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_SLEEP 0x0010 23eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_ABORT 0x0020 24eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu/* these two only used in USB */ 25eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_DATA 0x0040 26eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_MGMT 0x0080 27eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 28eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_PCIUART_CTS 0x4000 29eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_DEV_INT_PCIUART_DR 0x8000 30eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 31eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu/* Interrupt Identification/Acknowledge/Enable register bits */ 32eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_INT_IDENT_UPDATE 0x0002 33eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_INT_IDENT_INIT 0x0004 34eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_INT_IDENT_WAKEUP 0x0008 35eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_INT_IDENT_SLEEP 0x0010 36eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_INT_IDENT_PCIUART_CTS 0x4000 37eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_INT_IDENT_PCIUART_DR 0x8000 38eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 39eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu/* Control/Status register bits */ 40eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_CTRL_STAT_SLEEPMODE 0x00000200 41eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_CTRL_STAT_CLKRUN 0x00800000 42eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_CTRL_STAT_RESET 0x10000000 43eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_CTRL_STAT_RAMBOOT 0x20000000 44eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_CTRL_STAT_STARTHALTED 0x40000000 45eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu#define ISL38XX_CTRL_STAT_HOST_OVERRIDE 0x80000000 46eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 47eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wustruct p54p_csr { 48eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 dev_int; 49eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu u8 unused_1[12]; 50eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 int_ident; 51eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 int_ack; 52eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 int_enable; 53eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu u8 unused_2[4]; 54eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu union { 55eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 ring_control_base; 56eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 gen_purp_com[2]; 57eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu }; 58eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu u8 unused_3[8]; 59eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 direct_mem_base; 60eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu u8 unused_4[44]; 61eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 dma_addr; 62eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 dma_len; 63eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 dma_ctrl; 64eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu u8 unused_5[12]; 65eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 ctrl_stat; 66eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu u8 unused_6[1924]; 67eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu u8 cardbus_cis[0x800]; 68eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu u8 direct_mem_win[0x1000]; 69ba2d3587912f82d1ab4367975b1df460db60fb1eEric Dumazet} __packed; 70eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 71eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu/* usb backend only needs the register defines above */ 7232ddf0718590f410d5f18cb4fcda419f4aeefc57Christian Lamparter#ifndef P54USB_H 73eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wustruct p54p_desc { 74eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 host_addr; 75eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 device_addr; 76eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le16 len; 77eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le16 flags; 78ba2d3587912f82d1ab4367975b1df460db60fb1eEric Dumazet} __packed; 79eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 80eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wustruct p54p_ring_control { 81eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 host_idx[4]; 82eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu __le32 device_idx[4]; 83eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct p54p_desc rx_data[8]; 84eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct p54p_desc tx_data[32]; 85eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct p54p_desc rx_mgmt[4]; 86eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct p54p_desc tx_mgmt[4]; 87ba2d3587912f82d1ab4367975b1df460db60fb1eEric Dumazet} __packed; 88eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 898160c031491015299afacb95a1c1113ccbfefe54Al Viro#define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r) 908160c031491015299afacb95a1c1113ccbfefe54Al Viro#define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r) 91eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 92eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wustruct p54p_priv { 93eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct p54_common common; 94eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct pci_dev *pdev; 95eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct p54p_csr __iomem *map; 96d713804c6032b95cd3035014e16fadebb9655c6fChristian Lamparter struct tasklet_struct tasklet; 9740db0b22591f59811feeb7cad26fdde92a190663Christian Lamparter const struct firmware *firmware; 98eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu spinlock_t lock; 99eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct p54p_ring_control *ring_control; 100eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu dma_addr_t ring_control_dma; 1017262d59366f972b898ea134639112d34bcac35b3Christian Lamparter u32 rx_idx_data, tx_idx_data; 1027262d59366f972b898ea134639112d34bcac35b3Christian Lamparter u32 rx_idx_mgmt, tx_idx_mgmt; 1037262d59366f972b898ea134639112d34bcac35b3Christian Lamparter struct sk_buff *rx_buf_data[8]; 1047262d59366f972b898ea134639112d34bcac35b3Christian Lamparter struct sk_buff *rx_buf_mgmt[4]; 105d713804c6032b95cd3035014e16fadebb9655c6fChristian Lamparter struct sk_buff *tx_buf_data[32]; 106d713804c6032b95cd3035014e16fadebb9655c6fChristian Lamparter struct sk_buff *tx_buf_mgmt[4]; 107eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu struct completion boot_comp; 108eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu}; 109eff1a59c48e3c6a006eb4fe5f2e405a996f2259dMichael Wu 11032ddf0718590f410d5f18cb4fcda419f4aeefc57Christian Lamparter#endif /* P54USB_H */ 11132ddf0718590f410d5f18cb4fcda419f4aeefc57Christian Lamparter#endif /* P54PCI_H */ 112