1a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li/****************************************************************************** 2a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 36a57b08e222f4e054a7e7160ef7426c5614c0cc0Larry Finger * Copyright(c) 2009-2012 Realtek Corporation. 4a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 5a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * This program is free software; you can redistribute it and/or modify it 6a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * under the terms of version 2 of the GNU General Public License as 7a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * published by the Free Software Foundation. 8a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 9a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * This program is distributed in the hope that it will be useful, but WITHOUT 10a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * more details. 13a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 14a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * You should have received a copy of the GNU General Public License along with 15a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * this program; if not, write to the Free Software Foundation, Inc., 16a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 18a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * The full GNU General Public License is included in this distribution in the 19a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * file called LICENSE. 20a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 21a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * Contact Information: 22a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * wlanfae <wlanfae@realtek.com> 23a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 24a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * Hsinchu 300, Taiwan. 25a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 26a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * Larry Finger <Larry.Finger@lwfinger.net> 27a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 28a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li *****************************************************************************/ 29a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 30a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "../wifi.h" 31a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "../core.h" 32a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "../pci.h" 33a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "reg.h" 34a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "def.h" 35a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "phy.h" 36a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "dm.h" 37a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "hw.h" 38a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "sw.h" 39a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "trx.h" 40a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li#include "led.h" 41a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 42d273bb20c00340748e3ca9730f87524ec5abbd64Larry Finger#include <linux/module.h> 43d273bb20c00340748e3ca9730f87524ec5abbd64Larry Finger 44a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic void rtl92d_init_aspm_vars(struct ieee80211_hw *hw) 45a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li{ 46a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 47a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 48a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /*close ASPM for AMD defaultly */ 49a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->const_amdpci_aspm = 0; 50a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 51a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* 52a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * ASPM PS mode. 53a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 0 - Disable ASPM, 54a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 1 - Enable ASPM without Clock Req, 55a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 2 - Enable ASPM with Clock Req, 56a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 3 - Alwyas Enable ASPM with Clock Req, 57a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 4 - Always Enable ASPM without Clock Req. 58a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * set defult to RTL8192CE:3 RTL8192E:2 59a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * */ 60a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->const_pci_aspm = 3; 61a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 62a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /*Setting for PCI-E device */ 63a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->const_devicepci_aspm_setting = 0x03; 64a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 65a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /*Setting for PCI-E bridge */ 66a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->const_hostpci_aspm_setting = 0x02; 67a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 68a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* 69a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * In Hw/Sw Radio Off situation. 70a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 0 - Default, 71a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 1 - From ASPM setting without low Mac Pwr, 72a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 2 - From ASPM setting with low Mac Pwr, 73a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 3 - Bus D3 74a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * set default to RTL8192CE:0 RTL8192SE:2 75a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li */ 76a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->const_hwsw_rfoff_d3 = 0; 77a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 78a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* 79a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * This setting works for those device with 80a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * backdoor ASPM setting such as EPHY setting. 81a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 0 - Not support ASPM, 82a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 1 - Support ASPM, 83a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * 2 - According to chipset. 84a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li */ 85a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->const_support_pciaspm = 1; 86a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li} 87a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 88a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic int rtl92d_init_sw_vars(struct ieee80211_hw *hw) 89a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li{ 90a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li int err; 91a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li u8 tid; 92a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li struct rtl_priv *rtlpriv = rtl_priv(hw); 93a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 94a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 95a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->dm.dm_initialgain_enable = true; 96a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->dm.dm_flag = 0; 973db1cd5c05f35fb43eb134df6f321de4e63141f2Rusty Russell rtlpriv->dm.disable_framebursting = false; 98a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->dm.thermalvalue = 0; 993db1cd5c05f35fb43eb134df6f321de4e63141f2Rusty Russell rtlpriv->dm.useramask = true; 100a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 101a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* dual mac */ 102a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li if (rtlpriv->rtlhal.current_bandtype == BAND_ON_5G) 103a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->phy.current_channel = 36; 104a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li else 105a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->phy.current_channel = 1; 106a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 107a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li if (rtlpriv->rtlhal.macphymode != SINGLEMAC_SINGLEPHY) { 108a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->rtlhal.disable_amsdu_8k = true; 109a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* No long RX - reduce fragmentation */ 110a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->rxbuffersize = 4096; 111a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li } 112a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 113a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13); 114a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 115a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->receive_config = ( 116a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li RCR_APPFCS 117a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_AMF 118a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_ADF 119a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_APP_MIC 120a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_APP_ICV 121a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_AICV 122a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_ACRC32 123a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_AB 124a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_AM 125a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_APM 126a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_APP_PHYST_RXFF 127a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | RCR_HTC_LOC_CTRL 128a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li ); 129a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 130a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->irq_mask[0] = (u32) ( 131a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li IMR_ROK 132a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_VODOK 133a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_VIDOK 134a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_BEDOK 135a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_BKDOK 136a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_MGNTDOK 137a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_HIGHDOK 138a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_BDOK 139a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_RDU 140a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li | IMR_RXFOVW 141a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li ); 142a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 143a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpci->irq_mask[1] = (u32) (IMR_CPWM | IMR_C2HCMD); 144a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 14573a253ca9865cf743c9bc1c97982cb343f535655Larry Finger /* for debug level */ 14673a253ca9865cf743c9bc1c97982cb343f535655Larry Finger rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug; 147a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* for LPS & IPS */ 148a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; 149a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; 150a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; 15187b6d09225506236c58bf407f9b750591a3b3a7bLarry Finger if (!rtlpriv->psc.inactiveps) 152d9595ce30bd860a1c5bcafef8430f46faa26d6ebJoe Perches pr_info("Power Save off (module option)\n"); 15387b6d09225506236c58bf407f9b750591a3b3a7bLarry Finger if (!rtlpriv->psc.fwctrl_lps) 154d9595ce30bd860a1c5bcafef8430f46faa26d6ebJoe Perches pr_info("FW Power Save off (module option)\n"); 155a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->psc.reg_fwctrl_lps = 3; 156a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->psc.reg_max_lps_awakeintvl = 5; 157a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* for ASPM, you can close aspm through 158a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * set const_support_pciaspm = 0 */ 159a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtl92d_init_aspm_vars(hw); 160a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 161a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li if (rtlpriv->psc.reg_fwctrl_lps == 1) 162a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE; 163a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li else if (rtlpriv->psc.reg_fwctrl_lps == 2) 164a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE; 165a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li else if (rtlpriv->psc.reg_fwctrl_lps == 3) 166a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE; 167a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 168b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger /* for early mode */ 169b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger rtlpriv->rtlhal.earlymode_enable = true; 170b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger for (tid = 0; tid < 8; tid++) 171b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger skb_queue_head_init(&rtlpriv->mac80211.skb_waitq[tid]); 172b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger 173a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* for firmware buf */ 174a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); 175a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li if (!rtlpriv->rtlhal.pfirmware) { 176a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 177f30d7507a8116e2099a9135c873411db8c0a3dc6Joe Perches "Can't alloc buffer for fw\n"); 178a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li return 1; 179a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li } 180a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 181b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger rtlpriv->max_fw_size = 0x8000; 182b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger pr_info("Driver for Realtek RTL8192DE WLAN interface\n"); 183b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger pr_info("Loading firmware file %s\n", rtlpriv->cfg->fw_name); 184b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger 185a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li /* request fw */ 186b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name, 187b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger rtlpriv->io.dev, GFP_KERNEL, hw, 188b0302aba812bcc39291cdab9ad7e37008f352a91Larry Finger rtl_fw_cb); 189a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li if (err) { 190a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 191f30d7507a8116e2099a9135c873411db8c0a3dc6Joe Perches "Failed to request firmware!\n"); 192a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li return 1; 193a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li } 194a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 195a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li return 0; 196a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li} 197a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 198a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic void rtl92d_deinit_sw_vars(struct ieee80211_hw *hw) 199a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li{ 200a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li struct rtl_priv *rtlpriv = rtl_priv(hw); 201a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li u8 tid; 202a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 203a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li if (rtlpriv->rtlhal.pfirmware) { 204a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li vfree(rtlpriv->rtlhal.pfirmware); 205a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li rtlpriv->rtlhal.pfirmware = NULL; 206a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li } 207a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li for (tid = 0; tid < 8; tid++) 208a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li skb_queue_purge(&rtlpriv->mac80211.skb_waitq[tid]); 209a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li} 210a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 211a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic struct rtl_hal_ops rtl8192de_hal_ops = { 212a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .init_sw_vars = rtl92d_init_sw_vars, 213a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .deinit_sw_vars = rtl92d_deinit_sw_vars, 214a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .read_eeprom_info = rtl92de_read_eeprom_info, 215a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .interrupt_recognized = rtl92de_interrupt_recognized, 216a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .hw_init = rtl92de_hw_init, 217a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .hw_disable = rtl92de_card_disable, 218a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .hw_suspend = rtl92de_suspend, 219a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .hw_resume = rtl92de_resume, 220a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .enable_interrupt = rtl92de_enable_interrupt, 221a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .disable_interrupt = rtl92de_disable_interrupt, 222a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_network_type = rtl92de_set_network_type, 223a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_chk_bssid = rtl92de_set_check_bssid, 224a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_qos = rtl92de_set_qos, 225a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_bcn_reg = rtl92de_set_beacon_related_registers, 226a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_bcn_intv = rtl92de_set_beacon_interval, 227a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .update_interrupt_mask = rtl92de_update_interrupt_mask, 228a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .get_hw_reg = rtl92de_get_hw_reg, 229a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_hw_reg = rtl92de_set_hw_reg, 230a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .update_rate_tbl = rtl92de_update_hal_rate_tbl, 231a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .fill_tx_desc = rtl92de_tx_fill_desc, 232a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .fill_tx_cmddesc = rtl92de_tx_fill_cmddesc, 233a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .query_rx_desc = rtl92de_rx_query_desc, 234a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_channel_access = rtl92de_update_channel_access_setting, 235a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .radio_onoff_checking = rtl92de_gpio_radio_on_off_checking, 236a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_bw_mode = rtl92d_phy_set_bw_mode, 237a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .switch_channel = rtl92d_phy_sw_chnl, 238a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .dm_watchdog = rtl92d_dm_watchdog, 239a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .scan_operation_backup = rtl92d_phy_scan_operation_backup, 240a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_rf_power_state = rtl92d_phy_set_rf_power_state, 241a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .led_control = rtl92de_led_control, 242a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_desc = rtl92de_set_desc, 243a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .get_desc = rtl92de_get_desc, 244a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .tx_polling = rtl92de_tx_polling, 245a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .enable_hw_sec = rtl92de_enable_hw_security_config, 246a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_key = rtl92de_set_key, 247a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .init_sw_leds = rtl92de_init_sw_leds, 248a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .get_bbreg = rtl92d_phy_query_bb_reg, 249a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_bbreg = rtl92d_phy_set_bb_reg, 250a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .get_rfreg = rtl92d_phy_query_rf_reg, 251a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .set_rfreg = rtl92d_phy_set_rf_reg, 252a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .linked_set_reg = rtl92d_linked_set_reg, 253a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li}; 254a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 255a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic struct rtl_mod_params rtl92de_mod_params = { 256a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .sw_crypto = false, 257a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .inactiveps = true, 258a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .swctrl_lps = true, 259a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .fwctrl_lps = false, 26073a253ca9865cf743c9bc1c97982cb343f535655Larry Finger .debug = DBG_EMERG, 261a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li}; 262a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 263a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic struct rtl_hal_cfg rtl92de_hal_cfg = { 264a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .bar_id = 2, 265a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .write_readback = true, 266a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .name = "rtl8192de", 267a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .fw_name = "rtlwifi/rtl8192defw.bin", 268a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .ops = &rtl8192de_hal_ops, 269a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .mod_params = &rtl92de_mod_params, 270a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 271a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL, 272a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN, 273a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SYS_CLK] = REG_SYS_CLKR, 274a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[MAC_RCR_AM] = RCR_AM, 275a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[MAC_RCR_AB] = RCR_AB, 276a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[MAC_RCR_ACRC32] = RCR_ACRC32, 277a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[MAC_RCR_ACF] = RCR_ACF, 278a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[MAC_RCR_AAP] = RCR_AAP, 279a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 280a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_TEST] = REG_EFUSE_TEST, 281a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_CTRL] = REG_EFUSE_CTRL, 282a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_CLK] = 0, /* just for 92se */ 283a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL, 284a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_PWC_EV12V] = PWC_EV12V, 285a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_FEN_ELDR] = FEN_ELDR, 286a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN, 287a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_ANA8M] = 0, /* just for 92se */ 288a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE, 289a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION, 290a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN, 291a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 292a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RWCAM] = REG_CAMCMD, 293a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[WCAMI] = REG_CAMWRITE, 294a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RCAMO] = REG_CAMREAD, 295a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[CAMDBG] = REG_CAMDBG, 296a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SECR] = REG_SECCFG, 297a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SEC_CAM_NONE] = CAM_NONE, 298a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SEC_CAM_WEP40] = CAM_WEP40, 299a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SEC_CAM_TKIP] = CAM_TKIP, 300a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SEC_CAM_AES] = CAM_AES, 301a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[SEC_CAM_WEP104] = CAM_WEP104, 302a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 303a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6, 304a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5, 305a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4, 306a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3, 307a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2, 308a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1, 309a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8, 310a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7, 311a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6, 312a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5, 313a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4, 314a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3, 315a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2, 316a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1, 317a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2, 318a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1, 319a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 320a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW, 321a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT, 322a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BcnInt] = IMR_BcnInt, 323a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW, 324a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_RDU] = IMR_RDU, 325a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND, 326a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BDOK] = IMR_BDOK, 327a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK, 328a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_TBDER] = IMR_TBDER, 329a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK, 330a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_TBDOK] = IMR_TBDOK, 331a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BKDOK] = IMR_BKDOK, 332a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_BEDOK] = IMR_BEDOK, 333a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_VIDOK] = IMR_VIDOK, 334a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_VODOK] = IMR_VODOK, 335a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IMR_ROK] = IMR_ROK, 336a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .maps[RTL_IBSS_INT_MASKS] = (IMR_BcnInt | IMR_TBDOK | IMR_TBDER), 337a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 3385b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_CCK_RATE1M] = DESC92_RATE1M, 3395b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_CCK_RATE2M] = DESC92_RATE2M, 3405b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_CCK_RATE5_5M] = DESC92_RATE5_5M, 3415b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_CCK_RATE11M] = DESC92_RATE11M, 3425b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_OFDM_RATE6M] = DESC92_RATE6M, 3435b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_OFDM_RATE9M] = DESC92_RATE9M, 3445b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_OFDM_RATE12M] = DESC92_RATE12M, 3455b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_OFDM_RATE18M] = DESC92_RATE18M, 3465b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_OFDM_RATE24M] = DESC92_RATE24M, 3475b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_OFDM_RATE36M] = DESC92_RATE36M, 3485b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_OFDM_RATE48M] = DESC92_RATE48M, 3495b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_OFDM_RATE54M] = DESC92_RATE54M, 3505b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger 3515b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_HT_RATEMCS7] = DESC92_RATEMCS7, 3525b62bb5cc1abe2a2c194833e9266cb78ae36fe61Larry Finger .maps[RTL_RC_HT_RATEMCS15] = DESC92_RATEMCS15, 353a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li}; 354a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 355a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic struct pci_device_id rtl92de_pci_ids[] __devinitdata = { 356a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8193, rtl92de_hal_cfg)}, 357a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x002B, rtl92de_hal_cfg)}, 358a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li {}, 359a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li}; 360a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 361a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming LiMODULE_DEVICE_TABLE(pci, rtl92de_pci_ids); 362a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 363a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming LiMODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>"); 364a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming LiMODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>"); 365a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming LiMODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>"); 366a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming LiMODULE_LICENSE("GPL"); 367a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming LiMODULE_DESCRIPTION("Realtek 8192DE 802.11n Dual Mac PCI wireless"); 368a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming LiMODULE_FIRMWARE("rtlwifi/rtl8192defw.bin"); 369a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 370a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Limodule_param_named(swenc, rtl92de_mod_params.sw_crypto, bool, 0444); 37173a253ca9865cf743c9bc1c97982cb343f535655Larry Fingermodule_param_named(debug, rtl92de_mod_params.debug, int, 0444); 372a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Limodule_param_named(ips, rtl92de_mod_params.inactiveps, bool, 0444); 373a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Limodule_param_named(swlps, rtl92de_mod_params.swctrl_lps, bool, 0444); 374a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Limodule_param_named(fwlps, rtl92de_mod_params.fwctrl_lps, bool, 0444); 37587b6d09225506236c58bf407f9b750591a3b3a7bLarry FingerMODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); 37687b6d09225506236c58bf407f9b750591a3b3a7bLarry FingerMODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n"); 37787b6d09225506236c58bf407f9b750591a3b3a7bLarry FingerMODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n"); 37887b6d09225506236c58bf407f9b750591a3b3a7bLarry FingerMODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n"); 37973a253ca9865cf743c9bc1c97982cb343f535655Larry FingerMODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)"); 380a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 381603be3885b9d518ff4822b357e2687b6ff02f1acLarry Fingerstatic const struct dev_pm_ops rtlwifi_pm_ops = { 382603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger .suspend = rtl_pci_suspend, 383603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger .resume = rtl_pci_resume, 384603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger .freeze = rtl_pci_suspend, 385603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger .thaw = rtl_pci_resume, 386603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger .poweroff = rtl_pci_suspend, 387603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger .restore = rtl_pci_resume, 388603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger}; 389603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger 390a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic struct pci_driver rtl92de_driver = { 391a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .name = KBUILD_MODNAME, 392a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .id_table = rtl92de_pci_ids, 393a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .probe = rtl_pci_probe, 394a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li .remove = rtl_pci_disconnect, 395603be3885b9d518ff4822b357e2687b6ff02f1acLarry Finger .driver.pm = &rtlwifi_pm_ops, 396a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li}; 397a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 398a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li/* add global spin lock to solve the problem that 399a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li * Dul mac register operation on the same time */ 400a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Lispinlock_t globalmutex_power; 401a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Lispinlock_t globalmutex_for_fwdownload; 402a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Lispinlock_t globalmutex_for_power_and_efuse; 403a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 404a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic int __init rtl92de_module_init(void) 405a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li{ 406a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li int ret = 0; 407a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 408a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li spin_lock_init(&globalmutex_power); 409a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li spin_lock_init(&globalmutex_for_fwdownload); 410a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li spin_lock_init(&globalmutex_for_power_and_efuse); 411a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 412a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li ret = pci_register_driver(&rtl92de_driver); 413a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li if (ret) 4149d833ed752e91c71792dd8ebfd0f865e6a568a37Joe Perches RT_ASSERT(false, "No device found\n"); 415a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li return ret; 416a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li} 417a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 418a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Listatic void __exit rtl92de_module_exit(void) 419a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li{ 420a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li pci_unregister_driver(&rtl92de_driver); 421a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li} 422a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Li 423a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Limodule_init(rtl92de_module_init); 424a7dbd3b50d09c0006babb2ba0bbdba4b0ede5c73Chaoming Limodule_exit(rtl92de_module_exit); 425