11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 2003-2004 Intel 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef MSI_H 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MSI_H 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define msi_control_reg(base) (base + PCI_MSI_FLAGS) 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define msi_data_reg(base, is64bit) \ 1367b5db6502ddd27d65dea43bf036abbd82d0dfc9Hidetoshi Seto (base + ((is64bit == 1) ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32)) 1467b5db6502ddd27d65dea43bf036abbd82d0dfc9Hidetoshi Seto#define msi_mask_reg(base, is64bit) \ 1567b5db6502ddd27d65dea43bf036abbd82d0dfc9Hidetoshi Seto (base + ((is64bit == 1) ? PCI_MSI_MASK_64 : PCI_MSI_MASK_32)) 16dd159eeca971d594fa30176733b66d37acda82a3Eric W. Biederman#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) 17dd159eeca971d594fa30176733b66d37acda82a3Eric W. Biederman#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19db5004195481fcb500c929bd3a0e1c0c48eec527Hidetoshi Seto#define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE) 20db5004195481fcb500c929bd3a0e1c0c48eec527Hidetoshi Seto#define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA) 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) 2204846b5b8112e53b588038349b3e92b8485c1807Hidetoshi Seto#define multi_msix_capable(control) msix_table_size((control)) 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* MSI_H */ 25