cardbus.c revision 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 
1/*
2 * cardbus.c -- 16-bit PCMCIA core support
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * The initial developer of the original code is David A. Hinds
9 * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
10 * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
11 *
12 * (C) 1999		David A. Hinds
13 */
14
15/*
16 * Cardbus handling has been re-written to be more of a PCI bridge thing,
17 * and the PCI code basically does all the resource handling.
18 *
19 *		Linus, Jan 2000
20 */
21
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/string.h>
26#include <linux/slab.h>
27#include <linux/mm.h>
28#include <linux/pci.h>
29#include <linux/ioport.h>
30#include <asm/irq.h>
31#include <asm/io.h>
32
33#define IN_CARD_SERVICES
34#include <pcmcia/version.h>
35#include <pcmcia/cs_types.h>
36#include <pcmcia/ss.h>
37#include <pcmcia/cs.h>
38#include <pcmcia/bulkmem.h>
39#include <pcmcia/cistpl.h>
40#include "cs_internal.h"
41
42/*====================================================================*/
43
44#define FIND_FIRST_BIT(n)	((n) - ((n) & ((n)-1)))
45
46/* Offsets in the Expansion ROM Image Header */
47#define ROM_SIGNATURE		0x0000	/* 2 bytes */
48#define ROM_DATA_PTR		0x0018	/* 2 bytes */
49
50/* Offsets in the CardBus PC Card Data Structure */
51#define PCDATA_SIGNATURE	0x0000	/* 4 bytes */
52#define PCDATA_VPD_PTR		0x0008	/* 2 bytes */
53#define PCDATA_LENGTH		0x000a	/* 2 bytes */
54#define PCDATA_REVISION		0x000c
55#define PCDATA_IMAGE_SZ		0x0010	/* 2 bytes */
56#define PCDATA_ROM_LEVEL	0x0012	/* 2 bytes */
57#define PCDATA_CODE_TYPE	0x0014
58#define PCDATA_INDICATOR	0x0015
59
60/*=====================================================================
61
62    Expansion ROM's have a special layout, and pointers specify an
63    image number and an offset within that image.  xlate_rom_addr()
64    converts an image/offset address to an absolute offset from the
65    ROM's base address.
66
67=====================================================================*/
68
69static u_int xlate_rom_addr(void __iomem *b, u_int addr)
70{
71	u_int img = 0, ofs = 0, sz;
72	u_short data;
73	while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
74		if (img == (addr >> 28))
75			return (addr & 0x0fffffff) + ofs;
76		data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
77		sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
78			    (readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
79		if ((sz == 0) || (readb(b + data + PCDATA_INDICATOR) & 0x80))
80			break;
81		b += sz;
82		ofs += sz;
83		img++;
84	}
85	return 0;
86}
87
88/*=====================================================================
89
90    These are similar to setup_cis_mem and release_cis_mem for 16-bit
91    cards.  The "result" that is used externally is the cb_cis_virt
92    pointer in the struct pcmcia_socket structure.
93
94=====================================================================*/
95
96static void cb_release_cis_mem(struct pcmcia_socket * s)
97{
98	if (s->cb_cis_virt) {
99		cs_dbg(s, 1, "cb_release_cis_mem()\n");
100		iounmap(s->cb_cis_virt);
101		s->cb_cis_virt = NULL;
102		s->cb_cis_res = NULL;
103	}
104}
105
106static int cb_setup_cis_mem(struct pcmcia_socket * s, struct resource *res)
107{
108	unsigned int start, size;
109
110	if (res == s->cb_cis_res)
111		return 0;
112
113	if (s->cb_cis_res)
114		cb_release_cis_mem(s);
115
116	start = res->start;
117	size = res->end - start + 1;
118	s->cb_cis_virt = ioremap(start, size);
119
120	if (!s->cb_cis_virt)
121		return -1;
122
123	s->cb_cis_res = res;
124
125	return 0;
126}
127
128/*=====================================================================
129
130    This is used by the CIS processing code to read CIS information
131    from a CardBus device.
132
133=====================================================================*/
134
135int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void *ptr)
136{
137	struct pci_dev *dev;
138	struct resource *res;
139
140	cs_dbg(s, 3, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);
141
142	dev = pci_find_slot(s->cb_dev->subordinate->number, 0);
143	if (!dev)
144		goto fail;
145
146	/* Config space? */
147	if (space == 0) {
148		if (addr + len > 0x100)
149			goto fail;
150		for (; len; addr++, ptr++, len--)
151			pci_read_config_byte(dev, addr, ptr);
152		return 0;
153	}
154
155	res = dev->resource + space - 1;
156	if (!res->flags)
157		goto fail;
158
159	if (cb_setup_cis_mem(s, res) != 0)
160		goto fail;
161
162	if (space == 7) {
163		addr = xlate_rom_addr(s->cb_cis_virt, addr);
164		if (addr == 0)
165			goto fail;
166	}
167
168	if (addr + len > res->end - res->start)
169		goto fail;
170
171	memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
172	return 0;
173
174fail:
175	memset(ptr, 0xff, len);
176	return -1;
177}
178
179/*=====================================================================
180
181    cb_alloc() and cb_free() allocate and free the kernel data
182    structures for a Cardbus device, and handle the lowest level PCI
183    device setup issues.
184
185=====================================================================*/
186
187/*
188 * Since there is only one interrupt available to CardBus
189 * devices, all devices downstream of this device must
190 * be using this IRQ.
191 */
192static void cardbus_assign_irqs(struct pci_bus *bus, int irq)
193{
194	struct pci_dev *dev;
195
196	list_for_each_entry(dev, &bus->devices, bus_list) {
197		u8 irq_pin;
198
199		pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
200		if (irq_pin) {
201			dev->irq = irq;
202			pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
203		}
204
205		if (dev->subordinate)
206			cardbus_assign_irqs(dev->subordinate, irq);
207	}
208}
209
210int cb_alloc(struct pcmcia_socket * s)
211{
212	struct pci_bus *bus = s->cb_dev->subordinate;
213	struct pci_dev *dev;
214	unsigned int max, pass;
215
216	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
217//	pcibios_fixup_bus(bus);
218
219	max = bus->secondary;
220	for (pass = 0; pass < 2; pass++)
221		list_for_each_entry(dev, &bus->devices, bus_list)
222			if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
223			    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
224				max = pci_scan_bridge(bus, dev, max, pass);
225
226	/*
227	 * Size all resources below the CardBus controller.
228	 */
229	pci_bus_size_bridges(bus);
230	pci_bus_assign_resources(bus);
231	cardbus_assign_irqs(bus, s->pci_irq);
232	pci_enable_bridges(bus);
233	pci_bus_add_devices(bus);
234
235	s->irq.AssignedIRQ = s->pci_irq;
236	return CS_SUCCESS;
237}
238
239void cb_free(struct pcmcia_socket * s)
240{
241	struct pci_dev *bridge = s->cb_dev;
242
243	cb_release_cis_mem(s);
244
245	if (bridge)
246		pci_remove_behind_bridge(bridge);
247}
248