aacraid.h revision 5ca05594097438f81337e53ad50c2d17ffc28238
1#ifndef dprintk 2# define dprintk(x) 3#endif 4/* eg: if (nblank(dprintk(x))) */ 5#define _nblank(x) #x 6#define nblank(x) _nblank(x)[0] 7 8#include <linux/interrupt.h> 9 10/*------------------------------------------------------------------------------ 11 * D E F I N E S 12 *----------------------------------------------------------------------------*/ 13 14#ifndef AAC_DRIVER_BUILD 15# define AAC_DRIVER_BUILD 26000 16# define AAC_DRIVER_BRANCH "-ms" 17#endif 18#define MAXIMUM_NUM_CONTAINERS 32 19 20#define AAC_NUM_MGT_FIB 8 21#define AAC_NUM_IO_FIB (512 - AAC_NUM_MGT_FIB) 22#define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB) 23 24#define AAC_MAX_LUN (8) 25 26#define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff) 27#define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256) 28 29/* 30 * These macros convert from physical channels to virtual channels 31 */ 32#define CONTAINER_CHANNEL (0) 33#define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL) 34#define CONTAINER_TO_ID(cont) (cont) 35#define CONTAINER_TO_LUN(cont) (0) 36 37#define aac_phys_to_logical(x) ((x)+1) 38#define aac_logical_to_phys(x) ((x)?(x)-1:0) 39 40/* #define AAC_DETAILED_STATUS_INFO */ 41 42struct diskparm 43{ 44 int heads; 45 int sectors; 46 int cylinders; 47}; 48 49 50/* 51 * Firmware constants 52 */ 53 54#define CT_NONE 0 55#define CT_OK 218 56#define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */ 57#define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */ 58 59/* 60 * Host side memory scatter gather list 61 * Used by the adapter for read, write, and readdirplus operations 62 * We have separate 32 and 64 bit version because even 63 * on 64 bit systems not all cards support the 64 bit version 64 */ 65struct sgentry { 66 __le32 addr; /* 32-bit address. */ 67 __le32 count; /* Length. */ 68}; 69 70struct user_sgentry { 71 u32 addr; /* 32-bit address. */ 72 u32 count; /* Length. */ 73}; 74 75struct sgentry64 { 76 __le32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ 77 __le32 count; /* Length. */ 78}; 79 80struct user_sgentry64 { 81 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ 82 u32 count; /* Length. */ 83}; 84 85struct sgentryraw { 86 __le32 next; /* reserved for F/W use */ 87 __le32 prev; /* reserved for F/W use */ 88 __le32 addr[2]; 89 __le32 count; 90 __le32 flags; /* reserved for F/W use */ 91}; 92 93struct user_sgentryraw { 94 u32 next; /* reserved for F/W use */ 95 u32 prev; /* reserved for F/W use */ 96 u32 addr[2]; 97 u32 count; 98 u32 flags; /* reserved for F/W use */ 99}; 100 101/* 102 * SGMAP 103 * 104 * This is the SGMAP structure for all commands that use 105 * 32-bit addressing. 106 */ 107 108struct sgmap { 109 __le32 count; 110 struct sgentry sg[1]; 111}; 112 113struct user_sgmap { 114 u32 count; 115 struct user_sgentry sg[1]; 116}; 117 118struct sgmap64 { 119 __le32 count; 120 struct sgentry64 sg[1]; 121}; 122 123struct user_sgmap64 { 124 u32 count; 125 struct user_sgentry64 sg[1]; 126}; 127 128struct sgmapraw { 129 __le32 count; 130 struct sgentryraw sg[1]; 131}; 132 133struct user_sgmapraw { 134 u32 count; 135 struct user_sgentryraw sg[1]; 136}; 137 138struct creation_info 139{ 140 u8 buildnum; /* e.g., 588 */ 141 u8 usec; /* e.g., 588 */ 142 u8 via; /* e.g., 1 = FSU, 143 * 2 = API 144 */ 145 u8 year; /* e.g., 1997 = 97 */ 146 __le32 date; /* 147 * unsigned Month :4; // 1 - 12 148 * unsigned Day :6; // 1 - 32 149 * unsigned Hour :6; // 0 - 23 150 * unsigned Minute :6; // 0 - 60 151 * unsigned Second :6; // 0 - 60 152 */ 153 __le32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */ 154}; 155 156 157/* 158 * Define all the constants needed for the communication interface 159 */ 160 161/* 162 * Define how many queue entries each queue will have and the total 163 * number of entries for the entire communication interface. Also define 164 * how many queues we support. 165 * 166 * This has to match the controller 167 */ 168 169#define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response 170#define HOST_HIGH_CMD_ENTRIES 4 171#define HOST_NORM_CMD_ENTRIES 8 172#define ADAP_HIGH_CMD_ENTRIES 4 173#define ADAP_NORM_CMD_ENTRIES 512 174#define HOST_HIGH_RESP_ENTRIES 4 175#define HOST_NORM_RESP_ENTRIES 512 176#define ADAP_HIGH_RESP_ENTRIES 4 177#define ADAP_NORM_RESP_ENTRIES 8 178 179#define TOTAL_QUEUE_ENTRIES \ 180 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \ 181 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES) 182 183 184/* 185 * Set the queues on a 16 byte alignment 186 */ 187 188#define QUEUE_ALIGNMENT 16 189 190/* 191 * The queue headers define the Communication Region queues. These 192 * are physically contiguous and accessible by both the adapter and the 193 * host. Even though all queue headers are in the same contiguous block 194 * they will be represented as individual units in the data structures. 195 */ 196 197struct aac_entry { 198 __le32 size; /* Size in bytes of Fib which this QE points to */ 199 __le32 addr; /* Receiver address of the FIB */ 200}; 201 202/* 203 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped 204 * adjacently and in that order. 205 */ 206 207struct aac_qhdr { 208 __le64 header_addr;/* Address to hand the adapter to access 209 to this queue head */ 210 __le32 *producer; /* The producer index for this queue (host address) */ 211 __le32 *consumer; /* The consumer index for this queue (host address) */ 212}; 213 214/* 215 * Define all the events which the adapter would like to notify 216 * the host of. 217 */ 218 219#define HostNormCmdQue 1 /* Change in host normal priority command queue */ 220#define HostHighCmdQue 2 /* Change in host high priority command queue */ 221#define HostNormRespQue 3 /* Change in host normal priority response queue */ 222#define HostHighRespQue 4 /* Change in host high priority response queue */ 223#define AdapNormRespNotFull 5 224#define AdapHighRespNotFull 6 225#define AdapNormCmdNotFull 7 226#define AdapHighCmdNotFull 8 227#define SynchCommandComplete 9 228#define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */ 229 230/* 231 * Define all the events the host wishes to notify the 232 * adapter of. The first four values much match the Qid the 233 * corresponding queue. 234 */ 235 236#define AdapNormCmdQue 2 237#define AdapHighCmdQue 3 238#define AdapNormRespQue 6 239#define AdapHighRespQue 7 240#define HostShutdown 8 241#define HostPowerFail 9 242#define FatalCommError 10 243#define HostNormRespNotFull 11 244#define HostHighRespNotFull 12 245#define HostNormCmdNotFull 13 246#define HostHighCmdNotFull 14 247#define FastIo 15 248#define AdapPrintfDone 16 249 250/* 251 * Define all the queues that the adapter and host use to communicate 252 * Number them to match the physical queue layout. 253 */ 254 255enum aac_queue_types { 256 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */ 257 HostHighCmdQueue, /* Adapter to host high priority command traffic */ 258 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */ 259 AdapHighCmdQueue, /* Host to adapter high priority command traffic */ 260 HostNormRespQueue, /* Adapter to host normal priority response traffic */ 261 HostHighRespQueue, /* Adapter to host high priority response traffic */ 262 AdapNormRespQueue, /* Host to adapter normal priority response traffic */ 263 AdapHighRespQueue /* Host to adapter high priority response traffic */ 264}; 265 266/* 267 * Assign type values to the FSA communication data structures 268 */ 269 270#define FIB_MAGIC 0x0001 271 272/* 273 * Define the priority levels the FSA communication routines support. 274 */ 275 276#define FsaNormal 1 277 278/* 279 * Define the FIB. The FIB is the where all the requested data and 280 * command information are put to the application on the FSA adapter. 281 */ 282 283struct aac_fibhdr { 284 __le32 XferState; /* Current transfer state for this CCB */ 285 __le16 Command; /* Routing information for the destination */ 286 u8 StructType; /* Type FIB */ 287 u8 Flags; /* Flags for FIB */ 288 __le16 Size; /* Size of this FIB in bytes */ 289 __le16 SenderSize; /* Size of the FIB in the sender 290 (for response sizing) */ 291 __le32 SenderFibAddress; /* Host defined data in the FIB */ 292 __le32 ReceiverFibAddress;/* Logical address of this FIB for 293 the adapter */ 294 u32 SenderData; /* Place holder for the sender to store data */ 295 union { 296 struct { 297 __le32 _ReceiverTimeStart; /* Timestamp for 298 receipt of fib */ 299 __le32 _ReceiverTimeDone; /* Timestamp for 300 completion of fib */ 301 } _s; 302 } _u; 303}; 304 305struct hw_fib { 306 struct aac_fibhdr header; 307 u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data 308}; 309 310/* 311 * FIB commands 312 */ 313 314#define TestCommandResponse 1 315#define TestAdapterCommand 2 316/* 317 * Lowlevel and comm commands 318 */ 319#define LastTestCommand 100 320#define ReinitHostNormCommandQueue 101 321#define ReinitHostHighCommandQueue 102 322#define ReinitHostHighRespQueue 103 323#define ReinitHostNormRespQueue 104 324#define ReinitAdapNormCommandQueue 105 325#define ReinitAdapHighCommandQueue 107 326#define ReinitAdapHighRespQueue 108 327#define ReinitAdapNormRespQueue 109 328#define InterfaceShutdown 110 329#define DmaCommandFib 120 330#define StartProfile 121 331#define TermProfile 122 332#define SpeedTest 123 333#define TakeABreakPt 124 334#define RequestPerfData 125 335#define SetInterruptDefTimer 126 336#define SetInterruptDefCount 127 337#define GetInterruptDefStatus 128 338#define LastCommCommand 129 339/* 340 * Filesystem commands 341 */ 342#define NuFileSystem 300 343#define UFS 301 344#define HostFileSystem 302 345#define LastFileSystemCommand 303 346/* 347 * Container Commands 348 */ 349#define ContainerCommand 500 350#define ContainerCommand64 501 351#define ContainerRawIo 502 352/* 353 * Scsi Port commands (scsi passthrough) 354 */ 355#define ScsiPortCommand 600 356#define ScsiPortCommand64 601 357/* 358 * Misc house keeping and generic adapter initiated commands 359 */ 360#define AifRequest 700 361#define CheckRevision 701 362#define FsaHostShutdown 702 363#define RequestAdapterInfo 703 364#define IsAdapterPaused 704 365#define SendHostTime 705 366#define RequestSupplementAdapterInfo 706 367#define LastMiscCommand 707 368 369/* 370 * Commands that will target the failover level on the FSA adapter 371 */ 372 373enum fib_xfer_state { 374 HostOwned = (1<<0), 375 AdapterOwned = (1<<1), 376 FibInitialized = (1<<2), 377 FibEmpty = (1<<3), 378 AllocatedFromPool = (1<<4), 379 SentFromHost = (1<<5), 380 SentFromAdapter = (1<<6), 381 ResponseExpected = (1<<7), 382 NoResponseExpected = (1<<8), 383 AdapterProcessed = (1<<9), 384 HostProcessed = (1<<10), 385 HighPriority = (1<<11), 386 NormalPriority = (1<<12), 387 Async = (1<<13), 388 AsyncIo = (1<<13), // rpbfix: remove with new regime 389 PageFileIo = (1<<14), // rpbfix: remove with new regime 390 ShutdownRequest = (1<<15), 391 LazyWrite = (1<<16), // rpbfix: remove with new regime 392 AdapterMicroFib = (1<<17), 393 BIOSFibPath = (1<<18), 394 FastResponseCapable = (1<<19), 395 ApiFib = (1<<20) // Its an API Fib. 396}; 397 398/* 399 * The following defines needs to be updated any time there is an 400 * incompatible change made to the aac_init structure. 401 */ 402 403#define ADAPTER_INIT_STRUCT_REVISION 3 404#define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science 405 406struct aac_init 407{ 408 __le32 InitStructRevision; 409 __le32 MiniPortRevision; 410 __le32 fsrev; 411 __le32 CommHeaderAddress; 412 __le32 FastIoCommAreaAddress; 413 __le32 AdapterFibsPhysicalAddress; 414 __le32 AdapterFibsVirtualAddress; 415 __le32 AdapterFibsSize; 416 __le32 AdapterFibAlign; 417 __le32 printfbuf; 418 __le32 printfbufsiz; 419 __le32 HostPhysMemPages; /* number of 4k pages of host 420 physical memory */ 421 __le32 HostElapsedSeconds; /* number of seconds since 1970. */ 422 /* 423 * ADAPTER_INIT_STRUCT_REVISION_4 begins here 424 */ 425 __le32 InitFlags; /* flags for supported features */ 426#define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001 427#define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010 428#define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020 429 __le32 MaxIoCommands; /* max outstanding commands */ 430 __le32 MaxIoSize; /* largest I/O command */ 431 __le32 MaxFibSize; /* largest FIB to adapter */ 432}; 433 434enum aac_log_level { 435 LOG_AAC_INIT = 10, 436 LOG_AAC_INFORMATIONAL = 20, 437 LOG_AAC_WARNING = 30, 438 LOG_AAC_LOW_ERROR = 40, 439 LOG_AAC_MEDIUM_ERROR = 50, 440 LOG_AAC_HIGH_ERROR = 60, 441 LOG_AAC_PANIC = 70, 442 LOG_AAC_DEBUG = 80, 443 LOG_AAC_WINDBG_PRINT = 90 444}; 445 446#define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b 447#define FSAFS_NTC_FIB_CONTEXT 0x030c 448 449struct aac_dev; 450struct fib; 451struct scsi_cmnd; 452 453struct adapter_ops 454{ 455 /* Low level operations */ 456 void (*adapter_interrupt)(struct aac_dev *dev); 457 void (*adapter_notify)(struct aac_dev *dev, u32 event); 458 void (*adapter_disable_int)(struct aac_dev *dev); 459 void (*adapter_enable_int)(struct aac_dev *dev); 460 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4); 461 int (*adapter_check_health)(struct aac_dev *dev); 462 int (*adapter_restart)(struct aac_dev *dev, int bled); 463 /* Transport operations */ 464 int (*adapter_ioremap)(struct aac_dev * dev, u32 size); 465 irq_handler_t adapter_intr; 466 /* Packet operations */ 467 int (*adapter_deliver)(struct fib * fib); 468 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba); 469 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count); 470 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua); 471 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd); 472 /* Administrative operations */ 473 int (*adapter_comm)(struct aac_dev * dev, int comm); 474}; 475 476/* 477 * Define which interrupt handler needs to be installed 478 */ 479 480struct aac_driver_ident 481{ 482 int (*init)(struct aac_dev *dev); 483 char * name; 484 char * vname; 485 char * model; 486 u16 channels; 487 int quirks; 488}; 489/* 490 * Some adapter firmware needs communication memory 491 * below 2gig. This tells the init function to set the 492 * dma mask such that fib memory will be allocated where the 493 * adapter firmware can get to it. 494 */ 495#define AAC_QUIRK_31BIT 0x0001 496 497/* 498 * Some adapter firmware, when the raid card's cache is turned off, can not 499 * split up scatter gathers in order to deal with the limits of the 500 * underlying CHIM. This limit is 34 scatter gather elements. 501 */ 502#define AAC_QUIRK_34SG 0x0002 503 504/* 505 * This adapter is a slave (no Firmware) 506 */ 507#define AAC_QUIRK_SLAVE 0x0004 508 509/* 510 * This adapter is a master. 511 */ 512#define AAC_QUIRK_MASTER 0x0008 513 514/* 515 * Some adapter firmware perform poorly when it must split up scatter gathers 516 * in order to deal with the limits of the underlying CHIM. This limit in this 517 * class of adapters is 17 scatter gather elements. 518 */ 519#define AAC_QUIRK_17SG 0x0010 520 521/* 522 * Some adapter firmware does not support 64 bit scsi passthrough 523 * commands. 524 */ 525#define AAC_QUIRK_SCSI_32 0x0020 526 527/* 528 * The adapter interface specs all queues to be located in the same 529 * physically contiguous block. The host structure that defines the 530 * commuication queues will assume they are each a separate physically 531 * contiguous memory region that will support them all being one big 532 * contiguous block. 533 * There is a command and response queue for each level and direction of 534 * commuication. These regions are accessed by both the host and adapter. 535 */ 536 537struct aac_queue { 538 u64 logical; /*address we give the adapter */ 539 struct aac_entry *base; /*system virtual address */ 540 struct aac_qhdr headers; /*producer,consumer q headers*/ 541 u32 entries; /*Number of queue entries */ 542 wait_queue_head_t qfull; /*Event to wait on if q full */ 543 wait_queue_head_t cmdready; /*Cmd ready from the adapter */ 544 /* This is only valid for adapter to host command queues. */ 545 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */ 546 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */ 547 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */ 548 /* only valid for command queues which receive entries from the adapter. */ 549 u32 numpending; /* Number of entries on outstanding queue. */ 550 struct aac_dev * dev; /* Back pointer to adapter structure */ 551}; 552 553/* 554 * Message queues. The order here is important, see also the 555 * queue type ordering 556 */ 557 558struct aac_queue_block 559{ 560 struct aac_queue queue[8]; 561}; 562 563/* 564 * SaP1 Message Unit Registers 565 */ 566 567struct sa_drawbridge_CSR { 568 /* Offset | Name */ 569 __le32 reserved[10]; /* 00h-27h | Reserved */ 570 u8 LUT_Offset; /* 28h | Lookup Table Offset */ 571 u8 reserved1[3]; /* 29h-2bh | Reserved */ 572 __le32 LUT_Data; /* 2ch | Looup Table Data */ 573 __le32 reserved2[26]; /* 30h-97h | Reserved */ 574 __le16 PRICLEARIRQ; /* 98h | Primary Clear Irq */ 575 __le16 SECCLEARIRQ; /* 9ah | Secondary Clear Irq */ 576 __le16 PRISETIRQ; /* 9ch | Primary Set Irq */ 577 __le16 SECSETIRQ; /* 9eh | Secondary Set Irq */ 578 __le16 PRICLEARIRQMASK;/* a0h | Primary Clear Irq Mask */ 579 __le16 SECCLEARIRQMASK;/* a2h | Secondary Clear Irq Mask */ 580 __le16 PRISETIRQMASK; /* a4h | Primary Set Irq Mask */ 581 __le16 SECSETIRQMASK; /* a6h | Secondary Set Irq Mask */ 582 __le32 MAILBOX0; /* a8h | Scratchpad 0 */ 583 __le32 MAILBOX1; /* ach | Scratchpad 1 */ 584 __le32 MAILBOX2; /* b0h | Scratchpad 2 */ 585 __le32 MAILBOX3; /* b4h | Scratchpad 3 */ 586 __le32 MAILBOX4; /* b8h | Scratchpad 4 */ 587 __le32 MAILBOX5; /* bch | Scratchpad 5 */ 588 __le32 MAILBOX6; /* c0h | Scratchpad 6 */ 589 __le32 MAILBOX7; /* c4h | Scratchpad 7 */ 590 __le32 ROM_Setup_Data; /* c8h | Rom Setup and Data */ 591 __le32 ROM_Control_Addr;/* cch | Rom Control and Address */ 592 __le32 reserved3[12]; /* d0h-ffh | reserved */ 593 __le32 LUT[64]; /* 100h-1ffh | Lookup Table Entries */ 594}; 595 596#define Mailbox0 SaDbCSR.MAILBOX0 597#define Mailbox1 SaDbCSR.MAILBOX1 598#define Mailbox2 SaDbCSR.MAILBOX2 599#define Mailbox3 SaDbCSR.MAILBOX3 600#define Mailbox4 SaDbCSR.MAILBOX4 601#define Mailbox5 SaDbCSR.MAILBOX5 602#define Mailbox6 SaDbCSR.MAILBOX6 603#define Mailbox7 SaDbCSR.MAILBOX7 604 605#define DoorbellReg_p SaDbCSR.PRISETIRQ 606#define DoorbellReg_s SaDbCSR.SECSETIRQ 607#define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ 608 609 610#define DOORBELL_0 0x0001 611#define DOORBELL_1 0x0002 612#define DOORBELL_2 0x0004 613#define DOORBELL_3 0x0008 614#define DOORBELL_4 0x0010 615#define DOORBELL_5 0x0020 616#define DOORBELL_6 0x0040 617 618 619#define PrintfReady DOORBELL_5 620#define PrintfDone DOORBELL_5 621 622struct sa_registers { 623 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */ 624}; 625 626 627#define Sa_MINIPORT_REVISION 1 628 629#define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) 630#define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) 631#define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) 632#define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) 633 634/* 635 * Rx Message Unit Registers 636 */ 637 638struct rx_mu_registers { 639 /* Local | PCI*| Name */ 640 __le32 ARSR; /* 1300h | 00h | APIC Register Select Register */ 641 __le32 reserved0; /* 1304h | 04h | Reserved */ 642 __le32 AWR; /* 1308h | 08h | APIC Window Register */ 643 __le32 reserved1; /* 130Ch | 0Ch | Reserved */ 644 __le32 IMRx[2]; /* 1310h | 10h | Inbound Message Registers */ 645 __le32 OMRx[2]; /* 1318h | 18h | Outbound Message Registers */ 646 __le32 IDR; /* 1320h | 20h | Inbound Doorbell Register */ 647 __le32 IISR; /* 1324h | 24h | Inbound Interrupt 648 Status Register */ 649 __le32 IIMR; /* 1328h | 28h | Inbound Interrupt 650 Mask Register */ 651 __le32 ODR; /* 132Ch | 2Ch | Outbound Doorbell Register */ 652 __le32 OISR; /* 1330h | 30h | Outbound Interrupt 653 Status Register */ 654 __le32 OIMR; /* 1334h | 34h | Outbound Interrupt 655 Mask Register */ 656 __le32 reserved2; /* 1338h | 38h | Reserved */ 657 __le32 reserved3; /* 133Ch | 3Ch | Reserved */ 658 __le32 InboundQueue;/* 1340h | 40h | Inbound Queue Port relative to firmware */ 659 __le32 OutboundQueue;/*1344h | 44h | Outbound Queue Port relative to firmware */ 660 /* * Must access through ATU Inbound 661 Translation Window */ 662}; 663 664struct rx_inbound { 665 __le32 Mailbox[8]; 666}; 667 668#define INBOUNDDOORBELL_0 0x00000001 669#define INBOUNDDOORBELL_1 0x00000002 670#define INBOUNDDOORBELL_2 0x00000004 671#define INBOUNDDOORBELL_3 0x00000008 672#define INBOUNDDOORBELL_4 0x00000010 673#define INBOUNDDOORBELL_5 0x00000020 674#define INBOUNDDOORBELL_6 0x00000040 675 676#define OUTBOUNDDOORBELL_0 0x00000001 677#define OUTBOUNDDOORBELL_1 0x00000002 678#define OUTBOUNDDOORBELL_2 0x00000004 679#define OUTBOUNDDOORBELL_3 0x00000008 680#define OUTBOUNDDOORBELL_4 0x00000010 681 682#define InboundDoorbellReg MUnit.IDR 683#define OutboundDoorbellReg MUnit.ODR 684 685struct rx_registers { 686 struct rx_mu_registers MUnit; /* 1300h - 1344h */ 687 __le32 reserved1[2]; /* 1348h - 134ch */ 688 struct rx_inbound IndexRegs; 689}; 690 691#define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) 692#define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) 693#define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) 694#define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR)) 695 696/* 697 * Rkt Message Unit Registers (same as Rx, except a larger reserve region) 698 */ 699 700#define rkt_mu_registers rx_mu_registers 701#define rkt_inbound rx_inbound 702 703struct rkt_registers { 704 struct rkt_mu_registers MUnit; /* 1300h - 1344h */ 705 __le32 reserved1[1006]; /* 1348h - 22fch */ 706 struct rkt_inbound IndexRegs; /* 2300h - */ 707}; 708 709#define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR)) 710#define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR)) 711#define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR)) 712#define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR)) 713 714typedef void (*fib_callback)(void *ctxt, struct fib *fibctx); 715 716struct aac_fib_context { 717 s16 type; // used for verification of structure 718 s16 size; 719 u32 unique; // unique value representing this context 720 ulong jiffies; // used for cleanup - dmb changed to ulong 721 struct list_head next; // used to link context's into a linked list 722 struct semaphore wait_sem; // this is used to wait for the next fib to arrive. 723 int wait; // Set to true when thread is in WaitForSingleObject 724 unsigned long count; // total number of FIBs on FibList 725 struct list_head fib_list; // this holds fibs and their attachd hw_fibs 726}; 727 728struct sense_data { 729 u8 error_code; /* 70h (current errors), 71h(deferred errors) */ 730 u8 valid:1; /* A valid bit of one indicates that the information */ 731 /* field contains valid information as defined in the 732 * SCSI-2 Standard. 733 */ 734 u8 segment_number; /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */ 735 u8 sense_key:4; /* Sense Key */ 736 u8 reserved:1; 737 u8 ILI:1; /* Incorrect Length Indicator */ 738 u8 EOM:1; /* End Of Medium - reserved for random access devices */ 739 u8 filemark:1; /* Filemark - reserved for random access devices */ 740 741 u8 information[4]; /* for direct-access devices, contains the unsigned 742 * logical block address or residue associated with 743 * the sense key 744 */ 745 u8 add_sense_len; /* number of additional sense bytes to follow this field */ 746 u8 cmnd_info[4]; /* not used */ 747 u8 ASC; /* Additional Sense Code */ 748 u8 ASCQ; /* Additional Sense Code Qualifier */ 749 u8 FRUC; /* Field Replaceable Unit Code - not used */ 750 u8 bit_ptr:3; /* indicates which byte of the CDB or parameter data 751 * was in error 752 */ 753 u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that 754 * the bit_ptr field has valid value 755 */ 756 u8 reserved2:2; 757 u8 CD:1; /* command data bit: 1- illegal parameter in CDB. 758 * 0- illegal parameter in data. 759 */ 760 u8 SKSV:1; 761 u8 field_ptr[2]; /* byte of the CDB or parameter data in error */ 762}; 763 764struct fsa_dev_info { 765 u64 last; 766 u64 size; 767 u32 type; 768 u32 config_waiting_on; 769 unsigned long config_waiting_stamp; 770 u16 queue_depth; 771 u8 config_needed; 772 u8 valid; 773 u8 ro; 774 u8 locked; 775 u8 deleted; 776 char devname[8]; 777 struct sense_data sense_data; 778}; 779 780struct fib { 781 void *next; /* this is used by the allocator */ 782 s16 type; 783 s16 size; 784 /* 785 * The Adapter that this I/O is destined for. 786 */ 787 struct aac_dev *dev; 788 /* 789 * This is the event the sendfib routine will wait on if the 790 * caller did not pass one and this is synch io. 791 */ 792 struct semaphore event_wait; 793 spinlock_t event_lock; 794 795 u32 done; /* gets set to 1 when fib is complete */ 796 fib_callback callback; 797 void *callback_data; 798 u32 flags; // u32 dmb was ulong 799 /* 800 * And for the internal issue/reply queues (we may be able 801 * to merge these two) 802 */ 803 struct list_head fiblink; 804 void *data; 805 struct hw_fib *hw_fib_va; /* Actual shared object */ 806 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/ 807}; 808 809/* 810 * Adapter Information Block 811 * 812 * This is returned by the RequestAdapterInfo block 813 */ 814 815struct aac_adapter_info 816{ 817 __le32 platform; 818 __le32 cpu; 819 __le32 subcpu; 820 __le32 clock; 821 __le32 execmem; 822 __le32 buffermem; 823 __le32 totalmem; 824 __le32 kernelrev; 825 __le32 kernelbuild; 826 __le32 monitorrev; 827 __le32 monitorbuild; 828 __le32 hwrev; 829 __le32 hwbuild; 830 __le32 biosrev; 831 __le32 biosbuild; 832 __le32 cluster; 833 __le32 clusterchannelmask; 834 __le32 serial[2]; 835 __le32 battery; 836 __le32 options; 837 __le32 OEM; 838}; 839 840struct aac_supplement_adapter_info 841{ 842 u8 AdapterTypeText[17+1]; 843 u8 Pad[2]; 844 __le32 FlashMemoryByteSize; 845 __le32 FlashImageId; 846 __le32 MaxNumberPorts; 847 __le32 Version; 848 __le32 FeatureBits; 849 u8 SlotNumber; 850 u8 ReservedPad0[3]; 851 u8 BuildDate[12]; 852 __le32 CurrentNumberPorts; 853 struct { 854 u8 AssemblyPn[8]; 855 u8 FruPn[8]; 856 u8 BatteryFruPn[8]; 857 u8 EcVersionString[8]; 858 u8 Tsid[12]; 859 } VpdInfo; 860 __le32 FlashFirmwareRevision; 861 __le32 FlashFirmwareBuild; 862 __le32 RaidTypeMorphOptions; 863 __le32 FlashFirmwareBootRevision; 864 __le32 FlashFirmwareBootBuild; 865 u8 MfgPcbaSerialNo[12]; 866 u8 MfgWWNName[8]; 867 __le32 SupportedOptions2; 868 __le32 StructExpansion; 869 /* StructExpansion == 1 */ 870 __le32 FeatureBits3; 871 __le32 SupportedPerformanceModes; 872 __le32 ReservedForFutureGrowth[80]; 873}; 874#define AAC_FEATURE_FALCON cpu_to_le32(0x00000010) 875#define AAC_FEATURE_JBOD cpu_to_le32(0x08000000) 876/* SupportedOptions2 */ 877#define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001) 878#define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002) 879#define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004) 880#define AAC_SIS_VERSION_V3 3 881#define AAC_SIS_SLOT_UNKNOWN 0xFF 882 883#define GetBusInfo 0x00000009 884struct aac_bus_info { 885 __le32 Command; /* VM_Ioctl */ 886 __le32 ObjType; /* FT_DRIVE */ 887 __le32 MethodId; /* 1 = SCSI Layer */ 888 __le32 ObjectId; /* Handle */ 889 __le32 CtlCmd; /* GetBusInfo */ 890}; 891 892struct aac_bus_info_response { 893 __le32 Status; /* ST_OK */ 894 __le32 ObjType; 895 __le32 MethodId; /* unused */ 896 __le32 ObjectId; /* unused */ 897 __le32 CtlCmd; /* unused */ 898 __le32 ProbeComplete; 899 __le32 BusCount; 900 __le32 TargetsPerBus; 901 u8 InitiatorBusId[10]; 902 u8 BusValid[10]; 903}; 904 905/* 906 * Battery platforms 907 */ 908#define AAC_BAT_REQ_PRESENT (1) 909#define AAC_BAT_REQ_NOTPRESENT (2) 910#define AAC_BAT_OPT_PRESENT (3) 911#define AAC_BAT_OPT_NOTPRESENT (4) 912#define AAC_BAT_NOT_SUPPORTED (5) 913/* 914 * cpu types 915 */ 916#define AAC_CPU_SIMULATOR (1) 917#define AAC_CPU_I960 (2) 918#define AAC_CPU_STRONGARM (3) 919 920/* 921 * Supported Options 922 */ 923#define AAC_OPT_SNAPSHOT cpu_to_le32(1) 924#define AAC_OPT_CLUSTERS cpu_to_le32(1<<1) 925#define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2) 926#define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3) 927#define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4) 928#define AAC_OPT_RAID50 cpu_to_le32(1<<5) 929#define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6) 930#define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7) 931#define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8) 932#define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9) 933#define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10) 934#define AAC_OPT_ALARM cpu_to_le32(1<<11) 935#define AAC_OPT_NONDASD cpu_to_le32(1<<12) 936#define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13) 937#define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14) 938#define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16) 939#define AAC_OPT_NEW_COMM cpu_to_le32(1<<17) 940#define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18) 941 942struct aac_dev 943{ 944 struct list_head entry; 945 const char *name; 946 int id; 947 948 /* 949 * negotiated FIB settings 950 */ 951 unsigned max_fib_size; 952 unsigned sg_tablesize; 953 954 /* 955 * Map for 128 fib objects (64k) 956 */ 957 dma_addr_t hw_fib_pa; 958 struct hw_fib *hw_fib_va; 959 struct hw_fib *aif_base_va; 960 /* 961 * Fib Headers 962 */ 963 struct fib *fibs; 964 965 struct fib *free_fib; 966 spinlock_t fib_lock; 967 968 struct aac_queue_block *queues; 969 /* 970 * The user API will use an IOCTL to register itself to receive 971 * FIBs from the adapter. The following list is used to keep 972 * track of all the threads that have requested these FIBs. The 973 * mutex is used to synchronize access to all data associated 974 * with the adapter fibs. 975 */ 976 struct list_head fib_list; 977 978 struct adapter_ops a_ops; 979 unsigned long fsrev; /* Main driver's revision number */ 980 981 unsigned base_size; /* Size of mapped in region */ 982 struct aac_init *init; /* Holds initialization info to communicate with adapter */ 983 dma_addr_t init_pa; /* Holds physical address of the init struct */ 984 985 struct pci_dev *pdev; /* Our PCI interface */ 986 void * printfbuf; /* pointer to buffer used for printf's from the adapter */ 987 void * comm_addr; /* Base address of Comm area */ 988 dma_addr_t comm_phys; /* Physical Address of Comm area */ 989 size_t comm_size; 990 991 struct Scsi_Host *scsi_host_ptr; 992 int maximum_num_containers; 993 int maximum_num_physicals; 994 int maximum_num_channels; 995 struct fsa_dev_info *fsa_dev; 996 struct task_struct *thread; 997 int cardtype; 998 999 /* 1000 * The following is the device specific extension. 1001 */ 1002#ifndef AAC_MIN_FOOTPRINT_SIZE 1003# define AAC_MIN_FOOTPRINT_SIZE 8192 1004#endif 1005 union 1006 { 1007 struct sa_registers __iomem *sa; 1008 struct rx_registers __iomem *rx; 1009 struct rkt_registers __iomem *rkt; 1010 } regs; 1011 volatile void __iomem *base; 1012 volatile struct rx_inbound __iomem *IndexRegs; 1013 u32 OIMR; /* Mask Register Cache */ 1014 /* 1015 * AIF thread states 1016 */ 1017 u32 aif_thread; 1018 struct aac_adapter_info adapter_info; 1019 struct aac_supplement_adapter_info supplement_adapter_info; 1020 /* These are in adapter info but they are in the io flow so 1021 * lets break them out so we don't have to do an AND to check them 1022 */ 1023 u8 nondasd_support; 1024 u8 jbod; 1025 u8 cache_protected; 1026 u8 dac_support; 1027 u8 needs_dac; 1028 u8 raid_scsi_mode; 1029 u8 comm_interface; 1030# define AAC_COMM_PRODUCER 0 1031# define AAC_COMM_MESSAGE 1 1032 /* macro side-effects BEWARE */ 1033# define raw_io_interface \ 1034 init->InitStructRevision==cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4) 1035 u8 raw_io_64; 1036 u8 printf_enabled; 1037 u8 in_reset; 1038 u8 msi; 1039 int management_fib_count; 1040 spinlock_t manage_lock; 1041 1042}; 1043 1044#define aac_adapter_interrupt(dev) \ 1045 (dev)->a_ops.adapter_interrupt(dev) 1046 1047#define aac_adapter_notify(dev, event) \ 1048 (dev)->a_ops.adapter_notify(dev, event) 1049 1050#define aac_adapter_disable_int(dev) \ 1051 (dev)->a_ops.adapter_disable_int(dev) 1052 1053#define aac_adapter_enable_int(dev) \ 1054 (dev)->a_ops.adapter_enable_int(dev) 1055 1056#define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \ 1057 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) 1058 1059#define aac_adapter_check_health(dev) \ 1060 (dev)->a_ops.adapter_check_health(dev) 1061 1062#define aac_adapter_restart(dev,bled) \ 1063 (dev)->a_ops.adapter_restart(dev,bled) 1064 1065#define aac_adapter_ioremap(dev, size) \ 1066 (dev)->a_ops.adapter_ioremap(dev, size) 1067 1068#define aac_adapter_deliver(fib) \ 1069 ((fib)->dev)->a_ops.adapter_deliver(fib) 1070 1071#define aac_adapter_bounds(dev,cmd,lba) \ 1072 dev->a_ops.adapter_bounds(dev,cmd,lba) 1073 1074#define aac_adapter_read(fib,cmd,lba,count) \ 1075 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count) 1076 1077#define aac_adapter_write(fib,cmd,lba,count,fua) \ 1078 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua) 1079 1080#define aac_adapter_scsi(fib,cmd) \ 1081 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd) 1082 1083#define aac_adapter_comm(dev,comm) \ 1084 (dev)->a_ops.adapter_comm(dev, comm) 1085 1086#define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001) 1087#define FIB_CONTEXT_FLAG (0x00000002) 1088 1089/* 1090 * Define the command values 1091 */ 1092 1093#define Null 0 1094#define GetAttributes 1 1095#define SetAttributes 2 1096#define Lookup 3 1097#define ReadLink 4 1098#define Read 5 1099#define Write 6 1100#define Create 7 1101#define MakeDirectory 8 1102#define SymbolicLink 9 1103#define MakeNode 10 1104#define Removex 11 1105#define RemoveDirectoryx 12 1106#define Rename 13 1107#define Link 14 1108#define ReadDirectory 15 1109#define ReadDirectoryPlus 16 1110#define FileSystemStatus 17 1111#define FileSystemInfo 18 1112#define PathConfigure 19 1113#define Commit 20 1114#define Mount 21 1115#define UnMount 22 1116#define Newfs 23 1117#define FsCheck 24 1118#define FsSync 25 1119#define SimReadWrite 26 1120#define SetFileSystemStatus 27 1121#define BlockRead 28 1122#define BlockWrite 29 1123#define NvramIoctl 30 1124#define FsSyncWait 31 1125#define ClearArchiveBit 32 1126#define SetAcl 33 1127#define GetAcl 34 1128#define AssignAcl 35 1129#define FaultInsertion 36 /* Fault Insertion Command */ 1130#define CrazyCache 37 /* Crazycache */ 1131 1132#define MAX_FSACOMMAND_NUM 38 1133 1134 1135/* 1136 * Define the status returns. These are very unixlike although 1137 * most are not in fact used 1138 */ 1139 1140#define ST_OK 0 1141#define ST_PERM 1 1142#define ST_NOENT 2 1143#define ST_IO 5 1144#define ST_NXIO 6 1145#define ST_E2BIG 7 1146#define ST_ACCES 13 1147#define ST_EXIST 17 1148#define ST_XDEV 18 1149#define ST_NODEV 19 1150#define ST_NOTDIR 20 1151#define ST_ISDIR 21 1152#define ST_INVAL 22 1153#define ST_FBIG 27 1154#define ST_NOSPC 28 1155#define ST_ROFS 30 1156#define ST_MLINK 31 1157#define ST_WOULDBLOCK 35 1158#define ST_NAMETOOLONG 63 1159#define ST_NOTEMPTY 66 1160#define ST_DQUOT 69 1161#define ST_STALE 70 1162#define ST_REMOTE 71 1163#define ST_NOT_READY 72 1164#define ST_BADHANDLE 10001 1165#define ST_NOT_SYNC 10002 1166#define ST_BAD_COOKIE 10003 1167#define ST_NOTSUPP 10004 1168#define ST_TOOSMALL 10005 1169#define ST_SERVERFAULT 10006 1170#define ST_BADTYPE 10007 1171#define ST_JUKEBOX 10008 1172#define ST_NOTMOUNTED 10009 1173#define ST_MAINTMODE 10010 1174#define ST_STALEACL 10011 1175 1176/* 1177 * On writes how does the client want the data written. 1178 */ 1179 1180#define CACHE_CSTABLE 1 1181#define CACHE_UNSTABLE 2 1182 1183/* 1184 * Lets the client know at which level the data was commited on 1185 * a write request 1186 */ 1187 1188#define CMFILE_SYNCH_NVRAM 1 1189#define CMDATA_SYNCH_NVRAM 2 1190#define CMFILE_SYNCH 3 1191#define CMDATA_SYNCH 4 1192#define CMUNSTABLE 5 1193 1194struct aac_read 1195{ 1196 __le32 command; 1197 __le32 cid; 1198 __le32 block; 1199 __le32 count; 1200 struct sgmap sg; // Must be last in struct because it is variable 1201}; 1202 1203struct aac_read64 1204{ 1205 __le32 command; 1206 __le16 cid; 1207 __le16 sector_count; 1208 __le32 block; 1209 __le16 pad; 1210 __le16 flags; 1211 struct sgmap64 sg; // Must be last in struct because it is variable 1212}; 1213 1214struct aac_read_reply 1215{ 1216 __le32 status; 1217 __le32 count; 1218}; 1219 1220struct aac_write 1221{ 1222 __le32 command; 1223 __le32 cid; 1224 __le32 block; 1225 __le32 count; 1226 __le32 stable; // Not used 1227 struct sgmap sg; // Must be last in struct because it is variable 1228}; 1229 1230struct aac_write64 1231{ 1232 __le32 command; 1233 __le16 cid; 1234 __le16 sector_count; 1235 __le32 block; 1236 __le16 pad; 1237 __le16 flags; 1238#define IO_TYPE_WRITE 0x00000000 1239#define IO_TYPE_READ 0x00000001 1240#define IO_SUREWRITE 0x00000008 1241 struct sgmap64 sg; // Must be last in struct because it is variable 1242}; 1243struct aac_write_reply 1244{ 1245 __le32 status; 1246 __le32 count; 1247 __le32 committed; 1248}; 1249 1250struct aac_raw_io 1251{ 1252 __le32 block[2]; 1253 __le32 count; 1254 __le16 cid; 1255 __le16 flags; /* 00 W, 01 R */ 1256 __le16 bpTotal; /* reserved for F/W use */ 1257 __le16 bpComplete; /* reserved for F/W use */ 1258 struct sgmapraw sg; 1259}; 1260 1261#define CT_FLUSH_CACHE 129 1262struct aac_synchronize { 1263 __le32 command; /* VM_ContainerConfig */ 1264 __le32 type; /* CT_FLUSH_CACHE */ 1265 __le32 cid; 1266 __le32 parm1; 1267 __le32 parm2; 1268 __le32 parm3; 1269 __le32 parm4; 1270 __le32 count; /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */ 1271}; 1272 1273struct aac_synchronize_reply { 1274 __le32 dummy0; 1275 __le32 dummy1; 1276 __le32 status; /* CT_OK */ 1277 __le32 parm1; 1278 __le32 parm2; 1279 __le32 parm3; 1280 __le32 parm4; 1281 __le32 parm5; 1282 u8 data[16]; 1283}; 1284 1285#define CT_POWER_MANAGEMENT 245 1286#define CT_PM_START_UNIT 2 1287#define CT_PM_STOP_UNIT 3 1288#define CT_PM_UNIT_IMMEDIATE 1 1289struct aac_power_management { 1290 __le32 command; /* VM_ContainerConfig */ 1291 __le32 type; /* CT_POWER_MANAGEMENT */ 1292 __le32 sub; /* CT_PM_* */ 1293 __le32 cid; 1294 __le32 parm; /* CT_PM_sub_* */ 1295}; 1296 1297#define CT_PAUSE_IO 65 1298#define CT_RELEASE_IO 66 1299struct aac_pause { 1300 __le32 command; /* VM_ContainerConfig */ 1301 __le32 type; /* CT_PAUSE_IO */ 1302 __le32 timeout; /* 10ms ticks */ 1303 __le32 min; 1304 __le32 noRescan; 1305 __le32 parm3; 1306 __le32 parm4; 1307 __le32 count; /* sizeof(((struct aac_pause_reply *)NULL)->data) */ 1308}; 1309 1310struct aac_srb 1311{ 1312 __le32 function; 1313 __le32 channel; 1314 __le32 id; 1315 __le32 lun; 1316 __le32 timeout; 1317 __le32 flags; 1318 __le32 count; // Data xfer size 1319 __le32 retry_limit; 1320 __le32 cdb_size; 1321 u8 cdb[16]; 1322 struct sgmap sg; 1323}; 1324 1325/* 1326 * This and associated data structs are used by the 1327 * ioctl caller and are in cpu order. 1328 */ 1329struct user_aac_srb 1330{ 1331 u32 function; 1332 u32 channel; 1333 u32 id; 1334 u32 lun; 1335 u32 timeout; 1336 u32 flags; 1337 u32 count; // Data xfer size 1338 u32 retry_limit; 1339 u32 cdb_size; 1340 u8 cdb[16]; 1341 struct user_sgmap sg; 1342}; 1343 1344#define AAC_SENSE_BUFFERSIZE 30 1345 1346struct aac_srb_reply 1347{ 1348 __le32 status; 1349 __le32 srb_status; 1350 __le32 scsi_status; 1351 __le32 data_xfer_length; 1352 __le32 sense_data_size; 1353 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE 1354}; 1355/* 1356 * SRB Flags 1357 */ 1358#define SRB_NoDataXfer 0x0000 1359#define SRB_DisableDisconnect 0x0004 1360#define SRB_DisableSynchTransfer 0x0008 1361#define SRB_BypassFrozenQueue 0x0010 1362#define SRB_DisableAutosense 0x0020 1363#define SRB_DataIn 0x0040 1364#define SRB_DataOut 0x0080 1365 1366/* 1367 * SRB Functions - set in aac_srb->function 1368 */ 1369#define SRBF_ExecuteScsi 0x0000 1370#define SRBF_ClaimDevice 0x0001 1371#define SRBF_IO_Control 0x0002 1372#define SRBF_ReceiveEvent 0x0003 1373#define SRBF_ReleaseQueue 0x0004 1374#define SRBF_AttachDevice 0x0005 1375#define SRBF_ReleaseDevice 0x0006 1376#define SRBF_Shutdown 0x0007 1377#define SRBF_Flush 0x0008 1378#define SRBF_AbortCommand 0x0010 1379#define SRBF_ReleaseRecovery 0x0011 1380#define SRBF_ResetBus 0x0012 1381#define SRBF_ResetDevice 0x0013 1382#define SRBF_TerminateIO 0x0014 1383#define SRBF_FlushQueue 0x0015 1384#define SRBF_RemoveDevice 0x0016 1385#define SRBF_DomainValidation 0x0017 1386 1387/* 1388 * SRB SCSI Status - set in aac_srb->scsi_status 1389 */ 1390#define SRB_STATUS_PENDING 0x00 1391#define SRB_STATUS_SUCCESS 0x01 1392#define SRB_STATUS_ABORTED 0x02 1393#define SRB_STATUS_ABORT_FAILED 0x03 1394#define SRB_STATUS_ERROR 0x04 1395#define SRB_STATUS_BUSY 0x05 1396#define SRB_STATUS_INVALID_REQUEST 0x06 1397#define SRB_STATUS_INVALID_PATH_ID 0x07 1398#define SRB_STATUS_NO_DEVICE 0x08 1399#define SRB_STATUS_TIMEOUT 0x09 1400#define SRB_STATUS_SELECTION_TIMEOUT 0x0A 1401#define SRB_STATUS_COMMAND_TIMEOUT 0x0B 1402#define SRB_STATUS_MESSAGE_REJECTED 0x0D 1403#define SRB_STATUS_BUS_RESET 0x0E 1404#define SRB_STATUS_PARITY_ERROR 0x0F 1405#define SRB_STATUS_REQUEST_SENSE_FAILED 0x10 1406#define SRB_STATUS_NO_HBA 0x11 1407#define SRB_STATUS_DATA_OVERRUN 0x12 1408#define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13 1409#define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14 1410#define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15 1411#define SRB_STATUS_REQUEST_FLUSHED 0x16 1412#define SRB_STATUS_DELAYED_RETRY 0x17 1413#define SRB_STATUS_INVALID_LUN 0x20 1414#define SRB_STATUS_INVALID_TARGET_ID 0x21 1415#define SRB_STATUS_BAD_FUNCTION 0x22 1416#define SRB_STATUS_ERROR_RECOVERY 0x23 1417#define SRB_STATUS_NOT_STARTED 0x24 1418#define SRB_STATUS_NOT_IN_USE 0x30 1419#define SRB_STATUS_FORCE_ABORT 0x31 1420#define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32 1421 1422/* 1423 * Object-Server / Volume-Manager Dispatch Classes 1424 */ 1425 1426#define VM_Null 0 1427#define VM_NameServe 1 1428#define VM_ContainerConfig 2 1429#define VM_Ioctl 3 1430#define VM_FilesystemIoctl 4 1431#define VM_CloseAll 5 1432#define VM_CtBlockRead 6 1433#define VM_CtBlockWrite 7 1434#define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */ 1435#define VM_SliceBlockWrite 9 1436#define VM_DriveBlockRead 10 /* raw access to physical devices */ 1437#define VM_DriveBlockWrite 11 1438#define VM_EnclosureMgt 12 /* enclosure management */ 1439#define VM_Unused 13 /* used to be diskset management */ 1440#define VM_CtBlockVerify 14 1441#define VM_CtPerf 15 /* performance test */ 1442#define VM_CtBlockRead64 16 1443#define VM_CtBlockWrite64 17 1444#define VM_CtBlockVerify64 18 1445#define VM_CtHostRead64 19 1446#define VM_CtHostWrite64 20 1447#define VM_DrvErrTblLog 21 1448#define VM_NameServe64 22 1449 1450#define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */ 1451 1452/* 1453 * Descriptive information (eg, vital stats) 1454 * that a content manager might report. The 1455 * FileArray filesystem component is one example 1456 * of a content manager. Raw mode might be 1457 * another. 1458 */ 1459 1460struct aac_fsinfo { 1461 __le32 fsTotalSize; /* Consumed by fs, incl. metadata */ 1462 __le32 fsBlockSize; 1463 __le32 fsFragSize; 1464 __le32 fsMaxExtendSize; 1465 __le32 fsSpaceUnits; 1466 __le32 fsMaxNumFiles; 1467 __le32 fsNumFreeFiles; 1468 __le32 fsInodeDensity; 1469}; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1470 1471union aac_contentinfo { 1472 struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1473}; 1474 1475/* 1476 * Query for Container Configuration Status 1477 */ 1478 1479#define CT_GET_CONFIG_STATUS 147 1480struct aac_get_config_status { 1481 __le32 command; /* VM_ContainerConfig */ 1482 __le32 type; /* CT_GET_CONFIG_STATUS */ 1483 __le32 parm1; 1484 __le32 parm2; 1485 __le32 parm3; 1486 __le32 parm4; 1487 __le32 parm5; 1488 __le32 count; /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */ 1489}; 1490 1491#define CFACT_CONTINUE 0 1492#define CFACT_PAUSE 1 1493#define CFACT_ABORT 2 1494struct aac_get_config_status_resp { 1495 __le32 response; /* ST_OK */ 1496 __le32 dummy0; 1497 __le32 status; /* CT_OK */ 1498 __le32 parm1; 1499 __le32 parm2; 1500 __le32 parm3; 1501 __le32 parm4; 1502 __le32 parm5; 1503 struct { 1504 __le32 action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */ 1505 __le16 flags; 1506 __le16 count; 1507 } data; 1508}; 1509 1510/* 1511 * Accept the configuration as-is 1512 */ 1513 1514#define CT_COMMIT_CONFIG 152 1515 1516struct aac_commit_config { 1517 __le32 command; /* VM_ContainerConfig */ 1518 __le32 type; /* CT_COMMIT_CONFIG */ 1519}; 1520 1521/* 1522 * Query for Container Configuration Status 1523 */ 1524 1525#define CT_GET_CONTAINER_COUNT 4 1526struct aac_get_container_count { 1527 __le32 command; /* VM_ContainerConfig */ 1528 __le32 type; /* CT_GET_CONTAINER_COUNT */ 1529}; 1530 1531struct aac_get_container_count_resp { 1532 __le32 response; /* ST_OK */ 1533 __le32 dummy0; 1534 __le32 MaxContainers; 1535 __le32 ContainerSwitchEntries; 1536 __le32 MaxPartitions; 1537}; 1538 1539 1540/* 1541 * Query for "mountable" objects, ie, objects that are typically 1542 * associated with a drive letter on the client (host) side. 1543 */ 1544 1545struct aac_mntent { 1546 __le32 oid; 1547 u8 name[16]; /* if applicable */ 1548 struct creation_info create_info; /* if applicable */ 1549 __le32 capacity; 1550 __le32 vol; /* substrate structure */ 1551 __le32 obj; /* FT_FILESYS, etc. */ 1552 __le32 state; /* unready for mounting, 1553 readonly, etc. */ 1554 union aac_contentinfo fileinfo; /* Info specific to content 1555 manager (eg, filesystem) */ 1556 __le32 altoid; /* != oid <==> snapshot or 1557 broken mirror exists */ 1558 __le32 capacityhigh; 1559}; 1560 1561#define FSCS_NOTCLEAN 0x0001 /* fsck is necessary before mounting */ 1562#define FSCS_READONLY 0x0002 /* possible result of broken mirror */ 1563#define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */ 1564#define FSCS_NOT_READY 0x0008 /* Array spinning up to fulfil request */ 1565 1566struct aac_query_mount { 1567 __le32 command; 1568 __le32 type; 1569 __le32 count; 1570}; 1571 1572struct aac_mount { 1573 __le32 status; 1574 __le32 type; /* should be same as that requested */ 1575 __le32 count; 1576 struct aac_mntent mnt[1]; 1577}; 1578 1579#define CT_READ_NAME 130 1580struct aac_get_name { 1581 __le32 command; /* VM_ContainerConfig */ 1582 __le32 type; /* CT_READ_NAME */ 1583 __le32 cid; 1584 __le32 parm1; 1585 __le32 parm2; 1586 __le32 parm3; 1587 __le32 parm4; 1588 __le32 count; /* sizeof(((struct aac_get_name_resp *)NULL)->data) */ 1589}; 1590 1591struct aac_get_name_resp { 1592 __le32 dummy0; 1593 __le32 dummy1; 1594 __le32 status; /* CT_OK */ 1595 __le32 parm1; 1596 __le32 parm2; 1597 __le32 parm3; 1598 __le32 parm4; 1599 __le32 parm5; 1600 u8 data[16]; 1601}; 1602 1603#define CT_CID_TO_32BITS_UID 165 1604struct aac_get_serial { 1605 __le32 command; /* VM_ContainerConfig */ 1606 __le32 type; /* CT_CID_TO_32BITS_UID */ 1607 __le32 cid; 1608}; 1609 1610struct aac_get_serial_resp { 1611 __le32 dummy0; 1612 __le32 dummy1; 1613 __le32 status; /* CT_OK */ 1614 __le32 uid; 1615}; 1616 1617/* 1618 * The following command is sent to shut down each container. 1619 */ 1620 1621struct aac_close { 1622 __le32 command; 1623 __le32 cid; 1624}; 1625 1626struct aac_query_disk 1627{ 1628 s32 cnum; 1629 s32 bus; 1630 s32 id; 1631 s32 lun; 1632 u32 valid; 1633 u32 locked; 1634 u32 deleted; 1635 s32 instance; 1636 s8 name[10]; 1637 u32 unmapped; 1638}; 1639 1640struct aac_delete_disk { 1641 u32 disknum; 1642 u32 cnum; 1643}; 1644 1645struct fib_ioctl 1646{ 1647 u32 fibctx; 1648 s32 wait; 1649 char __user *fib; 1650}; 1651 1652struct revision 1653{ 1654 u32 compat; 1655 __le32 version; 1656 __le32 build; 1657}; 1658 1659 1660/* 1661 * Ugly - non Linux like ioctl coding for back compat. 1662 */ 1663 1664#define CTL_CODE(function, method) ( \ 1665 (4<< 16) | ((function) << 2) | (method) \ 1666) 1667 1668/* 1669 * Define the method codes for how buffers are passed for I/O and FS 1670 * controls 1671 */ 1672 1673#define METHOD_BUFFERED 0 1674#define METHOD_NEITHER 3 1675 1676/* 1677 * Filesystem ioctls 1678 */ 1679 1680#define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED) 1681#define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED) 1682#define FSACTL_DELETE_DISK 0x163 1683#define FSACTL_QUERY_DISK 0x173 1684#define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED) 1685#define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED) 1686#define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED) 1687#define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED) 1688#define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED) 1689#define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER) 1690#define FSACTL_GET_CONTAINERS 2131 1691#define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED) 1692 1693 1694struct aac_common 1695{ 1696 /* 1697 * If this value is set to 1 then interrupt moderation will occur 1698 * in the base commuication support. 1699 */ 1700 u32 irq_mod; 1701 u32 peak_fibs; 1702 u32 zero_fibs; 1703 u32 fib_timeouts; 1704 /* 1705 * Statistical counters in debug mode 1706 */ 1707#ifdef DBG 1708 u32 FibsSent; 1709 u32 FibRecved; 1710 u32 NoResponseSent; 1711 u32 NoResponseRecved; 1712 u32 AsyncSent; 1713 u32 AsyncRecved; 1714 u32 NormalSent; 1715 u32 NormalRecved; 1716#endif 1717}; 1718 1719extern struct aac_common aac_config; 1720 1721 1722/* 1723 * The following macro is used when sending and receiving FIBs. It is 1724 * only used for debugging. 1725 */ 1726 1727#ifdef DBG 1728#define FIB_COUNTER_INCREMENT(counter) (counter)++ 1729#else 1730#define FIB_COUNTER_INCREMENT(counter) 1731#endif 1732 1733/* 1734 * Adapter direct commands 1735 * Monitor/Kernel API 1736 */ 1737 1738#define BREAKPOINT_REQUEST 0x00000004 1739#define INIT_STRUCT_BASE_ADDRESS 0x00000005 1740#define READ_PERMANENT_PARAMETERS 0x0000000a 1741#define WRITE_PERMANENT_PARAMETERS 0x0000000b 1742#define HOST_CRASHING 0x0000000d 1743#define SEND_SYNCHRONOUS_FIB 0x0000000c 1744#define COMMAND_POST_RESULTS 0x00000014 1745#define GET_ADAPTER_PROPERTIES 0x00000019 1746#define GET_DRIVER_BUFFER_PROPERTIES 0x00000023 1747#define RCV_TEMP_READINGS 0x00000025 1748#define GET_COMM_PREFERRED_SETTINGS 0x00000026 1749#define IOP_RESET 0x00001000 1750#define IOP_RESET_ALWAYS 0x00001001 1751#define RE_INIT_ADAPTER 0x000000ee 1752 1753/* 1754 * Adapter Status Register 1755 * 1756 * Phase Staus mailbox is 32bits: 1757 * <31:16> = Phase Status 1758 * <15:0> = Phase 1759 * 1760 * The adapter reports is present state through the phase. Only 1761 * a single phase should be ever be set. Each phase can have multiple 1762 * phase status bits to provide more detailed information about the 1763 * state of the board. Care should be taken to ensure that any phase 1764 * status bits that are set when changing the phase are also valid 1765 * for the new phase or be cleared out. Adapter software (monitor, 1766 * iflash, kernel) is responsible for properly maintining the phase 1767 * status mailbox when it is running. 1768 * 1769 * MONKER_API Phases 1770 * 1771 * Phases are bit oriented. It is NOT valid to have multiple bits set 1772 */ 1773 1774#define SELF_TEST_FAILED 0x00000004 1775#define MONITOR_PANIC 0x00000020 1776#define KERNEL_UP_AND_RUNNING 0x00000080 1777#define KERNEL_PANIC 0x00000100 1778 1779/* 1780 * Doorbell bit defines 1781 */ 1782 1783#define DoorBellSyncCmdAvailable (1<<0) /* Host -> Adapter */ 1784#define DoorBellPrintfDone (1<<5) /* Host -> Adapter */ 1785#define DoorBellAdapterNormCmdReady (1<<1) /* Adapter -> Host */ 1786#define DoorBellAdapterNormRespReady (1<<2) /* Adapter -> Host */ 1787#define DoorBellAdapterNormCmdNotFull (1<<3) /* Adapter -> Host */ 1788#define DoorBellAdapterNormRespNotFull (1<<4) /* Adapter -> Host */ 1789#define DoorBellPrintfReady (1<<5) /* Adapter -> Host */ 1790 1791/* 1792 * For FIB communication, we need all of the following things 1793 * to send back to the user. 1794 */ 1795 1796#define AifCmdEventNotify 1 /* Notify of event */ 1797#define AifEnConfigChange 3 /* Adapter configuration change */ 1798#define AifEnContainerChange 4 /* Container configuration change */ 1799#define AifEnDeviceFailure 5 /* SCSI device failed */ 1800#define AifEnEnclosureManagement 13 /* EM_DRIVE_* */ 1801#define EM_DRIVE_INSERTION 31 1802#define EM_DRIVE_REMOVAL 32 1803#define AifEnBatteryEvent 14 /* Change in Battery State */ 1804#define AifEnAddContainer 15 /* A new array was created */ 1805#define AifEnDeleteContainer 16 /* A container was deleted */ 1806#define AifEnExpEvent 23 /* Firmware Event Log */ 1807#define AifExeFirmwarePanic 3 /* Firmware Event Panic */ 1808#define AifHighPriority 3 /* Highest Priority Event */ 1809#define AifEnAddJBOD 30 /* JBOD created */ 1810#define AifEnDeleteJBOD 31 /* JBOD deleted */ 1811 1812#define AifCmdJobProgress 2 /* Progress report */ 1813#define AifJobCtrZero 101 /* Array Zero progress */ 1814#define AifJobStsSuccess 1 /* Job completes */ 1815#define AifJobStsRunning 102 /* Job running */ 1816#define AifCmdAPIReport 3 /* Report from other user of API */ 1817#define AifCmdDriverNotify 4 /* Notify host driver of event */ 1818#define AifDenMorphComplete 200 /* A morph operation completed */ 1819#define AifDenVolumeExtendComplete 201 /* A volume extend completed */ 1820#define AifReqJobList 100 /* Gets back complete job list */ 1821#define AifReqJobsForCtr 101 /* Gets back jobs for specific container */ 1822#define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */ 1823#define AifReqJobReport 103 /* Gets back a specific job report or list of them */ 1824#define AifReqTerminateJob 104 /* Terminates job */ 1825#define AifReqSuspendJob 105 /* Suspends a job */ 1826#define AifReqResumeJob 106 /* Resumes a job */ 1827#define AifReqSendAPIReport 107 /* API generic report requests */ 1828#define AifReqAPIJobStart 108 /* Start a job from the API */ 1829#define AifReqAPIJobUpdate 109 /* Update a job report from the API */ 1830#define AifReqAPIJobFinish 110 /* Finish a job from the API */ 1831 1832/* 1833 * Adapter Initiated FIB command structures. Start with the adapter 1834 * initiated FIBs that really come from the adapter, and get responded 1835 * to by the host. 1836 */ 1837 1838struct aac_aifcmd { 1839 __le32 command; /* Tell host what type of notify this is */ 1840 __le32 seqnum; /* To allow ordering of reports (if necessary) */ 1841 u8 data[1]; /* Undefined length (from kernel viewpoint) */ 1842}; 1843 1844/** 1845 * Convert capacity to cylinders 1846 * accounting for the fact capacity could be a 64 bit value 1847 * 1848 */ 1849static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor) 1850{ 1851 sector_div(capacity, divisor); 1852 return capacity; 1853} 1854 1855/* SCp.phase values */ 1856#define AAC_OWNER_MIDLEVEL 0x101 1857#define AAC_OWNER_LOWLEVEL 0x102 1858#define AAC_OWNER_ERROR_HANDLER 0x103 1859#define AAC_OWNER_FIRMWARE 0x106 1860 1861const char *aac_driverinfo(struct Scsi_Host *); 1862struct fib *aac_fib_alloc(struct aac_dev *dev); 1863int aac_fib_setup(struct aac_dev *dev); 1864void aac_fib_map_free(struct aac_dev *dev); 1865void aac_fib_free(struct fib * context); 1866void aac_fib_init(struct fib * context); 1867void aac_printf(struct aac_dev *dev, u32 val); 1868int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt); 1869int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry); 1870void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum); 1871int aac_fib_complete(struct fib * context); 1872#define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data) 1873struct aac_dev *aac_init_adapter(struct aac_dev *dev); 1874int aac_get_config_status(struct aac_dev *dev, int commit_flag); 1875int aac_get_containers(struct aac_dev *dev); 1876int aac_scsi_cmd(struct scsi_cmnd *cmd); 1877int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg); 1878#ifndef shost_to_class 1879#define shost_to_class(shost) &shost->shost_dev 1880#endif 1881ssize_t aac_get_serial_number(struct device *dev, char *buf); 1882int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg); 1883int aac_rx_init(struct aac_dev *dev); 1884int aac_rkt_init(struct aac_dev *dev); 1885int aac_nark_init(struct aac_dev *dev); 1886int aac_sa_init(struct aac_dev *dev); 1887int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify); 1888unsigned int aac_response_normal(struct aac_queue * q); 1889unsigned int aac_command_normal(struct aac_queue * q); 1890unsigned int aac_intr_normal(struct aac_dev * dev, u32 Index); 1891int aac_reset_adapter(struct aac_dev * dev, int forced); 1892int aac_check_health(struct aac_dev * dev); 1893int aac_command_thread(void *data); 1894int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx); 1895int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size); 1896struct aac_driver_ident* aac_get_driver_ident(int devtype); 1897int aac_get_adapter_info(struct aac_dev* dev); 1898int aac_send_shutdown(struct aac_dev *dev); 1899int aac_probe_container(struct aac_dev *dev, int cid); 1900int _aac_rx_init(struct aac_dev *dev); 1901int aac_rx_select_comm(struct aac_dev *dev, int comm); 1902int aac_rx_deliver_producer(struct fib * fib); 1903char * get_container_type(unsigned type); 1904extern int numacb; 1905extern int acbsize; 1906extern char aac_driver_version[]; 1907extern int startup_timeout; 1908extern int aif_timeout; 1909extern int expose_physicals; 1910extern int aac_reset_devices; 1911extern int aac_msi; 1912extern int aac_commit; 1913extern int update_interval; 1914extern int check_interval; 1915extern int aac_check_reset; 1916