arcmsr_hba.c revision 7968f1944c9d6c83683e87fd2ede977ccfd29285
1/* 2******************************************************************************* 3** O.S : Linux 4** FILE NAME : arcmsr_hba.c 5** BY : Erich Chen 6** Description: SCSI RAID Device Driver for 7** ARECA RAID Host adapter 8******************************************************************************* 9** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved 10** 11** Web site: www.areca.com.tw 12** E-mail: support@areca.com.tw 13** 14** This program is free software; you can redistribute it and/or modify 15** it under the terms of the GNU General Public License version 2 as 16** published by the Free Software Foundation. 17** This program is distributed in the hope that it will be useful, 18** but WITHOUT ANY WARRANTY; without even the implied warranty of 19** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20** GNU General Public License for more details. 21******************************************************************************* 22** Redistribution and use in source and binary forms, with or without 23** modification, are permitted provided that the following conditions 24** are met: 25** 1. Redistributions of source code must retain the above copyright 26** notice, this list of conditions and the following disclaimer. 27** 2. Redistributions in binary form must reproduce the above copyright 28** notice, this list of conditions and the following disclaimer in the 29** documentation and/or other materials provided with the distribution. 30** 3. The name of the author may not be used to endorse or promote products 31** derived from this software without specific prior written permission. 32** 33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 41** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 43******************************************************************************* 44** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 45** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 46******************************************************************************* 47*/ 48#include <linux/module.h> 49#include <linux/reboot.h> 50#include <linux/spinlock.h> 51#include <linux/pci_ids.h> 52#include <linux/interrupt.h> 53#include <linux/moduleparam.h> 54#include <linux/errno.h> 55#include <linux/types.h> 56#include <linux/delay.h> 57#include <linux/dma-mapping.h> 58#include <linux/timer.h> 59#include <linux/slab.h> 60#include <linux/pci.h> 61#include <linux/aer.h> 62#include <asm/dma.h> 63#include <asm/io.h> 64#include <asm/system.h> 65#include <asm/uaccess.h> 66#include <scsi/scsi_host.h> 67#include <scsi/scsi.h> 68#include <scsi/scsi_cmnd.h> 69#include <scsi/scsi_tcq.h> 70#include <scsi/scsi_device.h> 71#include <scsi/scsi_transport.h> 72#include <scsi/scsicam.h> 73#include "arcmsr.h" 74MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>"); 75MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter"); 76MODULE_LICENSE("Dual BSD/GPL"); 77MODULE_VERSION(ARCMSR_DRIVER_VERSION); 78static int sleeptime = 10; 79static int retrycount = 30; 80wait_queue_head_t wait_q; 81static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 82 struct scsi_cmnd *cmd); 83static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 84static int arcmsr_abort(struct scsi_cmnd *); 85static int arcmsr_bus_reset(struct scsi_cmnd *); 86static int arcmsr_bios_param(struct scsi_device *sdev, 87 struct block_device *bdev, sector_t capacity, int *info); 88static int arcmsr_queue_command(struct scsi_cmnd *cmd, 89 void (*done) (struct scsi_cmnd *)); 90static int arcmsr_probe(struct pci_dev *pdev, 91 const struct pci_device_id *id); 92static void arcmsr_remove(struct pci_dev *pdev); 93static void arcmsr_shutdown(struct pci_dev *pdev); 94static void arcmsr_iop_init(struct AdapterControlBlock *acb); 95static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 96static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 97static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 98static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); 99static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); 100static void arcmsr_request_device_map(unsigned long pacb); 101static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb); 102static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb); 103static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb); 104static void arcmsr_message_isr_bh_fn(struct work_struct *work); 105static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); 106static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 107static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB); 108static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); 109static const char *arcmsr_info(struct Scsi_Host *); 110static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 111static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, 112 int queue_depth, int reason) 113{ 114 if (reason != SCSI_QDEPTH_DEFAULT) 115 return -EOPNOTSUPP; 116 117 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 118 queue_depth = ARCMSR_MAX_CMD_PERLUN; 119 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); 120 return queue_depth; 121} 122 123static struct scsi_host_template arcmsr_scsi_host_template = { 124 .module = THIS_MODULE, 125 .name = "ARCMSR ARECA SATA/SAS RAID Controller" 126 ARCMSR_DRIVER_VERSION, 127 .info = arcmsr_info, 128 .queuecommand = arcmsr_queue_command, 129 .eh_abort_handler = arcmsr_abort, 130 .eh_bus_reset_handler = arcmsr_bus_reset, 131 .bios_param = arcmsr_bios_param, 132 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 133 .can_queue = ARCMSR_MAX_FREECCB_NUM, 134 .this_id = ARCMSR_SCSI_INITIATOR_ID, 135 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, 136 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, 137 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 138 .use_clustering = ENABLE_CLUSTERING, 139 .shost_attrs = arcmsr_host_attrs, 140}; 141static struct pci_device_id arcmsr_device_id_table[] = { 142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, 143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, 144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, 145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, 146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, 147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, 148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, 149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, 150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, 151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, 152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, 153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)}, 154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)}, 156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)}, 157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)}, 158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, 159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, 160 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)}, 161 {0, 0}, /* Terminating entry */ 162}; 163MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 164static struct pci_driver arcmsr_pci_driver = { 165 .name = "arcmsr", 166 .id_table = arcmsr_device_id_table, 167 .probe = arcmsr_probe, 168 .remove = arcmsr_remove, 169 .shutdown = arcmsr_shutdown, 170}; 171/* 172**************************************************************************** 173**************************************************************************** 174*/ 175int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd) 176{ 177 struct Scsi_Host *shost = NULL; 178 int i, isleep; 179 shost = cmd->device->host; 180 isleep = sleeptime / 10; 181 if (isleep > 0) { 182 for (i = 0; i < isleep; i++) { 183 msleep(10000); 184 } 185 } 186 187 isleep = sleeptime % 10; 188 if (isleep > 0) { 189 msleep(isleep*1000); 190 } 191 printk(KERN_NOTICE "wake-up\n"); 192 return 0; 193} 194 195static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb) 196{ 197 switch (acb->adapter_type) { 198 case ACB_ADAPTER_TYPE_A: 199 case ACB_ADAPTER_TYPE_C: 200 break; 201 case ACB_ADAPTER_TYPE_B:{ 202 dma_free_coherent(&acb->pdev->dev, 203 sizeof(struct MessageUnit_B), 204 acb->pmuB, acb->dma_coherent_handle_hbb_mu); 205 } 206 } 207} 208 209static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) 210{ 211 struct pci_dev *pdev = acb->pdev; 212 switch (acb->adapter_type){ 213 case ACB_ADAPTER_TYPE_A:{ 214 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); 215 if (!acb->pmuA) { 216 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 217 return false; 218 } 219 break; 220 } 221 case ACB_ADAPTER_TYPE_B:{ 222 void __iomem *mem_base0, *mem_base1; 223 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 224 if (!mem_base0) { 225 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 226 return false; 227 } 228 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); 229 if (!mem_base1) { 230 iounmap(mem_base0); 231 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 232 return false; 233 } 234 acb->mem_base0 = mem_base0; 235 acb->mem_base1 = mem_base1; 236 break; 237 } 238 case ACB_ADAPTER_TYPE_C:{ 239 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); 240 if (!acb->pmuC) { 241 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 242 return false; 243 } 244 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 245 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ 246 return true; 247 } 248 break; 249 } 250 } 251 return true; 252} 253 254static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) 255{ 256 switch (acb->adapter_type) { 257 case ACB_ADAPTER_TYPE_A:{ 258 iounmap(acb->pmuA); 259 } 260 break; 261 case ACB_ADAPTER_TYPE_B:{ 262 iounmap(acb->mem_base0); 263 iounmap(acb->mem_base1); 264 } 265 266 break; 267 case ACB_ADAPTER_TYPE_C:{ 268 iounmap(acb->pmuC); 269 } 270 } 271} 272 273static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 274{ 275 irqreturn_t handle_state; 276 struct AdapterControlBlock *acb = dev_id; 277 278 handle_state = arcmsr_interrupt(acb); 279 return handle_state; 280} 281 282static int arcmsr_bios_param(struct scsi_device *sdev, 283 struct block_device *bdev, sector_t capacity, int *geom) 284{ 285 int ret, heads, sectors, cylinders, total_capacity; 286 unsigned char *buffer;/* return copy of block device's partition table */ 287 288 buffer = scsi_bios_ptable(bdev); 289 if (buffer) { 290 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 291 kfree(buffer); 292 if (ret != -1) 293 return ret; 294 } 295 total_capacity = capacity; 296 heads = 64; 297 sectors = 32; 298 cylinders = total_capacity / (heads * sectors); 299 if (cylinders > 1024) { 300 heads = 255; 301 sectors = 63; 302 cylinders = total_capacity / (heads * sectors); 303 } 304 geom[0] = heads; 305 geom[1] = sectors; 306 geom[2] = cylinders; 307 return 0; 308} 309 310static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) 311{ 312 struct pci_dev *pdev = acb->pdev; 313 u16 dev_id; 314 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); 315 acb->dev_id = dev_id; 316 switch (dev_id) { 317 case 0x1880: { 318 acb->adapter_type = ACB_ADAPTER_TYPE_C; 319 } 320 break; 321 case 0x1201: { 322 acb->adapter_type = ACB_ADAPTER_TYPE_B; 323 } 324 break; 325 326 default: acb->adapter_type = ACB_ADAPTER_TYPE_A; 327 } 328} 329 330static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) 331{ 332 struct MessageUnit_A __iomem *reg = acb->pmuA; 333 uint32_t Index; 334 uint8_t Retries = 0x00; 335 do { 336 for (Index = 0; Index < 100; Index++) { 337 if (readl(®->outbound_intstatus) & 338 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 339 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 340 ®->outbound_intstatus); 341 return true; 342 } 343 msleep(10); 344 }/*max 1 seconds*/ 345 346 } while (Retries++ < 20);/*max 20 sec*/ 347 return false; 348} 349 350static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) 351{ 352 struct MessageUnit_B *reg = acb->pmuB; 353 uint32_t Index; 354 uint8_t Retries = 0x00; 355 do { 356 for (Index = 0; Index < 100; Index++) { 357 if (readl(reg->iop2drv_doorbell) 358 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 359 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN 360 , reg->iop2drv_doorbell); 361 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 362 return true; 363 } 364 msleep(10); 365 }/*max 1 seconds*/ 366 367 } while (Retries++ < 20);/*max 20 sec*/ 368 return false; 369} 370 371static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB) 372{ 373 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 374 unsigned char Retries = 0x00; 375 uint32_t Index; 376 do { 377 for (Index = 0; Index < 100; Index++) { 378 if (readl(&phbcmu->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 379 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &phbcmu->outbound_doorbell_clear);/*clear interrupt*/ 380 return true; 381 } 382 /* one us delay */ 383 msleep(10); 384 } /*max 1 seconds*/ 385 } while (Retries++ < 20); /*max 20 sec*/ 386 return false; 387} 388static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) 389{ 390 struct MessageUnit_A __iomem *reg = acb->pmuA; 391 int retry_count = 30; 392 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 393 do { 394 if (arcmsr_hba_wait_msgint_ready(acb)) 395 break; 396 else { 397 retry_count--; 398 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 399 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 400 } 401 } while (retry_count != 0); 402} 403 404static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) 405{ 406 struct MessageUnit_B *reg = acb->pmuB; 407 int retry_count = 30; 408 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); 409 do { 410 if (arcmsr_hbb_wait_msgint_ready(acb)) 411 break; 412 else { 413 retry_count--; 414 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 415 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 416 } 417 } while (retry_count != 0); 418} 419 420static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB) 421{ 422 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 423 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 424 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 425 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 426 do { 427 if (arcmsr_hbc_wait_msgint_ready(pACB)) { 428 break; 429 } else { 430 retry_count--; 431 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 432 timeout,retry count down = %d \n", pACB->host->host_no, retry_count); 433 } 434 } while (retry_count != 0); 435 return; 436} 437static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 438{ 439 switch (acb->adapter_type) { 440 441 case ACB_ADAPTER_TYPE_A: { 442 arcmsr_flush_hba_cache(acb); 443 } 444 break; 445 446 case ACB_ADAPTER_TYPE_B: { 447 arcmsr_flush_hbb_cache(acb); 448 } 449 break; 450 case ACB_ADAPTER_TYPE_C: { 451 arcmsr_flush_hbc_cache(acb); 452 } 453 } 454} 455 456static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 457{ 458 struct pci_dev *pdev = acb->pdev; 459 void *dma_coherent; 460 dma_addr_t dma_coherent_handle; 461 struct CommandControlBlock *ccb_tmp; 462 int i = 0, j = 0; 463 dma_addr_t cdb_phyaddr; 464 unsigned long roundup_ccbsize = 0, offset; 465 unsigned long max_xfer_len; 466 unsigned long max_sg_entrys; 467 uint32_t firm_config_version; 468 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 469 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 470 acb->devstate[i][j] = ARECA_RAID_GONE; 471 472 max_xfer_len = ARCMSR_MAX_XFER_LEN; 473 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; 474 firm_config_version = acb->firm_cfg_version; 475 if((firm_config_version & 0xFF) >= 3){ 476 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ 477 max_sg_entrys = (max_xfer_len/4096); 478 } 479 acb->host->max_sectors = max_xfer_len/512; 480 acb->host->sg_tablesize = max_sg_entrys; 481 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); 482 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32; 483 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); 484 if(!dma_coherent){ 485 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no); 486 return -ENOMEM; 487 } 488 acb->dma_coherent = dma_coherent; 489 acb->dma_coherent_handle = dma_coherent_handle; 490 memset(dma_coherent, 0, acb->uncache_size); 491 offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent; 492 dma_coherent_handle = dma_coherent_handle + offset; 493 dma_coherent = (struct CommandControlBlock *)dma_coherent + offset; 494 ccb_tmp = dma_coherent; 495 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; 496 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ 497 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); 498 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5)); 499 acb->pccb_pool[i] = ccb_tmp; 500 ccb_tmp->acb = acb; 501 INIT_LIST_HEAD(&ccb_tmp->list); 502 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 503 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); 504 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; 505 } 506 return 0; 507} 508 509static void arcmsr_message_isr_bh_fn(struct work_struct *work) 510{ 511 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh); 512 switch (acb->adapter_type) { 513 case ACB_ADAPTER_TYPE_A: { 514 515 struct MessageUnit_A __iomem *reg = acb->pmuA; 516 char *acb_dev_map = (char *)acb->device_map; 517 uint32_t __iomem *signature = (uint32_t __iomem*) (®->message_rwbuffer[0]); 518 char __iomem *devicemap = (char __iomem*) (®->message_rwbuffer[21]); 519 int target, lun; 520 struct scsi_device *psdev; 521 char diff; 522 523 atomic_inc(&acb->rq_map_token); 524 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 525 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { 526 diff = (*acb_dev_map)^readb(devicemap); 527 if (diff != 0) { 528 char temp; 529 *acb_dev_map = readb(devicemap); 530 temp =*acb_dev_map; 531 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 532 if((temp & 0x01)==1 && (diff & 0x01) == 1) { 533 scsi_add_device(acb->host, 0, target, lun); 534 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { 535 psdev = scsi_device_lookup(acb->host, 0, target, lun); 536 if (psdev != NULL ) { 537 scsi_remove_device(psdev); 538 scsi_device_put(psdev); 539 } 540 } 541 temp >>= 1; 542 diff >>= 1; 543 } 544 } 545 devicemap++; 546 acb_dev_map++; 547 } 548 } 549 break; 550 } 551 552 case ACB_ADAPTER_TYPE_B: { 553 struct MessageUnit_B *reg = acb->pmuB; 554 char *acb_dev_map = (char *)acb->device_map; 555 uint32_t __iomem *signature = (uint32_t __iomem*)(®->message_rwbuffer[0]); 556 char __iomem *devicemap = (char __iomem*)(®->message_rwbuffer[21]); 557 int target, lun; 558 struct scsi_device *psdev; 559 char diff; 560 561 atomic_inc(&acb->rq_map_token); 562 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 563 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { 564 diff = (*acb_dev_map)^readb(devicemap); 565 if (diff != 0) { 566 char temp; 567 *acb_dev_map = readb(devicemap); 568 temp =*acb_dev_map; 569 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 570 if((temp & 0x01)==1 && (diff & 0x01) == 1) { 571 scsi_add_device(acb->host, 0, target, lun); 572 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { 573 psdev = scsi_device_lookup(acb->host, 0, target, lun); 574 if (psdev != NULL ) { 575 scsi_remove_device(psdev); 576 scsi_device_put(psdev); 577 } 578 } 579 temp >>= 1; 580 diff >>= 1; 581 } 582 } 583 devicemap++; 584 acb_dev_map++; 585 } 586 } 587 } 588 break; 589 case ACB_ADAPTER_TYPE_C: { 590 struct MessageUnit_C *reg = acb->pmuC; 591 char *acb_dev_map = (char *)acb->device_map; 592 uint32_t __iomem *signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 593 char __iomem *devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 594 int target, lun; 595 struct scsi_device *psdev; 596 char diff; 597 598 atomic_inc(&acb->rq_map_token); 599 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 600 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) { 601 diff = (*acb_dev_map)^readb(devicemap); 602 if (diff != 0) { 603 char temp; 604 *acb_dev_map = readb(devicemap); 605 temp = *acb_dev_map; 606 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 607 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) { 608 scsi_add_device(acb->host, 0, target, lun); 609 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) { 610 psdev = scsi_device_lookup(acb->host, 0, target, lun); 611 if (psdev != NULL) { 612 scsi_remove_device(psdev); 613 scsi_device_put(psdev); 614 } 615 } 616 temp >>= 1; 617 diff >>= 1; 618 } 619 } 620 devicemap++; 621 acb_dev_map++; 622 } 623 } 624 } 625 } 626} 627 628static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) 629{ 630 struct Scsi_Host *host; 631 struct AdapterControlBlock *acb; 632 uint8_t bus,dev_fun; 633 int error; 634 error = pci_enable_device(pdev); 635 if(error){ 636 return -ENODEV; 637 } 638 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); 639 if(!host){ 640 goto pci_disable_dev; 641 } 642 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 643 if(error){ 644 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 645 if(error){ 646 printk(KERN_WARNING 647 "scsi%d: No suitable DMA mask available\n", 648 host->host_no); 649 goto scsi_host_release; 650 } 651 } 652 init_waitqueue_head(&wait_q); 653 bus = pdev->bus->number; 654 dev_fun = pdev->devfn; 655 acb = (struct AdapterControlBlock *) host->hostdata; 656 memset(acb,0,sizeof(struct AdapterControlBlock)); 657 acb->pdev = pdev; 658 acb->host = host; 659 host->max_lun = ARCMSR_MAX_TARGETLUN; 660 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ 661 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ 662 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ 663 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 664 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 665 host->unique_id = (bus << 8) | dev_fun; 666 pci_set_drvdata(pdev, host); 667 pci_set_master(pdev); 668 error = pci_request_regions(pdev, "arcmsr"); 669 if(error){ 670 goto scsi_host_release; 671 } 672 spin_lock_init(&acb->eh_lock); 673 spin_lock_init(&acb->ccblist_lock); 674 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 675 ACB_F_MESSAGE_RQBUFFER_CLEARED | 676 ACB_F_MESSAGE_WQBUFFER_READED); 677 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 678 INIT_LIST_HEAD(&acb->ccb_free_list); 679 arcmsr_define_adapter_type(acb); 680 error = arcmsr_remap_pciregion(acb); 681 if(!error){ 682 goto pci_release_regs; 683 } 684 error = arcmsr_get_firmware_spec(acb); 685 if(!error){ 686 goto unmap_pci_region; 687 } 688 error = arcmsr_alloc_ccb_pool(acb); 689 if(error){ 690 goto free_hbb_mu; 691 } 692 arcmsr_iop_init(acb); 693 error = scsi_add_host(host, &pdev->dev); 694 if(error){ 695 goto RAID_controller_stop; 696 } 697 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb); 698 if(error){ 699 goto scsi_host_remove; 700 } 701 host->irq = pdev->irq; 702 scsi_scan_host(host); 703 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 704 atomic_set(&acb->rq_map_token, 16); 705 atomic_set(&acb->ante_token_value, 16); 706 acb->fw_flag = FW_NORMAL; 707 init_timer(&acb->eternal_timer); 708 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 709 acb->eternal_timer.data = (unsigned long) acb; 710 acb->eternal_timer.function = &arcmsr_request_device_map; 711 add_timer(&acb->eternal_timer); 712 if(arcmsr_alloc_sysfs_attr(acb)) 713 goto out_free_sysfs; 714 return 0; 715out_free_sysfs: 716scsi_host_remove: 717 scsi_remove_host(host); 718RAID_controller_stop: 719 arcmsr_stop_adapter_bgrb(acb); 720 arcmsr_flush_adapter_cache(acb); 721 arcmsr_free_ccb_pool(acb); 722free_hbb_mu: 723 arcmsr_free_hbb_mu(acb); 724unmap_pci_region: 725 arcmsr_unmap_pciregion(acb); 726pci_release_regs: 727 pci_release_regions(pdev); 728scsi_host_release: 729 scsi_host_put(host); 730pci_disable_dev: 731 pci_disable_device(pdev); 732 return -ENODEV; 733} 734 735static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) 736{ 737 struct MessageUnit_A __iomem *reg = acb->pmuA; 738 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 739 if (!arcmsr_hba_wait_msgint_ready(acb)) { 740 printk(KERN_NOTICE 741 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 742 , acb->host->host_no); 743 return false; 744 } 745 return true; 746} 747 748static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) 749{ 750 struct MessageUnit_B *reg = acb->pmuB; 751 752 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); 753 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 754 printk(KERN_NOTICE 755 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 756 , acb->host->host_no); 757 return false; 758 } 759 return true; 760} 761static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB) 762{ 763 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 764 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 765 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 766 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 767 printk(KERN_NOTICE 768 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 769 , pACB->host->host_no); 770 return false; 771 } 772 return true; 773} 774static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 775{ 776 uint8_t rtnval = 0; 777 switch (acb->adapter_type) { 778 case ACB_ADAPTER_TYPE_A: { 779 rtnval = arcmsr_abort_hba_allcmd(acb); 780 } 781 break; 782 783 case ACB_ADAPTER_TYPE_B: { 784 rtnval = arcmsr_abort_hbb_allcmd(acb); 785 } 786 break; 787 788 case ACB_ADAPTER_TYPE_C: { 789 rtnval = arcmsr_abort_hbc_allcmd(acb); 790 } 791 } 792 return rtnval; 793} 794 795static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb) 796{ 797 struct MessageUnit_B *reg = pacb->pmuB; 798 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 799 if (!arcmsr_hbb_wait_msgint_ready(pacb)) { 800 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no); 801 return false; 802 } 803 return true; 804} 805 806static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 807{ 808 struct scsi_cmnd *pcmd = ccb->pcmd; 809 810 scsi_dma_unmap(pcmd); 811} 812 813static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) 814{ 815 struct AdapterControlBlock *acb = ccb->acb; 816 struct scsi_cmnd *pcmd = ccb->pcmd; 817 unsigned long flags; 818 atomic_dec(&acb->ccboutstandingcount); 819 arcmsr_pci_unmap_dma(ccb); 820 ccb->startdone = ARCMSR_CCB_DONE; 821 spin_lock_irqsave(&acb->ccblist_lock, flags); 822 list_add_tail(&ccb->list, &acb->ccb_free_list); 823 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 824 pcmd->scsi_done(pcmd); 825} 826 827static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 828{ 829 830 struct scsi_cmnd *pcmd = ccb->pcmd; 831 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 832 pcmd->result = DID_OK << 16; 833 if (sensebuffer) { 834 int sense_data_length = 835 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 836 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 837 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 838 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 839 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 840 sensebuffer->Valid = 1; 841 } 842} 843 844static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 845{ 846 u32 orig_mask = 0; 847 switch (acb->adapter_type) { 848 case ACB_ADAPTER_TYPE_A : { 849 struct MessageUnit_A __iomem *reg = acb->pmuA; 850 orig_mask = readl(®->outbound_intmask); 851 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 852 ®->outbound_intmask); 853 } 854 break; 855 case ACB_ADAPTER_TYPE_B : { 856 struct MessageUnit_B *reg = acb->pmuB; 857 orig_mask = readl(reg->iop2drv_doorbell_mask); 858 writel(0, reg->iop2drv_doorbell_mask); 859 } 860 break; 861 case ACB_ADAPTER_TYPE_C:{ 862 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 863 /* disable all outbound interrupt */ 864 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ 865 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 866 } 867 break; 868 } 869 return orig_mask; 870} 871 872static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 873 struct CommandControlBlock *ccb, bool error) 874{ 875 uint8_t id, lun; 876 id = ccb->pcmd->device->id; 877 lun = ccb->pcmd->device->lun; 878 if (!error) { 879 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 880 acb->devstate[id][lun] = ARECA_RAID_GOOD; 881 ccb->pcmd->result = DID_OK << 16; 882 arcmsr_ccb_complete(ccb); 883 }else{ 884 switch (ccb->arcmsr_cdb.DeviceStatus) { 885 case ARCMSR_DEV_SELECT_TIMEOUT: { 886 acb->devstate[id][lun] = ARECA_RAID_GONE; 887 ccb->pcmd->result = DID_NO_CONNECT << 16; 888 arcmsr_ccb_complete(ccb); 889 } 890 break; 891 892 case ARCMSR_DEV_ABORTED: 893 894 case ARCMSR_DEV_INIT_FAIL: { 895 acb->devstate[id][lun] = ARECA_RAID_GONE; 896 ccb->pcmd->result = DID_BAD_TARGET << 16; 897 arcmsr_ccb_complete(ccb); 898 } 899 break; 900 901 case ARCMSR_DEV_CHECK_CONDITION: { 902 acb->devstate[id][lun] = ARECA_RAID_GOOD; 903 arcmsr_report_sense_info(ccb); 904 arcmsr_ccb_complete(ccb); 905 } 906 break; 907 908 default: 909 printk(KERN_NOTICE 910 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ 911 but got unknown DeviceStatus = 0x%x \n" 912 , acb->host->host_no 913 , id 914 , lun 915 , ccb->arcmsr_cdb.DeviceStatus); 916 acb->devstate[id][lun] = ARECA_RAID_GONE; 917 ccb->pcmd->result = DID_NO_CONNECT << 16; 918 arcmsr_ccb_complete(ccb); 919 break; 920 } 921 } 922} 923 924static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) 925 926{ 927 int id, lun; 928 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 929 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 930 struct scsi_cmnd *abortcmd = pCCB->pcmd; 931 if (abortcmd) { 932 id = abortcmd->device->id; 933 lun = abortcmd->device->lun; 934 abortcmd->result |= DID_ABORT << 16; 935 arcmsr_ccb_complete(pCCB); 936 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", 937 acb->host->host_no, pCCB); 938 } 939 return; 940 } 941 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 942 done acb = '0x%p'" 943 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 944 " ccboutstandingcount = %d \n" 945 , acb->host->host_no 946 , acb 947 , pCCB 948 , pCCB->acb 949 , pCCB->startdone 950 , atomic_read(&acb->ccboutstandingcount)); 951 return; 952 } 953 arcmsr_report_ccb_state(acb, pCCB, error); 954} 955 956static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 957{ 958 int i = 0; 959 uint32_t flag_ccb; 960 struct ARCMSR_CDB *pARCMSR_CDB; 961 bool error; 962 struct CommandControlBlock *pCCB; 963 switch (acb->adapter_type) { 964 965 case ACB_ADAPTER_TYPE_A: { 966 struct MessageUnit_A __iomem *reg = acb->pmuA; 967 uint32_t outbound_intstatus; 968 outbound_intstatus = readl(®->outbound_intstatus) & 969 acb->outbound_int_enable; 970 /*clear and abort all outbound posted Q*/ 971 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 972 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 973 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 974 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 975 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 976 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 977 arcmsr_drain_donequeue(acb, pCCB, error); 978 } 979 } 980 break; 981 982 case ACB_ADAPTER_TYPE_B: { 983 struct MessageUnit_B *reg = acb->pmuB; 984 /*clear all outbound posted Q*/ 985 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, ®->iop2drv_doorbell); /* clear doorbell interrupt */ 986 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 987 if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { 988 writel(0, ®->done_qbuffer[i]); 989 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 990 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 991 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 992 arcmsr_drain_donequeue(acb, pCCB, error); 993 } 994 reg->post_qbuffer[i] = 0; 995 } 996 reg->doneq_index = 0; 997 reg->postq_index = 0; 998 } 999 break; 1000 case ACB_ADAPTER_TYPE_C: { 1001 struct MessageUnit_C *reg = acb->pmuC; 1002 struct ARCMSR_CDB *pARCMSR_CDB; 1003 uint32_t flag_ccb, ccb_cdb_phy; 1004 bool error; 1005 struct CommandControlBlock *pCCB; 1006 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1007 /*need to do*/ 1008 flag_ccb = readl(®->outbound_queueport_low); 1009 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 1010 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 1011 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1012 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1013 arcmsr_drain_donequeue(acb, pCCB, error); 1014 } 1015 } 1016 } 1017} 1018static void arcmsr_remove(struct pci_dev *pdev) 1019{ 1020 struct Scsi_Host *host = pci_get_drvdata(pdev); 1021 struct AdapterControlBlock *acb = 1022 (struct AdapterControlBlock *) host->hostdata; 1023 int poll_count = 0; 1024 arcmsr_free_sysfs_attr(acb); 1025 scsi_remove_host(host); 1026 flush_scheduled_work(); 1027 del_timer_sync(&acb->eternal_timer); 1028 arcmsr_disable_outbound_ints(acb); 1029 arcmsr_stop_adapter_bgrb(acb); 1030 arcmsr_flush_adapter_cache(acb); 1031 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 1032 acb->acb_flags &= ~ACB_F_IOP_INITED; 1033 1034 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ 1035 if (!atomic_read(&acb->ccboutstandingcount)) 1036 break; 1037 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 1038 msleep(25); 1039 } 1040 1041 if (atomic_read(&acb->ccboutstandingcount)) { 1042 int i; 1043 1044 arcmsr_abort_allcmd(acb); 1045 arcmsr_done4abort_postqueue(acb); 1046 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 1047 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 1048 if (ccb->startdone == ARCMSR_CCB_START) { 1049 ccb->startdone = ARCMSR_CCB_ABORTED; 1050 ccb->pcmd->result = DID_ABORT << 16; 1051 arcmsr_ccb_complete(ccb); 1052 } 1053 } 1054 } 1055 free_irq(pdev->irq, acb); 1056 arcmsr_free_ccb_pool(acb); 1057 arcmsr_free_hbb_mu(acb); 1058 arcmsr_unmap_pciregion(acb); 1059 pci_release_regions(pdev); 1060 scsi_host_put(host); 1061 pci_disable_device(pdev); 1062 pci_set_drvdata(pdev, NULL); 1063} 1064 1065static void arcmsr_shutdown(struct pci_dev *pdev) 1066{ 1067 struct Scsi_Host *host = pci_get_drvdata(pdev); 1068 struct AdapterControlBlock *acb = 1069 (struct AdapterControlBlock *)host->hostdata; 1070 del_timer_sync(&acb->eternal_timer); 1071 arcmsr_disable_outbound_ints(acb); 1072 flush_scheduled_work(); 1073 arcmsr_stop_adapter_bgrb(acb); 1074 arcmsr_flush_adapter_cache(acb); 1075} 1076 1077static int arcmsr_module_init(void) 1078{ 1079 int error = 0; 1080 error = pci_register_driver(&arcmsr_pci_driver); 1081 return error; 1082} 1083 1084static void arcmsr_module_exit(void) 1085{ 1086 pci_unregister_driver(&arcmsr_pci_driver); 1087} 1088module_init(arcmsr_module_init); 1089module_exit(arcmsr_module_exit); 1090 1091static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 1092 u32 intmask_org) 1093{ 1094 u32 mask; 1095 switch (acb->adapter_type) { 1096 1097 case ACB_ADAPTER_TYPE_A: { 1098 struct MessageUnit_A __iomem *reg = acb->pmuA; 1099 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 1100 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| 1101 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1102 writel(mask, ®->outbound_intmask); 1103 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1104 } 1105 break; 1106 1107 case ACB_ADAPTER_TYPE_B: { 1108 struct MessageUnit_B *reg = acb->pmuB; 1109 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | 1110 ARCMSR_IOP2DRV_DATA_READ_OK | 1111 ARCMSR_IOP2DRV_CDB_DONE | 1112 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1113 writel(mask, reg->iop2drv_doorbell_mask); 1114 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1115 } 1116 break; 1117 case ACB_ADAPTER_TYPE_C: { 1118 struct MessageUnit_C *reg = acb->pmuC; 1119 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1120 writel(intmask_org & mask, ®->host_int_mask); 1121 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1122 } 1123 } 1124} 1125 1126static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 1127 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 1128{ 1129 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1130 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1131 __le32 address_lo, address_hi; 1132 int arccdbsize = 0x30; 1133 __le32 length = 0; 1134 int i; 1135 struct scatterlist *sg; 1136 int nseg; 1137 ccb->pcmd = pcmd; 1138 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 1139 arcmsr_cdb->TargetID = pcmd->device->id; 1140 arcmsr_cdb->LUN = pcmd->device->lun; 1141 arcmsr_cdb->Function = 1; 1142 arcmsr_cdb->Context = 0; 1143 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1144 1145 nseg = scsi_dma_map(pcmd); 1146 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0)) 1147 return FAILED; 1148 scsi_for_each_sg(pcmd, sg, nseg, i) { 1149 /* Get the physical address of the current data pointer */ 1150 length = cpu_to_le32(sg_dma_len(sg)); 1151 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 1152 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 1153 if (address_hi == 0) { 1154 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 1155 1156 pdma_sg->address = address_lo; 1157 pdma_sg->length = length; 1158 psge += sizeof (struct SG32ENTRY); 1159 arccdbsize += sizeof (struct SG32ENTRY); 1160 } else { 1161 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 1162 1163 pdma_sg->addresshigh = address_hi; 1164 pdma_sg->address = address_lo; 1165 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 1166 psge += sizeof (struct SG64ENTRY); 1167 arccdbsize += sizeof (struct SG64ENTRY); 1168 } 1169 } 1170 arcmsr_cdb->sgcount = (uint8_t)nseg; 1171 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1172 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); 1173 if ( arccdbsize > 256) 1174 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1175 if (pcmd->cmnd[0]|WRITE_6 || pcmd->cmnd[0]|WRITE_10 || pcmd->cmnd[0]|WRITE_12 ){ 1176 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1177 } 1178 ccb->arc_cdb_size = arccdbsize; 1179 return SUCCESS; 1180} 1181 1182static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1183{ 1184 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern; 1185 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1186 atomic_inc(&acb->ccboutstandingcount); 1187 ccb->startdone = ARCMSR_CCB_START; 1188 switch (acb->adapter_type) { 1189 case ACB_ADAPTER_TYPE_A: { 1190 struct MessageUnit_A __iomem *reg = acb->pmuA; 1191 1192 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1193 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1194 ®->inbound_queueport); 1195 else { 1196 writel(cdb_phyaddr_pattern, ®->inbound_queueport); 1197 } 1198 } 1199 break; 1200 1201 case ACB_ADAPTER_TYPE_B: { 1202 struct MessageUnit_B *reg = acb->pmuB; 1203 uint32_t ending_index, index = reg->postq_index; 1204 1205 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1206 writel(0, ®->post_qbuffer[ending_index]); 1207 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1208 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ 1209 ®->post_qbuffer[index]); 1210 } else { 1211 writel(cdb_phyaddr_pattern, ®->post_qbuffer[index]); 1212 } 1213 index++; 1214 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1215 reg->postq_index = index; 1216 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); 1217 } 1218 break; 1219 case ACB_ADAPTER_TYPE_C: { 1220 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1221 uint32_t ccb_post_stamp, arc_cdb_size; 1222 1223 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1224 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1); 1225 if (acb->cdb_phyaddr_hi32) { 1226 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); 1227 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1228 } else { 1229 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1230 } 1231 } 1232 } 1233} 1234 1235static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) 1236{ 1237 struct MessageUnit_A __iomem *reg = acb->pmuA; 1238 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1239 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1240 if (!arcmsr_hba_wait_msgint_ready(acb)) { 1241 printk(KERN_NOTICE 1242 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1243 , acb->host->host_no); 1244 } 1245} 1246 1247static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) 1248{ 1249 struct MessageUnit_B *reg = acb->pmuB; 1250 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1251 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); 1252 1253 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 1254 printk(KERN_NOTICE 1255 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1256 , acb->host->host_no); 1257 } 1258} 1259 1260static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB) 1261{ 1262 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1263 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1264 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1265 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1266 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 1267 printk(KERN_NOTICE 1268 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1269 , pACB->host->host_no); 1270 } 1271 return; 1272} 1273static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1274{ 1275 switch (acb->adapter_type) { 1276 case ACB_ADAPTER_TYPE_A: { 1277 arcmsr_stop_hba_bgrb(acb); 1278 } 1279 break; 1280 1281 case ACB_ADAPTER_TYPE_B: { 1282 arcmsr_stop_hbb_bgrb(acb); 1283 } 1284 break; 1285 case ACB_ADAPTER_TYPE_C: { 1286 arcmsr_stop_hbc_bgrb(acb); 1287 } 1288 } 1289} 1290 1291static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1292{ 1293 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1294} 1295 1296void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1297{ 1298 switch (acb->adapter_type) { 1299 case ACB_ADAPTER_TYPE_A: { 1300 struct MessageUnit_A __iomem *reg = acb->pmuA; 1301 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1302 } 1303 break; 1304 1305 case ACB_ADAPTER_TYPE_B: { 1306 struct MessageUnit_B *reg = acb->pmuB; 1307 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 1308 } 1309 break; 1310 case ACB_ADAPTER_TYPE_C: { 1311 struct MessageUnit_C __iomem *reg = acb->pmuC; 1312 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 1313 } 1314 } 1315} 1316 1317static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1318{ 1319 switch (acb->adapter_type) { 1320 case ACB_ADAPTER_TYPE_A: { 1321 struct MessageUnit_A __iomem *reg = acb->pmuA; 1322 /* 1323 ** push inbound doorbell tell iop, driver data write ok 1324 ** and wait reply on next hwinterrupt for next Qbuffer post 1325 */ 1326 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1327 } 1328 break; 1329 1330 case ACB_ADAPTER_TYPE_B: { 1331 struct MessageUnit_B *reg = acb->pmuB; 1332 /* 1333 ** push inbound doorbell tell iop, driver data write ok 1334 ** and wait reply on next hwinterrupt for next Qbuffer post 1335 */ 1336 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); 1337 } 1338 break; 1339 case ACB_ADAPTER_TYPE_C: { 1340 struct MessageUnit_C __iomem *reg = acb->pmuC; 1341 /* 1342 ** push inbound doorbell tell iop, driver data write ok 1343 ** and wait reply on next hwinterrupt for next Qbuffer post 1344 */ 1345 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); 1346 } 1347 break; 1348 } 1349} 1350 1351struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1352{ 1353 struct QBUFFER __iomem *qbuffer = NULL; 1354 switch (acb->adapter_type) { 1355 1356 case ACB_ADAPTER_TYPE_A: { 1357 struct MessageUnit_A __iomem *reg = acb->pmuA; 1358 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1359 } 1360 break; 1361 1362 case ACB_ADAPTER_TYPE_B: { 1363 struct MessageUnit_B *reg = acb->pmuB; 1364 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1365 } 1366 break; 1367 case ACB_ADAPTER_TYPE_C: { 1368 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1369 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1370 } 1371 } 1372 return qbuffer; 1373} 1374 1375static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1376{ 1377 struct QBUFFER __iomem *pqbuffer = NULL; 1378 switch (acb->adapter_type) { 1379 1380 case ACB_ADAPTER_TYPE_A: { 1381 struct MessageUnit_A __iomem *reg = acb->pmuA; 1382 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1383 } 1384 break; 1385 1386 case ACB_ADAPTER_TYPE_B: { 1387 struct MessageUnit_B *reg = acb->pmuB; 1388 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1389 } 1390 break; 1391 case ACB_ADAPTER_TYPE_C: { 1392 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 1393 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; 1394 } 1395 1396 } 1397 return pqbuffer; 1398} 1399 1400static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1401{ 1402 struct QBUFFER __iomem *prbuffer; 1403 struct QBUFFER *pQbuffer; 1404 uint8_t __iomem *iop_data; 1405 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; 1406 rqbuf_lastindex = acb->rqbuf_lastindex; 1407 rqbuf_firstindex = acb->rqbuf_firstindex; 1408 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1409 iop_data = (uint8_t __iomem *)prbuffer->data; 1410 iop_len = prbuffer->data_len; 1411 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1); 1412 1413 if (my_empty_len >= iop_len) 1414 { 1415 while (iop_len > 0) { 1416 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; 1417 memcpy(pQbuffer, iop_data, 1); 1418 rqbuf_lastindex++; 1419 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1420 iop_data++; 1421 iop_len--; 1422 } 1423 acb->rqbuf_lastindex = rqbuf_lastindex; 1424 arcmsr_iop_message_read(acb); 1425 } 1426 1427 else { 1428 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1429 } 1430} 1431 1432static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1433{ 1434 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1435 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { 1436 uint8_t *pQbuffer; 1437 struct QBUFFER __iomem *pwbuffer; 1438 uint8_t __iomem *iop_data; 1439 int32_t allxfer_len = 0; 1440 1441 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1442 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1443 iop_data = (uint8_t __iomem *)pwbuffer->data; 1444 1445 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ 1446 (allxfer_len < 124)) { 1447 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; 1448 memcpy(iop_data, pQbuffer, 1); 1449 acb->wqbuf_firstindex++; 1450 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1451 iop_data++; 1452 allxfer_len++; 1453 } 1454 pwbuffer->data_len = allxfer_len; 1455 1456 arcmsr_iop_message_wrote(acb); 1457 } 1458 1459 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { 1460 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1461 } 1462} 1463 1464static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) 1465{ 1466 uint32_t outbound_doorbell; 1467 struct MessageUnit_A __iomem *reg = acb->pmuA; 1468 outbound_doorbell = readl(®->outbound_doorbell); 1469 writel(outbound_doorbell, ®->outbound_doorbell); 1470 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { 1471 arcmsr_iop2drv_data_wrote_handle(acb); 1472 } 1473 1474 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { 1475 arcmsr_iop2drv_data_read_handle(acb); 1476 } 1477} 1478static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB) 1479{ 1480 uint32_t outbound_doorbell; 1481 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1482 /* 1483 ******************************************************************* 1484 ** Maybe here we need to check wrqbuffer_lock is lock or not 1485 ** DOORBELL: din! don! 1486 ** check if there are any mail need to pack from firmware 1487 ******************************************************************* 1488 */ 1489 outbound_doorbell = readl(®->outbound_doorbell); 1490 writel(outbound_doorbell, ®->outbound_doorbell_clear);/*clear interrupt*/ 1491 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { 1492 arcmsr_iop2drv_data_wrote_handle(pACB); 1493 } 1494 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) { 1495 arcmsr_iop2drv_data_read_handle(pACB); 1496 } 1497 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 1498 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */ 1499 } 1500 return; 1501} 1502static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) 1503{ 1504 uint32_t flag_ccb; 1505 struct MessageUnit_A __iomem *reg = acb->pmuA; 1506 struct ARCMSR_CDB *pARCMSR_CDB; 1507 struct CommandControlBlock *pCCB; 1508 bool error; 1509 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 1510 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1511 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1512 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1513 arcmsr_drain_donequeue(acb, pCCB, error); 1514 } 1515} 1516 1517static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) 1518{ 1519 uint32_t index; 1520 uint32_t flag_ccb; 1521 struct MessageUnit_B *reg = acb->pmuB; 1522 struct ARCMSR_CDB *pARCMSR_CDB; 1523 struct CommandControlBlock *pCCB; 1524 bool error; 1525 index = reg->doneq_index; 1526 while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { 1527 writel(0, ®->done_qbuffer[index]); 1528 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1529 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1530 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1531 arcmsr_drain_donequeue(acb, pCCB, error); 1532 index++; 1533 index %= ARCMSR_MAX_HBB_POSTQUEUE; 1534 reg->doneq_index = index; 1535 } 1536} 1537 1538static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb) 1539{ 1540 struct MessageUnit_C *phbcmu; 1541 struct ARCMSR_CDB *arcmsr_cdb; 1542 struct CommandControlBlock *ccb; 1543 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 1544 int error; 1545 1546 phbcmu = (struct MessageUnit_C *)acb->pmuC; 1547 /* areca cdb command done */ 1548 /* Use correct offset and size for syncing */ 1549 1550 while (readl(&phbcmu->host_int_status) & 1551 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){ 1552 /* check if command done with no error*/ 1553 flag_ccb = readl(&phbcmu->outbound_queueport_low); 1554 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/ 1555 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy); 1556 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 1557 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1558 /* check if command done with no error */ 1559 arcmsr_drain_donequeue(acb, ccb, error); 1560 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { 1561 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell); 1562 break; 1563 } 1564 throttling++; 1565 } 1566} 1567/* 1568********************************************************************************** 1569** Handle a message interrupt 1570** 1571** The only message interrupt we expect is in response to a query for the current adapter config. 1572** We want this in order to compare the drivemap so that we can detect newly-attached drives. 1573********************************************************************************** 1574*/ 1575static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb) 1576{ 1577 struct MessageUnit_A *reg = acb->pmuA; 1578 /*clear interrupt and message state*/ 1579 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); 1580 schedule_work(&acb->arcmsr_do_message_isr_bh); 1581} 1582static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb) 1583{ 1584 struct MessageUnit_B *reg = acb->pmuB; 1585 1586 /*clear interrupt and message state*/ 1587 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 1588 schedule_work(&acb->arcmsr_do_message_isr_bh); 1589} 1590/* 1591********************************************************************************** 1592** Handle a message interrupt 1593** 1594** The only message interrupt we expect is in response to a query for the 1595** current adapter config. 1596** We want this in order to compare the drivemap so that we can detect newly-attached drives. 1597********************************************************************************** 1598*/ 1599static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb) 1600{ 1601 struct MessageUnit_C *reg = acb->pmuC; 1602 /*clear interrupt and message state*/ 1603 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); 1604 schedule_work(&acb->arcmsr_do_message_isr_bh); 1605} 1606 1607static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) 1608{ 1609 uint32_t outbound_intstatus; 1610 struct MessageUnit_A __iomem *reg = acb->pmuA; 1611 outbound_intstatus = readl(®->outbound_intstatus) & 1612 acb->outbound_int_enable; 1613 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { 1614 return 1; 1615 } 1616 writel(outbound_intstatus, ®->outbound_intstatus); 1617 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { 1618 arcmsr_hba_doorbell_isr(acb); 1619 } 1620 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { 1621 arcmsr_hba_postqueue_isr(acb); 1622 } 1623 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 1624 /* messenger of "driver to iop commands" */ 1625 arcmsr_hba_message_isr(acb); 1626 } 1627 return 0; 1628} 1629 1630static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) 1631{ 1632 uint32_t outbound_doorbell; 1633 struct MessageUnit_B *reg = acb->pmuB; 1634 outbound_doorbell = readl(reg->iop2drv_doorbell) & 1635 acb->outbound_int_enable; 1636 if (!outbound_doorbell) 1637 return 1; 1638 1639 writel(~outbound_doorbell, reg->iop2drv_doorbell); 1640 /*in case the last action of doorbell interrupt clearance is cached, 1641 this action can push HW to write down the clear bit*/ 1642 readl(reg->iop2drv_doorbell); 1643 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 1644 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { 1645 arcmsr_iop2drv_data_wrote_handle(acb); 1646 } 1647 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { 1648 arcmsr_iop2drv_data_read_handle(acb); 1649 } 1650 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { 1651 arcmsr_hbb_postqueue_isr(acb); 1652 } 1653 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 1654 /* messenger of "driver to iop commands" */ 1655 arcmsr_hbb_message_isr(acb); 1656 } 1657 return 0; 1658} 1659 1660static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB) 1661{ 1662 uint32_t host_interrupt_status; 1663 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 1664 /* 1665 ********************************************* 1666 ** check outbound intstatus 1667 ********************************************* 1668 */ 1669 host_interrupt_status = readl(&phbcmu->host_int_status); 1670 if (!host_interrupt_status) { 1671 /*it must be share irq*/ 1672 return 1; 1673 } 1674 /* MU ioctl transfer doorbell interrupts*/ 1675 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) { 1676 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */ 1677 } 1678 /* MU post queue interrupts*/ 1679 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) { 1680 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */ 1681 } 1682 return 0; 1683} 1684static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 1685{ 1686 switch (acb->adapter_type) { 1687 case ACB_ADAPTER_TYPE_A: { 1688 if (arcmsr_handle_hba_isr(acb)) { 1689 return IRQ_NONE; 1690 } 1691 } 1692 break; 1693 1694 case ACB_ADAPTER_TYPE_B: { 1695 if (arcmsr_handle_hbb_isr(acb)) { 1696 return IRQ_NONE; 1697 } 1698 } 1699 break; 1700 case ACB_ADAPTER_TYPE_C: { 1701 if (arcmsr_handle_hbc_isr(acb)) { 1702 return IRQ_NONE; 1703 } 1704 } 1705 } 1706 return IRQ_HANDLED; 1707} 1708 1709static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 1710{ 1711 if (acb) { 1712 /* stop adapter background rebuild */ 1713 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 1714 uint32_t intmask_org; 1715 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1716 intmask_org = arcmsr_disable_outbound_ints(acb); 1717 arcmsr_stop_adapter_bgrb(acb); 1718 arcmsr_flush_adapter_cache(acb); 1719 arcmsr_enable_outbound_ints(acb, intmask_org); 1720 } 1721 } 1722} 1723 1724void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) 1725{ 1726 int32_t wqbuf_firstindex, wqbuf_lastindex; 1727 uint8_t *pQbuffer; 1728 struct QBUFFER __iomem *pwbuffer; 1729 uint8_t __iomem *iop_data; 1730 int32_t allxfer_len = 0; 1731 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1732 iop_data = (uint8_t __iomem *)pwbuffer->data; 1733 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1734 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1735 wqbuf_firstindex = acb->wqbuf_firstindex; 1736 wqbuf_lastindex = acb->wqbuf_lastindex; 1737 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { 1738 pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; 1739 memcpy(iop_data, pQbuffer, 1); 1740 wqbuf_firstindex++; 1741 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1742 iop_data++; 1743 allxfer_len++; 1744 } 1745 acb->wqbuf_firstindex = wqbuf_firstindex; 1746 pwbuffer->data_len = allxfer_len; 1747 arcmsr_iop_message_wrote(acb); 1748 } 1749} 1750 1751static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 1752 struct scsi_cmnd *cmd) 1753{ 1754 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 1755 int retvalue = 0, transfer_len = 0; 1756 char *buffer; 1757 struct scatterlist *sg; 1758 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 | 1759 (uint32_t ) cmd->cmnd[6] << 16 | 1760 (uint32_t ) cmd->cmnd[7] << 8 | 1761 (uint32_t ) cmd->cmnd[8]; 1762 /* 4 bytes: Areca io control code */ 1763 sg = scsi_sglist(cmd); 1764 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 1765 if (scsi_sg_count(cmd) > 1) { 1766 retvalue = ARCMSR_MESSAGE_FAIL; 1767 goto message_out; 1768 } 1769 transfer_len += sg->length; 1770 1771 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 1772 retvalue = ARCMSR_MESSAGE_FAIL; 1773 goto message_out; 1774 } 1775 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; 1776 switch(controlcode) { 1777 1778 case ARCMSR_MESSAGE_READ_RQBUFFER: { 1779 unsigned char *ver_addr; 1780 uint8_t *pQbuffer, *ptmpQbuffer; 1781 int32_t allxfer_len = 0; 1782 1783 ver_addr = kmalloc(1032, GFP_ATOMIC); 1784 if (!ver_addr) { 1785 retvalue = ARCMSR_MESSAGE_FAIL; 1786 goto message_out; 1787 } 1788 1789 ptmpQbuffer = ver_addr; 1790 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) 1791 && (allxfer_len < 1031)) { 1792 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; 1793 memcpy(ptmpQbuffer, pQbuffer, 1); 1794 acb->rqbuf_firstindex++; 1795 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1796 ptmpQbuffer++; 1797 allxfer_len++; 1798 } 1799 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1800 1801 struct QBUFFER __iomem *prbuffer; 1802 uint8_t __iomem *iop_data; 1803 int32_t iop_len; 1804 1805 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1806 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1807 iop_data = prbuffer->data; 1808 iop_len = readl(&prbuffer->data_len); 1809 while (iop_len > 0) { 1810 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); 1811 acb->rqbuf_lastindex++; 1812 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1813 iop_data++; 1814 iop_len--; 1815 } 1816 arcmsr_iop_message_read(acb); 1817 } 1818 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); 1819 pcmdmessagefld->cmdmessage.Length = allxfer_len; 1820 if(acb->fw_flag == FW_DEADLOCK) { 1821 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1822 }else{ 1823 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1824 } 1825 kfree(ver_addr); 1826 } 1827 break; 1828 1829 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 1830 unsigned char *ver_addr; 1831 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 1832 uint8_t *pQbuffer, *ptmpuserbuffer; 1833 1834 ver_addr = kmalloc(1032, GFP_ATOMIC); 1835 if (!ver_addr) { 1836 retvalue = ARCMSR_MESSAGE_FAIL; 1837 goto message_out; 1838 } 1839 if(acb->fw_flag == FW_DEADLOCK) { 1840 pcmdmessagefld->cmdmessage.ReturnCode = 1841 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1842 }else{ 1843 pcmdmessagefld->cmdmessage.ReturnCode = 1844 ARCMSR_MESSAGE_RETURNCODE_OK; 1845 } 1846 ptmpuserbuffer = ver_addr; 1847 user_len = pcmdmessagefld->cmdmessage.Length; 1848 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); 1849 wqbuf_lastindex = acb->wqbuf_lastindex; 1850 wqbuf_firstindex = acb->wqbuf_firstindex; 1851 if (wqbuf_lastindex != wqbuf_firstindex) { 1852 struct SENSE_DATA *sensebuffer = 1853 (struct SENSE_DATA *)cmd->sense_buffer; 1854 arcmsr_post_ioctldata2iop(acb); 1855 /* has error report sensedata */ 1856 sensebuffer->ErrorCode = 0x70; 1857 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1858 sensebuffer->AdditionalSenseLength = 0x0A; 1859 sensebuffer->AdditionalSenseCode = 0x20; 1860 sensebuffer->Valid = 1; 1861 retvalue = ARCMSR_MESSAGE_FAIL; 1862 } else { 1863 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) 1864 &(ARCMSR_MAX_QBUFFER - 1); 1865 if (my_empty_len >= user_len) { 1866 while (user_len > 0) { 1867 pQbuffer = 1868 &acb->wqbuffer[acb->wqbuf_lastindex]; 1869 memcpy(pQbuffer, ptmpuserbuffer, 1); 1870 acb->wqbuf_lastindex++; 1871 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1872 ptmpuserbuffer++; 1873 user_len--; 1874 } 1875 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 1876 acb->acb_flags &= 1877 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 1878 arcmsr_post_ioctldata2iop(acb); 1879 } 1880 } else { 1881 /* has error report sensedata */ 1882 struct SENSE_DATA *sensebuffer = 1883 (struct SENSE_DATA *)cmd->sense_buffer; 1884 sensebuffer->ErrorCode = 0x70; 1885 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1886 sensebuffer->AdditionalSenseLength = 0x0A; 1887 sensebuffer->AdditionalSenseCode = 0x20; 1888 sensebuffer->Valid = 1; 1889 retvalue = ARCMSR_MESSAGE_FAIL; 1890 } 1891 } 1892 kfree(ver_addr); 1893 } 1894 break; 1895 1896 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 1897 uint8_t *pQbuffer = acb->rqbuffer; 1898 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1899 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1900 arcmsr_iop_message_read(acb); 1901 } 1902 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 1903 acb->rqbuf_firstindex = 0; 1904 acb->rqbuf_lastindex = 0; 1905 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1906 if(acb->fw_flag == FW_DEADLOCK) { 1907 pcmdmessagefld->cmdmessage.ReturnCode = 1908 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1909 }else{ 1910 pcmdmessagefld->cmdmessage.ReturnCode = 1911 ARCMSR_MESSAGE_RETURNCODE_OK; 1912 } 1913 } 1914 break; 1915 1916 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 1917 uint8_t *pQbuffer = acb->wqbuffer; 1918 if(acb->fw_flag == FW_DEADLOCK) { 1919 pcmdmessagefld->cmdmessage.ReturnCode = 1920 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1921 }else{ 1922 pcmdmessagefld->cmdmessage.ReturnCode = 1923 ARCMSR_MESSAGE_RETURNCODE_OK; 1924 } 1925 1926 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1927 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1928 arcmsr_iop_message_read(acb); 1929 } 1930 acb->acb_flags |= 1931 (ACB_F_MESSAGE_WQBUFFER_CLEARED | 1932 ACB_F_MESSAGE_WQBUFFER_READED); 1933 acb->wqbuf_firstindex = 0; 1934 acb->wqbuf_lastindex = 0; 1935 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1936 } 1937 break; 1938 1939 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 1940 uint8_t *pQbuffer; 1941 1942 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1943 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1944 arcmsr_iop_message_read(acb); 1945 } 1946 acb->acb_flags |= 1947 (ACB_F_MESSAGE_WQBUFFER_CLEARED 1948 | ACB_F_MESSAGE_RQBUFFER_CLEARED 1949 | ACB_F_MESSAGE_WQBUFFER_READED); 1950 acb->rqbuf_firstindex = 0; 1951 acb->rqbuf_lastindex = 0; 1952 acb->wqbuf_firstindex = 0; 1953 acb->wqbuf_lastindex = 0; 1954 pQbuffer = acb->rqbuffer; 1955 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1956 pQbuffer = acb->wqbuffer; 1957 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1958 if(acb->fw_flag == FW_DEADLOCK) { 1959 pcmdmessagefld->cmdmessage.ReturnCode = 1960 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1961 }else{ 1962 pcmdmessagefld->cmdmessage.ReturnCode = 1963 ARCMSR_MESSAGE_RETURNCODE_OK; 1964 } 1965 } 1966 break; 1967 1968 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 1969 if(acb->fw_flag == FW_DEADLOCK) { 1970 pcmdmessagefld->cmdmessage.ReturnCode = 1971 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1972 }else{ 1973 pcmdmessagefld->cmdmessage.ReturnCode = 1974 ARCMSR_MESSAGE_RETURNCODE_3F; 1975 } 1976 break; 1977 } 1978 case ARCMSR_MESSAGE_SAY_HELLO: { 1979 int8_t *hello_string = "Hello! I am ARCMSR"; 1980 if(acb->fw_flag == FW_DEADLOCK) { 1981 pcmdmessagefld->cmdmessage.ReturnCode = 1982 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1983 }else{ 1984 pcmdmessagefld->cmdmessage.ReturnCode = 1985 ARCMSR_MESSAGE_RETURNCODE_OK; 1986 } 1987 memcpy(pcmdmessagefld->messagedatabuffer, hello_string 1988 , (int16_t)strlen(hello_string)); 1989 } 1990 break; 1991 1992 case ARCMSR_MESSAGE_SAY_GOODBYE: 1993 if(acb->fw_flag == FW_DEADLOCK) { 1994 pcmdmessagefld->cmdmessage.ReturnCode = 1995 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1996 } 1997 arcmsr_iop_parking(acb); 1998 break; 1999 2000 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: 2001 if(acb->fw_flag == FW_DEADLOCK) { 2002 pcmdmessagefld->cmdmessage.ReturnCode = 2003 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2004 } 2005 arcmsr_flush_adapter_cache(acb); 2006 break; 2007 2008 default: 2009 retvalue = ARCMSR_MESSAGE_FAIL; 2010 } 2011 message_out: 2012 sg = scsi_sglist(cmd); 2013 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 2014 return retvalue; 2015} 2016 2017static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 2018{ 2019 struct list_head *head = &acb->ccb_free_list; 2020 struct CommandControlBlock *ccb = NULL; 2021 unsigned long flags; 2022 spin_lock_irqsave(&acb->ccblist_lock, flags); 2023 if (!list_empty(head)) { 2024 ccb = list_entry(head->next, struct CommandControlBlock, list); 2025 list_del_init(&ccb->list); 2026 }else{ 2027 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2028 return 0; 2029 } 2030 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2031 return ccb; 2032} 2033 2034static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 2035 struct scsi_cmnd *cmd) 2036{ 2037 switch (cmd->cmnd[0]) { 2038 case INQUIRY: { 2039 unsigned char inqdata[36]; 2040 char *buffer; 2041 struct scatterlist *sg; 2042 2043 if (cmd->device->lun) { 2044 cmd->result = (DID_TIME_OUT << 16); 2045 cmd->scsi_done(cmd); 2046 return; 2047 } 2048 inqdata[0] = TYPE_PROCESSOR; 2049 /* Periph Qualifier & Periph Dev Type */ 2050 inqdata[1] = 0; 2051 /* rem media bit & Dev Type Modifier */ 2052 inqdata[2] = 0; 2053 /* ISO, ECMA, & ANSI versions */ 2054 inqdata[4] = 31; 2055 /* length of additional data */ 2056 strncpy(&inqdata[8], "Areca ", 8); 2057 /* Vendor Identification */ 2058 strncpy(&inqdata[16], "RAID controller ", 16); 2059 /* Product Identification */ 2060 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 2061 2062 sg = scsi_sglist(cmd); 2063 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 2064 2065 memcpy(buffer, inqdata, sizeof(inqdata)); 2066 sg = scsi_sglist(cmd); 2067 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 2068 2069 cmd->scsi_done(cmd); 2070 } 2071 break; 2072 case WRITE_BUFFER: 2073 case READ_BUFFER: { 2074 if (arcmsr_iop_message_xfer(acb, cmd)) 2075 cmd->result = (DID_ERROR << 16); 2076 cmd->scsi_done(cmd); 2077 } 2078 break; 2079 default: 2080 cmd->scsi_done(cmd); 2081 } 2082} 2083 2084static int arcmsr_queue_command(struct scsi_cmnd *cmd, 2085 void (* done)(struct scsi_cmnd *)) 2086{ 2087 struct Scsi_Host *host = cmd->device->host; 2088 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 2089 struct CommandControlBlock *ccb; 2090 int target = cmd->device->id; 2091 int lun = cmd->device->lun; 2092 uint8_t scsicmd = cmd->cmnd[0]; 2093 cmd->scsi_done = done; 2094 cmd->host_scribble = NULL; 2095 cmd->result = 0; 2096 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){ 2097 if(acb->devstate[target][lun] == ARECA_RAID_GONE) { 2098 cmd->result = (DID_NO_CONNECT << 16); 2099 } 2100 cmd->scsi_done(cmd); 2101 return 0; 2102 } 2103 if (target == 16) { 2104 /* virtual device for iop message transfer */ 2105 arcmsr_handle_virtual_command(acb, cmd); 2106 return 0; 2107 } 2108 if (atomic_read(&acb->ccboutstandingcount) >= 2109 ARCMSR_MAX_OUTSTANDING_CMD) 2110 return SCSI_MLQUEUE_HOST_BUSY; 2111 if ((scsicmd == SCSI_CMD_ARECA_SPECIFIC)) { 2112 printk(KERN_NOTICE "Receiveing SCSI_CMD_ARECA_SPECIFIC command..\n"); 2113 return 0; 2114 } 2115 ccb = arcmsr_get_freeccb(acb); 2116 if (!ccb) 2117 return SCSI_MLQUEUE_HOST_BUSY; 2118 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) { 2119 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 2120 cmd->scsi_done(cmd); 2121 return 0; 2122 } 2123 arcmsr_post_ccb(acb, ccb); 2124 return 0; 2125} 2126 2127static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb) 2128{ 2129 struct MessageUnit_A __iomem *reg = acb->pmuA; 2130 char *acb_firm_model = acb->firm_model; 2131 char *acb_firm_version = acb->firm_version; 2132 char *acb_device_map = acb->device_map; 2133 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 2134 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 2135 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); 2136 int count; 2137 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2138 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2139 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2140 miscellaneous data' timeout \n", acb->host->host_no); 2141 return false; 2142 } 2143 count = 8; 2144 while (count){ 2145 *acb_firm_model = readb(iop_firm_model); 2146 acb_firm_model++; 2147 iop_firm_model++; 2148 count--; 2149 } 2150 2151 count = 16; 2152 while (count){ 2153 *acb_firm_version = readb(iop_firm_version); 2154 acb_firm_version++; 2155 iop_firm_version++; 2156 count--; 2157 } 2158 2159 count=16; 2160 while(count){ 2161 *acb_device_map = readb(iop_device_map); 2162 acb_device_map++; 2163 iop_device_map++; 2164 count--; 2165 } 2166 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2167 acb->host->host_no, 2168 acb->firm_version, 2169 acb->firm_model); 2170 acb->signature = readl(®->message_rwbuffer[0]); 2171 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2172 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2173 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2174 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2175 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2176 return true; 2177} 2178static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb) 2179{ 2180 struct MessageUnit_B *reg = acb->pmuB; 2181 struct pci_dev *pdev = acb->pdev; 2182 void *dma_coherent; 2183 dma_addr_t dma_coherent_handle; 2184 char *acb_firm_model = acb->firm_model; 2185 char *acb_firm_version = acb->firm_version; 2186 char *acb_device_map = acb->device_map; 2187 char __iomem *iop_firm_model; 2188 /*firm_model,15,60-67*/ 2189 char __iomem *iop_firm_version; 2190 /*firm_version,17,68-83*/ 2191 char __iomem *iop_device_map; 2192 /*firm_version,21,84-99*/ 2193 int count; 2194 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL); 2195 if (!dma_coherent){ 2196 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no); 2197 return false; 2198 } 2199 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle; 2200 reg = (struct MessageUnit_B *)dma_coherent; 2201 acb->pmuB = reg; 2202 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL); 2203 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK); 2204 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL); 2205 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK); 2206 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER); 2207 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER); 2208 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER); 2209 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ 2210 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ 2211 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ 2212 2213 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2214 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2215 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2216 miscellaneous data' timeout \n", acb->host->host_no); 2217 return false; 2218 } 2219 count = 8; 2220 while (count){ 2221 *acb_firm_model = readb(iop_firm_model); 2222 acb_firm_model++; 2223 iop_firm_model++; 2224 count--; 2225 } 2226 count = 16; 2227 while (count){ 2228 *acb_firm_version = readb(iop_firm_version); 2229 acb_firm_version++; 2230 iop_firm_version++; 2231 count--; 2232 } 2233 2234 count = 16; 2235 while(count){ 2236 *acb_device_map = readb(iop_device_map); 2237 acb_device_map++; 2238 iop_device_map++; 2239 count--; 2240 } 2241 2242 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2243 acb->host->host_no, 2244 acb->firm_version, 2245 acb->firm_model); 2246 2247 acb->signature = readl(®->message_rwbuffer[1]); 2248 /*firm_signature,1,00-03*/ 2249 acb->firm_request_len = readl(®->message_rwbuffer[2]); 2250 /*firm_request_len,1,04-07*/ 2251 acb->firm_numbers_queue = readl(®->message_rwbuffer[3]); 2252 /*firm_numbers_queue,2,08-11*/ 2253 acb->firm_sdram_size = readl(®->message_rwbuffer[4]); 2254 /*firm_sdram_size,3,12-15*/ 2255 acb->firm_hd_channels = readl(®->message_rwbuffer[5]); 2256 /*firm_ide_channels,4,16-19*/ 2257 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2258 /*firm_ide_channels,4,16-19*/ 2259 return true; 2260} 2261 2262static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB) 2263{ 2264 uint32_t intmask_org, Index, firmware_state = 0; 2265 struct MessageUnit_C *reg = pACB->pmuC; 2266 char *acb_firm_model = pACB->firm_model; 2267 char *acb_firm_version = pACB->firm_version; 2268 char *iop_firm_model = (char *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2269 char *iop_firm_version = (char *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2270 int count; 2271 /* disable all outbound interrupt */ 2272 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ 2273 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 2274 /* wait firmware ready */ 2275 do { 2276 firmware_state = readl(®->outbound_msgaddr1); 2277 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2278 /* post "get config" instruction */ 2279 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2280 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2281 /* wait message ready */ 2282 for (Index = 0; Index < 2000; Index++) { 2283 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 2284 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ 2285 break; 2286 } 2287 udelay(10); 2288 } /*max 1 seconds*/ 2289 if (Index >= 2000) { 2290 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2291 miscellaneous data' timeout \n", pACB->host->host_no); 2292 return false; 2293 } 2294 count = 8; 2295 while (count) { 2296 *acb_firm_model = readb(iop_firm_model); 2297 acb_firm_model++; 2298 iop_firm_model++; 2299 count--; 2300 } 2301 count = 16; 2302 while (count) { 2303 *acb_firm_version = readb(iop_firm_version); 2304 acb_firm_version++; 2305 iop_firm_version++; 2306 count--; 2307 } 2308 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2309 pACB->host->host_no, 2310 pACB->firm_version, 2311 pACB->firm_model); 2312 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ 2313 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ 2314 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ 2315 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ 2316 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2317 /*all interrupt service will be enable at arcmsr_iop_init*/ 2318 return true; 2319} 2320static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 2321{ 2322 if (acb->adapter_type == ACB_ADAPTER_TYPE_A) 2323 return arcmsr_get_hba_config(acb); 2324 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B) 2325 return arcmsr_get_hbb_config(acb); 2326 else 2327 return arcmsr_get_hbc_config(acb); 2328} 2329 2330static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, 2331 struct CommandControlBlock *poll_ccb) 2332{ 2333 struct MessageUnit_A __iomem *reg = acb->pmuA; 2334 struct CommandControlBlock *ccb; 2335 struct ARCMSR_CDB *arcmsr_cdb; 2336 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2337 int rtn; 2338 bool error; 2339 polling_hba_ccb_retry: 2340 poll_count++; 2341 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 2342 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 2343 while (1) { 2344 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 2345 if (poll_ccb_done){ 2346 rtn = SUCCESS; 2347 break; 2348 }else { 2349 msleep(25); 2350 if (poll_count > 100){ 2351 rtn = FAILED; 2352 break; 2353 } 2354 goto polling_hba_ccb_retry; 2355 } 2356 } 2357 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2358 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2359 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2360 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2361 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2362 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2363 " poll command abort successfully \n" 2364 , acb->host->host_no 2365 , ccb->pcmd->device->id 2366 , ccb->pcmd->device->lun 2367 , ccb); 2368 ccb->pcmd->result = DID_ABORT << 16; 2369 arcmsr_ccb_complete(ccb); 2370 continue; 2371 } 2372 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2373 " command done ccb = '0x%p'" 2374 "ccboutstandingcount = %d \n" 2375 , acb->host->host_no 2376 , ccb 2377 , atomic_read(&acb->ccboutstandingcount)); 2378 continue; 2379 } 2380 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2381 arcmsr_report_ccb_state(acb, ccb, error); 2382 } 2383 return rtn; 2384} 2385 2386static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, 2387 struct CommandControlBlock *poll_ccb) 2388{ 2389 struct MessageUnit_B *reg = acb->pmuB; 2390 struct ARCMSR_CDB *arcmsr_cdb; 2391 struct CommandControlBlock *ccb; 2392 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 2393 int index, rtn; 2394 bool error; 2395 polling_hbb_ccb_retry: 2396 poll_count++; 2397 /* clear doorbell interrupt */ 2398 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2399 while(1){ 2400 index = reg->doneq_index; 2401 if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { 2402 if (poll_ccb_done){ 2403 rtn = SUCCESS; 2404 break; 2405 }else { 2406 msleep(25); 2407 if (poll_count > 100){ 2408 rtn = FAILED; 2409 break; 2410 } 2411 goto polling_hbb_ccb_retry; 2412 } 2413 } 2414 writel(0, ®->done_qbuffer[index]); 2415 index++; 2416 /*if last index number set it to 0 */ 2417 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2418 reg->doneq_index = index; 2419 /* check if command done with no error*/ 2420 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2421 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2422 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2423 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2424 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2425 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2426 " poll command abort successfully \n" 2427 ,acb->host->host_no 2428 ,ccb->pcmd->device->id 2429 ,ccb->pcmd->device->lun 2430 ,ccb); 2431 ccb->pcmd->result = DID_ABORT << 16; 2432 arcmsr_ccb_complete(ccb); 2433 continue; 2434 } 2435 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2436 " command done ccb = '0x%p'" 2437 "ccboutstandingcount = %d \n" 2438 , acb->host->host_no 2439 , ccb 2440 , atomic_read(&acb->ccboutstandingcount)); 2441 continue; 2442 } 2443 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2444 arcmsr_report_ccb_state(acb, ccb, error); 2445 } 2446 return rtn; 2447} 2448 2449static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) 2450{ 2451 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2452 uint32_t flag_ccb, ccb_cdb_phy; 2453 struct ARCMSR_CDB *arcmsr_cdb; 2454 bool error; 2455 struct CommandControlBlock *pCCB; 2456 uint32_t poll_ccb_done = 0, poll_count = 0; 2457 int rtn; 2458polling_hbc_ccb_retry: 2459 poll_count++; 2460 while (1) { 2461 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) { 2462 if (poll_ccb_done) { 2463 rtn = SUCCESS; 2464 break; 2465 } else { 2466 msleep(25); 2467 if (poll_count > 100) { 2468 rtn = FAILED; 2469 break; 2470 } 2471 goto polling_hbc_ccb_retry; 2472 } 2473 } 2474 flag_ccb = readl(®->outbound_queueport_low); 2475 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 2476 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 2477 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2478 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0; 2479 /* check ifcommand done with no error*/ 2480 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 2481 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 2482 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2483 " poll command abort successfully \n" 2484 , acb->host->host_no 2485 , pCCB->pcmd->device->id 2486 , pCCB->pcmd->device->lun 2487 , pCCB); 2488 pCCB->pcmd->result = DID_ABORT << 16; 2489 arcmsr_ccb_complete(pCCB); 2490 continue; 2491 } 2492 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2493 " command done ccb = '0x%p'" 2494 "ccboutstandingcount = %d \n" 2495 , acb->host->host_no 2496 , pCCB 2497 , atomic_read(&acb->ccboutstandingcount)); 2498 continue; 2499 } 2500 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 2501 arcmsr_report_ccb_state(acb, pCCB, error); 2502 } 2503 return rtn; 2504} 2505static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 2506 struct CommandControlBlock *poll_ccb) 2507{ 2508 int rtn = 0; 2509 switch (acb->adapter_type) { 2510 2511 case ACB_ADAPTER_TYPE_A: { 2512 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb); 2513 } 2514 break; 2515 2516 case ACB_ADAPTER_TYPE_B: { 2517 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb); 2518 } 2519 break; 2520 case ACB_ADAPTER_TYPE_C: { 2521 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb); 2522 } 2523 } 2524 return rtn; 2525} 2526 2527static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 2528{ 2529 uint32_t cdb_phyaddr, cdb_phyaddr_hi32; 2530 dma_addr_t dma_coherent_handle; 2531 /* 2532 ******************************************************************** 2533 ** here we need to tell iop 331 our freeccb.HighPart 2534 ** if freeccb.HighPart is not zero 2535 ******************************************************************** 2536 */ 2537 dma_coherent_handle = acb->dma_coherent_handle; 2538 cdb_phyaddr = (uint32_t)(dma_coherent_handle); 2539 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); 2540 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; 2541 /* 2542 *********************************************************************** 2543 ** if adapter type B, set window of "post command Q" 2544 *********************************************************************** 2545 */ 2546 switch (acb->adapter_type) { 2547 2548 case ACB_ADAPTER_TYPE_A: { 2549 if (cdb_phyaddr_hi32 != 0) { 2550 struct MessageUnit_A __iomem *reg = acb->pmuA; 2551 uint32_t intmask_org; 2552 intmask_org = arcmsr_disable_outbound_ints(acb); 2553 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 2554 ®->message_rwbuffer[0]); 2555 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); 2556 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 2557 ®->inbound_msgaddr0); 2558 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2559 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 2560 part physical address timeout\n", 2561 acb->host->host_no); 2562 return 1; 2563 } 2564 arcmsr_enable_outbound_ints(acb, intmask_org); 2565 } 2566 } 2567 break; 2568 2569 case ACB_ADAPTER_TYPE_B: { 2570 unsigned long post_queue_phyaddr; 2571 uint32_t __iomem *rwbuffer; 2572 2573 struct MessageUnit_B *reg = acb->pmuB; 2574 uint32_t intmask_org; 2575 intmask_org = arcmsr_disable_outbound_ints(acb); 2576 reg->postq_index = 0; 2577 reg->doneq_index = 0; 2578 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); 2579 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2580 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ 2581 acb->host->host_no); 2582 return 1; 2583 } 2584 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu; 2585 rwbuffer = reg->message_rwbuffer; 2586 /* driver "set config" signature */ 2587 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 2588 /* normal should be zero */ 2589 writel(cdb_phyaddr_hi32, rwbuffer++); 2590 /* postQ size (256 + 8)*4 */ 2591 writel(post_queue_phyaddr, rwbuffer++); 2592 /* doneQ size (256 + 8)*4 */ 2593 writel(post_queue_phyaddr + 1056, rwbuffer++); 2594 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 2595 writel(1056, rwbuffer); 2596 2597 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); 2598 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2599 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2600 timeout \n",acb->host->host_no); 2601 return 1; 2602 } 2603 arcmsr_hbb_enable_driver_mode(acb); 2604 arcmsr_enable_outbound_ints(acb, intmask_org); 2605 } 2606 break; 2607 case ACB_ADAPTER_TYPE_C: { 2608 if (cdb_phyaddr_hi32 != 0) { 2609 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2610 2611 if (cdb_phyaddr_hi32 != 0) { 2612 unsigned char Retries = 0x00; 2613 do { 2614 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x \n", acb->adapter_index, cdb_phyaddr_hi32); 2615 } while (Retries++ < 100); 2616 } 2617 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); 2618 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); 2619 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); 2620 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2621 if (!arcmsr_hbc_wait_msgint_ready(acb)) { 2622 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2623 timeout \n", acb->host->host_no); 2624 return 1; 2625 } 2626 } 2627 } 2628 } 2629 return 0; 2630} 2631 2632static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 2633{ 2634 uint32_t firmware_state = 0; 2635 switch (acb->adapter_type) { 2636 2637 case ACB_ADAPTER_TYPE_A: { 2638 struct MessageUnit_A __iomem *reg = acb->pmuA; 2639 do { 2640 firmware_state = readl(®->outbound_msgaddr1); 2641 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 2642 } 2643 break; 2644 2645 case ACB_ADAPTER_TYPE_B: { 2646 struct MessageUnit_B *reg = acb->pmuB; 2647 do { 2648 firmware_state = readl(reg->iop2drv_doorbell); 2649 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 2650 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 2651 } 2652 break; 2653 case ACB_ADAPTER_TYPE_C: { 2654 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2655 do { 2656 firmware_state = readl(®->outbound_msgaddr1); 2657 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2658 } 2659 } 2660} 2661 2662static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) 2663{ 2664 struct MessageUnit_A __iomem *reg = acb->pmuA; 2665 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2666 return; 2667 } else { 2668 acb->fw_flag = FW_NORMAL; 2669 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ 2670 atomic_set(&acb->rq_map_token, 16); 2671 } 2672 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2673 if (atomic_dec_and_test(&acb->rq_map_token)) 2674 return; 2675 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2676 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2677 } 2678 return; 2679} 2680 2681static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb) 2682{ 2683 struct MessageUnit_B __iomem *reg = acb->pmuB; 2684 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2685 return; 2686 } else { 2687 acb->fw_flag = FW_NORMAL; 2688 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 2689 atomic_set(&acb->rq_map_token,16); 2690 } 2691 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2692 if(atomic_dec_and_test(&acb->rq_map_token)) 2693 return; 2694 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2695 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2696 } 2697 return; 2698} 2699 2700static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb) 2701{ 2702 struct MessageUnit_C __iomem *reg = acb->pmuC; 2703 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { 2704 return; 2705 } else { 2706 acb->fw_flag = FW_NORMAL; 2707 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 2708 atomic_set(&acb->rq_map_token, 16); 2709 } 2710 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2711 if (atomic_dec_and_test(&acb->rq_map_token)) 2712 return; 2713 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2714 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2715 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2716 } 2717 return; 2718} 2719 2720static void arcmsr_request_device_map(unsigned long pacb) 2721{ 2722 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; 2723 switch (acb->adapter_type) { 2724 case ACB_ADAPTER_TYPE_A: { 2725 arcmsr_request_hba_device_map(acb); 2726 } 2727 break; 2728 case ACB_ADAPTER_TYPE_B: { 2729 arcmsr_request_hbb_device_map(acb); 2730 } 2731 break; 2732 case ACB_ADAPTER_TYPE_C: { 2733 arcmsr_request_hbc_device_map(acb); 2734 } 2735 } 2736} 2737 2738static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) 2739{ 2740 struct MessageUnit_A __iomem *reg = acb->pmuA; 2741 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2742 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 2743 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2744 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2745 rebulid' timeout \n", acb->host->host_no); 2746 } 2747} 2748 2749static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) 2750{ 2751 struct MessageUnit_B *reg = acb->pmuB; 2752 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2753 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); 2754 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2755 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2756 rebulid' timeout \n",acb->host->host_no); 2757 } 2758} 2759 2760static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB) 2761{ 2762 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 2763 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 2764 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 2765 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 2766 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 2767 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2768 rebulid' timeout \n", pACB->host->host_no); 2769 } 2770 return; 2771} 2772static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 2773{ 2774 switch (acb->adapter_type) { 2775 case ACB_ADAPTER_TYPE_A: 2776 arcmsr_start_hba_bgrb(acb); 2777 break; 2778 case ACB_ADAPTER_TYPE_B: 2779 arcmsr_start_hbb_bgrb(acb); 2780 break; 2781 case ACB_ADAPTER_TYPE_C: 2782 arcmsr_start_hbc_bgrb(acb); 2783 } 2784} 2785 2786static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 2787{ 2788 switch (acb->adapter_type) { 2789 case ACB_ADAPTER_TYPE_A: { 2790 struct MessageUnit_A __iomem *reg = acb->pmuA; 2791 uint32_t outbound_doorbell; 2792 /* empty doorbell Qbuffer if door bell ringed */ 2793 outbound_doorbell = readl(®->outbound_doorbell); 2794 /*clear doorbell interrupt */ 2795 writel(outbound_doorbell, ®->outbound_doorbell); 2796 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2797 } 2798 break; 2799 2800 case ACB_ADAPTER_TYPE_B: { 2801 struct MessageUnit_B *reg = acb->pmuB; 2802 /*clear interrupt and message state*/ 2803 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2804 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 2805 /* let IOP know data has been read */ 2806 } 2807 break; 2808 case ACB_ADAPTER_TYPE_C: { 2809 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2810 uint32_t outbound_doorbell; 2811 /* empty doorbell Qbuffer if door bell ringed */ 2812 outbound_doorbell = readl(®->outbound_doorbell); 2813 writel(outbound_doorbell, ®->outbound_doorbell_clear); 2814 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 2815 } 2816 } 2817} 2818 2819static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 2820{ 2821 switch (acb->adapter_type) { 2822 case ACB_ADAPTER_TYPE_A: 2823 return; 2824 case ACB_ADAPTER_TYPE_B: 2825 { 2826 struct MessageUnit_B *reg = acb->pmuB; 2827 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); 2828 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2829 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 2830 return; 2831 } 2832 } 2833 break; 2834 case ACB_ADAPTER_TYPE_C: 2835 return; 2836 } 2837 return; 2838} 2839 2840static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) 2841{ 2842 uint8_t value[64]; 2843 int i, count = 0; 2844 struct MessageUnit_A __iomem *pmuA = acb->pmuA; 2845 struct MessageUnit_C __iomem *pmuC = acb->pmuC; 2846 u32 temp = 0; 2847 /* backup pci config data */ 2848 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); 2849 for (i = 0; i < 64; i++) { 2850 pci_read_config_byte(acb->pdev, i, &value[i]); 2851 } 2852 /* hardware reset signal */ 2853 if ((acb->dev_id == 0x1680)) { 2854 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); 2855 } else if ((acb->dev_id == 0x1880)) { 2856 do { 2857 count++; 2858 writel(0xF, &pmuC->write_sequence); 2859 writel(0x4, &pmuC->write_sequence); 2860 writel(0xB, &pmuC->write_sequence); 2861 writel(0x2, &pmuC->write_sequence); 2862 writel(0x7, &pmuC->write_sequence); 2863 writel(0xD, &pmuC->write_sequence); 2864 } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); 2865 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); 2866 } else { 2867 pci_write_config_byte(acb->pdev, 0x84, 0x20); 2868 } 2869 msleep(2000); 2870 /* write back pci config data */ 2871 for (i = 0; i < 64; i++) { 2872 pci_write_config_byte(acb->pdev, i, value[i]); 2873 } 2874 msleep(1000); 2875 return; 2876} 2877static void arcmsr_iop_init(struct AdapterControlBlock *acb) 2878{ 2879 uint32_t intmask_org; 2880 /* disable all outbound interrupt */ 2881 intmask_org = arcmsr_disable_outbound_ints(acb); 2882 arcmsr_wait_firmware_ready(acb); 2883 arcmsr_iop_confirm(acb); 2884 /*start background rebuild*/ 2885 arcmsr_start_adapter_bgrb(acb); 2886 /* empty doorbell Qbuffer if door bell ringed */ 2887 arcmsr_clear_doorbell_queue_buffer(acb); 2888 arcmsr_enable_eoi_mode(acb); 2889 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2890 arcmsr_enable_outbound_ints(acb, intmask_org); 2891 acb->acb_flags |= ACB_F_IOP_INITED; 2892} 2893 2894static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) 2895{ 2896 struct CommandControlBlock *ccb; 2897 uint32_t intmask_org; 2898 uint8_t rtnval = 0x00; 2899 int i = 0; 2900 if (atomic_read(&acb->ccboutstandingcount) != 0) { 2901 /* disable all outbound interrupt */ 2902 intmask_org = arcmsr_disable_outbound_ints(acb); 2903 /* talk to iop 331 outstanding command aborted */ 2904 rtnval = arcmsr_abort_allcmd(acb); 2905 /* clear all outbound posted Q */ 2906 arcmsr_done4abort_postqueue(acb); 2907 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2908 ccb = acb->pccb_pool[i]; 2909 if (ccb->startdone == ARCMSR_CCB_START) { 2910 arcmsr_ccb_complete(ccb); 2911 } 2912 } 2913 atomic_set(&acb->ccboutstandingcount, 0); 2914 /* enable all outbound interrupt */ 2915 arcmsr_enable_outbound_ints(acb, intmask_org); 2916 return rtnval; 2917 } 2918 return rtnval; 2919} 2920 2921static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 2922{ 2923 struct AdapterControlBlock *acb = 2924 (struct AdapterControlBlock *)cmd->device->host->hostdata; 2925 uint32_t intmask_org, outbound_doorbell; 2926 int retry_count = 0; 2927 int rtn = FAILED; 2928 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata; 2929 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts); 2930 acb->num_resets++; 2931 2932 switch(acb->adapter_type){ 2933 case ACB_ADAPTER_TYPE_A:{ 2934 if (acb->acb_flags & ACB_F_BUS_RESET){ 2935 long timeout; 2936 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 2937 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 2938 if (timeout) { 2939 return SUCCESS; 2940 } 2941 } 2942 acb->acb_flags |= ACB_F_BUS_RESET; 2943 if (!arcmsr_iop_reset(acb)) { 2944 struct MessageUnit_A __iomem *reg; 2945 reg = acb->pmuA; 2946 arcmsr_hardware_reset(acb); 2947 acb->acb_flags &= ~ACB_F_IOP_INITED; 2948sleep_again: 2949 arcmsr_sleep_for_bus_reset(cmd); 2950 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 2951 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count); 2952 if (retry_count > retrycount) { 2953 acb->fw_flag = FW_DEADLOCK; 2954 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no); 2955 return FAILED; 2956 } 2957 retry_count++; 2958 goto sleep_again; 2959 } 2960 acb->acb_flags |= ACB_F_IOP_INITED; 2961 /* disable all outbound interrupt */ 2962 intmask_org = arcmsr_disable_outbound_ints(acb); 2963 arcmsr_get_firmware_spec(acb); 2964 arcmsr_start_adapter_bgrb(acb); 2965 /* clear Qbuffer if door bell ringed */ 2966 outbound_doorbell = readl(®->outbound_doorbell); 2967 writel(outbound_doorbell, ®->outbound_doorbell); /*clear interrupt */ 2968 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2969 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2970 arcmsr_enable_outbound_ints(acb, intmask_org); 2971 atomic_set(&acb->rq_map_token, 16); 2972 atomic_set(&acb->ante_token_value, 16); 2973 acb->fw_flag = FW_NORMAL; 2974 init_timer(&acb->eternal_timer); 2975 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); 2976 acb->eternal_timer.data = (unsigned long) acb; 2977 acb->eternal_timer.function = &arcmsr_request_device_map; 2978 add_timer(&acb->eternal_timer); 2979 acb->acb_flags &= ~ACB_F_BUS_RESET; 2980 rtn = SUCCESS; 2981 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 2982 } else { 2983 acb->acb_flags &= ~ACB_F_BUS_RESET; 2984 if (atomic_read(&acb->rq_map_token) == 0) { 2985 atomic_set(&acb->rq_map_token, 16); 2986 atomic_set(&acb->ante_token_value, 16); 2987 acb->fw_flag = FW_NORMAL; 2988 init_timer(&acb->eternal_timer); 2989 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); 2990 acb->eternal_timer.data = (unsigned long) acb; 2991 acb->eternal_timer.function = &arcmsr_request_device_map; 2992 add_timer(&acb->eternal_timer); 2993 } else { 2994 atomic_set(&acb->rq_map_token, 16); 2995 atomic_set(&acb->ante_token_value, 16); 2996 acb->fw_flag = FW_NORMAL; 2997 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 2998 } 2999 rtn = SUCCESS; 3000 } 3001 break; 3002 } 3003 case ACB_ADAPTER_TYPE_B:{ 3004 acb->acb_flags |= ACB_F_BUS_RESET; 3005 if (!arcmsr_iop_reset(acb)) { 3006 acb->acb_flags &= ~ACB_F_BUS_RESET; 3007 rtn = FAILED; 3008 } else { 3009 acb->acb_flags &= ~ACB_F_BUS_RESET; 3010 if (atomic_read(&acb->rq_map_token) == 0) { 3011 atomic_set(&acb->rq_map_token, 16); 3012 atomic_set(&acb->ante_token_value, 16); 3013 acb->fw_flag = FW_NORMAL; 3014 init_timer(&acb->eternal_timer); 3015 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); 3016 acb->eternal_timer.data = (unsigned long) acb; 3017 acb->eternal_timer.function = &arcmsr_request_device_map; 3018 add_timer(&acb->eternal_timer); 3019 } else { 3020 atomic_set(&acb->rq_map_token, 16); 3021 atomic_set(&acb->ante_token_value, 16); 3022 acb->fw_flag = FW_NORMAL; 3023 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3024 } 3025 rtn = SUCCESS; 3026 } 3027 break; 3028 } 3029 case ACB_ADAPTER_TYPE_C:{ 3030 if (acb->acb_flags & ACB_F_BUS_RESET) { 3031 long timeout; 3032 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3033 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3034 if (timeout) { 3035 return SUCCESS; 3036 } 3037 } 3038 acb->acb_flags |= ACB_F_BUS_RESET; 3039 if (!arcmsr_iop_reset(acb)) { 3040 struct MessageUnit_C __iomem *reg; 3041 reg = acb->pmuC; 3042 arcmsr_hardware_reset(acb); 3043 acb->acb_flags &= ~ACB_F_IOP_INITED; 3044sleep: 3045 arcmsr_sleep_for_bus_reset(cmd); 3046 if ((readl(®->host_diagnostic) & 0x04) != 0) { 3047 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count); 3048 if (retry_count > retrycount) { 3049 acb->fw_flag = FW_DEADLOCK; 3050 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no); 3051 return FAILED; 3052 } 3053 retry_count++; 3054 goto sleep; 3055 } 3056 acb->acb_flags |= ACB_F_IOP_INITED; 3057 /* disable all outbound interrupt */ 3058 intmask_org = arcmsr_disable_outbound_ints(acb); 3059 arcmsr_get_firmware_spec(acb); 3060 arcmsr_start_adapter_bgrb(acb); 3061 /* clear Qbuffer if door bell ringed */ 3062 outbound_doorbell = readl(®->outbound_doorbell); 3063 writel(outbound_doorbell, ®->outbound_doorbell_clear); /*clear interrupt */ 3064 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 3065 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3066 arcmsr_enable_outbound_ints(acb, intmask_org); 3067 atomic_set(&acb->rq_map_token, 16); 3068 atomic_set(&acb->ante_token_value, 16); 3069 acb->fw_flag = FW_NORMAL; 3070 init_timer(&acb->eternal_timer); 3071 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 3072 acb->eternal_timer.data = (unsigned long) acb; 3073 acb->eternal_timer.function = &arcmsr_request_device_map; 3074 add_timer(&acb->eternal_timer); 3075 acb->acb_flags &= ~ACB_F_BUS_RESET; 3076 rtn = SUCCESS; 3077 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3078 } else { 3079 acb->acb_flags &= ~ACB_F_BUS_RESET; 3080 if (atomic_read(&acb->rq_map_token) == 0) { 3081 atomic_set(&acb->rq_map_token, 16); 3082 atomic_set(&acb->ante_token_value, 16); 3083 acb->fw_flag = FW_NORMAL; 3084 init_timer(&acb->eternal_timer); 3085 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); 3086 acb->eternal_timer.data = (unsigned long) acb; 3087 acb->eternal_timer.function = &arcmsr_request_device_map; 3088 add_timer(&acb->eternal_timer); 3089 } else { 3090 atomic_set(&acb->rq_map_token, 16); 3091 atomic_set(&acb->ante_token_value, 16); 3092 acb->fw_flag = FW_NORMAL; 3093 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3094 } 3095 rtn = SUCCESS; 3096 } 3097 break; 3098 } 3099 } 3100 return rtn; 3101} 3102 3103static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 3104 struct CommandControlBlock *ccb) 3105{ 3106 int rtn; 3107 rtn = arcmsr_polling_ccbdone(acb, ccb); 3108 return rtn; 3109} 3110 3111static int arcmsr_abort(struct scsi_cmnd *cmd) 3112{ 3113 struct AdapterControlBlock *acb = 3114 (struct AdapterControlBlock *)cmd->device->host->hostdata; 3115 int i = 0; 3116 int rtn = FAILED; 3117 printk(KERN_NOTICE 3118 "arcmsr%d: abort device command of scsi id = %d lun = %d \n", 3119 acb->host->host_no, cmd->device->id, cmd->device->lun); 3120 acb->acb_flags |= ACB_F_ABORT; 3121 acb->num_aborts++; 3122 /* 3123 ************************************************ 3124 ** the all interrupt service routine is locked 3125 ** we need to handle it as soon as possible and exit 3126 ************************************************ 3127 */ 3128 if (!atomic_read(&acb->ccboutstandingcount)) 3129 return rtn; 3130 3131 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3132 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 3133 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 3134 ccb->startdone = ARCMSR_CCB_ABORTED; 3135 rtn = arcmsr_abort_one_cmd(acb, ccb); 3136 break; 3137 } 3138 } 3139 acb->acb_flags &= ~ACB_F_ABORT; 3140 return rtn; 3141} 3142 3143static const char *arcmsr_info(struct Scsi_Host *host) 3144{ 3145 struct AdapterControlBlock *acb = 3146 (struct AdapterControlBlock *) host->hostdata; 3147 static char buf[256]; 3148 char *type; 3149 int raid6 = 1; 3150 switch (acb->pdev->device) { 3151 case PCI_DEVICE_ID_ARECA_1110: 3152 case PCI_DEVICE_ID_ARECA_1200: 3153 case PCI_DEVICE_ID_ARECA_1202: 3154 case PCI_DEVICE_ID_ARECA_1210: 3155 raid6 = 0; 3156 /*FALLTHRU*/ 3157 case PCI_DEVICE_ID_ARECA_1120: 3158 case PCI_DEVICE_ID_ARECA_1130: 3159 case PCI_DEVICE_ID_ARECA_1160: 3160 case PCI_DEVICE_ID_ARECA_1170: 3161 case PCI_DEVICE_ID_ARECA_1201: 3162 case PCI_DEVICE_ID_ARECA_1220: 3163 case PCI_DEVICE_ID_ARECA_1230: 3164 case PCI_DEVICE_ID_ARECA_1260: 3165 case PCI_DEVICE_ID_ARECA_1270: 3166 case PCI_DEVICE_ID_ARECA_1280: 3167 type = "SATA"; 3168 break; 3169 case PCI_DEVICE_ID_ARECA_1380: 3170 case PCI_DEVICE_ID_ARECA_1381: 3171 case PCI_DEVICE_ID_ARECA_1680: 3172 case PCI_DEVICE_ID_ARECA_1681: 3173 case PCI_DEVICE_ID_ARECA_1880: 3174 type = "SAS"; 3175 break; 3176 default: 3177 type = "X-TYPE"; 3178 break; 3179 } 3180 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", 3181 type, raid6 ? "( RAID6 capable)" : "", 3182 ARCMSR_DRIVER_VERSION); 3183 return buf; 3184} 3185