arcmsr_hba.c revision e881a172dac4d9ea3b2a1540041d872963c269bd
1/* 2******************************************************************************* 3** O.S : Linux 4** FILE NAME : arcmsr_hba.c 5** BY : Erich Chen 6** Description: SCSI RAID Device Driver for 7** ARECA RAID Host adapter 8******************************************************************************* 9** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved 10** 11** Web site: www.areca.com.tw 12** E-mail: support@areca.com.tw 13** 14** This program is free software; you can redistribute it and/or modify 15** it under the terms of the GNU General Public License version 2 as 16** published by the Free Software Foundation. 17** This program is distributed in the hope that it will be useful, 18** but WITHOUT ANY WARRANTY; without even the implied warranty of 19** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20** GNU General Public License for more details. 21******************************************************************************* 22** Redistribution and use in source and binary forms, with or without 23** modification, are permitted provided that the following conditions 24** are met: 25** 1. Redistributions of source code must retain the above copyright 26** notice, this list of conditions and the following disclaimer. 27** 2. Redistributions in binary form must reproduce the above copyright 28** notice, this list of conditions and the following disclaimer in the 29** documentation and/or other materials provided with the distribution. 30** 3. The name of the author may not be used to endorse or promote products 31** derived from this software without specific prior written permission. 32** 33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 41** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 43******************************************************************************* 44** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 45** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 46******************************************************************************* 47*/ 48#include <linux/module.h> 49#include <linux/reboot.h> 50#include <linux/spinlock.h> 51#include <linux/pci_ids.h> 52#include <linux/interrupt.h> 53#include <linux/moduleparam.h> 54#include <linux/errno.h> 55#include <linux/types.h> 56#include <linux/delay.h> 57#include <linux/dma-mapping.h> 58#include <linux/timer.h> 59#include <linux/pci.h> 60#include <linux/aer.h> 61#include <asm/dma.h> 62#include <asm/io.h> 63#include <asm/system.h> 64#include <asm/uaccess.h> 65#include <scsi/scsi_host.h> 66#include <scsi/scsi.h> 67#include <scsi/scsi_cmnd.h> 68#include <scsi/scsi_tcq.h> 69#include <scsi/scsi_device.h> 70#include <scsi/scsi_transport.h> 71#include <scsi/scsicam.h> 72#include "arcmsr.h" 73 74MODULE_AUTHOR("Erich Chen <support@areca.com.tw>"); 75MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID HOST Adapter"); 76MODULE_LICENSE("Dual BSD/GPL"); 77MODULE_VERSION(ARCMSR_DRIVER_VERSION); 78 79static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 80 struct scsi_cmnd *cmd); 81static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 82static int arcmsr_abort(struct scsi_cmnd *); 83static int arcmsr_bus_reset(struct scsi_cmnd *); 84static int arcmsr_bios_param(struct scsi_device *sdev, 85 struct block_device *bdev, sector_t capacity, int *info); 86static int arcmsr_queue_command(struct scsi_cmnd *cmd, 87 void (*done) (struct scsi_cmnd *)); 88static int arcmsr_probe(struct pci_dev *pdev, 89 const struct pci_device_id *id); 90static void arcmsr_remove(struct pci_dev *pdev); 91static void arcmsr_shutdown(struct pci_dev *pdev); 92static void arcmsr_iop_init(struct AdapterControlBlock *acb); 93static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 94static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 95static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 96static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); 97static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); 98static const char *arcmsr_info(struct Scsi_Host *); 99static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 100static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, 101 int queue_depth, int reason) 102{ 103 if (reason != SCSI_QDEPTH_DEFAULT) 104 return -EOPNOTSUPP; 105 106 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 107 queue_depth = ARCMSR_MAX_CMD_PERLUN; 108 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); 109 return queue_depth; 110} 111 112static struct scsi_host_template arcmsr_scsi_host_template = { 113 .module = THIS_MODULE, 114 .name = "ARCMSR ARECA SATA/SAS RAID HOST Adapter" 115 ARCMSR_DRIVER_VERSION, 116 .info = arcmsr_info, 117 .queuecommand = arcmsr_queue_command, 118 .eh_abort_handler = arcmsr_abort, 119 .eh_bus_reset_handler = arcmsr_bus_reset, 120 .bios_param = arcmsr_bios_param, 121 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 122 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD, 123 .this_id = ARCMSR_SCSI_INITIATOR_ID, 124 .sg_tablesize = ARCMSR_MAX_SG_ENTRIES, 125 .max_sectors = ARCMSR_MAX_XFER_SECTORS, 126 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 127 .use_clustering = ENABLE_CLUSTERING, 128 .shost_attrs = arcmsr_host_attrs, 129}; 130#ifdef CONFIG_SCSI_ARCMSR_AER 131static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev); 132static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev, 133 pci_channel_state_t state); 134 135static struct pci_error_handlers arcmsr_pci_error_handlers = { 136 .error_detected = arcmsr_pci_error_detected, 137 .slot_reset = arcmsr_pci_slot_reset, 138}; 139#endif 140static struct pci_device_id arcmsr_device_id_table[] = { 141 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, 142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, 143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, 144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, 145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, 146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, 147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, 148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, 149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, 150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, 151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, 152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)}, 153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)}, 154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)}, 156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)}, 157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, 158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, 159 {0, 0}, /* Terminating entry */ 160}; 161MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 162static struct pci_driver arcmsr_pci_driver = { 163 .name = "arcmsr", 164 .id_table = arcmsr_device_id_table, 165 .probe = arcmsr_probe, 166 .remove = arcmsr_remove, 167 .shutdown = arcmsr_shutdown, 168 #ifdef CONFIG_SCSI_ARCMSR_AER 169 .err_handler = &arcmsr_pci_error_handlers, 170 #endif 171}; 172 173static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 174{ 175 irqreturn_t handle_state; 176 struct AdapterControlBlock *acb = dev_id; 177 178 spin_lock(acb->host->host_lock); 179 handle_state = arcmsr_interrupt(acb); 180 spin_unlock(acb->host->host_lock); 181 182 return handle_state; 183} 184 185static int arcmsr_bios_param(struct scsi_device *sdev, 186 struct block_device *bdev, sector_t capacity, int *geom) 187{ 188 int ret, heads, sectors, cylinders, total_capacity; 189 unsigned char *buffer;/* return copy of block device's partition table */ 190 191 buffer = scsi_bios_ptable(bdev); 192 if (buffer) { 193 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 194 kfree(buffer); 195 if (ret != -1) 196 return ret; 197 } 198 total_capacity = capacity; 199 heads = 64; 200 sectors = 32; 201 cylinders = total_capacity / (heads * sectors); 202 if (cylinders > 1024) { 203 heads = 255; 204 sectors = 63; 205 cylinders = total_capacity / (heads * sectors); 206 } 207 geom[0] = heads; 208 geom[1] = sectors; 209 geom[2] = cylinders; 210 return 0; 211} 212 213static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) 214{ 215 struct pci_dev *pdev = acb->pdev; 216 u16 dev_id; 217 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); 218 switch (dev_id) { 219 case 0x1201 : { 220 acb->adapter_type = ACB_ADAPTER_TYPE_B; 221 } 222 break; 223 224 default : acb->adapter_type = ACB_ADAPTER_TYPE_A; 225 } 226} 227 228static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 229{ 230 231 switch (acb->adapter_type) { 232 233 case ACB_ADAPTER_TYPE_A: { 234 struct pci_dev *pdev = acb->pdev; 235 void *dma_coherent; 236 dma_addr_t dma_coherent_handle, dma_addr; 237 struct CommandControlBlock *ccb_tmp; 238 uint32_t intmask_org; 239 int i, j; 240 241 acb->pmuA = pci_ioremap_bar(pdev, 0); 242 if (!acb->pmuA) { 243 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", 244 acb->host->host_no); 245 return -ENOMEM; 246 } 247 248 dma_coherent = dma_alloc_coherent(&pdev->dev, 249 ARCMSR_MAX_FREECCB_NUM * 250 sizeof (struct CommandControlBlock) + 0x20, 251 &dma_coherent_handle, GFP_KERNEL); 252 253 if (!dma_coherent) { 254 iounmap(acb->pmuA); 255 return -ENOMEM; 256 } 257 258 acb->dma_coherent = dma_coherent; 259 acb->dma_coherent_handle = dma_coherent_handle; 260 261 if (((unsigned long)dma_coherent & 0x1F)) { 262 dma_coherent = dma_coherent + 263 (0x20 - ((unsigned long)dma_coherent & 0x1F)); 264 dma_coherent_handle = dma_coherent_handle + 265 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F)); 266 } 267 268 dma_addr = dma_coherent_handle; 269 ccb_tmp = (struct CommandControlBlock *)dma_coherent; 270 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 271 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; 272 ccb_tmp->acb = acb; 273 acb->pccb_pool[i] = ccb_tmp; 274 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 275 dma_addr = dma_addr + sizeof(struct CommandControlBlock); 276 ccb_tmp++; 277 } 278 279 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr; 280 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 281 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 282 acb->devstate[i][j] = ARECA_RAID_GONE; 283 284 /* 285 ** here we need to tell iop 331 our ccb_tmp.HighPart 286 ** if ccb_tmp.HighPart is not zero 287 */ 288 intmask_org = arcmsr_disable_outbound_ints(acb); 289 } 290 break; 291 292 case ACB_ADAPTER_TYPE_B: { 293 294 struct pci_dev *pdev = acb->pdev; 295 struct MessageUnit_B *reg; 296 void __iomem *mem_base0, *mem_base1; 297 void *dma_coherent; 298 dma_addr_t dma_coherent_handle, dma_addr; 299 uint32_t intmask_org; 300 struct CommandControlBlock *ccb_tmp; 301 int i, j; 302 303 dma_coherent = dma_alloc_coherent(&pdev->dev, 304 ((ARCMSR_MAX_FREECCB_NUM * 305 sizeof(struct CommandControlBlock) + 0x20) + 306 sizeof(struct MessageUnit_B)), 307 &dma_coherent_handle, GFP_KERNEL); 308 if (!dma_coherent) 309 return -ENOMEM; 310 311 acb->dma_coherent = dma_coherent; 312 acb->dma_coherent_handle = dma_coherent_handle; 313 314 if (((unsigned long)dma_coherent & 0x1F)) { 315 dma_coherent = dma_coherent + 316 (0x20 - ((unsigned long)dma_coherent & 0x1F)); 317 dma_coherent_handle = dma_coherent_handle + 318 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F)); 319 } 320 321 dma_addr = dma_coherent_handle; 322 ccb_tmp = (struct CommandControlBlock *)dma_coherent; 323 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 324 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; 325 ccb_tmp->acb = acb; 326 acb->pccb_pool[i] = ccb_tmp; 327 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 328 dma_addr = dma_addr + sizeof(struct CommandControlBlock); 329 ccb_tmp++; 330 } 331 332 reg = (struct MessageUnit_B *)(dma_coherent + 333 ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock)); 334 acb->pmuB = reg; 335 mem_base0 = pci_ioremap_bar(pdev, 0); 336 if (!mem_base0) 337 goto out; 338 339 mem_base1 = pci_ioremap_bar(pdev, 2); 340 if (!mem_base1) { 341 iounmap(mem_base0); 342 goto out; 343 } 344 345 reg->drv2iop_doorbell_reg = mem_base0 + ARCMSR_DRV2IOP_DOORBELL; 346 reg->drv2iop_doorbell_mask_reg = mem_base0 + 347 ARCMSR_DRV2IOP_DOORBELL_MASK; 348 reg->iop2drv_doorbell_reg = mem_base0 + ARCMSR_IOP2DRV_DOORBELL; 349 reg->iop2drv_doorbell_mask_reg = mem_base0 + 350 ARCMSR_IOP2DRV_DOORBELL_MASK; 351 reg->ioctl_wbuffer_reg = mem_base1 + ARCMSR_IOCTL_WBUFFER; 352 reg->ioctl_rbuffer_reg = mem_base1 + ARCMSR_IOCTL_RBUFFER; 353 reg->msgcode_rwbuffer_reg = mem_base1 + ARCMSR_MSGCODE_RWBUFFER; 354 355 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr; 356 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 357 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 358 acb->devstate[i][j] = ARECA_RAID_GOOD; 359 360 /* 361 ** here we need to tell iop 331 our ccb_tmp.HighPart 362 ** if ccb_tmp.HighPart is not zero 363 */ 364 intmask_org = arcmsr_disable_outbound_ints(acb); 365 } 366 break; 367 } 368 return 0; 369 370out: 371 dma_free_coherent(&acb->pdev->dev, 372 (ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 + 373 sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle); 374 return -ENOMEM; 375} 376 377static int arcmsr_probe(struct pci_dev *pdev, 378 const struct pci_device_id *id) 379{ 380 struct Scsi_Host *host; 381 struct AdapterControlBlock *acb; 382 uint8_t bus, dev_fun; 383 int error; 384 385 error = pci_enable_device(pdev); 386 if (error) 387 goto out; 388 pci_set_master(pdev); 389 390 host = scsi_host_alloc(&arcmsr_scsi_host_template, 391 sizeof(struct AdapterControlBlock)); 392 if (!host) { 393 error = -ENOMEM; 394 goto out_disable_device; 395 } 396 acb = (struct AdapterControlBlock *)host->hostdata; 397 memset(acb, 0, sizeof (struct AdapterControlBlock)); 398 399 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 400 if (error) { 401 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 402 if (error) { 403 printk(KERN_WARNING 404 "scsi%d: No suitable DMA mask available\n", 405 host->host_no); 406 goto out_host_put; 407 } 408 } 409 bus = pdev->bus->number; 410 dev_fun = pdev->devfn; 411 acb->host = host; 412 acb->pdev = pdev; 413 host->max_sectors = ARCMSR_MAX_XFER_SECTORS; 414 host->max_lun = ARCMSR_MAX_TARGETLUN; 415 host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/ 416 host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/ 417 host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES; 418 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ 419 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 420 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 421 host->unique_id = (bus << 8) | dev_fun; 422 host->irq = pdev->irq; 423 error = pci_request_regions(pdev, "arcmsr"); 424 if (error) { 425 goto out_host_put; 426 } 427 arcmsr_define_adapter_type(acb); 428 429 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 430 ACB_F_MESSAGE_RQBUFFER_CLEARED | 431 ACB_F_MESSAGE_WQBUFFER_READED); 432 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 433 INIT_LIST_HEAD(&acb->ccb_free_list); 434 435 error = arcmsr_alloc_ccb_pool(acb); 436 if (error) 437 goto out_release_regions; 438 439 error = request_irq(pdev->irq, arcmsr_do_interrupt, 440 IRQF_SHARED, "arcmsr", acb); 441 if (error) 442 goto out_free_ccb_pool; 443 444 arcmsr_iop_init(acb); 445 pci_set_drvdata(pdev, host); 446 if (strncmp(acb->firm_version, "V1.42", 5) >= 0) 447 host->max_sectors= ARCMSR_MAX_XFER_SECTORS_B; 448 449 error = scsi_add_host(host, &pdev->dev); 450 if (error) 451 goto out_free_irq; 452 453 error = arcmsr_alloc_sysfs_attr(acb); 454 if (error) 455 goto out_free_sysfs; 456 457 scsi_scan_host(host); 458 #ifdef CONFIG_SCSI_ARCMSR_AER 459 pci_enable_pcie_error_reporting(pdev); 460 #endif 461 return 0; 462 out_free_sysfs: 463 out_free_irq: 464 free_irq(pdev->irq, acb); 465 out_free_ccb_pool: 466 arcmsr_free_ccb_pool(acb); 467 out_release_regions: 468 pci_release_regions(pdev); 469 out_host_put: 470 scsi_host_put(host); 471 out_disable_device: 472 pci_disable_device(pdev); 473 out: 474 return error; 475} 476 477static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) 478{ 479 struct MessageUnit_A __iomem *reg = acb->pmuA; 480 uint32_t Index; 481 uint8_t Retries = 0x00; 482 483 do { 484 for (Index = 0; Index < 100; Index++) { 485 if (readl(®->outbound_intstatus) & 486 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 487 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 488 ®->outbound_intstatus); 489 return 0x00; 490 } 491 msleep(10); 492 }/*max 1 seconds*/ 493 494 } while (Retries++ < 20);/*max 20 sec*/ 495 return 0xff; 496} 497 498static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) 499{ 500 struct MessageUnit_B *reg = acb->pmuB; 501 uint32_t Index; 502 uint8_t Retries = 0x00; 503 504 do { 505 for (Index = 0; Index < 100; Index++) { 506 if (readl(reg->iop2drv_doorbell_reg) 507 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 508 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN 509 , reg->iop2drv_doorbell_reg); 510 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg); 511 return 0x00; 512 } 513 msleep(10); 514 }/*max 1 seconds*/ 515 516 } while (Retries++ < 20);/*max 20 sec*/ 517 return 0xff; 518} 519 520static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) 521{ 522 struct MessageUnit_A __iomem *reg = acb->pmuA; 523 524 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 525 if (arcmsr_hba_wait_msgint_ready(acb)) 526 printk(KERN_NOTICE 527 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 528 , acb->host->host_no); 529} 530 531static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) 532{ 533 struct MessageUnit_B *reg = acb->pmuB; 534 535 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell_reg); 536 if (arcmsr_hbb_wait_msgint_ready(acb)) 537 printk(KERN_NOTICE 538 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 539 , acb->host->host_no); 540} 541 542static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 543{ 544 switch (acb->adapter_type) { 545 case ACB_ADAPTER_TYPE_A: { 546 arcmsr_abort_hba_allcmd(acb); 547 } 548 break; 549 550 case ACB_ADAPTER_TYPE_B: { 551 arcmsr_abort_hbb_allcmd(acb); 552 } 553 } 554} 555 556static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 557{ 558 struct scsi_cmnd *pcmd = ccb->pcmd; 559 560 scsi_dma_unmap(pcmd); 561} 562 563static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag) 564{ 565 struct AdapterControlBlock *acb = ccb->acb; 566 struct scsi_cmnd *pcmd = ccb->pcmd; 567 568 arcmsr_pci_unmap_dma(ccb); 569 if (stand_flag == 1) 570 atomic_dec(&acb->ccboutstandingcount); 571 ccb->startdone = ARCMSR_CCB_DONE; 572 ccb->ccb_flags = 0; 573 list_add_tail(&ccb->list, &acb->ccb_free_list); 574 pcmd->scsi_done(pcmd); 575} 576 577static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) 578{ 579 struct MessageUnit_A __iomem *reg = acb->pmuA; 580 int retry_count = 30; 581 582 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 583 do { 584 if (!arcmsr_hba_wait_msgint_ready(acb)) 585 break; 586 else { 587 retry_count--; 588 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 589 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 590 } 591 } while (retry_count != 0); 592} 593 594static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) 595{ 596 struct MessageUnit_B *reg = acb->pmuB; 597 int retry_count = 30; 598 599 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell_reg); 600 do { 601 if (!arcmsr_hbb_wait_msgint_ready(acb)) 602 break; 603 else { 604 retry_count--; 605 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 606 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 607 } 608 } while (retry_count != 0); 609} 610 611static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 612{ 613 switch (acb->adapter_type) { 614 615 case ACB_ADAPTER_TYPE_A: { 616 arcmsr_flush_hba_cache(acb); 617 } 618 break; 619 620 case ACB_ADAPTER_TYPE_B: { 621 arcmsr_flush_hbb_cache(acb); 622 } 623 } 624} 625 626static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 627{ 628 629 struct scsi_cmnd *pcmd = ccb->pcmd; 630 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 631 632 pcmd->result = DID_OK << 16; 633 if (sensebuffer) { 634 int sense_data_length = 635 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 636 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 637 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 638 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 639 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 640 sensebuffer->Valid = 1; 641 } 642} 643 644static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 645{ 646 u32 orig_mask = 0; 647 switch (acb->adapter_type) { 648 649 case ACB_ADAPTER_TYPE_A : { 650 struct MessageUnit_A __iomem *reg = acb->pmuA; 651 orig_mask = readl(®->outbound_intmask)|\ 652 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE; 653 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 654 ®->outbound_intmask); 655 } 656 break; 657 658 case ACB_ADAPTER_TYPE_B : { 659 struct MessageUnit_B *reg = acb->pmuB; 660 orig_mask = readl(reg->iop2drv_doorbell_mask_reg) & \ 661 (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 662 writel(0, reg->iop2drv_doorbell_mask_reg); 663 } 664 break; 665 } 666 return orig_mask; 667} 668 669static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \ 670 struct CommandControlBlock *ccb, uint32_t flag_ccb) 671{ 672 673 uint8_t id, lun; 674 id = ccb->pcmd->device->id; 675 lun = ccb->pcmd->device->lun; 676 if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) { 677 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 678 acb->devstate[id][lun] = ARECA_RAID_GOOD; 679 ccb->pcmd->result = DID_OK << 16; 680 arcmsr_ccb_complete(ccb, 1); 681 } else { 682 switch (ccb->arcmsr_cdb.DeviceStatus) { 683 case ARCMSR_DEV_SELECT_TIMEOUT: { 684 acb->devstate[id][lun] = ARECA_RAID_GONE; 685 ccb->pcmd->result = DID_NO_CONNECT << 16; 686 arcmsr_ccb_complete(ccb, 1); 687 } 688 break; 689 690 case ARCMSR_DEV_ABORTED: 691 692 case ARCMSR_DEV_INIT_FAIL: { 693 acb->devstate[id][lun] = ARECA_RAID_GONE; 694 ccb->pcmd->result = DID_BAD_TARGET << 16; 695 arcmsr_ccb_complete(ccb, 1); 696 } 697 break; 698 699 case ARCMSR_DEV_CHECK_CONDITION: { 700 acb->devstate[id][lun] = ARECA_RAID_GOOD; 701 arcmsr_report_sense_info(ccb); 702 arcmsr_ccb_complete(ccb, 1); 703 } 704 break; 705 706 default: 707 printk(KERN_NOTICE 708 "arcmsr%d: scsi id = %d lun = %d" 709 " isr get command error done, " 710 "but got unknown DeviceStatus = 0x%x \n" 711 , acb->host->host_no 712 , id 713 , lun 714 , ccb->arcmsr_cdb.DeviceStatus); 715 acb->devstate[id][lun] = ARECA_RAID_GONE; 716 ccb->pcmd->result = DID_NO_CONNECT << 16; 717 arcmsr_ccb_complete(ccb, 1); 718 break; 719 } 720 } 721} 722 723static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, uint32_t flag_ccb) 724 725{ 726 struct CommandControlBlock *ccb; 727 728 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5)); 729 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 730 if (ccb->startdone == ARCMSR_CCB_ABORTED) { 731 struct scsi_cmnd *abortcmd = ccb->pcmd; 732 if (abortcmd) { 733 abortcmd->result |= DID_ABORT << 16; 734 arcmsr_ccb_complete(ccb, 1); 735 printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \ 736 isr got aborted command \n", acb->host->host_no, ccb); 737 } 738 } 739 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 740 done acb = '0x%p'" 741 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 742 " ccboutstandingcount = %d \n" 743 , acb->host->host_no 744 , acb 745 , ccb 746 , ccb->acb 747 , ccb->startdone 748 , atomic_read(&acb->ccboutstandingcount)); 749 } 750 else 751 arcmsr_report_ccb_state(acb, ccb, flag_ccb); 752} 753 754static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 755{ 756 int i = 0; 757 uint32_t flag_ccb; 758 759 switch (acb->adapter_type) { 760 761 case ACB_ADAPTER_TYPE_A: { 762 struct MessageUnit_A __iomem *reg = acb->pmuA; 763 uint32_t outbound_intstatus; 764 outbound_intstatus = readl(®->outbound_intstatus) & 765 acb->outbound_int_enable; 766 /*clear and abort all outbound posted Q*/ 767 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 768 while (((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 769 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 770 arcmsr_drain_donequeue(acb, flag_ccb); 771 } 772 } 773 break; 774 775 case ACB_ADAPTER_TYPE_B: { 776 struct MessageUnit_B *reg = acb->pmuB; 777 /*clear all outbound posted Q*/ 778 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 779 if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { 780 writel(0, ®->done_qbuffer[i]); 781 arcmsr_drain_donequeue(acb, flag_ccb); 782 } 783 writel(0, ®->post_qbuffer[i]); 784 } 785 reg->doneq_index = 0; 786 reg->postq_index = 0; 787 } 788 break; 789 } 790} 791static void arcmsr_remove(struct pci_dev *pdev) 792{ 793 struct Scsi_Host *host = pci_get_drvdata(pdev); 794 struct AdapterControlBlock *acb = 795 (struct AdapterControlBlock *) host->hostdata; 796 int poll_count = 0; 797 798 arcmsr_free_sysfs_attr(acb); 799 scsi_remove_host(host); 800 arcmsr_stop_adapter_bgrb(acb); 801 arcmsr_flush_adapter_cache(acb); 802 arcmsr_disable_outbound_ints(acb); 803 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 804 acb->acb_flags &= ~ACB_F_IOP_INITED; 805 806 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++) { 807 if (!atomic_read(&acb->ccboutstandingcount)) 808 break; 809 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 810 msleep(25); 811 } 812 813 if (atomic_read(&acb->ccboutstandingcount)) { 814 int i; 815 816 arcmsr_abort_allcmd(acb); 817 arcmsr_done4abort_postqueue(acb); 818 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 819 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 820 if (ccb->startdone == ARCMSR_CCB_START) { 821 ccb->startdone = ARCMSR_CCB_ABORTED; 822 ccb->pcmd->result = DID_ABORT << 16; 823 arcmsr_ccb_complete(ccb, 1); 824 } 825 } 826 } 827 828 free_irq(pdev->irq, acb); 829 arcmsr_free_ccb_pool(acb); 830 pci_release_regions(pdev); 831 832 scsi_host_put(host); 833 834 pci_disable_device(pdev); 835 pci_set_drvdata(pdev, NULL); 836} 837 838static void arcmsr_shutdown(struct pci_dev *pdev) 839{ 840 struct Scsi_Host *host = pci_get_drvdata(pdev); 841 struct AdapterControlBlock *acb = 842 (struct AdapterControlBlock *)host->hostdata; 843 844 arcmsr_stop_adapter_bgrb(acb); 845 arcmsr_flush_adapter_cache(acb); 846} 847 848static int arcmsr_module_init(void) 849{ 850 int error = 0; 851 852 error = pci_register_driver(&arcmsr_pci_driver); 853 return error; 854} 855 856static void arcmsr_module_exit(void) 857{ 858 pci_unregister_driver(&arcmsr_pci_driver); 859} 860module_init(arcmsr_module_init); 861module_exit(arcmsr_module_exit); 862 863static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, \ 864 u32 intmask_org) 865{ 866 u32 mask; 867 868 switch (acb->adapter_type) { 869 870 case ACB_ADAPTER_TYPE_A : { 871 struct MessageUnit_A __iomem *reg = acb->pmuA; 872 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 873 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); 874 writel(mask, ®->outbound_intmask); 875 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 876 } 877 break; 878 879 case ACB_ADAPTER_TYPE_B : { 880 struct MessageUnit_B *reg = acb->pmuB; 881 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | \ 882 ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE); 883 writel(mask, reg->iop2drv_doorbell_mask_reg); 884 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 885 } 886 } 887} 888 889static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 890 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 891{ 892 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 893 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 894 __le32 address_lo, address_hi; 895 int arccdbsize = 0x30; 896 int nseg; 897 898 ccb->pcmd = pcmd; 899 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 900 arcmsr_cdb->Bus = 0; 901 arcmsr_cdb->TargetID = pcmd->device->id; 902 arcmsr_cdb->LUN = pcmd->device->lun; 903 arcmsr_cdb->Function = 1; 904 arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len; 905 arcmsr_cdb->Context = (unsigned long)arcmsr_cdb; 906 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 907 908 nseg = scsi_dma_map(pcmd); 909 if (nseg > ARCMSR_MAX_SG_ENTRIES) 910 return FAILED; 911 BUG_ON(nseg < 0); 912 913 if (nseg) { 914 __le32 length; 915 int i, cdb_sgcount = 0; 916 struct scatterlist *sg; 917 918 /* map stor port SG list to our iop SG List. */ 919 scsi_for_each_sg(pcmd, sg, nseg, i) { 920 /* Get the physical address of the current data pointer */ 921 length = cpu_to_le32(sg_dma_len(sg)); 922 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 923 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 924 if (address_hi == 0) { 925 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 926 927 pdma_sg->address = address_lo; 928 pdma_sg->length = length; 929 psge += sizeof (struct SG32ENTRY); 930 arccdbsize += sizeof (struct SG32ENTRY); 931 } else { 932 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 933 934 pdma_sg->addresshigh = address_hi; 935 pdma_sg->address = address_lo; 936 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 937 psge += sizeof (struct SG64ENTRY); 938 arccdbsize += sizeof (struct SG64ENTRY); 939 } 940 cdb_sgcount++; 941 } 942 arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount; 943 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 944 if ( arccdbsize > 256) 945 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 946 } 947 if (pcmd->sc_data_direction == DMA_TO_DEVICE ) { 948 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 949 ccb->ccb_flags |= CCB_FLAG_WRITE; 950 } 951 return SUCCESS; 952} 953 954static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 955{ 956 uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr; 957 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 958 atomic_inc(&acb->ccboutstandingcount); 959 ccb->startdone = ARCMSR_CCB_START; 960 961 switch (acb->adapter_type) { 962 case ACB_ADAPTER_TYPE_A: { 963 struct MessageUnit_A __iomem *reg = acb->pmuA; 964 965 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 966 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 967 ®->inbound_queueport); 968 else { 969 writel(cdb_shifted_phyaddr, ®->inbound_queueport); 970 } 971 } 972 break; 973 974 case ACB_ADAPTER_TYPE_B: { 975 struct MessageUnit_B *reg = acb->pmuB; 976 uint32_t ending_index, index = reg->postq_index; 977 978 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 979 writel(0, ®->post_qbuffer[ending_index]); 980 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 981 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ 982 ®->post_qbuffer[index]); 983 } 984 else { 985 writel(cdb_shifted_phyaddr, ®->post_qbuffer[index]); 986 } 987 index++; 988 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 989 reg->postq_index = index; 990 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell_reg); 991 } 992 break; 993 } 994} 995 996static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) 997{ 998 struct MessageUnit_A __iomem *reg = acb->pmuA; 999 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1000 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1001 1002 if (arcmsr_hba_wait_msgint_ready(acb)) { 1003 printk(KERN_NOTICE 1004 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1005 , acb->host->host_no); 1006 } 1007} 1008 1009static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) 1010{ 1011 struct MessageUnit_B *reg = acb->pmuB; 1012 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1013 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell_reg); 1014 1015 if (arcmsr_hbb_wait_msgint_ready(acb)) { 1016 printk(KERN_NOTICE 1017 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1018 , acb->host->host_no); 1019 } 1020} 1021 1022static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1023{ 1024 switch (acb->adapter_type) { 1025 case ACB_ADAPTER_TYPE_A: { 1026 arcmsr_stop_hba_bgrb(acb); 1027 } 1028 break; 1029 1030 case ACB_ADAPTER_TYPE_B: { 1031 arcmsr_stop_hbb_bgrb(acb); 1032 } 1033 break; 1034 } 1035} 1036 1037static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1038{ 1039 switch (acb->adapter_type) { 1040 case ACB_ADAPTER_TYPE_A: { 1041 iounmap(acb->pmuA); 1042 dma_free_coherent(&acb->pdev->dev, 1043 ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20, 1044 acb->dma_coherent, 1045 acb->dma_coherent_handle); 1046 break; 1047 } 1048 case ACB_ADAPTER_TYPE_B: { 1049 struct MessageUnit_B *reg = acb->pmuB; 1050 iounmap(reg->drv2iop_doorbell_reg - ARCMSR_DRV2IOP_DOORBELL); 1051 iounmap(reg->ioctl_wbuffer_reg - ARCMSR_IOCTL_WBUFFER); 1052 dma_free_coherent(&acb->pdev->dev, 1053 (ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 + 1054 sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle); 1055 } 1056 } 1057 1058} 1059 1060void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1061{ 1062 switch (acb->adapter_type) { 1063 case ACB_ADAPTER_TYPE_A: { 1064 struct MessageUnit_A __iomem *reg = acb->pmuA; 1065 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1066 } 1067 break; 1068 1069 case ACB_ADAPTER_TYPE_B: { 1070 struct MessageUnit_B *reg = acb->pmuB; 1071 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg); 1072 } 1073 break; 1074 } 1075} 1076 1077static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1078{ 1079 switch (acb->adapter_type) { 1080 case ACB_ADAPTER_TYPE_A: { 1081 struct MessageUnit_A __iomem *reg = acb->pmuA; 1082 /* 1083 ** push inbound doorbell tell iop, driver data write ok 1084 ** and wait reply on next hwinterrupt for next Qbuffer post 1085 */ 1086 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1087 } 1088 break; 1089 1090 case ACB_ADAPTER_TYPE_B: { 1091 struct MessageUnit_B *reg = acb->pmuB; 1092 /* 1093 ** push inbound doorbell tell iop, driver data write ok 1094 ** and wait reply on next hwinterrupt for next Qbuffer post 1095 */ 1096 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell_reg); 1097 } 1098 break; 1099 } 1100} 1101 1102struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1103{ 1104 struct QBUFFER __iomem *qbuffer = NULL; 1105 1106 switch (acb->adapter_type) { 1107 1108 case ACB_ADAPTER_TYPE_A: { 1109 struct MessageUnit_A __iomem *reg = acb->pmuA; 1110 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1111 } 1112 break; 1113 1114 case ACB_ADAPTER_TYPE_B: { 1115 struct MessageUnit_B *reg = acb->pmuB; 1116 qbuffer = (struct QBUFFER __iomem *)reg->ioctl_rbuffer_reg; 1117 } 1118 break; 1119 } 1120 return qbuffer; 1121} 1122 1123static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1124{ 1125 struct QBUFFER __iomem *pqbuffer = NULL; 1126 1127 switch (acb->adapter_type) { 1128 1129 case ACB_ADAPTER_TYPE_A: { 1130 struct MessageUnit_A __iomem *reg = acb->pmuA; 1131 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1132 } 1133 break; 1134 1135 case ACB_ADAPTER_TYPE_B: { 1136 struct MessageUnit_B *reg = acb->pmuB; 1137 pqbuffer = (struct QBUFFER __iomem *)reg->ioctl_wbuffer_reg; 1138 } 1139 break; 1140 } 1141 return pqbuffer; 1142} 1143 1144static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1145{ 1146 struct QBUFFER __iomem *prbuffer; 1147 struct QBUFFER *pQbuffer; 1148 uint8_t __iomem *iop_data; 1149 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; 1150 1151 rqbuf_lastindex = acb->rqbuf_lastindex; 1152 rqbuf_firstindex = acb->rqbuf_firstindex; 1153 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1154 iop_data = (uint8_t __iomem *)prbuffer->data; 1155 iop_len = prbuffer->data_len; 1156 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1); 1157 1158 if (my_empty_len >= iop_len) 1159 { 1160 while (iop_len > 0) { 1161 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; 1162 memcpy(pQbuffer, iop_data,1); 1163 rqbuf_lastindex++; 1164 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1165 iop_data++; 1166 iop_len--; 1167 } 1168 acb->rqbuf_lastindex = rqbuf_lastindex; 1169 arcmsr_iop_message_read(acb); 1170 } 1171 1172 else { 1173 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1174 } 1175} 1176 1177static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1178{ 1179 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1180 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { 1181 uint8_t *pQbuffer; 1182 struct QBUFFER __iomem *pwbuffer; 1183 uint8_t __iomem *iop_data; 1184 int32_t allxfer_len = 0; 1185 1186 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1187 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1188 iop_data = (uint8_t __iomem *)pwbuffer->data; 1189 1190 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ 1191 (allxfer_len < 124)) { 1192 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; 1193 memcpy(iop_data, pQbuffer, 1); 1194 acb->wqbuf_firstindex++; 1195 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1196 iop_data++; 1197 allxfer_len++; 1198 } 1199 pwbuffer->data_len = allxfer_len; 1200 1201 arcmsr_iop_message_wrote(acb); 1202 } 1203 1204 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { 1205 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1206 } 1207} 1208 1209static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) 1210{ 1211 uint32_t outbound_doorbell; 1212 struct MessageUnit_A __iomem *reg = acb->pmuA; 1213 1214 outbound_doorbell = readl(®->outbound_doorbell); 1215 writel(outbound_doorbell, ®->outbound_doorbell); 1216 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { 1217 arcmsr_iop2drv_data_wrote_handle(acb); 1218 } 1219 1220 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { 1221 arcmsr_iop2drv_data_read_handle(acb); 1222 } 1223} 1224 1225static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) 1226{ 1227 uint32_t flag_ccb; 1228 struct MessageUnit_A __iomem *reg = acb->pmuA; 1229 1230 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 1231 arcmsr_drain_donequeue(acb, flag_ccb); 1232 } 1233} 1234 1235static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) 1236{ 1237 uint32_t index; 1238 uint32_t flag_ccb; 1239 struct MessageUnit_B *reg = acb->pmuB; 1240 1241 index = reg->doneq_index; 1242 1243 while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { 1244 writel(0, ®->done_qbuffer[index]); 1245 arcmsr_drain_donequeue(acb, flag_ccb); 1246 index++; 1247 index %= ARCMSR_MAX_HBB_POSTQUEUE; 1248 reg->doneq_index = index; 1249 } 1250} 1251 1252static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) 1253{ 1254 uint32_t outbound_intstatus; 1255 struct MessageUnit_A __iomem *reg = acb->pmuA; 1256 1257 outbound_intstatus = readl(®->outbound_intstatus) & \ 1258 acb->outbound_int_enable; 1259 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { 1260 return 1; 1261 } 1262 writel(outbound_intstatus, ®->outbound_intstatus); 1263 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { 1264 arcmsr_hba_doorbell_isr(acb); 1265 } 1266 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { 1267 arcmsr_hba_postqueue_isr(acb); 1268 } 1269 return 0; 1270} 1271 1272static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) 1273{ 1274 uint32_t outbound_doorbell; 1275 struct MessageUnit_B *reg = acb->pmuB; 1276 1277 outbound_doorbell = readl(reg->iop2drv_doorbell_reg) & \ 1278 acb->outbound_int_enable; 1279 if (!outbound_doorbell) 1280 return 1; 1281 1282 writel(~outbound_doorbell, reg->iop2drv_doorbell_reg); 1283 /*in case the last action of doorbell interrupt clearance is cached, this action can push HW to write down the clear bit*/ 1284 readl(reg->iop2drv_doorbell_reg); 1285 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg); 1286 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { 1287 arcmsr_iop2drv_data_wrote_handle(acb); 1288 } 1289 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { 1290 arcmsr_iop2drv_data_read_handle(acb); 1291 } 1292 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { 1293 arcmsr_hbb_postqueue_isr(acb); 1294 } 1295 1296 return 0; 1297} 1298 1299static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 1300{ 1301 switch (acb->adapter_type) { 1302 case ACB_ADAPTER_TYPE_A: { 1303 if (arcmsr_handle_hba_isr(acb)) { 1304 return IRQ_NONE; 1305 } 1306 } 1307 break; 1308 1309 case ACB_ADAPTER_TYPE_B: { 1310 if (arcmsr_handle_hbb_isr(acb)) { 1311 return IRQ_NONE; 1312 } 1313 } 1314 break; 1315 } 1316 return IRQ_HANDLED; 1317} 1318 1319static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 1320{ 1321 if (acb) { 1322 /* stop adapter background rebuild */ 1323 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 1324 uint32_t intmask_org; 1325 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1326 intmask_org = arcmsr_disable_outbound_ints(acb); 1327 arcmsr_stop_adapter_bgrb(acb); 1328 arcmsr_flush_adapter_cache(acb); 1329 arcmsr_enable_outbound_ints(acb, intmask_org); 1330 } 1331 } 1332} 1333 1334void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) 1335{ 1336 int32_t wqbuf_firstindex, wqbuf_lastindex; 1337 uint8_t *pQbuffer; 1338 struct QBUFFER __iomem *pwbuffer; 1339 uint8_t __iomem *iop_data; 1340 int32_t allxfer_len = 0; 1341 1342 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1343 iop_data = (uint8_t __iomem *)pwbuffer->data; 1344 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1345 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1346 wqbuf_firstindex = acb->wqbuf_firstindex; 1347 wqbuf_lastindex = acb->wqbuf_lastindex; 1348 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { 1349 pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; 1350 memcpy(iop_data, pQbuffer, 1); 1351 wqbuf_firstindex++; 1352 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1353 iop_data++; 1354 allxfer_len++; 1355 } 1356 acb->wqbuf_firstindex = wqbuf_firstindex; 1357 pwbuffer->data_len = allxfer_len; 1358 arcmsr_iop_message_wrote(acb); 1359 } 1360} 1361 1362static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, \ 1363 struct scsi_cmnd *cmd) 1364{ 1365 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 1366 int retvalue = 0, transfer_len = 0; 1367 char *buffer; 1368 struct scatterlist *sg; 1369 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 | 1370 (uint32_t ) cmd->cmnd[6] << 16 | 1371 (uint32_t ) cmd->cmnd[7] << 8 | 1372 (uint32_t ) cmd->cmnd[8]; 1373 /* 4 bytes: Areca io control code */ 1374 1375 sg = scsi_sglist(cmd); 1376 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 1377 if (scsi_sg_count(cmd) > 1) { 1378 retvalue = ARCMSR_MESSAGE_FAIL; 1379 goto message_out; 1380 } 1381 transfer_len += sg->length; 1382 1383 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 1384 retvalue = ARCMSR_MESSAGE_FAIL; 1385 goto message_out; 1386 } 1387 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; 1388 switch(controlcode) { 1389 1390 case ARCMSR_MESSAGE_READ_RQBUFFER: { 1391 unsigned char *ver_addr; 1392 uint8_t *pQbuffer, *ptmpQbuffer; 1393 int32_t allxfer_len = 0; 1394 1395 ver_addr = kmalloc(1032, GFP_ATOMIC); 1396 if (!ver_addr) { 1397 retvalue = ARCMSR_MESSAGE_FAIL; 1398 goto message_out; 1399 } 1400 ptmpQbuffer = ver_addr; 1401 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) 1402 && (allxfer_len < 1031)) { 1403 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; 1404 memcpy(ptmpQbuffer, pQbuffer, 1); 1405 acb->rqbuf_firstindex++; 1406 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1407 ptmpQbuffer++; 1408 allxfer_len++; 1409 } 1410 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1411 1412 struct QBUFFER __iomem *prbuffer; 1413 uint8_t __iomem *iop_data; 1414 int32_t iop_len; 1415 1416 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1417 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1418 iop_data = prbuffer->data; 1419 iop_len = readl(&prbuffer->data_len); 1420 while (iop_len > 0) { 1421 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); 1422 acb->rqbuf_lastindex++; 1423 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1424 iop_data++; 1425 iop_len--; 1426 } 1427 arcmsr_iop_message_read(acb); 1428 } 1429 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); 1430 pcmdmessagefld->cmdmessage.Length = allxfer_len; 1431 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1432 kfree(ver_addr); 1433 } 1434 break; 1435 1436 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 1437 unsigned char *ver_addr; 1438 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 1439 uint8_t *pQbuffer, *ptmpuserbuffer; 1440 1441 ver_addr = kmalloc(1032, GFP_ATOMIC); 1442 if (!ver_addr) { 1443 retvalue = ARCMSR_MESSAGE_FAIL; 1444 goto message_out; 1445 } 1446 ptmpuserbuffer = ver_addr; 1447 user_len = pcmdmessagefld->cmdmessage.Length; 1448 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); 1449 wqbuf_lastindex = acb->wqbuf_lastindex; 1450 wqbuf_firstindex = acb->wqbuf_firstindex; 1451 if (wqbuf_lastindex != wqbuf_firstindex) { 1452 struct SENSE_DATA *sensebuffer = 1453 (struct SENSE_DATA *)cmd->sense_buffer; 1454 arcmsr_post_ioctldata2iop(acb); 1455 /* has error report sensedata */ 1456 sensebuffer->ErrorCode = 0x70; 1457 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1458 sensebuffer->AdditionalSenseLength = 0x0A; 1459 sensebuffer->AdditionalSenseCode = 0x20; 1460 sensebuffer->Valid = 1; 1461 retvalue = ARCMSR_MESSAGE_FAIL; 1462 } else { 1463 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) 1464 &(ARCMSR_MAX_QBUFFER - 1); 1465 if (my_empty_len >= user_len) { 1466 while (user_len > 0) { 1467 pQbuffer = 1468 &acb->wqbuffer[acb->wqbuf_lastindex]; 1469 memcpy(pQbuffer, ptmpuserbuffer, 1); 1470 acb->wqbuf_lastindex++; 1471 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1472 ptmpuserbuffer++; 1473 user_len--; 1474 } 1475 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 1476 acb->acb_flags &= 1477 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 1478 arcmsr_post_ioctldata2iop(acb); 1479 } 1480 } else { 1481 /* has error report sensedata */ 1482 struct SENSE_DATA *sensebuffer = 1483 (struct SENSE_DATA *)cmd->sense_buffer; 1484 sensebuffer->ErrorCode = 0x70; 1485 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1486 sensebuffer->AdditionalSenseLength = 0x0A; 1487 sensebuffer->AdditionalSenseCode = 0x20; 1488 sensebuffer->Valid = 1; 1489 retvalue = ARCMSR_MESSAGE_FAIL; 1490 } 1491 } 1492 kfree(ver_addr); 1493 } 1494 break; 1495 1496 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 1497 uint8_t *pQbuffer = acb->rqbuffer; 1498 1499 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1500 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1501 arcmsr_iop_message_read(acb); 1502 } 1503 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 1504 acb->rqbuf_firstindex = 0; 1505 acb->rqbuf_lastindex = 0; 1506 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1507 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1508 } 1509 break; 1510 1511 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 1512 uint8_t *pQbuffer = acb->wqbuffer; 1513 1514 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1515 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1516 arcmsr_iop_message_read(acb); 1517 } 1518 acb->acb_flags |= 1519 (ACB_F_MESSAGE_WQBUFFER_CLEARED | 1520 ACB_F_MESSAGE_WQBUFFER_READED); 1521 acb->wqbuf_firstindex = 0; 1522 acb->wqbuf_lastindex = 0; 1523 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1524 pcmdmessagefld->cmdmessage.ReturnCode = 1525 ARCMSR_MESSAGE_RETURNCODE_OK; 1526 } 1527 break; 1528 1529 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 1530 uint8_t *pQbuffer; 1531 1532 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1533 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1534 arcmsr_iop_message_read(acb); 1535 } 1536 acb->acb_flags |= 1537 (ACB_F_MESSAGE_WQBUFFER_CLEARED 1538 | ACB_F_MESSAGE_RQBUFFER_CLEARED 1539 | ACB_F_MESSAGE_WQBUFFER_READED); 1540 acb->rqbuf_firstindex = 0; 1541 acb->rqbuf_lastindex = 0; 1542 acb->wqbuf_firstindex = 0; 1543 acb->wqbuf_lastindex = 0; 1544 pQbuffer = acb->rqbuffer; 1545 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1546 pQbuffer = acb->wqbuffer; 1547 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1548 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1549 } 1550 break; 1551 1552 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 1553 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; 1554 } 1555 break; 1556 1557 case ARCMSR_MESSAGE_SAY_HELLO: { 1558 int8_t *hello_string = "Hello! I am ARCMSR"; 1559 1560 memcpy(pcmdmessagefld->messagedatabuffer, hello_string 1561 , (int16_t)strlen(hello_string)); 1562 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1563 } 1564 break; 1565 1566 case ARCMSR_MESSAGE_SAY_GOODBYE: 1567 arcmsr_iop_parking(acb); 1568 break; 1569 1570 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: 1571 arcmsr_flush_adapter_cache(acb); 1572 break; 1573 1574 default: 1575 retvalue = ARCMSR_MESSAGE_FAIL; 1576 } 1577 message_out: 1578 sg = scsi_sglist(cmd); 1579 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 1580 return retvalue; 1581} 1582 1583static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 1584{ 1585 struct list_head *head = &acb->ccb_free_list; 1586 struct CommandControlBlock *ccb = NULL; 1587 1588 if (!list_empty(head)) { 1589 ccb = list_entry(head->next, struct CommandControlBlock, list); 1590 list_del(head->next); 1591 } 1592 return ccb; 1593} 1594 1595static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 1596 struct scsi_cmnd *cmd) 1597{ 1598 switch (cmd->cmnd[0]) { 1599 case INQUIRY: { 1600 unsigned char inqdata[36]; 1601 char *buffer; 1602 struct scatterlist *sg; 1603 1604 if (cmd->device->lun) { 1605 cmd->result = (DID_TIME_OUT << 16); 1606 cmd->scsi_done(cmd); 1607 return; 1608 } 1609 inqdata[0] = TYPE_PROCESSOR; 1610 /* Periph Qualifier & Periph Dev Type */ 1611 inqdata[1] = 0; 1612 /* rem media bit & Dev Type Modifier */ 1613 inqdata[2] = 0; 1614 /* ISO, ECMA, & ANSI versions */ 1615 inqdata[4] = 31; 1616 /* length of additional data */ 1617 strncpy(&inqdata[8], "Areca ", 8); 1618 /* Vendor Identification */ 1619 strncpy(&inqdata[16], "RAID controller ", 16); 1620 /* Product Identification */ 1621 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 1622 1623 sg = scsi_sglist(cmd); 1624 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 1625 1626 memcpy(buffer, inqdata, sizeof(inqdata)); 1627 sg = scsi_sglist(cmd); 1628 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 1629 1630 cmd->scsi_done(cmd); 1631 } 1632 break; 1633 case WRITE_BUFFER: 1634 case READ_BUFFER: { 1635 if (arcmsr_iop_message_xfer(acb, cmd)) 1636 cmd->result = (DID_ERROR << 16); 1637 cmd->scsi_done(cmd); 1638 } 1639 break; 1640 default: 1641 cmd->scsi_done(cmd); 1642 } 1643} 1644 1645static int arcmsr_queue_command(struct scsi_cmnd *cmd, 1646 void (* done)(struct scsi_cmnd *)) 1647{ 1648 struct Scsi_Host *host = cmd->device->host; 1649 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 1650 struct CommandControlBlock *ccb; 1651 int target = cmd->device->id; 1652 int lun = cmd->device->lun; 1653 1654 cmd->scsi_done = done; 1655 cmd->host_scribble = NULL; 1656 cmd->result = 0; 1657 if (acb->acb_flags & ACB_F_BUS_RESET) { 1658 printk(KERN_NOTICE "arcmsr%d: bus reset" 1659 " and return busy \n" 1660 , acb->host->host_no); 1661 return SCSI_MLQUEUE_HOST_BUSY; 1662 } 1663 if (target == 16) { 1664 /* virtual device for iop message transfer */ 1665 arcmsr_handle_virtual_command(acb, cmd); 1666 return 0; 1667 } 1668 if (acb->devstate[target][lun] == ARECA_RAID_GONE) { 1669 uint8_t block_cmd; 1670 1671 block_cmd = cmd->cmnd[0] & 0x0f; 1672 if (block_cmd == 0x08 || block_cmd == 0x0a) { 1673 printk(KERN_NOTICE 1674 "arcmsr%d: block 'read/write'" 1675 "command with gone raid volume" 1676 " Cmd = %2x, TargetId = %d, Lun = %d \n" 1677 , acb->host->host_no 1678 , cmd->cmnd[0] 1679 , target, lun); 1680 cmd->result = (DID_NO_CONNECT << 16); 1681 cmd->scsi_done(cmd); 1682 return 0; 1683 } 1684 } 1685 if (atomic_read(&acb->ccboutstandingcount) >= 1686 ARCMSR_MAX_OUTSTANDING_CMD) 1687 return SCSI_MLQUEUE_HOST_BUSY; 1688 1689 ccb = arcmsr_get_freeccb(acb); 1690 if (!ccb) 1691 return SCSI_MLQUEUE_HOST_BUSY; 1692 if ( arcmsr_build_ccb( acb, ccb, cmd ) == FAILED ) { 1693 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 1694 cmd->scsi_done(cmd); 1695 return 0; 1696 } 1697 arcmsr_post_ccb(acb, ccb); 1698 return 0; 1699} 1700 1701static void arcmsr_get_hba_config(struct AdapterControlBlock *acb) 1702{ 1703 struct MessageUnit_A __iomem *reg = acb->pmuA; 1704 char *acb_firm_model = acb->firm_model; 1705 char *acb_firm_version = acb->firm_version; 1706 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 1707 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 1708 int count; 1709 1710 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 1711 if (arcmsr_hba_wait_msgint_ready(acb)) { 1712 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 1713 miscellaneous data' timeout \n", acb->host->host_no); 1714 } 1715 1716 count = 8; 1717 while (count) { 1718 *acb_firm_model = readb(iop_firm_model); 1719 acb_firm_model++; 1720 iop_firm_model++; 1721 count--; 1722 } 1723 1724 count = 16; 1725 while (count) { 1726 *acb_firm_version = readb(iop_firm_version); 1727 acb_firm_version++; 1728 iop_firm_version++; 1729 count--; 1730 } 1731 1732 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n" 1733 , acb->host->host_no 1734 , acb->firm_version); 1735 1736 acb->firm_request_len = readl(®->message_rwbuffer[1]); 1737 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 1738 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 1739 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 1740} 1741 1742static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb) 1743{ 1744 struct MessageUnit_B *reg = acb->pmuB; 1745 uint32_t __iomem *lrwbuffer = reg->msgcode_rwbuffer_reg; 1746 char *acb_firm_model = acb->firm_model; 1747 char *acb_firm_version = acb->firm_version; 1748 char __iomem *iop_firm_model = (char __iomem *)(&lrwbuffer[15]); 1749 /*firm_model,15,60-67*/ 1750 char __iomem *iop_firm_version = (char __iomem *)(&lrwbuffer[17]); 1751 /*firm_version,17,68-83*/ 1752 int count; 1753 1754 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg); 1755 if (arcmsr_hbb_wait_msgint_ready(acb)) { 1756 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 1757 miscellaneous data' timeout \n", acb->host->host_no); 1758 } 1759 1760 count = 8; 1761 while (count) 1762 { 1763 *acb_firm_model = readb(iop_firm_model); 1764 acb_firm_model++; 1765 iop_firm_model++; 1766 count--; 1767 } 1768 1769 count = 16; 1770 while (count) 1771 { 1772 *acb_firm_version = readb(iop_firm_version); 1773 acb_firm_version++; 1774 iop_firm_version++; 1775 count--; 1776 } 1777 1778 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", 1779 acb->host->host_no, 1780 acb->firm_version); 1781 1782 lrwbuffer++; 1783 acb->firm_request_len = readl(lrwbuffer++); 1784 /*firm_request_len,1,04-07*/ 1785 acb->firm_numbers_queue = readl(lrwbuffer++); 1786 /*firm_numbers_queue,2,08-11*/ 1787 acb->firm_sdram_size = readl(lrwbuffer++); 1788 /*firm_sdram_size,3,12-15*/ 1789 acb->firm_hd_channels = readl(lrwbuffer); 1790 /*firm_ide_channels,4,16-19*/ 1791} 1792 1793static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 1794{ 1795 switch (acb->adapter_type) { 1796 case ACB_ADAPTER_TYPE_A: { 1797 arcmsr_get_hba_config(acb); 1798 } 1799 break; 1800 1801 case ACB_ADAPTER_TYPE_B: { 1802 arcmsr_get_hbb_config(acb); 1803 } 1804 break; 1805 } 1806} 1807 1808static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, 1809 struct CommandControlBlock *poll_ccb) 1810{ 1811 struct MessageUnit_A __iomem *reg = acb->pmuA; 1812 struct CommandControlBlock *ccb; 1813 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 1814 1815 polling_hba_ccb_retry: 1816 poll_count++; 1817 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 1818 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 1819 while (1) { 1820 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 1821 if (poll_ccb_done) 1822 break; 1823 else { 1824 msleep(25); 1825 if (poll_count > 100) 1826 break; 1827 goto polling_hba_ccb_retry; 1828 } 1829 } 1830 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5)); 1831 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 1832 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 1833 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 1834 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 1835 " poll command abort successfully \n" 1836 , acb->host->host_no 1837 , ccb->pcmd->device->id 1838 , ccb->pcmd->device->lun 1839 , ccb); 1840 ccb->pcmd->result = DID_ABORT << 16; 1841 arcmsr_ccb_complete(ccb, 1); 1842 poll_ccb_done = 1; 1843 continue; 1844 } 1845 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 1846 " command done ccb = '0x%p'" 1847 "ccboutstandingcount = %d \n" 1848 , acb->host->host_no 1849 , ccb 1850 , atomic_read(&acb->ccboutstandingcount)); 1851 continue; 1852 } 1853 arcmsr_report_ccb_state(acb, ccb, flag_ccb); 1854 } 1855} 1856 1857static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, 1858 struct CommandControlBlock *poll_ccb) 1859{ 1860 struct MessageUnit_B *reg = acb->pmuB; 1861 struct CommandControlBlock *ccb; 1862 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 1863 int index; 1864 1865 polling_hbb_ccb_retry: 1866 poll_count++; 1867 /* clear doorbell interrupt */ 1868 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); 1869 while (1) { 1870 index = reg->doneq_index; 1871 if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { 1872 if (poll_ccb_done) 1873 break; 1874 else { 1875 msleep(25); 1876 if (poll_count > 100) 1877 break; 1878 goto polling_hbb_ccb_retry; 1879 } 1880 } 1881 writel(0, ®->done_qbuffer[index]); 1882 index++; 1883 /*if last index number set it to 0 */ 1884 index %= ARCMSR_MAX_HBB_POSTQUEUE; 1885 reg->doneq_index = index; 1886 /* check ifcommand done with no error*/ 1887 ccb = (struct CommandControlBlock *)\ 1888 (acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1889 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 1890 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 1891 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 1892 printk(KERN_NOTICE "arcmsr%d: \ 1893 scsi id = %d lun = %d ccb = '0x%p' poll command abort successfully \n" 1894 ,acb->host->host_no 1895 ,ccb->pcmd->device->id 1896 ,ccb->pcmd->device->lun 1897 ,ccb); 1898 ccb->pcmd->result = DID_ABORT << 16; 1899 arcmsr_ccb_complete(ccb, 1); 1900 continue; 1901 } 1902 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 1903 " command done ccb = '0x%p'" 1904 "ccboutstandingcount = %d \n" 1905 , acb->host->host_no 1906 , ccb 1907 , atomic_read(&acb->ccboutstandingcount)); 1908 continue; 1909 } 1910 arcmsr_report_ccb_state(acb, ccb, flag_ccb); 1911 } /*drain reply FIFO*/ 1912} 1913 1914static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 1915 struct CommandControlBlock *poll_ccb) 1916{ 1917 switch (acb->adapter_type) { 1918 1919 case ACB_ADAPTER_TYPE_A: { 1920 arcmsr_polling_hba_ccbdone(acb,poll_ccb); 1921 } 1922 break; 1923 1924 case ACB_ADAPTER_TYPE_B: { 1925 arcmsr_polling_hbb_ccbdone(acb,poll_ccb); 1926 } 1927 } 1928} 1929 1930static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 1931{ 1932 uint32_t cdb_phyaddr, ccb_phyaddr_hi32; 1933 dma_addr_t dma_coherent_handle; 1934 /* 1935 ******************************************************************** 1936 ** here we need to tell iop 331 our freeccb.HighPart 1937 ** if freeccb.HighPart is not zero 1938 ******************************************************************** 1939 */ 1940 dma_coherent_handle = acb->dma_coherent_handle; 1941 cdb_phyaddr = (uint32_t)(dma_coherent_handle); 1942 ccb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); 1943 /* 1944 *********************************************************************** 1945 ** if adapter type B, set window of "post command Q" 1946 *********************************************************************** 1947 */ 1948 switch (acb->adapter_type) { 1949 1950 case ACB_ADAPTER_TYPE_A: { 1951 if (ccb_phyaddr_hi32 != 0) { 1952 struct MessageUnit_A __iomem *reg = acb->pmuA; 1953 uint32_t intmask_org; 1954 intmask_org = arcmsr_disable_outbound_ints(acb); 1955 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 1956 ®->message_rwbuffer[0]); 1957 writel(ccb_phyaddr_hi32, ®->message_rwbuffer[1]); 1958 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 1959 ®->inbound_msgaddr0); 1960 if (arcmsr_hba_wait_msgint_ready(acb)) { 1961 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 1962 part physical address timeout\n", 1963 acb->host->host_no); 1964 return 1; 1965 } 1966 arcmsr_enable_outbound_ints(acb, intmask_org); 1967 } 1968 } 1969 break; 1970 1971 case ACB_ADAPTER_TYPE_B: { 1972 unsigned long post_queue_phyaddr; 1973 uint32_t __iomem *rwbuffer; 1974 1975 struct MessageUnit_B *reg = acb->pmuB; 1976 uint32_t intmask_org; 1977 intmask_org = arcmsr_disable_outbound_ints(acb); 1978 reg->postq_index = 0; 1979 reg->doneq_index = 0; 1980 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell_reg); 1981 if (arcmsr_hbb_wait_msgint_ready(acb)) { 1982 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ 1983 acb->host->host_no); 1984 return 1; 1985 } 1986 post_queue_phyaddr = cdb_phyaddr + ARCMSR_MAX_FREECCB_NUM * \ 1987 sizeof(struct CommandControlBlock) + offsetof(struct MessageUnit_B, post_qbuffer) ; 1988 rwbuffer = reg->msgcode_rwbuffer_reg; 1989 /* driver "set config" signature */ 1990 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 1991 /* normal should be zero */ 1992 writel(ccb_phyaddr_hi32, rwbuffer++); 1993 /* postQ size (256 + 8)*4 */ 1994 writel(post_queue_phyaddr, rwbuffer++); 1995 /* doneQ size (256 + 8)*4 */ 1996 writel(post_queue_phyaddr + 1056, rwbuffer++); 1997 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 1998 writel(1056, rwbuffer); 1999 2000 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell_reg); 2001 if (arcmsr_hbb_wait_msgint_ready(acb)) { 2002 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2003 timeout \n",acb->host->host_no); 2004 return 1; 2005 } 2006 2007 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell_reg); 2008 if (arcmsr_hbb_wait_msgint_ready(acb)) { 2009 printk(KERN_NOTICE "arcmsr%d: 'can not set diver mode \n"\ 2010 ,acb->host->host_no); 2011 return 1; 2012 } 2013 arcmsr_enable_outbound_ints(acb, intmask_org); 2014 } 2015 break; 2016 } 2017 return 0; 2018} 2019 2020static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 2021{ 2022 uint32_t firmware_state = 0; 2023 2024 switch (acb->adapter_type) { 2025 2026 case ACB_ADAPTER_TYPE_A: { 2027 struct MessageUnit_A __iomem *reg = acb->pmuA; 2028 do { 2029 firmware_state = readl(®->outbound_msgaddr1); 2030 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 2031 } 2032 break; 2033 2034 case ACB_ADAPTER_TYPE_B: { 2035 struct MessageUnit_B *reg = acb->pmuB; 2036 do { 2037 firmware_state = readl(reg->iop2drv_doorbell_reg); 2038 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 2039 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg); 2040 } 2041 break; 2042 } 2043} 2044 2045static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) 2046{ 2047 struct MessageUnit_A __iomem *reg = acb->pmuA; 2048 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2049 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 2050 if (arcmsr_hba_wait_msgint_ready(acb)) { 2051 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2052 rebulid' timeout \n", acb->host->host_no); 2053 } 2054} 2055 2056static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) 2057{ 2058 struct MessageUnit_B *reg = acb->pmuB; 2059 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2060 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell_reg); 2061 if (arcmsr_hbb_wait_msgint_ready(acb)) { 2062 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2063 rebulid' timeout \n",acb->host->host_no); 2064 } 2065} 2066 2067static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 2068{ 2069 switch (acb->adapter_type) { 2070 case ACB_ADAPTER_TYPE_A: 2071 arcmsr_start_hba_bgrb(acb); 2072 break; 2073 case ACB_ADAPTER_TYPE_B: 2074 arcmsr_start_hbb_bgrb(acb); 2075 break; 2076 } 2077} 2078 2079static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 2080{ 2081 switch (acb->adapter_type) { 2082 case ACB_ADAPTER_TYPE_A: { 2083 struct MessageUnit_A __iomem *reg = acb->pmuA; 2084 uint32_t outbound_doorbell; 2085 /* empty doorbell Qbuffer if door bell ringed */ 2086 outbound_doorbell = readl(®->outbound_doorbell); 2087 /*clear doorbell interrupt */ 2088 writel(outbound_doorbell, ®->outbound_doorbell); 2089 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2090 } 2091 break; 2092 2093 case ACB_ADAPTER_TYPE_B: { 2094 struct MessageUnit_B *reg = acb->pmuB; 2095 /*clear interrupt and message state*/ 2096 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); 2097 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg); 2098 /* let IOP know data has been read */ 2099 } 2100 break; 2101 } 2102} 2103 2104static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 2105{ 2106 switch (acb->adapter_type) { 2107 case ACB_ADAPTER_TYPE_A: 2108 return; 2109 case ACB_ADAPTER_TYPE_B: 2110 { 2111 struct MessageUnit_B *reg = acb->pmuB; 2112 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell_reg); 2113 if(arcmsr_hbb_wait_msgint_ready(acb)) { 2114 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 2115 return; 2116 } 2117 } 2118 break; 2119 } 2120 return; 2121} 2122 2123static void arcmsr_iop_init(struct AdapterControlBlock *acb) 2124{ 2125 uint32_t intmask_org; 2126 2127 /* disable all outbound interrupt */ 2128 intmask_org = arcmsr_disable_outbound_ints(acb); 2129 arcmsr_wait_firmware_ready(acb); 2130 arcmsr_iop_confirm(acb); 2131 arcmsr_get_firmware_spec(acb); 2132 /*start background rebuild*/ 2133 arcmsr_start_adapter_bgrb(acb); 2134 /* empty doorbell Qbuffer if door bell ringed */ 2135 arcmsr_clear_doorbell_queue_buffer(acb); 2136 arcmsr_enable_eoi_mode(acb); 2137 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2138 arcmsr_enable_outbound_ints(acb, intmask_org); 2139 acb->acb_flags |= ACB_F_IOP_INITED; 2140} 2141 2142static void arcmsr_iop_reset(struct AdapterControlBlock *acb) 2143{ 2144 struct CommandControlBlock *ccb; 2145 uint32_t intmask_org; 2146 int i = 0; 2147 2148 if (atomic_read(&acb->ccboutstandingcount) != 0) { 2149 /* talk to iop 331 outstanding command aborted */ 2150 arcmsr_abort_allcmd(acb); 2151 2152 /* wait for 3 sec for all command aborted*/ 2153 ssleep(3); 2154 2155 /* disable all outbound interrupt */ 2156 intmask_org = arcmsr_disable_outbound_ints(acb); 2157 /* clear all outbound posted Q */ 2158 arcmsr_done4abort_postqueue(acb); 2159 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2160 ccb = acb->pccb_pool[i]; 2161 if (ccb->startdone == ARCMSR_CCB_START) { 2162 ccb->startdone = ARCMSR_CCB_ABORTED; 2163 arcmsr_ccb_complete(ccb, 1); 2164 } 2165 } 2166 /* enable all outbound interrupt */ 2167 arcmsr_enable_outbound_ints(acb, intmask_org); 2168 } 2169} 2170 2171static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 2172{ 2173 struct AdapterControlBlock *acb = 2174 (struct AdapterControlBlock *)cmd->device->host->hostdata; 2175 int i; 2176 2177 acb->num_resets++; 2178 acb->acb_flags |= ACB_F_BUS_RESET; 2179 for (i = 0; i < 400; i++) { 2180 if (!atomic_read(&acb->ccboutstandingcount)) 2181 break; 2182 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 2183 msleep(25); 2184 } 2185 arcmsr_iop_reset(acb); 2186 acb->acb_flags &= ~ACB_F_BUS_RESET; 2187 return SUCCESS; 2188} 2189 2190static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 2191 struct CommandControlBlock *ccb) 2192{ 2193 u32 intmask; 2194 2195 ccb->startdone = ARCMSR_CCB_ABORTED; 2196 2197 /* 2198 ** Wait for 3 sec for all command done. 2199 */ 2200 ssleep(3); 2201 2202 intmask = arcmsr_disable_outbound_ints(acb); 2203 arcmsr_polling_ccbdone(acb, ccb); 2204 arcmsr_enable_outbound_ints(acb, intmask); 2205} 2206 2207static int arcmsr_abort(struct scsi_cmnd *cmd) 2208{ 2209 struct AdapterControlBlock *acb = 2210 (struct AdapterControlBlock *)cmd->device->host->hostdata; 2211 int i = 0; 2212 2213 printk(KERN_NOTICE 2214 "arcmsr%d: abort device command of scsi id = %d lun = %d \n", 2215 acb->host->host_no, cmd->device->id, cmd->device->lun); 2216 acb->num_aborts++; 2217 /* 2218 ************************************************ 2219 ** the all interrupt service routine is locked 2220 ** we need to handle it as soon as possible and exit 2221 ************************************************ 2222 */ 2223 if (!atomic_read(&acb->ccboutstandingcount)) 2224 return SUCCESS; 2225 2226 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2227 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 2228 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 2229 arcmsr_abort_one_cmd(acb, ccb); 2230 break; 2231 } 2232 } 2233 2234 return SUCCESS; 2235} 2236 2237static const char *arcmsr_info(struct Scsi_Host *host) 2238{ 2239 struct AdapterControlBlock *acb = 2240 (struct AdapterControlBlock *) host->hostdata; 2241 static char buf[256]; 2242 char *type; 2243 int raid6 = 1; 2244 2245 switch (acb->pdev->device) { 2246 case PCI_DEVICE_ID_ARECA_1110: 2247 case PCI_DEVICE_ID_ARECA_1200: 2248 case PCI_DEVICE_ID_ARECA_1202: 2249 case PCI_DEVICE_ID_ARECA_1210: 2250 raid6 = 0; 2251 /*FALLTHRU*/ 2252 case PCI_DEVICE_ID_ARECA_1120: 2253 case PCI_DEVICE_ID_ARECA_1130: 2254 case PCI_DEVICE_ID_ARECA_1160: 2255 case PCI_DEVICE_ID_ARECA_1170: 2256 case PCI_DEVICE_ID_ARECA_1201: 2257 case PCI_DEVICE_ID_ARECA_1220: 2258 case PCI_DEVICE_ID_ARECA_1230: 2259 case PCI_DEVICE_ID_ARECA_1260: 2260 case PCI_DEVICE_ID_ARECA_1270: 2261 case PCI_DEVICE_ID_ARECA_1280: 2262 type = "SATA"; 2263 break; 2264 case PCI_DEVICE_ID_ARECA_1380: 2265 case PCI_DEVICE_ID_ARECA_1381: 2266 case PCI_DEVICE_ID_ARECA_1680: 2267 case PCI_DEVICE_ID_ARECA_1681: 2268 type = "SAS"; 2269 break; 2270 default: 2271 type = "X-TYPE"; 2272 break; 2273 } 2274 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", 2275 type, raid6 ? "( RAID6 capable)" : "", 2276 ARCMSR_DRIVER_VERSION); 2277 return buf; 2278} 2279#ifdef CONFIG_SCSI_ARCMSR_AER 2280static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev) 2281{ 2282 struct Scsi_Host *host = pci_get_drvdata(pdev); 2283 struct AdapterControlBlock *acb = 2284 (struct AdapterControlBlock *) host->hostdata; 2285 uint32_t intmask_org; 2286 int i, j; 2287 2288 if (pci_enable_device(pdev)) { 2289 return PCI_ERS_RESULT_DISCONNECT; 2290 } 2291 pci_set_master(pdev); 2292 intmask_org = arcmsr_disable_outbound_ints(acb); 2293 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2294 ACB_F_MESSAGE_RQBUFFER_CLEARED | 2295 ACB_F_MESSAGE_WQBUFFER_READED); 2296 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 2297 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 2298 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 2299 acb->devstate[i][j] = ARECA_RAID_GONE; 2300 2301 arcmsr_wait_firmware_ready(acb); 2302 arcmsr_iop_confirm(acb); 2303 /* disable all outbound interrupt */ 2304 arcmsr_get_firmware_spec(acb); 2305 /*start background rebuild*/ 2306 arcmsr_start_adapter_bgrb(acb); 2307 /* empty doorbell Qbuffer if door bell ringed */ 2308 arcmsr_clear_doorbell_queue_buffer(acb); 2309 arcmsr_enable_eoi_mode(acb); 2310 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2311 arcmsr_enable_outbound_ints(acb, intmask_org); 2312 acb->acb_flags |= ACB_F_IOP_INITED; 2313 2314 pci_enable_pcie_error_reporting(pdev); 2315 return PCI_ERS_RESULT_RECOVERED; 2316} 2317 2318static void arcmsr_pci_ers_need_reset_forepart(struct pci_dev *pdev) 2319{ 2320 struct Scsi_Host *host = pci_get_drvdata(pdev); 2321 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)host->hostdata; 2322 struct CommandControlBlock *ccb; 2323 uint32_t intmask_org; 2324 int i = 0; 2325 2326 if (atomic_read(&acb->ccboutstandingcount) != 0) { 2327 /* talk to iop 331 outstanding command aborted */ 2328 arcmsr_abort_allcmd(acb); 2329 /* wait for 3 sec for all command aborted*/ 2330 ssleep(3); 2331 /* disable all outbound interrupt */ 2332 intmask_org = arcmsr_disable_outbound_ints(acb); 2333 /* clear all outbound posted Q */ 2334 arcmsr_done4abort_postqueue(acb); 2335 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2336 ccb = acb->pccb_pool[i]; 2337 if (ccb->startdone == ARCMSR_CCB_START) { 2338 ccb->startdone = ARCMSR_CCB_ABORTED; 2339 arcmsr_ccb_complete(ccb, 1); 2340 } 2341 } 2342 /* enable all outbound interrupt */ 2343 arcmsr_enable_outbound_ints(acb, intmask_org); 2344 } 2345 pci_disable_device(pdev); 2346} 2347 2348static void arcmsr_pci_ers_disconnect_forepart(struct pci_dev *pdev) 2349{ 2350 struct Scsi_Host *host = pci_get_drvdata(pdev); 2351 struct AdapterControlBlock *acb = \ 2352 (struct AdapterControlBlock *)host->hostdata; 2353 2354 arcmsr_stop_adapter_bgrb(acb); 2355 arcmsr_flush_adapter_cache(acb); 2356} 2357 2358static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev, 2359 pci_channel_state_t state) 2360{ 2361 switch (state) { 2362 case pci_channel_io_frozen: 2363 arcmsr_pci_ers_need_reset_forepart(pdev); 2364 return PCI_ERS_RESULT_NEED_RESET; 2365 case pci_channel_io_perm_failure: 2366 arcmsr_pci_ers_disconnect_forepart(pdev); 2367 return PCI_ERS_RESULT_DISCONNECT; 2368 break; 2369 default: 2370 return PCI_ERS_RESULT_NEED_RESET; 2371 } 2372} 2373#endif 2374