lpfc_init.c revision 1de933f35b17622f977eff1630eb1f2c92e9450c
1/******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2004-2005 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 8 * * 9 * This program is free software; you can redistribute it and/or * 10 * modify it under the terms of version 2 of the GNU General * 11 * Public License as published by the Free Software Foundation. * 12 * This program is distributed in the hope that it will be useful. * 13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 17 * TO BE LEGALLY INVALID. See the GNU General Public License for * 18 * more details, a copy of which can be found in the file COPYING * 19 * included with this package. * 20 *******************************************************************/ 21 22#include <linux/blkdev.h> 23#include <linux/delay.h> 24#include <linux/dma-mapping.h> 25#include <linux/idr.h> 26#include <linux/interrupt.h> 27#include <linux/kthread.h> 28#include <linux/pci.h> 29#include <linux/spinlock.h> 30 31#include <scsi/scsi.h> 32#include <scsi/scsi_device.h> 33#include <scsi/scsi_host.h> 34#include <scsi/scsi_transport_fc.h> 35 36#include "lpfc_hw.h" 37#include "lpfc_sli.h" 38#include "lpfc_disc.h" 39#include "lpfc_scsi.h" 40#include "lpfc.h" 41#include "lpfc_logmsg.h" 42#include "lpfc_crtn.h" 43#include "lpfc_version.h" 44 45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *); 46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 47static int lpfc_post_rcv_buf(struct lpfc_hba *); 48 49static struct scsi_transport_template *lpfc_transport_template = NULL; 50static DEFINE_IDR(lpfc_hba_index); 51 52/************************************************************************/ 53/* */ 54/* lpfc_config_port_prep */ 55/* This routine will do LPFC initialization prior to the */ 56/* CONFIG_PORT mailbox command. This will be initialized */ 57/* as a SLI layer callback routine. */ 58/* This routine returns 0 on success or -ERESTART if it wants */ 59/* the SLI layer to reset the HBA and try again. Any */ 60/* other return value indicates an error. */ 61/* */ 62/************************************************************************/ 63int 64lpfc_config_port_prep(struct lpfc_hba * phba) 65{ 66 lpfc_vpd_t *vp = &phba->vpd; 67 int i = 0, rc; 68 LPFC_MBOXQ_t *pmb; 69 MAILBOX_t *mb; 70 char *lpfc_vpd_data = NULL; 71 uint16_t offset = 0; 72 static char licensed[56] = 73 "key unlock for use with gnu public licensed code only\0"; 74 75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 76 if (!pmb) { 77 phba->hba_state = LPFC_HBA_ERROR; 78 return -ENOMEM; 79 } 80 81 mb = &pmb->mb; 82 phba->hba_state = LPFC_INIT_MBX_CMDS; 83 84 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 85 uint32_t *ptext = (uint32_t *) licensed; 86 87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 88 *ptext = cpu_to_be32(*ptext); 89 90 lpfc_read_nv(phba, pmb); 91 memset((char*)mb->un.varRDnvp.rsvd3, 0, 92 sizeof (mb->un.varRDnvp.rsvd3)); 93 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 94 sizeof (licensed)); 95 96 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 97 98 if (rc != MBX_SUCCESS) { 99 lpfc_printf_log(phba, 100 KERN_ERR, 101 LOG_MBOX, 102 "%d:0324 Config Port initialization " 103 "error, mbxCmd x%x READ_NVPARM, " 104 "mbxStatus x%x\n", 105 phba->brd_no, 106 mb->mbxCommand, mb->mbxStatus); 107 mempool_free(pmb, phba->mbox_mem_pool); 108 return -ERESTART; 109 } 110 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 111 sizeof (mb->un.varRDnvp.nodename)); 112 } 113 114 /* Setup and issue mailbox READ REV command */ 115 lpfc_read_rev(phba, pmb); 116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 117 if (rc != MBX_SUCCESS) { 118 lpfc_printf_log(phba, 119 KERN_ERR, 120 LOG_INIT, 121 "%d:0439 Adapter failed to init, mbxCmd x%x " 122 "READ_REV, mbxStatus x%x\n", 123 phba->brd_no, 124 mb->mbxCommand, mb->mbxStatus); 125 mempool_free( pmb, phba->mbox_mem_pool); 126 return -ERESTART; 127 } 128 129 /* 130 * The value of rr must be 1 since the driver set the cv field to 1. 131 * This setting requires the FW to set all revision fields. 132 */ 133 if (mb->un.varRdRev.rr == 0) { 134 vp->rev.rBit = 0; 135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 136 "%d:0440 Adapter failed to init, READ_REV has " 137 "missing revision information.\n", 138 phba->brd_no); 139 mempool_free(pmb, phba->mbox_mem_pool); 140 return -ERESTART; 141 } 142 143 /* Save information as VPD data */ 144 vp->rev.rBit = 1; 145 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 146 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 147 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 148 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 149 vp->rev.biuRev = mb->un.varRdRev.biuRev; 150 vp->rev.smRev = mb->un.varRdRev.smRev; 151 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 152 vp->rev.endecRev = mb->un.varRdRev.endecRev; 153 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 154 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 155 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 156 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 157 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 158 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 159 160 if (lpfc_is_LC_HBA(phba->pcidev->device)) 161 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 162 sizeof (phba->RandomData)); 163 164 /* Get the default values for Model Name and Description */ 165 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 166 167 /* Get adapter VPD information */ 168 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL); 169 if (!pmb->context2) 170 goto out_free_mbox; 171 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 172 if (!lpfc_vpd_data) 173 goto out_free_context2; 174 175 do { 176 lpfc_dump_mem(phba, pmb, offset); 177 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 178 179 if (rc != MBX_SUCCESS) { 180 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 181 "%d:0441 VPD not present on adapter, " 182 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 183 phba->brd_no, 184 mb->mbxCommand, mb->mbxStatus); 185 kfree(lpfc_vpd_data); 186 lpfc_vpd_data = NULL; 187 break; 188 } 189 190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset, 191 mb->un.varDmp.word_cnt); 192 offset += mb->un.varDmp.word_cnt; 193 } while (mb->un.varDmp.word_cnt); 194 lpfc_parse_vpd(phba, lpfc_vpd_data); 195 196 kfree(lpfc_vpd_data); 197out_free_context2: 198 kfree(pmb->context2); 199out_free_mbox: 200 mempool_free(pmb, phba->mbox_mem_pool); 201 return 0; 202} 203 204/************************************************************************/ 205/* */ 206/* lpfc_config_port_post */ 207/* This routine will do LPFC initialization after the */ 208/* CONFIG_PORT mailbox command. This will be initialized */ 209/* as a SLI layer callback routine. */ 210/* This routine returns 0 on success. Any other return value */ 211/* indicates an error. */ 212/* */ 213/************************************************************************/ 214int 215lpfc_config_port_post(struct lpfc_hba * phba) 216{ 217 LPFC_MBOXQ_t *pmb; 218 MAILBOX_t *mb; 219 struct lpfc_dmabuf *mp; 220 struct lpfc_sli *psli = &phba->sli; 221 uint32_t status, timeout; 222 int i, j, rc; 223 224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 225 if (!pmb) { 226 phba->hba_state = LPFC_HBA_ERROR; 227 return -ENOMEM; 228 } 229 mb = &pmb->mb; 230 231 lpfc_config_link(phba, pmb); 232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 233 if (rc != MBX_SUCCESS) { 234 lpfc_printf_log(phba, 235 KERN_ERR, 236 LOG_INIT, 237 "%d:0447 Adapter failed init, mbxCmd x%x " 238 "CONFIG_LINK mbxStatus x%x\n", 239 phba->brd_no, 240 mb->mbxCommand, mb->mbxStatus); 241 phba->hba_state = LPFC_HBA_ERROR; 242 mempool_free( pmb, phba->mbox_mem_pool); 243 return -EIO; 244 } 245 246 /* Get login parameters for NID. */ 247 lpfc_read_sparam(phba, pmb); 248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 249 lpfc_printf_log(phba, 250 KERN_ERR, 251 LOG_INIT, 252 "%d:0448 Adapter failed init, mbxCmd x%x " 253 "READ_SPARM mbxStatus x%x\n", 254 phba->brd_no, 255 mb->mbxCommand, mb->mbxStatus); 256 phba->hba_state = LPFC_HBA_ERROR; 257 mp = (struct lpfc_dmabuf *) pmb->context1; 258 mempool_free( pmb, phba->mbox_mem_pool); 259 lpfc_mbuf_free(phba, mp->virt, mp->phys); 260 kfree(mp); 261 return -EIO; 262 } 263 264 mp = (struct lpfc_dmabuf *) pmb->context1; 265 266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm)); 267 lpfc_mbuf_free(phba, mp->virt, mp->phys); 268 kfree(mp); 269 pmb->context1 = NULL; 270 271 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName, 272 sizeof (struct lpfc_name)); 273 memcpy(&phba->fc_portname, &phba->fc_sparam.portName, 274 sizeof (struct lpfc_name)); 275 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 276 /* This should be consolidated into parse_vpd ? - mr */ 277 if (phba->SerialNumber[0] == 0) { 278 uint8_t *outptr; 279 280 outptr = &phba->fc_nodename.u.s.IEEE[0]; 281 for (i = 0; i < 12; i++) { 282 status = *outptr++; 283 j = ((status & 0xf0) >> 4); 284 if (j <= 9) 285 phba->SerialNumber[i] = 286 (char)((uint8_t) 0x30 + (uint8_t) j); 287 else 288 phba->SerialNumber[i] = 289 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 290 i++; 291 j = (status & 0xf); 292 if (j <= 9) 293 phba->SerialNumber[i] = 294 (char)((uint8_t) 0x30 + (uint8_t) j); 295 else 296 phba->SerialNumber[i] = 297 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 298 } 299 } 300 301 /* This should turn on DELAYED ABTS for ELS timeouts */ 302 lpfc_set_slim(phba, pmb, 0x052198, 0x1); 303 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 304 phba->hba_state = LPFC_HBA_ERROR; 305 mempool_free( pmb, phba->mbox_mem_pool); 306 return -EIO; 307 } 308 309 310 lpfc_read_config(phba, pmb); 311 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 312 lpfc_printf_log(phba, 313 KERN_ERR, 314 LOG_INIT, 315 "%d:0453 Adapter failed to init, mbxCmd x%x " 316 "READ_CONFIG, mbxStatus x%x\n", 317 phba->brd_no, 318 mb->mbxCommand, mb->mbxStatus); 319 phba->hba_state = LPFC_HBA_ERROR; 320 mempool_free( pmb, phba->mbox_mem_pool); 321 return -EIO; 322 } 323 324 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 325 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1)) 326 phba->cfg_hba_queue_depth = 327 mb->un.varRdConfig.max_xri + 1; 328 329 phba->lmt = mb->un.varRdConfig.lmt; 330 /* HBA is not 4GB capable, or HBA is not 2GB capable, 331 don't let link speed ask for it */ 332 if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) && 333 (phba->cfg_link_speed > LINK_SPEED_2G)) || 334 (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) && 335 (phba->cfg_link_speed > LINK_SPEED_1G))) { 336 /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */ 337 lpfc_printf_log(phba, 338 KERN_WARNING, 339 LOG_LINK_EVENT, 340 "%d:1302 Invalid speed for this board: " 341 "Reset link speed to auto: x%x\n", 342 phba->brd_no, 343 phba->cfg_link_speed); 344 phba->cfg_link_speed = LINK_SPEED_AUTO; 345 } 346 347 phba->hba_state = LPFC_LINK_DOWN; 348 349 /* Only process IOCBs on ring 0 till hba_state is READY */ 350 if (psli->ring[psli->ip_ring].cmdringaddr) 351 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT; 352 if (psli->ring[psli->fcp_ring].cmdringaddr) 353 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT; 354 if (psli->ring[psli->next_ring].cmdringaddr) 355 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT; 356 357 /* Post receive buffers for desired rings */ 358 lpfc_post_rcv_buf(phba); 359 360 /* Enable appropriate host interrupts */ 361 spin_lock_irq(phba->host->host_lock); 362 status = readl(phba->HCregaddr); 363 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 364 if (psli->num_rings > 0) 365 status |= HC_R0INT_ENA; 366 if (psli->num_rings > 1) 367 status |= HC_R1INT_ENA; 368 if (psli->num_rings > 2) 369 status |= HC_R2INT_ENA; 370 if (psli->num_rings > 3) 371 status |= HC_R3INT_ENA; 372 373 writel(status, phba->HCregaddr); 374 readl(phba->HCregaddr); /* flush */ 375 spin_unlock_irq(phba->host->host_lock); 376 377 /* 378 * Setup the ring 0 (els) timeout handler 379 */ 380 timeout = phba->fc_ratov << 1; 381 phba->els_tmofunc.expires = jiffies + HZ * timeout; 382 add_timer(&phba->els_tmofunc); 383 384 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed); 385 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 386 if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) { 387 lpfc_printf_log(phba, 388 KERN_ERR, 389 LOG_INIT, 390 "%d:0454 Adapter failed to init, mbxCmd x%x " 391 "INIT_LINK, mbxStatus x%x\n", 392 phba->brd_no, 393 mb->mbxCommand, mb->mbxStatus); 394 395 /* Clear all interrupt enable conditions */ 396 writel(0, phba->HCregaddr); 397 readl(phba->HCregaddr); /* flush */ 398 /* Clear all pending interrupts */ 399 writel(0xffffffff, phba->HAregaddr); 400 readl(phba->HAregaddr); /* flush */ 401 402 phba->hba_state = LPFC_HBA_ERROR; 403 mempool_free(pmb, phba->mbox_mem_pool); 404 return -EIO; 405 } 406 /* MBOX buffer will be freed in mbox compl */ 407 408 i = 0; 409 while ((phba->hba_state != LPFC_HBA_READY) || 410 (phba->num_disc_nodes) || (phba->fc_prli_sent) || 411 ((phba->fc_map_cnt == 0) && (i<2)) || 412 (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) { 413 /* Check every second for 30 retries. */ 414 i++; 415 if (i > 30) { 416 break; 417 } 418 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) { 419 /* The link is down. Set linkdown timeout */ 420 break; 421 } 422 423 /* Delay for 1 second to give discovery time to complete. */ 424 msleep(1000); 425 426 } 427 428 /* Since num_disc_nodes keys off of PLOGI, delay a bit to let 429 * any potential PRLIs to flush thru the SLI sub-system. 430 */ 431 msleep(50); 432 433 return (0); 434} 435 436/************************************************************************/ 437/* */ 438/* lpfc_hba_down_prep */ 439/* This routine will do LPFC uninitialization before the */ 440/* HBA is reset when bringing down the SLI Layer. This will be */ 441/* initialized as a SLI layer callback routine. */ 442/* This routine returns 0 on success. Any other return value */ 443/* indicates an error. */ 444/* */ 445/************************************************************************/ 446int 447lpfc_hba_down_prep(struct lpfc_hba * phba) 448{ 449 /* Disable interrupts */ 450 writel(0, phba->HCregaddr); 451 readl(phba->HCregaddr); /* flush */ 452 453 /* Cleanup potential discovery resources */ 454 lpfc_els_flush_rscn(phba); 455 lpfc_els_flush_cmd(phba); 456 lpfc_disc_flush_list(phba); 457 458 return (0); 459} 460 461/************************************************************************/ 462/* */ 463/* lpfc_handle_eratt */ 464/* This routine will handle processing a Host Attention */ 465/* Error Status event. This will be initialized */ 466/* as a SLI layer callback routine. */ 467/* */ 468/************************************************************************/ 469void 470lpfc_handle_eratt(struct lpfc_hba * phba) 471{ 472 struct lpfc_sli *psli = &phba->sli; 473 struct lpfc_sli_ring *pring; 474 475 /* 476 * If a reset is sent to the HBA restore PCI configuration registers. 477 */ 478 if ( phba->hba_state == LPFC_INIT_START ) { 479 mdelay(1); 480 readl(phba->HCregaddr); /* flush */ 481 writel(0, phba->HCregaddr); 482 readl(phba->HCregaddr); /* flush */ 483 484 /* Restore PCI cmd register */ 485 pci_write_config_word(phba->pcidev, 486 PCI_COMMAND, phba->pci_cfg_value); 487 } 488 489 if (phba->work_hs & HS_FFER6) { 490 /* Re-establishing Link */ 491 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 492 "%d:1301 Re-establishing Link " 493 "Data: x%x x%x x%x\n", 494 phba->brd_no, phba->work_hs, 495 phba->work_status[0], phba->work_status[1]); 496 spin_lock_irq(phba->host->host_lock); 497 phba->fc_flag |= FC_ESTABLISH_LINK; 498 spin_unlock_irq(phba->host->host_lock); 499 500 /* 501 * Firmware stops when it triggled erratt with HS_FFER6. 502 * That could cause the I/Os dropped by the firmware. 503 * Error iocb (I/O) on txcmplq and let the SCSI layer 504 * retry it after re-establishing link. 505 */ 506 pring = &psli->ring[psli->fcp_ring]; 507 lpfc_sli_abort_iocb_ring(phba, pring); 508 509 510 /* 511 * There was a firmware error. Take the hba offline and then 512 * attempt to restart it. 513 */ 514 lpfc_offline(phba); 515 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 516 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60); 517 return; 518 } 519 } else { 520 /* The if clause above forces this code path when the status 521 * failure is a value other than FFER6. Do not call the offline 522 * twice. This is the adapter hardware error path. 523 */ 524 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 525 "%d:0457 Adapter Hardware Error " 526 "Data: x%x x%x x%x\n", 527 phba->brd_no, phba->work_hs, 528 phba->work_status[0], phba->work_status[1]); 529 530 lpfc_offline(phba); 531 532 } 533} 534 535/************************************************************************/ 536/* */ 537/* lpfc_handle_latt */ 538/* This routine will handle processing a Host Attention */ 539/* Link Status event. This will be initialized */ 540/* as a SLI layer callback routine. */ 541/* */ 542/************************************************************************/ 543void 544lpfc_handle_latt(struct lpfc_hba * phba) 545{ 546 struct lpfc_sli *psli = &phba->sli; 547 LPFC_MBOXQ_t *pmb; 548 volatile uint32_t control; 549 struct lpfc_dmabuf *mp; 550 int rc = -ENOMEM; 551 552 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 553 if (!pmb) 554 goto lpfc_handle_latt_err_exit; 555 556 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 557 if (!mp) 558 goto lpfc_handle_latt_free_pmb; 559 560 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); 561 if (!mp->virt) 562 goto lpfc_handle_latt_free_mp; 563 564 rc = -EIO; 565 566 567 psli->slistat.link_event++; 568 lpfc_read_la(phba, pmb, mp); 569 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la; 570 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB)); 571 if (rc == MBX_NOT_FINISHED) 572 goto lpfc_handle_latt_free_mp; 573 574 /* Clear Link Attention in HA REG */ 575 spin_lock_irq(phba->host->host_lock); 576 writel(HA_LATT, phba->HAregaddr); 577 readl(phba->HAregaddr); /* flush */ 578 spin_unlock_irq(phba->host->host_lock); 579 580 return; 581 582lpfc_handle_latt_free_mp: 583 kfree(mp); 584lpfc_handle_latt_free_pmb: 585 kfree(pmb); 586lpfc_handle_latt_err_exit: 587 /* Enable Link attention interrupts */ 588 spin_lock_irq(phba->host->host_lock); 589 psli->sli_flag |= LPFC_PROCESS_LA; 590 control = readl(phba->HCregaddr); 591 control |= HC_LAINT_ENA; 592 writel(control, phba->HCregaddr); 593 readl(phba->HCregaddr); /* flush */ 594 595 /* Clear Link Attention in HA REG */ 596 writel(HA_LATT, phba->HAregaddr); 597 readl(phba->HAregaddr); /* flush */ 598 spin_unlock_irq(phba->host->host_lock); 599 lpfc_linkdown(phba); 600 phba->hba_state = LPFC_HBA_ERROR; 601 602 /* The other case is an error from issue_mbox */ 603 if (rc == -ENOMEM) 604 lpfc_printf_log(phba, 605 KERN_WARNING, 606 LOG_MBOX, 607 "%d:0300 READ_LA: no buffers\n", 608 phba->brd_no); 609 610 return; 611} 612 613/************************************************************************/ 614/* */ 615/* lpfc_parse_vpd */ 616/* This routine will parse the VPD data */ 617/* */ 618/************************************************************************/ 619static int 620lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd) 621{ 622 uint8_t lenlo, lenhi; 623 uint32_t Length; 624 int i, j; 625 int finished = 0; 626 int index = 0; 627 628 if (!vpd) 629 return 0; 630 631 /* Vital Product */ 632 lpfc_printf_log(phba, 633 KERN_INFO, 634 LOG_INIT, 635 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n", 636 phba->brd_no, 637 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 638 (uint32_t) vpd[3]); 639 do { 640 switch (vpd[index]) { 641 case 0x82: 642 index += 1; 643 lenlo = vpd[index]; 644 index += 1; 645 lenhi = vpd[index]; 646 index += 1; 647 i = ((((unsigned short)lenhi) << 8) + lenlo); 648 index += i; 649 break; 650 case 0x90: 651 index += 1; 652 lenlo = vpd[index]; 653 index += 1; 654 lenhi = vpd[index]; 655 index += 1; 656 Length = ((((unsigned short)lenhi) << 8) + lenlo); 657 658 while (Length > 0) { 659 /* Look for Serial Number */ 660 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) { 661 index += 2; 662 i = vpd[index]; 663 index += 1; 664 j = 0; 665 Length -= (3+i); 666 while(i--) { 667 phba->SerialNumber[j++] = vpd[index++]; 668 if (j == 31) 669 break; 670 } 671 phba->SerialNumber[j] = 0; 672 continue; 673 } 674 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) { 675 phba->vpd_flag |= VPD_MODEL_DESC; 676 index += 2; 677 i = vpd[index]; 678 index += 1; 679 j = 0; 680 Length -= (3+i); 681 while(i--) { 682 phba->ModelDesc[j++] = vpd[index++]; 683 if (j == 255) 684 break; 685 } 686 phba->ModelDesc[j] = 0; 687 continue; 688 } 689 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) { 690 phba->vpd_flag |= VPD_MODEL_NAME; 691 index += 2; 692 i = vpd[index]; 693 index += 1; 694 j = 0; 695 Length -= (3+i); 696 while(i--) { 697 phba->ModelName[j++] = vpd[index++]; 698 if (j == 79) 699 break; 700 } 701 phba->ModelName[j] = 0; 702 continue; 703 } 704 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) { 705 phba->vpd_flag |= VPD_PROGRAM_TYPE; 706 index += 2; 707 i = vpd[index]; 708 index += 1; 709 j = 0; 710 Length -= (3+i); 711 while(i--) { 712 phba->ProgramType[j++] = vpd[index++]; 713 if (j == 255) 714 break; 715 } 716 phba->ProgramType[j] = 0; 717 continue; 718 } 719 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) { 720 phba->vpd_flag |= VPD_PORT; 721 index += 2; 722 i = vpd[index]; 723 index += 1; 724 j = 0; 725 Length -= (3+i); 726 while(i--) { 727 phba->Port[j++] = vpd[index++]; 728 if (j == 19) 729 break; 730 } 731 phba->Port[j] = 0; 732 continue; 733 } 734 else { 735 index += 2; 736 i = vpd[index]; 737 index += 1; 738 index += i; 739 Length -= (3 + i); 740 } 741 } 742 finished = 0; 743 break; 744 case 0x78: 745 finished = 1; 746 break; 747 default: 748 index ++; 749 break; 750 } 751 } while (!finished && (index < 108)); 752 753 return(1); 754} 755 756static void 757lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp) 758{ 759 lpfc_vpd_t *vp; 760 uint32_t id; 761 uint8_t hdrtype; 762 char str[16]; 763 764 vp = &phba->vpd; 765 pci_read_config_dword(phba->pcidev, PCI_VENDOR_ID, &id); 766 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype); 767 768 switch ((id >> 16) & 0xffff) { 769 case PCI_DEVICE_ID_FIREFLY: 770 strcpy(str, "LP6000 1"); 771 break; 772 case PCI_DEVICE_ID_SUPERFLY: 773 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 774 strcpy(str, "LP7000 1"); 775 else 776 strcpy(str, "LP7000E 1"); 777 break; 778 case PCI_DEVICE_ID_DRAGONFLY: 779 strcpy(str, "LP8000 1"); 780 break; 781 case PCI_DEVICE_ID_CENTAUR: 782 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 783 strcpy(str, "LP9002 2"); 784 else 785 strcpy(str, "LP9000 1"); 786 break; 787 case PCI_DEVICE_ID_RFLY: 788 strcpy(str, "LP952 2"); 789 break; 790 case PCI_DEVICE_ID_PEGASUS: 791 strcpy(str, "LP9802 2"); 792 break; 793 case PCI_DEVICE_ID_THOR: 794 if (hdrtype == 0x80) 795 strcpy(str, "LP10000DC 2"); 796 else 797 strcpy(str, "LP10000 2"); 798 break; 799 case PCI_DEVICE_ID_VIPER: 800 strcpy(str, "LPX1000 10"); 801 break; 802 case PCI_DEVICE_ID_PFLY: 803 strcpy(str, "LP982 2"); 804 break; 805 case PCI_DEVICE_ID_TFLY: 806 if (hdrtype == 0x80) 807 strcpy(str, "LP1050DC 2"); 808 else 809 strcpy(str, "LP1050 2"); 810 break; 811 case PCI_DEVICE_ID_HELIOS: 812 if (hdrtype == 0x80) 813 strcpy(str, "LP11002 4"); 814 else 815 strcpy(str, "LP11000 4"); 816 break; 817 case PCI_DEVICE_ID_BMID: 818 strcpy(str, "LP1150 4"); 819 break; 820 case PCI_DEVICE_ID_BSMB: 821 strcpy(str, "LP111 4"); 822 break; 823 case PCI_DEVICE_ID_ZEPHYR: 824 if (hdrtype == 0x80) 825 strcpy(str, "LPe11002 4"); 826 else 827 strcpy(str, "LPe11000 4"); 828 break; 829 case PCI_DEVICE_ID_ZMID: 830 strcpy(str, "LPe1150 4"); 831 break; 832 case PCI_DEVICE_ID_ZSMB: 833 strcpy(str, "LPe111 4"); 834 break; 835 case PCI_DEVICE_ID_LP101: 836 strcpy(str, "LP101 2"); 837 break; 838 case PCI_DEVICE_ID_LP10000S: 839 strcpy(str, "LP10000-S 2"); 840 break; 841 default: 842 memset(str, 0, 16); 843 break; 844 } 845 if (mdp) 846 sscanf(str, "%s", mdp); 847 if (descp) 848 sprintf(descp, "Emulex LightPulse %s Gigabit PCI Fibre " 849 "Channel Adapter", str); 850} 851 852/**************************************************/ 853/* lpfc_post_buffer */ 854/* */ 855/* This routine will post count buffers to the */ 856/* ring with the QUE_RING_BUF_CN command. This */ 857/* allows 3 buffers / command to be posted. */ 858/* Returns the number of buffers NOT posted. */ 859/**************************************************/ 860int 861lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt, 862 int type) 863{ 864 IOCB_t *icmd; 865 struct lpfc_iocbq *iocb; 866 struct lpfc_dmabuf *mp1, *mp2; 867 868 cnt += pring->missbufcnt; 869 870 /* While there are buffers to post */ 871 while (cnt > 0) { 872 /* Allocate buffer for command iocb */ 873 spin_lock_irq(phba->host->host_lock); 874 iocb = lpfc_sli_get_iocbq(phba); 875 spin_unlock_irq(phba->host->host_lock); 876 if (iocb == NULL) { 877 pring->missbufcnt = cnt; 878 return cnt; 879 } 880 icmd = &iocb->iocb; 881 882 /* 2 buffers can be posted per command */ 883 /* Allocate buffer to post */ 884 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 885 if (mp1) 886 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 887 &mp1->phys); 888 if (mp1 == 0 || mp1->virt == 0) { 889 kfree(mp1); 890 spin_lock_irq(phba->host->host_lock); 891 lpfc_sli_release_iocbq(phba, iocb); 892 spin_unlock_irq(phba->host->host_lock); 893 pring->missbufcnt = cnt; 894 return cnt; 895 } 896 897 INIT_LIST_HEAD(&mp1->list); 898 /* Allocate buffer to post */ 899 if (cnt > 1) { 900 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 901 if (mp2) 902 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 903 &mp2->phys); 904 if (mp2 == 0 || mp2->virt == 0) { 905 kfree(mp2); 906 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 907 kfree(mp1); 908 spin_lock_irq(phba->host->host_lock); 909 lpfc_sli_release_iocbq(phba, iocb); 910 spin_unlock_irq(phba->host->host_lock); 911 pring->missbufcnt = cnt; 912 return cnt; 913 } 914 915 INIT_LIST_HEAD(&mp2->list); 916 } else { 917 mp2 = NULL; 918 } 919 920 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 921 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 922 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 923 icmd->ulpBdeCount = 1; 924 cnt--; 925 if (mp2) { 926 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 927 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 928 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 929 cnt--; 930 icmd->ulpBdeCount = 2; 931 } 932 933 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 934 icmd->ulpLe = 1; 935 936 spin_lock_irq(phba->host->host_lock); 937 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) { 938 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 939 kfree(mp1); 940 cnt++; 941 if (mp2) { 942 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 943 kfree(mp2); 944 cnt++; 945 } 946 lpfc_sli_release_iocbq(phba, iocb); 947 pring->missbufcnt = cnt; 948 spin_unlock_irq(phba->host->host_lock); 949 return cnt; 950 } 951 spin_unlock_irq(phba->host->host_lock); 952 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 953 if (mp2) { 954 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 955 } 956 } 957 pring->missbufcnt = 0; 958 return 0; 959} 960 961/************************************************************************/ 962/* */ 963/* lpfc_post_rcv_buf */ 964/* This routine post initial rcv buffers to the configured rings */ 965/* */ 966/************************************************************************/ 967static int 968lpfc_post_rcv_buf(struct lpfc_hba * phba) 969{ 970 struct lpfc_sli *psli = &phba->sli; 971 972 /* Ring 0, ELS / CT buffers */ 973 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1); 974 /* Ring 2 - FCP no buffers needed */ 975 976 return 0; 977} 978 979#define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 980 981/************************************************************************/ 982/* */ 983/* lpfc_sha_init */ 984/* */ 985/************************************************************************/ 986static void 987lpfc_sha_init(uint32_t * HashResultPointer) 988{ 989 HashResultPointer[0] = 0x67452301; 990 HashResultPointer[1] = 0xEFCDAB89; 991 HashResultPointer[2] = 0x98BADCFE; 992 HashResultPointer[3] = 0x10325476; 993 HashResultPointer[4] = 0xC3D2E1F0; 994} 995 996/************************************************************************/ 997/* */ 998/* lpfc_sha_iterate */ 999/* */ 1000/************************************************************************/ 1001static void 1002lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 1003{ 1004 int t; 1005 uint32_t TEMP; 1006 uint32_t A, B, C, D, E; 1007 t = 16; 1008 do { 1009 HashWorkingPointer[t] = 1010 S(1, 1011 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 1012 8] ^ 1013 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 1014 } while (++t <= 79); 1015 t = 0; 1016 A = HashResultPointer[0]; 1017 B = HashResultPointer[1]; 1018 C = HashResultPointer[2]; 1019 D = HashResultPointer[3]; 1020 E = HashResultPointer[4]; 1021 1022 do { 1023 if (t < 20) { 1024 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 1025 } else if (t < 40) { 1026 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 1027 } else if (t < 60) { 1028 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 1029 } else { 1030 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 1031 } 1032 TEMP += S(5, A) + E + HashWorkingPointer[t]; 1033 E = D; 1034 D = C; 1035 C = S(30, B); 1036 B = A; 1037 A = TEMP; 1038 } while (++t <= 79); 1039 1040 HashResultPointer[0] += A; 1041 HashResultPointer[1] += B; 1042 HashResultPointer[2] += C; 1043 HashResultPointer[3] += D; 1044 HashResultPointer[4] += E; 1045 1046} 1047 1048/************************************************************************/ 1049/* */ 1050/* lpfc_challenge_key */ 1051/* */ 1052/************************************************************************/ 1053static void 1054lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 1055{ 1056 *HashWorking = (*RandomChallenge ^ *HashWorking); 1057} 1058 1059/************************************************************************/ 1060/* */ 1061/* lpfc_hba_init */ 1062/* */ 1063/************************************************************************/ 1064void 1065lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 1066{ 1067 int t; 1068 uint32_t *HashWorking; 1069 uint32_t *pwwnn = phba->wwnn; 1070 1071 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL); 1072 if (!HashWorking) 1073 return; 1074 1075 memset(HashWorking, 0, (80 * sizeof(uint32_t))); 1076 HashWorking[0] = HashWorking[78] = *pwwnn++; 1077 HashWorking[1] = HashWorking[79] = *pwwnn; 1078 1079 for (t = 0; t < 7; t++) 1080 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 1081 1082 lpfc_sha_init(hbainit); 1083 lpfc_sha_iterate(hbainit, HashWorking); 1084 kfree(HashWorking); 1085} 1086 1087static void 1088lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind) 1089{ 1090 struct lpfc_nodelist *ndlp, *next_ndlp; 1091 1092 /* clean up phba - lpfc specific */ 1093 lpfc_can_disctmo(phba); 1094 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list, 1095 nlp_listp) { 1096 lpfc_nlp_remove(phba, ndlp); 1097 } 1098 1099 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list, 1100 nlp_listp) { 1101 lpfc_nlp_remove(phba, ndlp); 1102 } 1103 1104 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list, 1105 nlp_listp) { 1106 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST); 1107 } 1108 1109 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list, 1110 nlp_listp) { 1111 lpfc_nlp_remove(phba, ndlp); 1112 } 1113 1114 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list, 1115 nlp_listp) { 1116 lpfc_nlp_remove(phba, ndlp); 1117 } 1118 1119 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list, 1120 nlp_listp) { 1121 lpfc_nlp_remove(phba, ndlp); 1122 } 1123 1124 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list, 1125 nlp_listp) { 1126 lpfc_nlp_remove(phba, ndlp); 1127 } 1128 1129 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list, 1130 nlp_listp) { 1131 lpfc_nlp_remove(phba, ndlp); 1132 } 1133 1134 INIT_LIST_HEAD(&phba->fc_nlpmap_list); 1135 INIT_LIST_HEAD(&phba->fc_nlpunmap_list); 1136 INIT_LIST_HEAD(&phba->fc_unused_list); 1137 INIT_LIST_HEAD(&phba->fc_plogi_list); 1138 INIT_LIST_HEAD(&phba->fc_adisc_list); 1139 INIT_LIST_HEAD(&phba->fc_reglogin_list); 1140 INIT_LIST_HEAD(&phba->fc_prli_list); 1141 INIT_LIST_HEAD(&phba->fc_npr_list); 1142 1143 phba->fc_map_cnt = 0; 1144 phba->fc_unmap_cnt = 0; 1145 phba->fc_plogi_cnt = 0; 1146 phba->fc_adisc_cnt = 0; 1147 phba->fc_reglogin_cnt = 0; 1148 phba->fc_prli_cnt = 0; 1149 phba->fc_npr_cnt = 0; 1150 phba->fc_unused_cnt= 0; 1151 return; 1152} 1153 1154static void 1155lpfc_establish_link_tmo(unsigned long ptr) 1156{ 1157 struct lpfc_hba *phba = (struct lpfc_hba *)ptr; 1158 unsigned long iflag; 1159 1160 1161 /* Re-establishing Link, timer expired */ 1162 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT, 1163 "%d:1300 Re-establishing Link, timer expired " 1164 "Data: x%x x%x\n", 1165 phba->brd_no, phba->fc_flag, phba->hba_state); 1166 spin_lock_irqsave(phba->host->host_lock, iflag); 1167 phba->fc_flag &= ~FC_ESTABLISH_LINK; 1168 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1169} 1170 1171static int 1172lpfc_stop_timer(struct lpfc_hba * phba) 1173{ 1174 struct lpfc_sli *psli = &phba->sli; 1175 1176 /* Instead of a timer, this has been converted to a 1177 * deferred procedding list. 1178 */ 1179 while (!list_empty(&phba->freebufList)) { 1180 1181 struct lpfc_dmabuf *mp = NULL; 1182 1183 list_remove_head((&phba->freebufList), mp, 1184 struct lpfc_dmabuf, list); 1185 if (mp) { 1186 lpfc_mbuf_free(phba, mp->virt, mp->phys); 1187 kfree(mp); 1188 } 1189 } 1190 1191 del_timer_sync(&phba->fc_estabtmo); 1192 del_timer_sync(&phba->fc_disctmo); 1193 del_timer_sync(&phba->fc_fdmitmo); 1194 del_timer_sync(&phba->els_tmofunc); 1195 psli = &phba->sli; 1196 del_timer_sync(&psli->mbox_tmo); 1197 return(1); 1198} 1199 1200int 1201lpfc_online(struct lpfc_hba * phba) 1202{ 1203 if (!phba) 1204 return 0; 1205 1206 if (!(phba->fc_flag & FC_OFFLINE_MODE)) 1207 return 0; 1208 1209 lpfc_printf_log(phba, 1210 KERN_WARNING, 1211 LOG_INIT, 1212 "%d:0458 Bring Adapter online\n", 1213 phba->brd_no); 1214 1215 if (!lpfc_sli_queue_setup(phba)) 1216 return 1; 1217 1218 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */ 1219 return 1; 1220 1221 spin_lock_irq(phba->host->host_lock); 1222 phba->fc_flag &= ~FC_OFFLINE_MODE; 1223 spin_unlock_irq(phba->host->host_lock); 1224 1225 return 0; 1226} 1227 1228int 1229lpfc_offline(struct lpfc_hba * phba) 1230{ 1231 struct lpfc_sli_ring *pring; 1232 struct lpfc_sli *psli; 1233 unsigned long iflag; 1234 int i = 0; 1235 1236 if (!phba) 1237 return 0; 1238 1239 if (phba->fc_flag & FC_OFFLINE_MODE) 1240 return 0; 1241 1242 psli = &phba->sli; 1243 pring = &psli->ring[psli->fcp_ring]; 1244 1245 lpfc_linkdown(phba); 1246 1247 /* The linkdown event takes 30 seconds to timeout. */ 1248 while (pring->txcmplq_cnt) { 1249 mdelay(10); 1250 if (i++ > 3000) 1251 break; 1252 } 1253 1254 /* stop all timers associated with this hba */ 1255 lpfc_stop_timer(phba); 1256 phba->work_hba_events = 0; 1257 1258 lpfc_printf_log(phba, 1259 KERN_WARNING, 1260 LOG_INIT, 1261 "%d:0460 Bring Adapter offline\n", 1262 phba->brd_no); 1263 1264 /* Bring down the SLI Layer and cleanup. The HBA is offline 1265 now. */ 1266 lpfc_sli_hba_down(phba); 1267 lpfc_cleanup(phba, 1); 1268 spin_lock_irqsave(phba->host->host_lock, iflag); 1269 phba->fc_flag |= FC_OFFLINE_MODE; 1270 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1271 return 0; 1272} 1273 1274/****************************************************************************** 1275* Function name: lpfc_scsi_free 1276* 1277* Description: Called from lpfc_pci_remove_one free internal driver resources 1278* 1279******************************************************************************/ 1280static int 1281lpfc_scsi_free(struct lpfc_hba * phba) 1282{ 1283 struct lpfc_scsi_buf *sb, *sb_next; 1284 struct lpfc_iocbq *io, *io_next; 1285 1286 spin_lock_irq(phba->host->host_lock); 1287 /* Release all the lpfc_scsi_bufs maintained by this host. */ 1288 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) { 1289 list_del(&sb->list); 1290 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data, 1291 sb->dma_handle); 1292 kfree(sb); 1293 phba->total_scsi_bufs--; 1294 } 1295 1296 /* Release all the lpfc_iocbq entries maintained by this host. */ 1297 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) { 1298 list_del(&io->list); 1299 kfree(io); 1300 phba->total_iocbq_bufs--; 1301 } 1302 1303 spin_unlock_irq(phba->host->host_lock); 1304 1305 return 0; 1306} 1307 1308 1309static int __devinit 1310lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 1311{ 1312 struct Scsi_Host *host; 1313 struct lpfc_hba *phba; 1314 struct lpfc_sli *psli; 1315 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 1316 unsigned long bar0map_len, bar2map_len; 1317 int error = -ENODEV, retval; 1318 int i; 1319 uint16_t iotag; 1320 1321 if (pci_enable_device(pdev)) 1322 goto out; 1323 if (pci_request_regions(pdev, LPFC_DRIVER_NAME)) 1324 goto out_disable_device; 1325 1326 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba)); 1327 if (!host) 1328 goto out_release_regions; 1329 1330 phba = (struct lpfc_hba*)host->hostdata; 1331 memset(phba, 0, sizeof (struct lpfc_hba)); 1332 phba->host = host; 1333 1334 phba->fc_flag |= FC_LOADING; 1335 phba->pcidev = pdev; 1336 1337 /* Assign an unused board number */ 1338 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL)) 1339 goto out_put_host; 1340 1341 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no); 1342 if (error) 1343 goto out_put_host; 1344 1345 host->unique_id = phba->brd_no; 1346 1347 INIT_LIST_HEAD(&phba->ctrspbuflist); 1348 INIT_LIST_HEAD(&phba->rnidrspbuflist); 1349 INIT_LIST_HEAD(&phba->freebufList); 1350 1351 /* Initialize timers used by driver */ 1352 init_timer(&phba->fc_estabtmo); 1353 phba->fc_estabtmo.function = lpfc_establish_link_tmo; 1354 phba->fc_estabtmo.data = (unsigned long)phba; 1355 init_timer(&phba->fc_disctmo); 1356 phba->fc_disctmo.function = lpfc_disc_timeout; 1357 phba->fc_disctmo.data = (unsigned long)phba; 1358 1359 init_timer(&phba->fc_fdmitmo); 1360 phba->fc_fdmitmo.function = lpfc_fdmi_tmo; 1361 phba->fc_fdmitmo.data = (unsigned long)phba; 1362 init_timer(&phba->els_tmofunc); 1363 phba->els_tmofunc.function = lpfc_els_timeout; 1364 phba->els_tmofunc.data = (unsigned long)phba; 1365 psli = &phba->sli; 1366 init_timer(&psli->mbox_tmo); 1367 psli->mbox_tmo.function = lpfc_mbox_timeout; 1368 psli->mbox_tmo.data = (unsigned long)phba; 1369 1370 /* 1371 * Get all the module params for configuring this host and then 1372 * establish the host parameters. 1373 */ 1374 lpfc_get_cfgparam(phba); 1375 1376 host->max_id = LPFC_MAX_TARGET; 1377 host->max_lun = phba->cfg_max_luns; 1378 host->this_id = -1; 1379 1380 /* Initialize all internally managed lists. */ 1381 INIT_LIST_HEAD(&phba->fc_nlpmap_list); 1382 INIT_LIST_HEAD(&phba->fc_nlpunmap_list); 1383 INIT_LIST_HEAD(&phba->fc_unused_list); 1384 INIT_LIST_HEAD(&phba->fc_plogi_list); 1385 INIT_LIST_HEAD(&phba->fc_adisc_list); 1386 INIT_LIST_HEAD(&phba->fc_reglogin_list); 1387 INIT_LIST_HEAD(&phba->fc_prli_list); 1388 INIT_LIST_HEAD(&phba->fc_npr_list); 1389 1390 1391 pci_set_master(pdev); 1392 retval = pci_set_mwi(pdev); 1393 if (retval) 1394 dev_printk(KERN_WARNING, &pdev->dev, 1395 "Warning: pci_set_mwi returned %d\n", retval); 1396 1397 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0) 1398 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0) 1399 goto out_idr_remove; 1400 1401 /* 1402 * Get the bus address of Bar0 and Bar2 and the number of bytes 1403 * required by each mapping. 1404 */ 1405 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0); 1406 bar0map_len = pci_resource_len(phba->pcidev, 0); 1407 1408 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2); 1409 bar2map_len = pci_resource_len(phba->pcidev, 2); 1410 1411 /* Map HBA SLIM and Control Registers to a kernel virtual address. */ 1412 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 1413 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 1414 1415 /* Allocate memory for SLI-2 structures */ 1416 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE, 1417 &phba->slim2p_mapping, GFP_KERNEL); 1418 if (!phba->slim2p) 1419 goto out_iounmap; 1420 1421 memset(phba->slim2p, 0, SLI2_SLIM_SIZE); 1422 1423 /* Initialize the SLI Layer to run with lpfc HBAs. */ 1424 lpfc_sli_setup(phba); 1425 lpfc_sli_queue_setup(phba); 1426 1427 error = lpfc_mem_alloc(phba); 1428 if (error) 1429 goto out_free_slim; 1430 1431 /* Initialize and populate the iocb list per host. */ 1432 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 1433 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) { 1434 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 1435 if (iocbq_entry == NULL) { 1436 printk(KERN_ERR "%s: only allocated %d iocbs of " 1437 "expected %d count. Unloading driver.\n", 1438 __FUNCTION__, i, LPFC_IOCB_LIST_CNT); 1439 error = -ENOMEM; 1440 goto out_free_iocbq; 1441 } 1442 1443 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq)); 1444 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 1445 if (iotag == 0) { 1446 kfree (iocbq_entry); 1447 printk(KERN_ERR "%s: failed to allocate IOTAG. " 1448 "Unloading driver.\n", 1449 __FUNCTION__); 1450 error = -ENOMEM; 1451 goto out_free_iocbq; 1452 } 1453 spin_lock_irq(phba->host->host_lock); 1454 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 1455 phba->total_iocbq_bufs++; 1456 spin_unlock_irq(phba->host->host_lock); 1457 } 1458 1459 /* Initialize HBA structure */ 1460 phba->fc_edtov = FF_DEF_EDTOV; 1461 phba->fc_ratov = FF_DEF_RATOV; 1462 phba->fc_altov = FF_DEF_ALTOV; 1463 phba->fc_arbtov = FF_DEF_ARBTOV; 1464 1465 INIT_LIST_HEAD(&phba->work_list); 1466 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT); 1467 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 1468 1469 /* Startup the kernel thread for this host adapter. */ 1470 phba->worker_thread = kthread_run(lpfc_do_work, phba, 1471 "lpfc_worker_%d", phba->brd_no); 1472 if (IS_ERR(phba->worker_thread)) { 1473 error = PTR_ERR(phba->worker_thread); 1474 goto out_free_iocbq; 1475 } 1476 1477 /* We can rely on a queue depth attribute only after SLI HBA setup */ 1478 host->can_queue = phba->cfg_hba_queue_depth - 10; 1479 1480 /* Tell the midlayer we support 16 byte commands */ 1481 host->max_cmd_len = 16; 1482 1483 /* Initialize the list of scsi buffers used by driver for scsi IO. */ 1484 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list); 1485 1486 host->transportt = lpfc_transport_template; 1487 host->hostdata[0] = (unsigned long)phba; 1488 pci_set_drvdata(pdev, host); 1489 error = scsi_add_host(host, &pdev->dev); 1490 if (error) 1491 goto out_kthread_stop; 1492 1493 error = lpfc_alloc_sysfs_attr(phba); 1494 if (error) 1495 goto out_kthread_stop; 1496 1497 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ, 1498 LPFC_DRIVER_NAME, phba); 1499 if (error) { 1500 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1501 "%d:0451 Enable interrupt handler failed\n", 1502 phba->brd_no); 1503 goto out_free_sysfs_attr; 1504 } 1505 phba->MBslimaddr = phba->slim_memmap_p; 1506 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 1507 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 1508 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 1509 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 1510 1511 error = lpfc_sli_hba_setup(phba); 1512 if (error) 1513 goto out_free_irq; 1514 1515 /* 1516 * set fixed host attributes 1517 * Must done after lpfc_sli_hba_setup() 1518 */ 1519 1520 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn); 1521 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn); 1522 fc_host_supported_classes(host) = FC_COS_CLASS3; 1523 1524 memset(fc_host_supported_fc4s(host), 0, 1525 sizeof(fc_host_supported_fc4s(host))); 1526 fc_host_supported_fc4s(host)[2] = 1; 1527 fc_host_supported_fc4s(host)[7] = 1; 1528 1529 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host)); 1530 1531 fc_host_supported_speeds(host) = 0; 1532 switch (FC_JEDEC_ID(phba->vpd.rev.biuRev)) { 1533 case VIPER_JEDEC_ID: 1534 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT; 1535 break; 1536 case HELIOS_JEDEC_ID: 1537 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT; 1538 /* Fall through */ 1539 case CENTAUR_2G_JEDEC_ID: 1540 case PEGASUS_JEDEC_ID: 1541 case THOR_JEDEC_ID: 1542 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT; 1543 /* Fall through */ 1544 default: 1545 fc_host_supported_speeds(host) = FC_PORTSPEED_1GBIT; 1546 } 1547 1548 fc_host_maxframe_size(host) = 1549 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 1550 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb); 1551 1552 /* This value is also unchanging */ 1553 memset(fc_host_active_fc4s(host), 0, 1554 sizeof(fc_host_active_fc4s(host))); 1555 fc_host_active_fc4s(host)[2] = 1; 1556 fc_host_active_fc4s(host)[7] = 1; 1557 1558 spin_lock_irq(phba->host->host_lock); 1559 phba->fc_flag &= ~FC_LOADING; 1560 spin_unlock_irq(phba->host->host_lock); 1561 return 0; 1562 1563out_free_irq: 1564 lpfc_stop_timer(phba); 1565 phba->work_hba_events = 0; 1566 free_irq(phba->pcidev->irq, phba); 1567out_free_sysfs_attr: 1568 lpfc_free_sysfs_attr(phba); 1569out_kthread_stop: 1570 kthread_stop(phba->worker_thread); 1571out_free_iocbq: 1572 list_for_each_entry_safe(iocbq_entry, iocbq_next, 1573 &phba->lpfc_iocb_list, list) { 1574 spin_lock_irq(phba->host->host_lock); 1575 kfree(iocbq_entry); 1576 phba->total_iocbq_bufs--; 1577 spin_unlock_irq(phba->host->host_lock); 1578 } 1579 lpfc_mem_free(phba); 1580out_free_slim: 1581 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p, 1582 phba->slim2p_mapping); 1583out_iounmap: 1584 iounmap(phba->ctrl_regs_memmap_p); 1585 iounmap(phba->slim_memmap_p); 1586out_idr_remove: 1587 idr_remove(&lpfc_hba_index, phba->brd_no); 1588out_put_host: 1589 scsi_host_put(host); 1590out_release_regions: 1591 pci_release_regions(pdev); 1592out_disable_device: 1593 pci_disable_device(pdev); 1594out: 1595 return error; 1596} 1597 1598static void __devexit 1599lpfc_pci_remove_one(struct pci_dev *pdev) 1600{ 1601 struct Scsi_Host *host = pci_get_drvdata(pdev); 1602 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata[0]; 1603 unsigned long iflag; 1604 1605 lpfc_free_sysfs_attr(phba); 1606 1607 spin_lock_irqsave(phba->host->host_lock, iflag); 1608 phba->fc_flag |= FC_UNLOADING; 1609 1610 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1611 1612 fc_remove_host(phba->host); 1613 scsi_remove_host(phba->host); 1614 1615 kthread_stop(phba->worker_thread); 1616 1617 /* 1618 * Bring down the SLI Layer. This step disable all interrupts, 1619 * clears the rings, discards all mailbox commands, and resets 1620 * the HBA. 1621 */ 1622 lpfc_sli_hba_down(phba); 1623 1624 /* Release the irq reservation */ 1625 free_irq(phba->pcidev->irq, phba); 1626 1627 lpfc_cleanup(phba, 0); 1628 lpfc_stop_timer(phba); 1629 phba->work_hba_events = 0; 1630 1631 /* 1632 * Call scsi_free before mem_free since scsi bufs are released to their 1633 * corresponding pools here. 1634 */ 1635 lpfc_scsi_free(phba); 1636 lpfc_mem_free(phba); 1637 1638 /* Free resources associated with SLI2 interface */ 1639 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 1640 phba->slim2p, phba->slim2p_mapping); 1641 1642 /* unmap adapter SLIM and Control Registers */ 1643 iounmap(phba->ctrl_regs_memmap_p); 1644 iounmap(phba->slim_memmap_p); 1645 1646 pci_release_regions(phba->pcidev); 1647 pci_disable_device(phba->pcidev); 1648 1649 idr_remove(&lpfc_hba_index, phba->brd_no); 1650 scsi_host_put(phba->host); 1651 1652 pci_set_drvdata(pdev, NULL); 1653} 1654 1655static struct pci_device_id lpfc_id_table[] = { 1656 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER, 1657 PCI_ANY_ID, PCI_ANY_ID, }, 1658 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY, 1659 PCI_ANY_ID, PCI_ANY_ID, }, 1660 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR, 1661 PCI_ANY_ID, PCI_ANY_ID, }, 1662 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS, 1663 PCI_ANY_ID, PCI_ANY_ID, }, 1664 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR, 1665 PCI_ANY_ID, PCI_ANY_ID, }, 1666 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY, 1667 PCI_ANY_ID, PCI_ANY_ID, }, 1668 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY, 1669 PCI_ANY_ID, PCI_ANY_ID, }, 1670 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY, 1671 PCI_ANY_ID, PCI_ANY_ID, }, 1672 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY, 1673 PCI_ANY_ID, PCI_ANY_ID, }, 1674 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS, 1675 PCI_ANY_ID, PCI_ANY_ID, }, 1676 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID, 1677 PCI_ANY_ID, PCI_ANY_ID, }, 1678 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB, 1679 PCI_ANY_ID, PCI_ANY_ID, }, 1680 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR, 1681 PCI_ANY_ID, PCI_ANY_ID, }, 1682 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID, 1683 PCI_ANY_ID, PCI_ANY_ID, }, 1684 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB, 1685 PCI_ANY_ID, PCI_ANY_ID, }, 1686 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY, 1687 PCI_ANY_ID, PCI_ANY_ID, }, 1688 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101, 1689 PCI_ANY_ID, PCI_ANY_ID, }, 1690 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S, 1691 PCI_ANY_ID, PCI_ANY_ID, }, 1692 { 0 } 1693}; 1694 1695MODULE_DEVICE_TABLE(pci, lpfc_id_table); 1696 1697static struct pci_driver lpfc_driver = { 1698 .name = LPFC_DRIVER_NAME, 1699 .id_table = lpfc_id_table, 1700 .probe = lpfc_pci_probe_one, 1701 .remove = __devexit_p(lpfc_pci_remove_one), 1702}; 1703 1704static int __init 1705lpfc_init(void) 1706{ 1707 int error = 0; 1708 1709 printk(LPFC_MODULE_DESC "\n"); 1710 printk(LPFC_COPYRIGHT "\n"); 1711 1712 lpfc_transport_template = 1713 fc_attach_transport(&lpfc_transport_functions); 1714 if (!lpfc_transport_template) 1715 return -ENOMEM; 1716 error = pci_register_driver(&lpfc_driver); 1717 if (error) 1718 fc_release_transport(lpfc_transport_template); 1719 1720 return error; 1721} 1722 1723static void __exit 1724lpfc_exit(void) 1725{ 1726 pci_unregister_driver(&lpfc_driver); 1727 fc_release_transport(lpfc_transport_template); 1728} 1729 1730module_init(lpfc_init); 1731module_exit(lpfc_exit); 1732MODULE_LICENSE("GPL"); 1733MODULE_DESCRIPTION(LPFC_MODULE_DESC); 1734MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com"); 1735MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 1736