lpfc_init.c revision 74b72a59b8d42d31aa6ffac8f10ca7a784be392c
1/******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2004-2006 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 8 * * 9 * This program is free software; you can redistribute it and/or * 10 * modify it under the terms of version 2 of the GNU General * 11 * Public License as published by the Free Software Foundation. * 12 * This program is distributed in the hope that it will be useful. * 13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 17 * TO BE LEGALLY INVALID. See the GNU General Public License for * 18 * more details, a copy of which can be found in the file COPYING * 19 * included with this package. * 20 *******************************************************************/ 21 22#include <linux/blkdev.h> 23#include <linux/delay.h> 24#include <linux/dma-mapping.h> 25#include <linux/idr.h> 26#include <linux/interrupt.h> 27#include <linux/kthread.h> 28#include <linux/pci.h> 29#include <linux/spinlock.h> 30 31#include <scsi/scsi.h> 32#include <scsi/scsi_device.h> 33#include <scsi/scsi_host.h> 34#include <scsi/scsi_transport_fc.h> 35 36#include "lpfc_hw.h" 37#include "lpfc_sli.h" 38#include "lpfc_disc.h" 39#include "lpfc_scsi.h" 40#include "lpfc.h" 41#include "lpfc_logmsg.h" 42#include "lpfc_crtn.h" 43#include "lpfc_version.h" 44 45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int); 46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 47static int lpfc_post_rcv_buf(struct lpfc_hba *); 48 49static struct scsi_transport_template *lpfc_transport_template = NULL; 50static DEFINE_IDR(lpfc_hba_index); 51 52/************************************************************************/ 53/* */ 54/* lpfc_config_port_prep */ 55/* This routine will do LPFC initialization prior to the */ 56/* CONFIG_PORT mailbox command. This will be initialized */ 57/* as a SLI layer callback routine. */ 58/* This routine returns 0 on success or -ERESTART if it wants */ 59/* the SLI layer to reset the HBA and try again. Any */ 60/* other return value indicates an error. */ 61/* */ 62/************************************************************************/ 63int 64lpfc_config_port_prep(struct lpfc_hba * phba) 65{ 66 lpfc_vpd_t *vp = &phba->vpd; 67 int i = 0, rc; 68 LPFC_MBOXQ_t *pmb; 69 MAILBOX_t *mb; 70 char *lpfc_vpd_data = NULL; 71 uint16_t offset = 0; 72 static char licensed[56] = 73 "key unlock for use with gnu public licensed code only\0"; 74 75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 76 if (!pmb) { 77 phba->hba_state = LPFC_HBA_ERROR; 78 return -ENOMEM; 79 } 80 81 mb = &pmb->mb; 82 phba->hba_state = LPFC_INIT_MBX_CMDS; 83 84 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 85 uint32_t *ptext = (uint32_t *) licensed; 86 87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 88 *ptext = cpu_to_be32(*ptext); 89 90 lpfc_read_nv(phba, pmb); 91 memset((char*)mb->un.varRDnvp.rsvd3, 0, 92 sizeof (mb->un.varRDnvp.rsvd3)); 93 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 94 sizeof (licensed)); 95 96 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 97 98 if (rc != MBX_SUCCESS) { 99 lpfc_printf_log(phba, 100 KERN_ERR, 101 LOG_MBOX, 102 "%d:0324 Config Port initialization " 103 "error, mbxCmd x%x READ_NVPARM, " 104 "mbxStatus x%x\n", 105 phba->brd_no, 106 mb->mbxCommand, mb->mbxStatus); 107 mempool_free(pmb, phba->mbox_mem_pool); 108 return -ERESTART; 109 } 110 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 111 sizeof (mb->un.varRDnvp.nodename)); 112 } 113 114 /* Setup and issue mailbox READ REV command */ 115 lpfc_read_rev(phba, pmb); 116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 117 if (rc != MBX_SUCCESS) { 118 lpfc_printf_log(phba, 119 KERN_ERR, 120 LOG_INIT, 121 "%d:0439 Adapter failed to init, mbxCmd x%x " 122 "READ_REV, mbxStatus x%x\n", 123 phba->brd_no, 124 mb->mbxCommand, mb->mbxStatus); 125 mempool_free( pmb, phba->mbox_mem_pool); 126 return -ERESTART; 127 } 128 129 /* 130 * The value of rr must be 1 since the driver set the cv field to 1. 131 * This setting requires the FW to set all revision fields. 132 */ 133 if (mb->un.varRdRev.rr == 0) { 134 vp->rev.rBit = 0; 135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 136 "%d:0440 Adapter failed to init, READ_REV has " 137 "missing revision information.\n", 138 phba->brd_no); 139 mempool_free(pmb, phba->mbox_mem_pool); 140 return -ERESTART; 141 } 142 143 /* Save information as VPD data */ 144 vp->rev.rBit = 1; 145 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 146 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 147 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 148 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 149 vp->rev.biuRev = mb->un.varRdRev.biuRev; 150 vp->rev.smRev = mb->un.varRdRev.smRev; 151 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 152 vp->rev.endecRev = mb->un.varRdRev.endecRev; 153 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 154 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 155 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 156 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 157 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 158 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 159 160 if (lpfc_is_LC_HBA(phba->pcidev->device)) 161 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 162 sizeof (phba->RandomData)); 163 164 /* Get adapter VPD information */ 165 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL); 166 if (!pmb->context2) 167 goto out_free_mbox; 168 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 169 if (!lpfc_vpd_data) 170 goto out_free_context2; 171 172 do { 173 lpfc_dump_mem(phba, pmb, offset); 174 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 175 176 if (rc != MBX_SUCCESS) { 177 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 178 "%d:0441 VPD not present on adapter, " 179 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 180 phba->brd_no, 181 mb->mbxCommand, mb->mbxStatus); 182 mb->un.varDmp.word_cnt = 0; 183 } 184 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) 185 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; 186 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset, 187 mb->un.varDmp.word_cnt); 188 offset += mb->un.varDmp.word_cnt; 189 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); 190 lpfc_parse_vpd(phba, lpfc_vpd_data, offset); 191 192 kfree(lpfc_vpd_data); 193out_free_context2: 194 kfree(pmb->context2); 195out_free_mbox: 196 mempool_free(pmb, phba->mbox_mem_pool); 197 return 0; 198} 199 200/************************************************************************/ 201/* */ 202/* lpfc_config_port_post */ 203/* This routine will do LPFC initialization after the */ 204/* CONFIG_PORT mailbox command. This will be initialized */ 205/* as a SLI layer callback routine. */ 206/* This routine returns 0 on success. Any other return value */ 207/* indicates an error. */ 208/* */ 209/************************************************************************/ 210int 211lpfc_config_port_post(struct lpfc_hba * phba) 212{ 213 LPFC_MBOXQ_t *pmb; 214 MAILBOX_t *mb; 215 struct lpfc_dmabuf *mp; 216 struct lpfc_sli *psli = &phba->sli; 217 uint32_t status, timeout; 218 int i, j, rc; 219 220 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 221 if (!pmb) { 222 phba->hba_state = LPFC_HBA_ERROR; 223 return -ENOMEM; 224 } 225 mb = &pmb->mb; 226 227 lpfc_config_link(phba, pmb); 228 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 229 if (rc != MBX_SUCCESS) { 230 lpfc_printf_log(phba, 231 KERN_ERR, 232 LOG_INIT, 233 "%d:0447 Adapter failed init, mbxCmd x%x " 234 "CONFIG_LINK mbxStatus x%x\n", 235 phba->brd_no, 236 mb->mbxCommand, mb->mbxStatus); 237 phba->hba_state = LPFC_HBA_ERROR; 238 mempool_free( pmb, phba->mbox_mem_pool); 239 return -EIO; 240 } 241 242 /* Get login parameters for NID. */ 243 lpfc_read_sparam(phba, pmb); 244 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 245 lpfc_printf_log(phba, 246 KERN_ERR, 247 LOG_INIT, 248 "%d:0448 Adapter failed init, mbxCmd x%x " 249 "READ_SPARM mbxStatus x%x\n", 250 phba->brd_no, 251 mb->mbxCommand, mb->mbxStatus); 252 phba->hba_state = LPFC_HBA_ERROR; 253 mp = (struct lpfc_dmabuf *) pmb->context1; 254 mempool_free( pmb, phba->mbox_mem_pool); 255 lpfc_mbuf_free(phba, mp->virt, mp->phys); 256 kfree(mp); 257 return -EIO; 258 } 259 260 mp = (struct lpfc_dmabuf *) pmb->context1; 261 262 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm)); 263 lpfc_mbuf_free(phba, mp->virt, mp->phys); 264 kfree(mp); 265 pmb->context1 = NULL; 266 267 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName, 268 sizeof (struct lpfc_name)); 269 memcpy(&phba->fc_portname, &phba->fc_sparam.portName, 270 sizeof (struct lpfc_name)); 271 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 272 /* This should be consolidated into parse_vpd ? - mr */ 273 if (phba->SerialNumber[0] == 0) { 274 uint8_t *outptr; 275 276 outptr = &phba->fc_nodename.u.s.IEEE[0]; 277 for (i = 0; i < 12; i++) { 278 status = *outptr++; 279 j = ((status & 0xf0) >> 4); 280 if (j <= 9) 281 phba->SerialNumber[i] = 282 (char)((uint8_t) 0x30 + (uint8_t) j); 283 else 284 phba->SerialNumber[i] = 285 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 286 i++; 287 j = (status & 0xf); 288 if (j <= 9) 289 phba->SerialNumber[i] = 290 (char)((uint8_t) 0x30 + (uint8_t) j); 291 else 292 phba->SerialNumber[i] = 293 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 294 } 295 } 296 297 /* This should turn on DELAYED ABTS for ELS timeouts */ 298 lpfc_set_slim(phba, pmb, 0x052198, 0x1); 299 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 300 phba->hba_state = LPFC_HBA_ERROR; 301 mempool_free( pmb, phba->mbox_mem_pool); 302 return -EIO; 303 } 304 305 306 lpfc_read_config(phba, pmb); 307 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 308 lpfc_printf_log(phba, 309 KERN_ERR, 310 LOG_INIT, 311 "%d:0453 Adapter failed to init, mbxCmd x%x " 312 "READ_CONFIG, mbxStatus x%x\n", 313 phba->brd_no, 314 mb->mbxCommand, mb->mbxStatus); 315 phba->hba_state = LPFC_HBA_ERROR; 316 mempool_free( pmb, phba->mbox_mem_pool); 317 return -EIO; 318 } 319 320 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 321 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1)) 322 phba->cfg_hba_queue_depth = 323 mb->un.varRdConfig.max_xri + 1; 324 325 phba->lmt = mb->un.varRdConfig.lmt; 326 327 /* Get the default values for Model Name and Description */ 328 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 329 330 if ((phba->cfg_link_speed > LINK_SPEED_10G) 331 || ((phba->cfg_link_speed == LINK_SPEED_1G) 332 && !(phba->lmt & LMT_1Gb)) 333 || ((phba->cfg_link_speed == LINK_SPEED_2G) 334 && !(phba->lmt & LMT_2Gb)) 335 || ((phba->cfg_link_speed == LINK_SPEED_4G) 336 && !(phba->lmt & LMT_4Gb)) 337 || ((phba->cfg_link_speed == LINK_SPEED_8G) 338 && !(phba->lmt & LMT_8Gb)) 339 || ((phba->cfg_link_speed == LINK_SPEED_10G) 340 && !(phba->lmt & LMT_10Gb))) { 341 /* Reset link speed to auto */ 342 lpfc_printf_log(phba, 343 KERN_WARNING, 344 LOG_LINK_EVENT, 345 "%d:1302 Invalid speed for this board: " 346 "Reset link speed to auto: x%x\n", 347 phba->brd_no, 348 phba->cfg_link_speed); 349 phba->cfg_link_speed = LINK_SPEED_AUTO; 350 } 351 352 phba->hba_state = LPFC_LINK_DOWN; 353 354 /* Only process IOCBs on ring 0 till hba_state is READY */ 355 if (psli->ring[psli->ip_ring].cmdringaddr) 356 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT; 357 if (psli->ring[psli->fcp_ring].cmdringaddr) 358 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT; 359 if (psli->ring[psli->next_ring].cmdringaddr) 360 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT; 361 362 /* Post receive buffers for desired rings */ 363 lpfc_post_rcv_buf(phba); 364 365 /* Enable appropriate host interrupts */ 366 spin_lock_irq(phba->host->host_lock); 367 status = readl(phba->HCregaddr); 368 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 369 if (psli->num_rings > 0) 370 status |= HC_R0INT_ENA; 371 if (psli->num_rings > 1) 372 status |= HC_R1INT_ENA; 373 if (psli->num_rings > 2) 374 status |= HC_R2INT_ENA; 375 if (psli->num_rings > 3) 376 status |= HC_R3INT_ENA; 377 378 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && 379 (phba->cfg_poll & DISABLE_FCP_RING_INT)) 380 status &= ~(HC_R0INT_ENA << LPFC_FCP_RING); 381 382 writel(status, phba->HCregaddr); 383 readl(phba->HCregaddr); /* flush */ 384 spin_unlock_irq(phba->host->host_lock); 385 386 /* 387 * Setup the ring 0 (els) timeout handler 388 */ 389 timeout = phba->fc_ratov << 1; 390 phba->els_tmofunc.expires = jiffies + HZ * timeout; 391 add_timer(&phba->els_tmofunc); 392 393 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed); 394 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 395 if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) { 396 lpfc_printf_log(phba, 397 KERN_ERR, 398 LOG_INIT, 399 "%d:0454 Adapter failed to init, mbxCmd x%x " 400 "INIT_LINK, mbxStatus x%x\n", 401 phba->brd_no, 402 mb->mbxCommand, mb->mbxStatus); 403 404 /* Clear all interrupt enable conditions */ 405 writel(0, phba->HCregaddr); 406 readl(phba->HCregaddr); /* flush */ 407 /* Clear all pending interrupts */ 408 writel(0xffffffff, phba->HAregaddr); 409 readl(phba->HAregaddr); /* flush */ 410 411 phba->hba_state = LPFC_HBA_ERROR; 412 mempool_free(pmb, phba->mbox_mem_pool); 413 return -EIO; 414 } 415 /* MBOX buffer will be freed in mbox compl */ 416 417 i = 0; 418 while ((phba->hba_state != LPFC_HBA_READY) || 419 (phba->num_disc_nodes) || (phba->fc_prli_sent) || 420 ((phba->fc_map_cnt == 0) && (i<2)) || 421 (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) { 422 /* Check every second for 30 retries. */ 423 i++; 424 if (i > 30) { 425 break; 426 } 427 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) { 428 /* The link is down. Set linkdown timeout */ 429 break; 430 } 431 432 /* Delay for 1 second to give discovery time to complete. */ 433 msleep(1000); 434 435 } 436 437 /* Since num_disc_nodes keys off of PLOGI, delay a bit to let 438 * any potential PRLIs to flush thru the SLI sub-system. 439 */ 440 msleep(50); 441 442 return (0); 443} 444 445/************************************************************************/ 446/* */ 447/* lpfc_hba_down_prep */ 448/* This routine will do LPFC uninitialization before the */ 449/* HBA is reset when bringing down the SLI Layer. This will be */ 450/* initialized as a SLI layer callback routine. */ 451/* This routine returns 0 on success. Any other return value */ 452/* indicates an error. */ 453/* */ 454/************************************************************************/ 455int 456lpfc_hba_down_prep(struct lpfc_hba * phba) 457{ 458 /* Disable interrupts */ 459 writel(0, phba->HCregaddr); 460 readl(phba->HCregaddr); /* flush */ 461 462 /* Cleanup potential discovery resources */ 463 lpfc_els_flush_rscn(phba); 464 lpfc_els_flush_cmd(phba); 465 lpfc_disc_flush_list(phba); 466 467 /* Disable SLI2 since we disabled interrupts */ 468 phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE; 469 return (0); 470} 471 472/************************************************************************/ 473/* */ 474/* lpfc_hba_down_post */ 475/* This routine will do uninitialization after the HBA is reset */ 476/* when bringing down the SLI Layer. */ 477/* This routine returns 0 on success. Any other return value */ 478/* indicates an error. */ 479/* */ 480/************************************************************************/ 481int 482lpfc_hba_down_post(struct lpfc_hba * phba) 483{ 484 struct lpfc_sli *psli = &phba->sli; 485 struct lpfc_sli_ring *pring; 486 struct lpfc_dmabuf *mp, *next_mp; 487 int i; 488 489 /* Cleanup preposted buffers on the ELS ring */ 490 pring = &psli->ring[LPFC_ELS_RING]; 491 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) { 492 list_del(&mp->list); 493 pring->postbufq_cnt--; 494 lpfc_mbuf_free(phba, mp->virt, mp->phys); 495 kfree(mp); 496 } 497 498 for (i = 0; i < psli->num_rings; i++) { 499 pring = &psli->ring[i]; 500 lpfc_sli_abort_iocb_ring(phba, pring); 501 } 502 503 return 0; 504} 505 506/************************************************************************/ 507/* */ 508/* lpfc_handle_eratt */ 509/* This routine will handle processing a Host Attention */ 510/* Error Status event. This will be initialized */ 511/* as a SLI layer callback routine. */ 512/* */ 513/************************************************************************/ 514void 515lpfc_handle_eratt(struct lpfc_hba * phba) 516{ 517 struct lpfc_sli *psli = &phba->sli; 518 struct lpfc_sli_ring *pring; 519 520 if (phba->work_hs & HS_FFER6) { 521 /* Re-establishing Link */ 522 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 523 "%d:1301 Re-establishing Link " 524 "Data: x%x x%x x%x\n", 525 phba->brd_no, phba->work_hs, 526 phba->work_status[0], phba->work_status[1]); 527 spin_lock_irq(phba->host->host_lock); 528 phba->fc_flag |= FC_ESTABLISH_LINK; 529 spin_unlock_irq(phba->host->host_lock); 530 531 /* 532 * Firmware stops when it triggled erratt with HS_FFER6. 533 * That could cause the I/Os dropped by the firmware. 534 * Error iocb (I/O) on txcmplq and let the SCSI layer 535 * retry it after re-establishing link. 536 */ 537 pring = &psli->ring[psli->fcp_ring]; 538 lpfc_sli_abort_iocb_ring(phba, pring); 539 540 541 /* 542 * There was a firmware error. Take the hba offline and then 543 * attempt to restart it. 544 */ 545 lpfc_offline(phba); 546 lpfc_sli_brdrestart(phba); 547 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 548 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60); 549 return; 550 } 551 } else { 552 /* The if clause above forces this code path when the status 553 * failure is a value other than FFER6. Do not call the offline 554 * twice. This is the adapter hardware error path. 555 */ 556 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 557 "%d:0457 Adapter Hardware Error " 558 "Data: x%x x%x x%x\n", 559 phba->brd_no, phba->work_hs, 560 phba->work_status[0], phba->work_status[1]); 561 562 lpfc_offline(phba); 563 phba->hba_state = LPFC_HBA_ERROR; 564 lpfc_hba_down_post(phba); 565 } 566} 567 568/************************************************************************/ 569/* */ 570/* lpfc_handle_latt */ 571/* This routine will handle processing a Host Attention */ 572/* Link Status event. This will be initialized */ 573/* as a SLI layer callback routine. */ 574/* */ 575/************************************************************************/ 576void 577lpfc_handle_latt(struct lpfc_hba * phba) 578{ 579 struct lpfc_sli *psli = &phba->sli; 580 LPFC_MBOXQ_t *pmb; 581 volatile uint32_t control; 582 struct lpfc_dmabuf *mp; 583 int rc = -ENOMEM; 584 585 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 586 if (!pmb) 587 goto lpfc_handle_latt_err_exit; 588 589 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 590 if (!mp) 591 goto lpfc_handle_latt_free_pmb; 592 593 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); 594 if (!mp->virt) 595 goto lpfc_handle_latt_free_mp; 596 597 rc = -EIO; 598 599 /* Cleanup any outstanding ELS commands */ 600 lpfc_els_flush_cmd(phba); 601 602 psli->slistat.link_event++; 603 lpfc_read_la(phba, pmb, mp); 604 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la; 605 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB)); 606 if (rc == MBX_NOT_FINISHED) 607 goto lpfc_handle_latt_free_mp; 608 609 /* Clear Link Attention in HA REG */ 610 spin_lock_irq(phba->host->host_lock); 611 writel(HA_LATT, phba->HAregaddr); 612 readl(phba->HAregaddr); /* flush */ 613 spin_unlock_irq(phba->host->host_lock); 614 615 return; 616 617lpfc_handle_latt_free_mp: 618 kfree(mp); 619lpfc_handle_latt_free_pmb: 620 kfree(pmb); 621lpfc_handle_latt_err_exit: 622 /* Enable Link attention interrupts */ 623 spin_lock_irq(phba->host->host_lock); 624 psli->sli_flag |= LPFC_PROCESS_LA; 625 control = readl(phba->HCregaddr); 626 control |= HC_LAINT_ENA; 627 writel(control, phba->HCregaddr); 628 readl(phba->HCregaddr); /* flush */ 629 630 /* Clear Link Attention in HA REG */ 631 writel(HA_LATT, phba->HAregaddr); 632 readl(phba->HAregaddr); /* flush */ 633 spin_unlock_irq(phba->host->host_lock); 634 lpfc_linkdown(phba); 635 phba->hba_state = LPFC_HBA_ERROR; 636 637 /* The other case is an error from issue_mbox */ 638 if (rc == -ENOMEM) 639 lpfc_printf_log(phba, 640 KERN_WARNING, 641 LOG_MBOX, 642 "%d:0300 READ_LA: no buffers\n", 643 phba->brd_no); 644 645 return; 646} 647 648/************************************************************************/ 649/* */ 650/* lpfc_parse_vpd */ 651/* This routine will parse the VPD data */ 652/* */ 653/************************************************************************/ 654static int 655lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd, int len) 656{ 657 uint8_t lenlo, lenhi; 658 uint32_t Length; 659 int i, j; 660 int finished = 0; 661 int index = 0; 662 663 if (!vpd) 664 return 0; 665 666 /* Vital Product */ 667 lpfc_printf_log(phba, 668 KERN_INFO, 669 LOG_INIT, 670 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n", 671 phba->brd_no, 672 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 673 (uint32_t) vpd[3]); 674 while (!finished && (index < (len - 4))) { 675 switch (vpd[index]) { 676 case 0x82: 677 case 0x91: 678 index += 1; 679 lenlo = vpd[index]; 680 index += 1; 681 lenhi = vpd[index]; 682 index += 1; 683 i = ((((unsigned short)lenhi) << 8) + lenlo); 684 index += i; 685 break; 686 case 0x90: 687 index += 1; 688 lenlo = vpd[index]; 689 index += 1; 690 lenhi = vpd[index]; 691 index += 1; 692 Length = ((((unsigned short)lenhi) << 8) + lenlo); 693 if (Length > len - index) 694 Length = len - index; 695 while (Length > 0) { 696 /* Look for Serial Number */ 697 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) { 698 index += 2; 699 i = vpd[index]; 700 index += 1; 701 j = 0; 702 Length -= (3+i); 703 while(i--) { 704 phba->SerialNumber[j++] = vpd[index++]; 705 if (j == 31) 706 break; 707 } 708 phba->SerialNumber[j] = 0; 709 continue; 710 } 711 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) { 712 phba->vpd_flag |= VPD_MODEL_DESC; 713 index += 2; 714 i = vpd[index]; 715 index += 1; 716 j = 0; 717 Length -= (3+i); 718 while(i--) { 719 phba->ModelDesc[j++] = vpd[index++]; 720 if (j == 255) 721 break; 722 } 723 phba->ModelDesc[j] = 0; 724 continue; 725 } 726 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) { 727 phba->vpd_flag |= VPD_MODEL_NAME; 728 index += 2; 729 i = vpd[index]; 730 index += 1; 731 j = 0; 732 Length -= (3+i); 733 while(i--) { 734 phba->ModelName[j++] = vpd[index++]; 735 if (j == 79) 736 break; 737 } 738 phba->ModelName[j] = 0; 739 continue; 740 } 741 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) { 742 phba->vpd_flag |= VPD_PROGRAM_TYPE; 743 index += 2; 744 i = vpd[index]; 745 index += 1; 746 j = 0; 747 Length -= (3+i); 748 while(i--) { 749 phba->ProgramType[j++] = vpd[index++]; 750 if (j == 255) 751 break; 752 } 753 phba->ProgramType[j] = 0; 754 continue; 755 } 756 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) { 757 phba->vpd_flag |= VPD_PORT; 758 index += 2; 759 i = vpd[index]; 760 index += 1; 761 j = 0; 762 Length -= (3+i); 763 while(i--) { 764 phba->Port[j++] = vpd[index++]; 765 if (j == 19) 766 break; 767 } 768 phba->Port[j] = 0; 769 continue; 770 } 771 else { 772 index += 2; 773 i = vpd[index]; 774 index += 1; 775 index += i; 776 Length -= (3 + i); 777 } 778 } 779 finished = 0; 780 break; 781 case 0x78: 782 finished = 1; 783 break; 784 default: 785 index ++; 786 break; 787 } 788 } 789 790 return(1); 791} 792 793static void 794lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp) 795{ 796 lpfc_vpd_t *vp; 797 uint16_t dev_id = phba->pcidev->device; 798 uint16_t dev_subid = phba->pcidev->subsystem_device; 799 uint8_t hdrtype = phba->pcidev->hdr_type; 800 int max_speed; 801 char * ports = (hdrtype == 0x80) ? "2-port " : ""; 802 struct { 803 char * name; 804 int max_speed; 805 char * ports; 806 char * bus; 807 } m; 808 809 if (mdp && mdp[0] != '\0' 810 && descp && descp[0] != '\0') 811 return; 812 813 if (phba->lmt & LMT_10Gb) 814 max_speed = 10; 815 else if (phba->lmt & LMT_8Gb) 816 max_speed = 8; 817 else if (phba->lmt & LMT_4Gb) 818 max_speed = 4; 819 else if (phba->lmt & LMT_2Gb) 820 max_speed = 2; 821 else 822 max_speed = 1; 823 824 vp = &phba->vpd; 825 826 switch (dev_id) { 827 case PCI_DEVICE_ID_FIREFLY: 828 m = (typeof(m)){"LP6000", max_speed, "", "PCI"}; 829 break; 830 case PCI_DEVICE_ID_SUPERFLY: 831 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 832 m = (typeof(m)){"LP7000", max_speed, "", "PCI"}; 833 else 834 m = (typeof(m)){"LP7000E", max_speed, "", "PCI"}; 835 break; 836 case PCI_DEVICE_ID_DRAGONFLY: 837 m = (typeof(m)){"LP8000", max_speed, "", "PCI"}; 838 break; 839 case PCI_DEVICE_ID_CENTAUR: 840 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 841 m = (typeof(m)){"LP9002", max_speed, "", "PCI"}; 842 else 843 m = (typeof(m)){"LP9000", max_speed, "", "PCI"}; 844 break; 845 case PCI_DEVICE_ID_RFLY: 846 m = (typeof(m)){"LP952", max_speed, "", "PCI"}; 847 break; 848 case PCI_DEVICE_ID_PEGASUS: 849 m = (typeof(m)){"LP9802", max_speed, "", "PCI-X"}; 850 break; 851 case PCI_DEVICE_ID_THOR: 852 if (hdrtype == 0x80) 853 m = (typeof(m)){"LP10000DC", 854 max_speed, ports, "PCI-X"}; 855 else 856 m = (typeof(m)){"LP10000", 857 max_speed, ports, "PCI-X"}; 858 break; 859 case PCI_DEVICE_ID_VIPER: 860 m = (typeof(m)){"LPX1000", max_speed, "", "PCI-X"}; 861 break; 862 case PCI_DEVICE_ID_PFLY: 863 m = (typeof(m)){"LP982", max_speed, "", "PCI-X"}; 864 break; 865 case PCI_DEVICE_ID_TFLY: 866 if (hdrtype == 0x80) 867 m = (typeof(m)){"LP1050DC", max_speed, ports, "PCI-X"}; 868 else 869 m = (typeof(m)){"LP1050", max_speed, ports, "PCI-X"}; 870 break; 871 case PCI_DEVICE_ID_HELIOS: 872 if (hdrtype == 0x80) 873 m = (typeof(m)){"LP11002", max_speed, ports, "PCI-X2"}; 874 else 875 m = (typeof(m)){"LP11000", max_speed, ports, "PCI-X2"}; 876 break; 877 case PCI_DEVICE_ID_HELIOS_SCSP: 878 m = (typeof(m)){"LP11000-SP", max_speed, ports, "PCI-X2"}; 879 break; 880 case PCI_DEVICE_ID_HELIOS_DCSP: 881 m = (typeof(m)){"LP11002-SP", max_speed, ports, "PCI-X2"}; 882 break; 883 case PCI_DEVICE_ID_NEPTUNE: 884 if (hdrtype == 0x80) 885 m = (typeof(m)){"LPe1002", max_speed, ports, "PCIe"}; 886 else 887 m = (typeof(m)){"LPe1000", max_speed, ports, "PCIe"}; 888 break; 889 case PCI_DEVICE_ID_NEPTUNE_SCSP: 890 m = (typeof(m)){"LPe1000-SP", max_speed, ports, "PCIe"}; 891 break; 892 case PCI_DEVICE_ID_NEPTUNE_DCSP: 893 m = (typeof(m)){"LPe1002-SP", max_speed, ports, "PCIe"}; 894 break; 895 case PCI_DEVICE_ID_BMID: 896 m = (typeof(m)){"LP1150", max_speed, ports, "PCI-X2"}; 897 break; 898 case PCI_DEVICE_ID_BSMB: 899 m = (typeof(m)){"LP111", max_speed, ports, "PCI-X2"}; 900 break; 901 case PCI_DEVICE_ID_ZEPHYR: 902 if (hdrtype == 0x80) 903 m = (typeof(m)){"LPe11002", max_speed, ports, "PCIe"}; 904 else 905 m = (typeof(m)){"LPe11000", max_speed, ports, "PCIe"}; 906 break; 907 case PCI_DEVICE_ID_ZEPHYR_SCSP: 908 m = (typeof(m)){"LPe11000", max_speed, ports, "PCIe"}; 909 break; 910 case PCI_DEVICE_ID_ZEPHYR_DCSP: 911 m = (typeof(m)){"LPe11002-SP", max_speed, ports, "PCIe"}; 912 break; 913 case PCI_DEVICE_ID_ZMID: 914 m = (typeof(m)){"LPe1150", max_speed, ports, "PCIe"}; 915 break; 916 case PCI_DEVICE_ID_ZSMB: 917 m = (typeof(m)){"LPe111", max_speed, ports, "PCIe"}; 918 break; 919 case PCI_DEVICE_ID_LP101: 920 m = (typeof(m)){"LP101", max_speed, ports, "PCI-X"}; 921 break; 922 case PCI_DEVICE_ID_LP10000S: 923 m = (typeof(m)){"LP10000-S", max_speed, ports, "PCI"}; 924 break; 925 case PCI_DEVICE_ID_LP11000S: 926 case PCI_DEVICE_ID_LPE11000S: 927 switch (dev_subid) { 928 case PCI_SUBSYSTEM_ID_LP11000S: 929 m = (typeof(m)){"LP11000-S", max_speed, 930 ports, "PCI-X2"}; 931 break; 932 case PCI_SUBSYSTEM_ID_LP11002S: 933 m = (typeof(m)){"LP11002-S", max_speed, 934 ports, "PCI-X2"}; 935 break; 936 case PCI_SUBSYSTEM_ID_LPE11000S: 937 m = (typeof(m)){"LPe11000-S", max_speed, 938 ports, "PCIe"}; 939 break; 940 case PCI_SUBSYSTEM_ID_LPE11002S: 941 m = (typeof(m)){"LPe11002-S", max_speed, 942 ports, "PCIe"}; 943 break; 944 case PCI_SUBSYSTEM_ID_LPE11010S: 945 m = (typeof(m)){"LPe11010-S", max_speed, 946 "10-port ", "PCIe"}; 947 break; 948 default: 949 break; 950 } 951 break; 952 default: 953 break; 954 } 955 956 if (mdp && mdp[0] == '\0') 957 snprintf(mdp, 79,"%s", m.name); 958 if (descp && descp[0] == '\0') 959 snprintf(descp, 255, 960 "Emulex %s %dGb %s%s Fibre Channel Adapter", 961 m.name, m.max_speed, m.ports, m.bus); 962} 963 964/**************************************************/ 965/* lpfc_post_buffer */ 966/* */ 967/* This routine will post count buffers to the */ 968/* ring with the QUE_RING_BUF_CN command. This */ 969/* allows 3 buffers / command to be posted. */ 970/* Returns the number of buffers NOT posted. */ 971/**************************************************/ 972int 973lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt, 974 int type) 975{ 976 IOCB_t *icmd; 977 struct lpfc_iocbq *iocb; 978 struct lpfc_dmabuf *mp1, *mp2; 979 980 cnt += pring->missbufcnt; 981 982 /* While there are buffers to post */ 983 while (cnt > 0) { 984 /* Allocate buffer for command iocb */ 985 spin_lock_irq(phba->host->host_lock); 986 iocb = lpfc_sli_get_iocbq(phba); 987 spin_unlock_irq(phba->host->host_lock); 988 if (iocb == NULL) { 989 pring->missbufcnt = cnt; 990 return cnt; 991 } 992 icmd = &iocb->iocb; 993 994 /* 2 buffers can be posted per command */ 995 /* Allocate buffer to post */ 996 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 997 if (mp1) 998 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 999 &mp1->phys); 1000 if (mp1 == 0 || mp1->virt == 0) { 1001 kfree(mp1); 1002 spin_lock_irq(phba->host->host_lock); 1003 lpfc_sli_release_iocbq(phba, iocb); 1004 spin_unlock_irq(phba->host->host_lock); 1005 pring->missbufcnt = cnt; 1006 return cnt; 1007 } 1008 1009 INIT_LIST_HEAD(&mp1->list); 1010 /* Allocate buffer to post */ 1011 if (cnt > 1) { 1012 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 1013 if (mp2) 1014 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 1015 &mp2->phys); 1016 if (mp2 == 0 || mp2->virt == 0) { 1017 kfree(mp2); 1018 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 1019 kfree(mp1); 1020 spin_lock_irq(phba->host->host_lock); 1021 lpfc_sli_release_iocbq(phba, iocb); 1022 spin_unlock_irq(phba->host->host_lock); 1023 pring->missbufcnt = cnt; 1024 return cnt; 1025 } 1026 1027 INIT_LIST_HEAD(&mp2->list); 1028 } else { 1029 mp2 = NULL; 1030 } 1031 1032 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 1033 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 1034 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 1035 icmd->ulpBdeCount = 1; 1036 cnt--; 1037 if (mp2) { 1038 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 1039 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 1040 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 1041 cnt--; 1042 icmd->ulpBdeCount = 2; 1043 } 1044 1045 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 1046 icmd->ulpLe = 1; 1047 1048 spin_lock_irq(phba->host->host_lock); 1049 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) { 1050 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 1051 kfree(mp1); 1052 cnt++; 1053 if (mp2) { 1054 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 1055 kfree(mp2); 1056 cnt++; 1057 } 1058 lpfc_sli_release_iocbq(phba, iocb); 1059 pring->missbufcnt = cnt; 1060 spin_unlock_irq(phba->host->host_lock); 1061 return cnt; 1062 } 1063 spin_unlock_irq(phba->host->host_lock); 1064 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 1065 if (mp2) { 1066 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 1067 } 1068 } 1069 pring->missbufcnt = 0; 1070 return 0; 1071} 1072 1073/************************************************************************/ 1074/* */ 1075/* lpfc_post_rcv_buf */ 1076/* This routine post initial rcv buffers to the configured rings */ 1077/* */ 1078/************************************************************************/ 1079static int 1080lpfc_post_rcv_buf(struct lpfc_hba * phba) 1081{ 1082 struct lpfc_sli *psli = &phba->sli; 1083 1084 /* Ring 0, ELS / CT buffers */ 1085 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1); 1086 /* Ring 2 - FCP no buffers needed */ 1087 1088 return 0; 1089} 1090 1091#define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 1092 1093/************************************************************************/ 1094/* */ 1095/* lpfc_sha_init */ 1096/* */ 1097/************************************************************************/ 1098static void 1099lpfc_sha_init(uint32_t * HashResultPointer) 1100{ 1101 HashResultPointer[0] = 0x67452301; 1102 HashResultPointer[1] = 0xEFCDAB89; 1103 HashResultPointer[2] = 0x98BADCFE; 1104 HashResultPointer[3] = 0x10325476; 1105 HashResultPointer[4] = 0xC3D2E1F0; 1106} 1107 1108/************************************************************************/ 1109/* */ 1110/* lpfc_sha_iterate */ 1111/* */ 1112/************************************************************************/ 1113static void 1114lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 1115{ 1116 int t; 1117 uint32_t TEMP; 1118 uint32_t A, B, C, D, E; 1119 t = 16; 1120 do { 1121 HashWorkingPointer[t] = 1122 S(1, 1123 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 1124 8] ^ 1125 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 1126 } while (++t <= 79); 1127 t = 0; 1128 A = HashResultPointer[0]; 1129 B = HashResultPointer[1]; 1130 C = HashResultPointer[2]; 1131 D = HashResultPointer[3]; 1132 E = HashResultPointer[4]; 1133 1134 do { 1135 if (t < 20) { 1136 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 1137 } else if (t < 40) { 1138 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 1139 } else if (t < 60) { 1140 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 1141 } else { 1142 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 1143 } 1144 TEMP += S(5, A) + E + HashWorkingPointer[t]; 1145 E = D; 1146 D = C; 1147 C = S(30, B); 1148 B = A; 1149 A = TEMP; 1150 } while (++t <= 79); 1151 1152 HashResultPointer[0] += A; 1153 HashResultPointer[1] += B; 1154 HashResultPointer[2] += C; 1155 HashResultPointer[3] += D; 1156 HashResultPointer[4] += E; 1157 1158} 1159 1160/************************************************************************/ 1161/* */ 1162/* lpfc_challenge_key */ 1163/* */ 1164/************************************************************************/ 1165static void 1166lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 1167{ 1168 *HashWorking = (*RandomChallenge ^ *HashWorking); 1169} 1170 1171/************************************************************************/ 1172/* */ 1173/* lpfc_hba_init */ 1174/* */ 1175/************************************************************************/ 1176void 1177lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 1178{ 1179 int t; 1180 uint32_t *HashWorking; 1181 uint32_t *pwwnn = phba->wwnn; 1182 1183 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL); 1184 if (!HashWorking) 1185 return; 1186 1187 memset(HashWorking, 0, (80 * sizeof(uint32_t))); 1188 HashWorking[0] = HashWorking[78] = *pwwnn++; 1189 HashWorking[1] = HashWorking[79] = *pwwnn; 1190 1191 for (t = 0; t < 7; t++) 1192 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 1193 1194 lpfc_sha_init(hbainit); 1195 lpfc_sha_iterate(hbainit, HashWorking); 1196 kfree(HashWorking); 1197} 1198 1199static void 1200lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind) 1201{ 1202 struct lpfc_nodelist *ndlp, *next_ndlp; 1203 1204 /* clean up phba - lpfc specific */ 1205 lpfc_can_disctmo(phba); 1206 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list, 1207 nlp_listp) { 1208 lpfc_nlp_remove(phba, ndlp); 1209 } 1210 1211 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list, 1212 nlp_listp) { 1213 lpfc_nlp_remove(phba, ndlp); 1214 } 1215 1216 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list, 1217 nlp_listp) { 1218 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST); 1219 } 1220 1221 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list, 1222 nlp_listp) { 1223 lpfc_nlp_remove(phba, ndlp); 1224 } 1225 1226 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list, 1227 nlp_listp) { 1228 lpfc_nlp_remove(phba, ndlp); 1229 } 1230 1231 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list, 1232 nlp_listp) { 1233 lpfc_nlp_remove(phba, ndlp); 1234 } 1235 1236 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list, 1237 nlp_listp) { 1238 lpfc_nlp_remove(phba, ndlp); 1239 } 1240 1241 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list, 1242 nlp_listp) { 1243 lpfc_nlp_remove(phba, ndlp); 1244 } 1245 1246 INIT_LIST_HEAD(&phba->fc_nlpmap_list); 1247 INIT_LIST_HEAD(&phba->fc_nlpunmap_list); 1248 INIT_LIST_HEAD(&phba->fc_unused_list); 1249 INIT_LIST_HEAD(&phba->fc_plogi_list); 1250 INIT_LIST_HEAD(&phba->fc_adisc_list); 1251 INIT_LIST_HEAD(&phba->fc_reglogin_list); 1252 INIT_LIST_HEAD(&phba->fc_prli_list); 1253 INIT_LIST_HEAD(&phba->fc_npr_list); 1254 1255 phba->fc_map_cnt = 0; 1256 phba->fc_unmap_cnt = 0; 1257 phba->fc_plogi_cnt = 0; 1258 phba->fc_adisc_cnt = 0; 1259 phba->fc_reglogin_cnt = 0; 1260 phba->fc_prli_cnt = 0; 1261 phba->fc_npr_cnt = 0; 1262 phba->fc_unused_cnt= 0; 1263 return; 1264} 1265 1266static void 1267lpfc_establish_link_tmo(unsigned long ptr) 1268{ 1269 struct lpfc_hba *phba = (struct lpfc_hba *)ptr; 1270 unsigned long iflag; 1271 1272 1273 /* Re-establishing Link, timer expired */ 1274 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT, 1275 "%d:1300 Re-establishing Link, timer expired " 1276 "Data: x%x x%x\n", 1277 phba->brd_no, phba->fc_flag, phba->hba_state); 1278 spin_lock_irqsave(phba->host->host_lock, iflag); 1279 phba->fc_flag &= ~FC_ESTABLISH_LINK; 1280 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1281} 1282 1283static int 1284lpfc_stop_timer(struct lpfc_hba * phba) 1285{ 1286 struct lpfc_sli *psli = &phba->sli; 1287 1288 /* Instead of a timer, this has been converted to a 1289 * deferred procedding list. 1290 */ 1291 while (!list_empty(&phba->freebufList)) { 1292 1293 struct lpfc_dmabuf *mp = NULL; 1294 1295 list_remove_head((&phba->freebufList), mp, 1296 struct lpfc_dmabuf, list); 1297 if (mp) { 1298 lpfc_mbuf_free(phba, mp->virt, mp->phys); 1299 kfree(mp); 1300 } 1301 } 1302 1303 del_timer_sync(&phba->fcp_poll_timer); 1304 del_timer_sync(&phba->fc_estabtmo); 1305 del_timer_sync(&phba->fc_disctmo); 1306 del_timer_sync(&phba->fc_fdmitmo); 1307 del_timer_sync(&phba->els_tmofunc); 1308 psli = &phba->sli; 1309 del_timer_sync(&psli->mbox_tmo); 1310 return(1); 1311} 1312 1313int 1314lpfc_online(struct lpfc_hba * phba) 1315{ 1316 if (!phba) 1317 return 0; 1318 1319 if (!(phba->fc_flag & FC_OFFLINE_MODE)) 1320 return 0; 1321 1322 lpfc_printf_log(phba, 1323 KERN_WARNING, 1324 LOG_INIT, 1325 "%d:0458 Bring Adapter online\n", 1326 phba->brd_no); 1327 1328 if (!lpfc_sli_queue_setup(phba)) 1329 return 1; 1330 1331 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */ 1332 return 1; 1333 1334 spin_lock_irq(phba->host->host_lock); 1335 phba->fc_flag &= ~FC_OFFLINE_MODE; 1336 spin_unlock_irq(phba->host->host_lock); 1337 1338 return 0; 1339} 1340 1341int 1342lpfc_offline(struct lpfc_hba * phba) 1343{ 1344 struct lpfc_sli_ring *pring; 1345 struct lpfc_sli *psli; 1346 unsigned long iflag; 1347 int i = 0; 1348 1349 if (!phba) 1350 return 0; 1351 1352 if (phba->fc_flag & FC_OFFLINE_MODE) 1353 return 0; 1354 1355 psli = &phba->sli; 1356 pring = &psli->ring[psli->fcp_ring]; 1357 1358 lpfc_linkdown(phba); 1359 1360 /* The linkdown event takes 30 seconds to timeout. */ 1361 while (pring->txcmplq_cnt) { 1362 mdelay(10); 1363 if (i++ > 3000) 1364 break; 1365 } 1366 1367 /* stop all timers associated with this hba */ 1368 lpfc_stop_timer(phba); 1369 phba->work_hba_events = 0; 1370 1371 lpfc_printf_log(phba, 1372 KERN_WARNING, 1373 LOG_INIT, 1374 "%d:0460 Bring Adapter offline\n", 1375 phba->brd_no); 1376 1377 /* Bring down the SLI Layer and cleanup. The HBA is offline 1378 now. */ 1379 lpfc_sli_hba_down(phba); 1380 lpfc_cleanup(phba, 1); 1381 spin_lock_irqsave(phba->host->host_lock, iflag); 1382 phba->fc_flag |= FC_OFFLINE_MODE; 1383 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1384 return 0; 1385} 1386 1387/****************************************************************************** 1388* Function name: lpfc_scsi_free 1389* 1390* Description: Called from lpfc_pci_remove_one free internal driver resources 1391* 1392******************************************************************************/ 1393static int 1394lpfc_scsi_free(struct lpfc_hba * phba) 1395{ 1396 struct lpfc_scsi_buf *sb, *sb_next; 1397 struct lpfc_iocbq *io, *io_next; 1398 1399 spin_lock_irq(phba->host->host_lock); 1400 /* Release all the lpfc_scsi_bufs maintained by this host. */ 1401 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) { 1402 list_del(&sb->list); 1403 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data, 1404 sb->dma_handle); 1405 kfree(sb); 1406 phba->total_scsi_bufs--; 1407 } 1408 1409 /* Release all the lpfc_iocbq entries maintained by this host. */ 1410 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) { 1411 list_del(&io->list); 1412 kfree(io); 1413 phba->total_iocbq_bufs--; 1414 } 1415 1416 spin_unlock_irq(phba->host->host_lock); 1417 1418 return 0; 1419} 1420 1421 1422static int __devinit 1423lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 1424{ 1425 struct Scsi_Host *host; 1426 struct lpfc_hba *phba; 1427 struct lpfc_sli *psli; 1428 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 1429 unsigned long bar0map_len, bar2map_len; 1430 int error = -ENODEV, retval; 1431 int i; 1432 uint16_t iotag; 1433 1434 if (pci_enable_device(pdev)) 1435 goto out; 1436 if (pci_request_regions(pdev, LPFC_DRIVER_NAME)) 1437 goto out_disable_device; 1438 1439 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba)); 1440 if (!host) 1441 goto out_release_regions; 1442 1443 phba = (struct lpfc_hba*)host->hostdata; 1444 memset(phba, 0, sizeof (struct lpfc_hba)); 1445 phba->host = host; 1446 1447 phba->fc_flag |= FC_LOADING; 1448 phba->pcidev = pdev; 1449 1450 /* Assign an unused board number */ 1451 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL)) 1452 goto out_put_host; 1453 1454 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no); 1455 if (error) 1456 goto out_put_host; 1457 1458 host->unique_id = phba->brd_no; 1459 init_MUTEX(&phba->hba_can_block); 1460 INIT_LIST_HEAD(&phba->ctrspbuflist); 1461 INIT_LIST_HEAD(&phba->rnidrspbuflist); 1462 INIT_LIST_HEAD(&phba->freebufList); 1463 1464 /* Initialize timers used by driver */ 1465 init_timer(&phba->fc_estabtmo); 1466 phba->fc_estabtmo.function = lpfc_establish_link_tmo; 1467 phba->fc_estabtmo.data = (unsigned long)phba; 1468 init_timer(&phba->fc_disctmo); 1469 phba->fc_disctmo.function = lpfc_disc_timeout; 1470 phba->fc_disctmo.data = (unsigned long)phba; 1471 1472 init_timer(&phba->fc_fdmitmo); 1473 phba->fc_fdmitmo.function = lpfc_fdmi_tmo; 1474 phba->fc_fdmitmo.data = (unsigned long)phba; 1475 init_timer(&phba->els_tmofunc); 1476 phba->els_tmofunc.function = lpfc_els_timeout; 1477 phba->els_tmofunc.data = (unsigned long)phba; 1478 psli = &phba->sli; 1479 init_timer(&psli->mbox_tmo); 1480 psli->mbox_tmo.function = lpfc_mbox_timeout; 1481 psli->mbox_tmo.data = (unsigned long)phba; 1482 1483 init_timer(&phba->fcp_poll_timer); 1484 phba->fcp_poll_timer.function = lpfc_poll_timeout; 1485 phba->fcp_poll_timer.data = (unsigned long)phba; 1486 1487 /* 1488 * Get all the module params for configuring this host and then 1489 * establish the host parameters. 1490 */ 1491 lpfc_get_cfgparam(phba); 1492 1493 host->max_id = LPFC_MAX_TARGET; 1494 host->max_lun = phba->cfg_max_luns; 1495 host->this_id = -1; 1496 1497 /* Initialize all internally managed lists. */ 1498 INIT_LIST_HEAD(&phba->fc_nlpmap_list); 1499 INIT_LIST_HEAD(&phba->fc_nlpunmap_list); 1500 INIT_LIST_HEAD(&phba->fc_unused_list); 1501 INIT_LIST_HEAD(&phba->fc_plogi_list); 1502 INIT_LIST_HEAD(&phba->fc_adisc_list); 1503 INIT_LIST_HEAD(&phba->fc_reglogin_list); 1504 INIT_LIST_HEAD(&phba->fc_prli_list); 1505 INIT_LIST_HEAD(&phba->fc_npr_list); 1506 1507 1508 pci_set_master(pdev); 1509 retval = pci_set_mwi(pdev); 1510 if (retval) 1511 dev_printk(KERN_WARNING, &pdev->dev, 1512 "Warning: pci_set_mwi returned %d\n", retval); 1513 1514 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0) 1515 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0) 1516 goto out_idr_remove; 1517 1518 /* 1519 * Get the bus address of Bar0 and Bar2 and the number of bytes 1520 * required by each mapping. 1521 */ 1522 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0); 1523 bar0map_len = pci_resource_len(phba->pcidev, 0); 1524 1525 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2); 1526 bar2map_len = pci_resource_len(phba->pcidev, 2); 1527 1528 /* Map HBA SLIM to a kernel virtual address. */ 1529 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 1530 if (!phba->slim_memmap_p) { 1531 error = -ENODEV; 1532 dev_printk(KERN_ERR, &pdev->dev, 1533 "ioremap failed for SLIM memory.\n"); 1534 goto out_idr_remove; 1535 } 1536 1537 /* Map HBA Control Registers to a kernel virtual address. */ 1538 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 1539 if (!phba->ctrl_regs_memmap_p) { 1540 error = -ENODEV; 1541 dev_printk(KERN_ERR, &pdev->dev, 1542 "ioremap failed for HBA control registers.\n"); 1543 goto out_iounmap_slim; 1544 } 1545 1546 /* Allocate memory for SLI-2 structures */ 1547 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE, 1548 &phba->slim2p_mapping, GFP_KERNEL); 1549 if (!phba->slim2p) 1550 goto out_iounmap; 1551 1552 memset(phba->slim2p, 0, SLI2_SLIM_SIZE); 1553 1554 /* Initialize the SLI Layer to run with lpfc HBAs. */ 1555 lpfc_sli_setup(phba); 1556 lpfc_sli_queue_setup(phba); 1557 1558 error = lpfc_mem_alloc(phba); 1559 if (error) 1560 goto out_free_slim; 1561 1562 /* Initialize and populate the iocb list per host. */ 1563 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 1564 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) { 1565 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 1566 if (iocbq_entry == NULL) { 1567 printk(KERN_ERR "%s: only allocated %d iocbs of " 1568 "expected %d count. Unloading driver.\n", 1569 __FUNCTION__, i, LPFC_IOCB_LIST_CNT); 1570 error = -ENOMEM; 1571 goto out_free_iocbq; 1572 } 1573 1574 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq)); 1575 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 1576 if (iotag == 0) { 1577 kfree (iocbq_entry); 1578 printk(KERN_ERR "%s: failed to allocate IOTAG. " 1579 "Unloading driver.\n", 1580 __FUNCTION__); 1581 error = -ENOMEM; 1582 goto out_free_iocbq; 1583 } 1584 spin_lock_irq(phba->host->host_lock); 1585 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 1586 phba->total_iocbq_bufs++; 1587 spin_unlock_irq(phba->host->host_lock); 1588 } 1589 1590 /* Initialize HBA structure */ 1591 phba->fc_edtov = FF_DEF_EDTOV; 1592 phba->fc_ratov = FF_DEF_RATOV; 1593 phba->fc_altov = FF_DEF_ALTOV; 1594 phba->fc_arbtov = FF_DEF_ARBTOV; 1595 1596 INIT_LIST_HEAD(&phba->work_list); 1597 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT); 1598 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 1599 1600 /* Startup the kernel thread for this host adapter. */ 1601 phba->worker_thread = kthread_run(lpfc_do_work, phba, 1602 "lpfc_worker_%d", phba->brd_no); 1603 if (IS_ERR(phba->worker_thread)) { 1604 error = PTR_ERR(phba->worker_thread); 1605 goto out_free_iocbq; 1606 } 1607 1608 /* We can rely on a queue depth attribute only after SLI HBA setup */ 1609 host->can_queue = phba->cfg_hba_queue_depth - 10; 1610 1611 /* Tell the midlayer we support 16 byte commands */ 1612 host->max_cmd_len = 16; 1613 1614 /* Initialize the list of scsi buffers used by driver for scsi IO. */ 1615 spin_lock_init(&phba->scsi_buf_list_lock); 1616 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list); 1617 1618 host->transportt = lpfc_transport_template; 1619 pci_set_drvdata(pdev, host); 1620 error = scsi_add_host(host, &pdev->dev); 1621 if (error) 1622 goto out_kthread_stop; 1623 1624 error = lpfc_alloc_sysfs_attr(phba); 1625 if (error) 1626 goto out_kthread_stop; 1627 1628 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ, 1629 LPFC_DRIVER_NAME, phba); 1630 if (error) { 1631 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1632 "%d:0451 Enable interrupt handler failed\n", 1633 phba->brd_no); 1634 goto out_free_sysfs_attr; 1635 } 1636 phba->MBslimaddr = phba->slim_memmap_p; 1637 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 1638 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 1639 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 1640 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 1641 1642 error = lpfc_sli_hba_setup(phba); 1643 if (error) 1644 goto out_free_irq; 1645 1646 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 1647 spin_lock_irq(phba->host->host_lock); 1648 lpfc_poll_start_timer(phba); 1649 spin_unlock_irq(phba->host->host_lock); 1650 } 1651 1652 /* 1653 * set fixed host attributes 1654 * Must done after lpfc_sli_hba_setup() 1655 */ 1656 1657 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn); 1658 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn); 1659 fc_host_supported_classes(host) = FC_COS_CLASS3; 1660 1661 memset(fc_host_supported_fc4s(host), 0, 1662 sizeof(fc_host_supported_fc4s(host))); 1663 fc_host_supported_fc4s(host)[2] = 1; 1664 fc_host_supported_fc4s(host)[7] = 1; 1665 1666 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host)); 1667 1668 fc_host_supported_speeds(host) = 0; 1669 if (phba->lmt & LMT_10Gb) 1670 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT; 1671 if (phba->lmt & LMT_4Gb) 1672 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT; 1673 if (phba->lmt & LMT_2Gb) 1674 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT; 1675 if (phba->lmt & LMT_1Gb) 1676 fc_host_supported_speeds(host) |= FC_PORTSPEED_1GBIT; 1677 1678 fc_host_maxframe_size(host) = 1679 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 1680 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb); 1681 1682 /* This value is also unchanging */ 1683 memset(fc_host_active_fc4s(host), 0, 1684 sizeof(fc_host_active_fc4s(host))); 1685 fc_host_active_fc4s(host)[2] = 1; 1686 fc_host_active_fc4s(host)[7] = 1; 1687 1688 spin_lock_irq(phba->host->host_lock); 1689 phba->fc_flag &= ~FC_LOADING; 1690 spin_unlock_irq(phba->host->host_lock); 1691 return 0; 1692 1693out_free_irq: 1694 lpfc_stop_timer(phba); 1695 phba->work_hba_events = 0; 1696 free_irq(phba->pcidev->irq, phba); 1697out_free_sysfs_attr: 1698 lpfc_free_sysfs_attr(phba); 1699out_kthread_stop: 1700 kthread_stop(phba->worker_thread); 1701out_free_iocbq: 1702 list_for_each_entry_safe(iocbq_entry, iocbq_next, 1703 &phba->lpfc_iocb_list, list) { 1704 spin_lock_irq(phba->host->host_lock); 1705 kfree(iocbq_entry); 1706 phba->total_iocbq_bufs--; 1707 spin_unlock_irq(phba->host->host_lock); 1708 } 1709 lpfc_mem_free(phba); 1710out_free_slim: 1711 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p, 1712 phba->slim2p_mapping); 1713out_iounmap: 1714 iounmap(phba->ctrl_regs_memmap_p); 1715out_iounmap_slim: 1716 iounmap(phba->slim_memmap_p); 1717out_idr_remove: 1718 idr_remove(&lpfc_hba_index, phba->brd_no); 1719out_put_host: 1720 scsi_host_put(host); 1721out_release_regions: 1722 pci_release_regions(pdev); 1723out_disable_device: 1724 pci_disable_device(pdev); 1725out: 1726 return error; 1727} 1728 1729static void __devexit 1730lpfc_pci_remove_one(struct pci_dev *pdev) 1731{ 1732 struct Scsi_Host *host = pci_get_drvdata(pdev); 1733 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata; 1734 unsigned long iflag; 1735 1736 lpfc_free_sysfs_attr(phba); 1737 1738 spin_lock_irqsave(phba->host->host_lock, iflag); 1739 phba->fc_flag |= FC_UNLOADING; 1740 1741 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1742 1743 fc_remove_host(phba->host); 1744 scsi_remove_host(phba->host); 1745 1746 kthread_stop(phba->worker_thread); 1747 1748 /* 1749 * Bring down the SLI Layer. This step disable all interrupts, 1750 * clears the rings, discards all mailbox commands, and resets 1751 * the HBA. 1752 */ 1753 lpfc_sli_hba_down(phba); 1754 lpfc_sli_brdrestart(phba); 1755 1756 /* Release the irq reservation */ 1757 free_irq(phba->pcidev->irq, phba); 1758 1759 lpfc_cleanup(phba, 0); 1760 lpfc_stop_timer(phba); 1761 phba->work_hba_events = 0; 1762 1763 /* 1764 * Call scsi_free before mem_free since scsi bufs are released to their 1765 * corresponding pools here. 1766 */ 1767 lpfc_scsi_free(phba); 1768 lpfc_mem_free(phba); 1769 1770 /* Free resources associated with SLI2 interface */ 1771 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 1772 phba->slim2p, phba->slim2p_mapping); 1773 1774 /* unmap adapter SLIM and Control Registers */ 1775 iounmap(phba->ctrl_regs_memmap_p); 1776 iounmap(phba->slim_memmap_p); 1777 1778 pci_release_regions(phba->pcidev); 1779 pci_disable_device(phba->pcidev); 1780 1781 idr_remove(&lpfc_hba_index, phba->brd_no); 1782 scsi_host_put(phba->host); 1783 1784 pci_set_drvdata(pdev, NULL); 1785} 1786 1787static struct pci_device_id lpfc_id_table[] = { 1788 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER, 1789 PCI_ANY_ID, PCI_ANY_ID, }, 1790 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY, 1791 PCI_ANY_ID, PCI_ANY_ID, }, 1792 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR, 1793 PCI_ANY_ID, PCI_ANY_ID, }, 1794 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS, 1795 PCI_ANY_ID, PCI_ANY_ID, }, 1796 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR, 1797 PCI_ANY_ID, PCI_ANY_ID, }, 1798 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY, 1799 PCI_ANY_ID, PCI_ANY_ID, }, 1800 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY, 1801 PCI_ANY_ID, PCI_ANY_ID, }, 1802 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY, 1803 PCI_ANY_ID, PCI_ANY_ID, }, 1804 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY, 1805 PCI_ANY_ID, PCI_ANY_ID, }, 1806 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE, 1807 PCI_ANY_ID, PCI_ANY_ID, }, 1808 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP, 1809 PCI_ANY_ID, PCI_ANY_ID, }, 1810 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP, 1811 PCI_ANY_ID, PCI_ANY_ID, }, 1812 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS, 1813 PCI_ANY_ID, PCI_ANY_ID, }, 1814 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP, 1815 PCI_ANY_ID, PCI_ANY_ID, }, 1816 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP, 1817 PCI_ANY_ID, PCI_ANY_ID, }, 1818 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID, 1819 PCI_ANY_ID, PCI_ANY_ID, }, 1820 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB, 1821 PCI_ANY_ID, PCI_ANY_ID, }, 1822 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR, 1823 PCI_ANY_ID, PCI_ANY_ID, }, 1824 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP, 1825 PCI_ANY_ID, PCI_ANY_ID, }, 1826 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP, 1827 PCI_ANY_ID, PCI_ANY_ID, }, 1828 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID, 1829 PCI_ANY_ID, PCI_ANY_ID, }, 1830 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB, 1831 PCI_ANY_ID, PCI_ANY_ID, }, 1832 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY, 1833 PCI_ANY_ID, PCI_ANY_ID, }, 1834 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101, 1835 PCI_ANY_ID, PCI_ANY_ID, }, 1836 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S, 1837 PCI_ANY_ID, PCI_ANY_ID, }, 1838 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S, 1839 PCI_ANY_ID, PCI_ANY_ID, }, 1840 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S, 1841 PCI_ANY_ID, PCI_ANY_ID, }, 1842 { 0 } 1843}; 1844 1845MODULE_DEVICE_TABLE(pci, lpfc_id_table); 1846 1847static struct pci_driver lpfc_driver = { 1848 .name = LPFC_DRIVER_NAME, 1849 .id_table = lpfc_id_table, 1850 .probe = lpfc_pci_probe_one, 1851 .remove = __devexit_p(lpfc_pci_remove_one), 1852}; 1853 1854static int __init 1855lpfc_init(void) 1856{ 1857 int error = 0; 1858 1859 printk(LPFC_MODULE_DESC "\n"); 1860 printk(LPFC_COPYRIGHT "\n"); 1861 1862 lpfc_transport_template = 1863 fc_attach_transport(&lpfc_transport_functions); 1864 if (!lpfc_transport_template) 1865 return -ENOMEM; 1866 error = pci_register_driver(&lpfc_driver); 1867 if (error) 1868 fc_release_transport(lpfc_transport_template); 1869 1870 return error; 1871} 1872 1873static void __exit 1874lpfc_exit(void) 1875{ 1876 pci_unregister_driver(&lpfc_driver); 1877 fc_release_transport(lpfc_transport_template); 1878} 1879 1880module_init(lpfc_init); 1881module_exit(lpfc_exit); 1882MODULE_LICENSE("GPL"); 1883MODULE_DESCRIPTION(LPFC_MODULE_DESC); 1884MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com"); 1885MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 1886