lpfc_init.c revision 7f0b5b1913ba20ae035adbaeca176e78a53fa7a8
1/******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2004-2005 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 8 * * 9 * This program is free software; you can redistribute it and/or * 10 * modify it under the terms of version 2 of the GNU General * 11 * Public License as published by the Free Software Foundation. * 12 * This program is distributed in the hope that it will be useful. * 13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 17 * TO BE LEGALLY INVALID. See the GNU General Public License for * 18 * more details, a copy of which can be found in the file COPYING * 19 * included with this package. * 20 *******************************************************************/ 21 22#include <linux/blkdev.h> 23#include <linux/delay.h> 24#include <linux/dma-mapping.h> 25#include <linux/idr.h> 26#include <linux/interrupt.h> 27#include <linux/kthread.h> 28#include <linux/pci.h> 29#include <linux/spinlock.h> 30 31#include <scsi/scsi.h> 32#include <scsi/scsi_device.h> 33#include <scsi/scsi_host.h> 34#include <scsi/scsi_transport_fc.h> 35 36#include "lpfc_hw.h" 37#include "lpfc_sli.h" 38#include "lpfc_disc.h" 39#include "lpfc_scsi.h" 40#include "lpfc.h" 41#include "lpfc_logmsg.h" 42#include "lpfc_crtn.h" 43#include "lpfc_version.h" 44 45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *); 46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 47static int lpfc_post_rcv_buf(struct lpfc_hba *); 48 49static struct scsi_transport_template *lpfc_transport_template = NULL; 50static DEFINE_IDR(lpfc_hba_index); 51 52/************************************************************************/ 53/* */ 54/* lpfc_config_port_prep */ 55/* This routine will do LPFC initialization prior to the */ 56/* CONFIG_PORT mailbox command. This will be initialized */ 57/* as a SLI layer callback routine. */ 58/* This routine returns 0 on success or -ERESTART if it wants */ 59/* the SLI layer to reset the HBA and try again. Any */ 60/* other return value indicates an error. */ 61/* */ 62/************************************************************************/ 63int 64lpfc_config_port_prep(struct lpfc_hba * phba) 65{ 66 lpfc_vpd_t *vp = &phba->vpd; 67 int i = 0, rc; 68 LPFC_MBOXQ_t *pmb; 69 MAILBOX_t *mb; 70 char *lpfc_vpd_data = NULL; 71 uint16_t offset = 0; 72 static char licensed[56] = 73 "key unlock for use with gnu public licensed code only\0"; 74 75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 76 if (!pmb) { 77 phba->hba_state = LPFC_HBA_ERROR; 78 return -ENOMEM; 79 } 80 81 mb = &pmb->mb; 82 phba->hba_state = LPFC_INIT_MBX_CMDS; 83 84 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 85 uint32_t *ptext = (uint32_t *) licensed; 86 87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 88 *ptext = cpu_to_be32(*ptext); 89 90 lpfc_read_nv(phba, pmb); 91 memset((char*)mb->un.varRDnvp.rsvd3, 0, 92 sizeof (mb->un.varRDnvp.rsvd3)); 93 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 94 sizeof (licensed)); 95 96 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 97 98 if (rc != MBX_SUCCESS) { 99 lpfc_printf_log(phba, 100 KERN_ERR, 101 LOG_MBOX, 102 "%d:0324 Config Port initialization " 103 "error, mbxCmd x%x READ_NVPARM, " 104 "mbxStatus x%x\n", 105 phba->brd_no, 106 mb->mbxCommand, mb->mbxStatus); 107 mempool_free(pmb, phba->mbox_mem_pool); 108 return -ERESTART; 109 } 110 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 111 sizeof (mb->un.varRDnvp.nodename)); 112 } 113 114 /* Setup and issue mailbox READ REV command */ 115 lpfc_read_rev(phba, pmb); 116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 117 if (rc != MBX_SUCCESS) { 118 lpfc_printf_log(phba, 119 KERN_ERR, 120 LOG_INIT, 121 "%d:0439 Adapter failed to init, mbxCmd x%x " 122 "READ_REV, mbxStatus x%x\n", 123 phba->brd_no, 124 mb->mbxCommand, mb->mbxStatus); 125 mempool_free( pmb, phba->mbox_mem_pool); 126 return -ERESTART; 127 } 128 129 /* 130 * The value of rr must be 1 since the driver set the cv field to 1. 131 * This setting requires the FW to set all revision fields. 132 */ 133 if (mb->un.varRdRev.rr == 0) { 134 vp->rev.rBit = 0; 135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 136 "%d:0440 Adapter failed to init, READ_REV has " 137 "missing revision information.\n", 138 phba->brd_no); 139 mempool_free(pmb, phba->mbox_mem_pool); 140 return -ERESTART; 141 } 142 143 /* Save information as VPD data */ 144 vp->rev.rBit = 1; 145 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 146 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 147 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 148 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 149 vp->rev.biuRev = mb->un.varRdRev.biuRev; 150 vp->rev.smRev = mb->un.varRdRev.smRev; 151 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 152 vp->rev.endecRev = mb->un.varRdRev.endecRev; 153 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 154 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 155 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 156 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 157 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 158 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 159 160 if (lpfc_is_LC_HBA(phba->pcidev->device)) 161 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 162 sizeof (phba->RandomData)); 163 164 /* Get the default values for Model Name and Description */ 165 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 166 167 /* Get adapter VPD information */ 168 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL); 169 if (!pmb->context2) 170 goto out_free_mbox; 171 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 172 if (!lpfc_vpd_data) 173 goto out_free_context2; 174 175 do { 176 lpfc_dump_mem(phba, pmb, offset); 177 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 178 179 if (rc != MBX_SUCCESS) { 180 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 181 "%d:0441 VPD not present on adapter, " 182 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 183 phba->brd_no, 184 mb->mbxCommand, mb->mbxStatus); 185 kfree(lpfc_vpd_data); 186 lpfc_vpd_data = NULL; 187 break; 188 } 189 190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset, 191 mb->un.varDmp.word_cnt); 192 offset += mb->un.varDmp.word_cnt; 193 } while (mb->un.varDmp.word_cnt); 194 lpfc_parse_vpd(phba, lpfc_vpd_data); 195 196 kfree(lpfc_vpd_data); 197out_free_context2: 198 kfree(pmb->context2); 199out_free_mbox: 200 mempool_free(pmb, phba->mbox_mem_pool); 201 return 0; 202} 203 204/************************************************************************/ 205/* */ 206/* lpfc_config_port_post */ 207/* This routine will do LPFC initialization after the */ 208/* CONFIG_PORT mailbox command. This will be initialized */ 209/* as a SLI layer callback routine. */ 210/* This routine returns 0 on success. Any other return value */ 211/* indicates an error. */ 212/* */ 213/************************************************************************/ 214int 215lpfc_config_port_post(struct lpfc_hba * phba) 216{ 217 LPFC_MBOXQ_t *pmb; 218 MAILBOX_t *mb; 219 struct lpfc_dmabuf *mp; 220 struct lpfc_sli *psli = &phba->sli; 221 uint32_t status, timeout; 222 int i, j, rc; 223 224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 225 if (!pmb) { 226 phba->hba_state = LPFC_HBA_ERROR; 227 return -ENOMEM; 228 } 229 mb = &pmb->mb; 230 231 lpfc_config_link(phba, pmb); 232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 233 if (rc != MBX_SUCCESS) { 234 lpfc_printf_log(phba, 235 KERN_ERR, 236 LOG_INIT, 237 "%d:0447 Adapter failed init, mbxCmd x%x " 238 "CONFIG_LINK mbxStatus x%x\n", 239 phba->brd_no, 240 mb->mbxCommand, mb->mbxStatus); 241 phba->hba_state = LPFC_HBA_ERROR; 242 mempool_free( pmb, phba->mbox_mem_pool); 243 return -EIO; 244 } 245 246 /* Get login parameters for NID. */ 247 lpfc_read_sparam(phba, pmb); 248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 249 lpfc_printf_log(phba, 250 KERN_ERR, 251 LOG_INIT, 252 "%d:0448 Adapter failed init, mbxCmd x%x " 253 "READ_SPARM mbxStatus x%x\n", 254 phba->brd_no, 255 mb->mbxCommand, mb->mbxStatus); 256 phba->hba_state = LPFC_HBA_ERROR; 257 mp = (struct lpfc_dmabuf *) pmb->context1; 258 mempool_free( pmb, phba->mbox_mem_pool); 259 lpfc_mbuf_free(phba, mp->virt, mp->phys); 260 kfree(mp); 261 return -EIO; 262 } 263 264 mp = (struct lpfc_dmabuf *) pmb->context1; 265 266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm)); 267 lpfc_mbuf_free(phba, mp->virt, mp->phys); 268 kfree(mp); 269 pmb->context1 = NULL; 270 271 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName, 272 sizeof (struct lpfc_name)); 273 memcpy(&phba->fc_portname, &phba->fc_sparam.portName, 274 sizeof (struct lpfc_name)); 275 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 276 /* This should be consolidated into parse_vpd ? - mr */ 277 if (phba->SerialNumber[0] == 0) { 278 uint8_t *outptr; 279 280 outptr = &phba->fc_nodename.u.s.IEEE[0]; 281 for (i = 0; i < 12; i++) { 282 status = *outptr++; 283 j = ((status & 0xf0) >> 4); 284 if (j <= 9) 285 phba->SerialNumber[i] = 286 (char)((uint8_t) 0x30 + (uint8_t) j); 287 else 288 phba->SerialNumber[i] = 289 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 290 i++; 291 j = (status & 0xf); 292 if (j <= 9) 293 phba->SerialNumber[i] = 294 (char)((uint8_t) 0x30 + (uint8_t) j); 295 else 296 phba->SerialNumber[i] = 297 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 298 } 299 } 300 301 /* This should turn on DELAYED ABTS for ELS timeouts */ 302 lpfc_set_slim(phba, pmb, 0x052198, 0x1); 303 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 304 phba->hba_state = LPFC_HBA_ERROR; 305 mempool_free( pmb, phba->mbox_mem_pool); 306 return -EIO; 307 } 308 309 310 lpfc_read_config(phba, pmb); 311 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 312 lpfc_printf_log(phba, 313 KERN_ERR, 314 LOG_INIT, 315 "%d:0453 Adapter failed to init, mbxCmd x%x " 316 "READ_CONFIG, mbxStatus x%x\n", 317 phba->brd_no, 318 mb->mbxCommand, mb->mbxStatus); 319 phba->hba_state = LPFC_HBA_ERROR; 320 mempool_free( pmb, phba->mbox_mem_pool); 321 return -EIO; 322 } 323 324 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 325 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1)) 326 phba->cfg_hba_queue_depth = 327 mb->un.varRdConfig.max_xri + 1; 328 329 phba->lmt = mb->un.varRdConfig.lmt; 330 /* HBA is not 4GB capable, or HBA is not 2GB capable, 331 don't let link speed ask for it */ 332 if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) && 333 (phba->cfg_link_speed > LINK_SPEED_2G)) || 334 (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) && 335 (phba->cfg_link_speed > LINK_SPEED_1G))) { 336 /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */ 337 lpfc_printf_log(phba, 338 KERN_WARNING, 339 LOG_LINK_EVENT, 340 "%d:1302 Invalid speed for this board: " 341 "Reset link speed to auto: x%x\n", 342 phba->brd_no, 343 phba->cfg_link_speed); 344 phba->cfg_link_speed = LINK_SPEED_AUTO; 345 } 346 347 phba->hba_state = LPFC_LINK_DOWN; 348 349 /* Only process IOCBs on ring 0 till hba_state is READY */ 350 if (psli->ring[psli->ip_ring].cmdringaddr) 351 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT; 352 if (psli->ring[psli->fcp_ring].cmdringaddr) 353 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT; 354 if (psli->ring[psli->next_ring].cmdringaddr) 355 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT; 356 357 /* Post receive buffers for desired rings */ 358 lpfc_post_rcv_buf(phba); 359 360 /* Enable appropriate host interrupts */ 361 spin_lock_irq(phba->host->host_lock); 362 status = readl(phba->HCregaddr); 363 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 364 if (psli->num_rings > 0) 365 status |= HC_R0INT_ENA; 366 if (psli->num_rings > 1) 367 status |= HC_R1INT_ENA; 368 if (psli->num_rings > 2) 369 status |= HC_R2INT_ENA; 370 if (psli->num_rings > 3) 371 status |= HC_R3INT_ENA; 372 373 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && 374 (phba->cfg_poll & DISABLE_FCP_RING_INT)) 375 status &= ~(HC_R0INT_ENA << LPFC_FCP_RING); 376 377 writel(status, phba->HCregaddr); 378 readl(phba->HCregaddr); /* flush */ 379 spin_unlock_irq(phba->host->host_lock); 380 381 /* 382 * Setup the ring 0 (els) timeout handler 383 */ 384 timeout = phba->fc_ratov << 1; 385 phba->els_tmofunc.expires = jiffies + HZ * timeout; 386 add_timer(&phba->els_tmofunc); 387 388 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed); 389 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 390 if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) { 391 lpfc_printf_log(phba, 392 KERN_ERR, 393 LOG_INIT, 394 "%d:0454 Adapter failed to init, mbxCmd x%x " 395 "INIT_LINK, mbxStatus x%x\n", 396 phba->brd_no, 397 mb->mbxCommand, mb->mbxStatus); 398 399 /* Clear all interrupt enable conditions */ 400 writel(0, phba->HCregaddr); 401 readl(phba->HCregaddr); /* flush */ 402 /* Clear all pending interrupts */ 403 writel(0xffffffff, phba->HAregaddr); 404 readl(phba->HAregaddr); /* flush */ 405 406 phba->hba_state = LPFC_HBA_ERROR; 407 mempool_free(pmb, phba->mbox_mem_pool); 408 return -EIO; 409 } 410 /* MBOX buffer will be freed in mbox compl */ 411 412 i = 0; 413 while ((phba->hba_state != LPFC_HBA_READY) || 414 (phba->num_disc_nodes) || (phba->fc_prli_sent) || 415 ((phba->fc_map_cnt == 0) && (i<2)) || 416 (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) { 417 /* Check every second for 30 retries. */ 418 i++; 419 if (i > 30) { 420 break; 421 } 422 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) { 423 /* The link is down. Set linkdown timeout */ 424 break; 425 } 426 427 /* Delay for 1 second to give discovery time to complete. */ 428 msleep(1000); 429 430 } 431 432 /* Since num_disc_nodes keys off of PLOGI, delay a bit to let 433 * any potential PRLIs to flush thru the SLI sub-system. 434 */ 435 msleep(50); 436 437 return (0); 438} 439 440/************************************************************************/ 441/* */ 442/* lpfc_hba_down_prep */ 443/* This routine will do LPFC uninitialization before the */ 444/* HBA is reset when bringing down the SLI Layer. This will be */ 445/* initialized as a SLI layer callback routine. */ 446/* This routine returns 0 on success. Any other return value */ 447/* indicates an error. */ 448/* */ 449/************************************************************************/ 450int 451lpfc_hba_down_prep(struct lpfc_hba * phba) 452{ 453 /* Disable interrupts */ 454 writel(0, phba->HCregaddr); 455 readl(phba->HCregaddr); /* flush */ 456 457 /* Cleanup potential discovery resources */ 458 lpfc_els_flush_rscn(phba); 459 lpfc_els_flush_cmd(phba); 460 lpfc_disc_flush_list(phba); 461 462 return (0); 463} 464 465/************************************************************************/ 466/* */ 467/* lpfc_handle_eratt */ 468/* This routine will handle processing a Host Attention */ 469/* Error Status event. This will be initialized */ 470/* as a SLI layer callback routine. */ 471/* */ 472/************************************************************************/ 473void 474lpfc_handle_eratt(struct lpfc_hba * phba) 475{ 476 struct lpfc_sli *psli = &phba->sli; 477 struct lpfc_sli_ring *pring; 478 479 /* 480 * If a reset is sent to the HBA restore PCI configuration registers. 481 */ 482 if ( phba->hba_state == LPFC_INIT_START ) { 483 mdelay(1); 484 readl(phba->HCregaddr); /* flush */ 485 writel(0, phba->HCregaddr); 486 readl(phba->HCregaddr); /* flush */ 487 488 /* Restore PCI cmd register */ 489 pci_write_config_word(phba->pcidev, 490 PCI_COMMAND, phba->pci_cfg_value); 491 } 492 493 if (phba->work_hs & HS_FFER6) { 494 /* Re-establishing Link */ 495 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 496 "%d:1301 Re-establishing Link " 497 "Data: x%x x%x x%x\n", 498 phba->brd_no, phba->work_hs, 499 phba->work_status[0], phba->work_status[1]); 500 spin_lock_irq(phba->host->host_lock); 501 phba->fc_flag |= FC_ESTABLISH_LINK; 502 spin_unlock_irq(phba->host->host_lock); 503 504 /* 505 * Firmware stops when it triggled erratt with HS_FFER6. 506 * That could cause the I/Os dropped by the firmware. 507 * Error iocb (I/O) on txcmplq and let the SCSI layer 508 * retry it after re-establishing link. 509 */ 510 pring = &psli->ring[psli->fcp_ring]; 511 lpfc_sli_abort_iocb_ring(phba, pring); 512 513 514 /* 515 * There was a firmware error. Take the hba offline and then 516 * attempt to restart it. 517 */ 518 lpfc_offline(phba); 519 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 520 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60); 521 return; 522 } 523 } else { 524 /* The if clause above forces this code path when the status 525 * failure is a value other than FFER6. Do not call the offline 526 * twice. This is the adapter hardware error path. 527 */ 528 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 529 "%d:0457 Adapter Hardware Error " 530 "Data: x%x x%x x%x\n", 531 phba->brd_no, phba->work_hs, 532 phba->work_status[0], phba->work_status[1]); 533 534 lpfc_offline(phba); 535 536 } 537} 538 539/************************************************************************/ 540/* */ 541/* lpfc_handle_latt */ 542/* This routine will handle processing a Host Attention */ 543/* Link Status event. This will be initialized */ 544/* as a SLI layer callback routine. */ 545/* */ 546/************************************************************************/ 547void 548lpfc_handle_latt(struct lpfc_hba * phba) 549{ 550 struct lpfc_sli *psli = &phba->sli; 551 LPFC_MBOXQ_t *pmb; 552 volatile uint32_t control; 553 struct lpfc_dmabuf *mp; 554 int rc = -ENOMEM; 555 556 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 557 if (!pmb) 558 goto lpfc_handle_latt_err_exit; 559 560 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 561 if (!mp) 562 goto lpfc_handle_latt_free_pmb; 563 564 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); 565 if (!mp->virt) 566 goto lpfc_handle_latt_free_mp; 567 568 rc = -EIO; 569 570 /* Cleanup any outstanding ELS commands */ 571 lpfc_els_flush_cmd(phba); 572 573 psli->slistat.link_event++; 574 lpfc_read_la(phba, pmb, mp); 575 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la; 576 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB)); 577 if (rc == MBX_NOT_FINISHED) 578 goto lpfc_handle_latt_free_mp; 579 580 /* Clear Link Attention in HA REG */ 581 spin_lock_irq(phba->host->host_lock); 582 writel(HA_LATT, phba->HAregaddr); 583 readl(phba->HAregaddr); /* flush */ 584 spin_unlock_irq(phba->host->host_lock); 585 586 return; 587 588lpfc_handle_latt_free_mp: 589 kfree(mp); 590lpfc_handle_latt_free_pmb: 591 kfree(pmb); 592lpfc_handle_latt_err_exit: 593 /* Enable Link attention interrupts */ 594 spin_lock_irq(phba->host->host_lock); 595 psli->sli_flag |= LPFC_PROCESS_LA; 596 control = readl(phba->HCregaddr); 597 control |= HC_LAINT_ENA; 598 writel(control, phba->HCregaddr); 599 readl(phba->HCregaddr); /* flush */ 600 601 /* Clear Link Attention in HA REG */ 602 writel(HA_LATT, phba->HAregaddr); 603 readl(phba->HAregaddr); /* flush */ 604 spin_unlock_irq(phba->host->host_lock); 605 lpfc_linkdown(phba); 606 phba->hba_state = LPFC_HBA_ERROR; 607 608 /* The other case is an error from issue_mbox */ 609 if (rc == -ENOMEM) 610 lpfc_printf_log(phba, 611 KERN_WARNING, 612 LOG_MBOX, 613 "%d:0300 READ_LA: no buffers\n", 614 phba->brd_no); 615 616 return; 617} 618 619/************************************************************************/ 620/* */ 621/* lpfc_parse_vpd */ 622/* This routine will parse the VPD data */ 623/* */ 624/************************************************************************/ 625static int 626lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd) 627{ 628 uint8_t lenlo, lenhi; 629 uint32_t Length; 630 int i, j; 631 int finished = 0; 632 int index = 0; 633 634 if (!vpd) 635 return 0; 636 637 /* Vital Product */ 638 lpfc_printf_log(phba, 639 KERN_INFO, 640 LOG_INIT, 641 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n", 642 phba->brd_no, 643 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 644 (uint32_t) vpd[3]); 645 do { 646 switch (vpd[index]) { 647 case 0x82: 648 index += 1; 649 lenlo = vpd[index]; 650 index += 1; 651 lenhi = vpd[index]; 652 index += 1; 653 i = ((((unsigned short)lenhi) << 8) + lenlo); 654 index += i; 655 break; 656 case 0x90: 657 index += 1; 658 lenlo = vpd[index]; 659 index += 1; 660 lenhi = vpd[index]; 661 index += 1; 662 Length = ((((unsigned short)lenhi) << 8) + lenlo); 663 664 while (Length > 0) { 665 /* Look for Serial Number */ 666 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) { 667 index += 2; 668 i = vpd[index]; 669 index += 1; 670 j = 0; 671 Length -= (3+i); 672 while(i--) { 673 phba->SerialNumber[j++] = vpd[index++]; 674 if (j == 31) 675 break; 676 } 677 phba->SerialNumber[j] = 0; 678 continue; 679 } 680 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) { 681 phba->vpd_flag |= VPD_MODEL_DESC; 682 index += 2; 683 i = vpd[index]; 684 index += 1; 685 j = 0; 686 Length -= (3+i); 687 while(i--) { 688 phba->ModelDesc[j++] = vpd[index++]; 689 if (j == 255) 690 break; 691 } 692 phba->ModelDesc[j] = 0; 693 continue; 694 } 695 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) { 696 phba->vpd_flag |= VPD_MODEL_NAME; 697 index += 2; 698 i = vpd[index]; 699 index += 1; 700 j = 0; 701 Length -= (3+i); 702 while(i--) { 703 phba->ModelName[j++] = vpd[index++]; 704 if (j == 79) 705 break; 706 } 707 phba->ModelName[j] = 0; 708 continue; 709 } 710 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) { 711 phba->vpd_flag |= VPD_PROGRAM_TYPE; 712 index += 2; 713 i = vpd[index]; 714 index += 1; 715 j = 0; 716 Length -= (3+i); 717 while(i--) { 718 phba->ProgramType[j++] = vpd[index++]; 719 if (j == 255) 720 break; 721 } 722 phba->ProgramType[j] = 0; 723 continue; 724 } 725 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) { 726 phba->vpd_flag |= VPD_PORT; 727 index += 2; 728 i = vpd[index]; 729 index += 1; 730 j = 0; 731 Length -= (3+i); 732 while(i--) { 733 phba->Port[j++] = vpd[index++]; 734 if (j == 19) 735 break; 736 } 737 phba->Port[j] = 0; 738 continue; 739 } 740 else { 741 index += 2; 742 i = vpd[index]; 743 index += 1; 744 index += i; 745 Length -= (3 + i); 746 } 747 } 748 finished = 0; 749 break; 750 case 0x78: 751 finished = 1; 752 break; 753 default: 754 index ++; 755 break; 756 } 757 } while (!finished && (index < 108)); 758 759 return(1); 760} 761 762static void 763lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp) 764{ 765 lpfc_vpd_t *vp; 766 uint16_t dev_id = phba->pcidev->device; 767 uint16_t dev_subid = phba->pcidev->subsystem_device; 768 uint8_t hdrtype = phba->pcidev->hdr_type; 769 char *model_str = ""; 770 771 vp = &phba->vpd; 772 773 switch (dev_id) { 774 case PCI_DEVICE_ID_FIREFLY: 775 model_str = "LP6000 1Gb PCI"; 776 break; 777 case PCI_DEVICE_ID_SUPERFLY: 778 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 779 model_str = "LP7000 1Gb PCI"; 780 else 781 model_str = "LP7000E 1Gb PCI"; 782 break; 783 case PCI_DEVICE_ID_DRAGONFLY: 784 model_str = "LP8000 1Gb PCI"; 785 break; 786 case PCI_DEVICE_ID_CENTAUR: 787 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 788 model_str = "LP9002 2Gb PCI"; 789 else 790 model_str = "LP9000 1Gb PCI"; 791 break; 792 case PCI_DEVICE_ID_RFLY: 793 model_str = "LP952 2Gb PCI"; 794 break; 795 case PCI_DEVICE_ID_PEGASUS: 796 model_str = "LP9802 2Gb PCI-X"; 797 break; 798 case PCI_DEVICE_ID_THOR: 799 if (hdrtype == 0x80) 800 model_str = "LP10000DC 2Gb 2-port PCI-X"; 801 else 802 model_str = "LP10000 2Gb PCI-X"; 803 break; 804 case PCI_DEVICE_ID_VIPER: 805 model_str = "LPX1000 10Gb PCI-X"; 806 break; 807 case PCI_DEVICE_ID_PFLY: 808 model_str = "LP982 2Gb PCI-X"; 809 break; 810 case PCI_DEVICE_ID_TFLY: 811 if (hdrtype == 0x80) 812 model_str = "LP1050DC 2Gb 2-port PCI-X"; 813 else 814 model_str = "LP1050 2Gb PCI-X"; 815 break; 816 case PCI_DEVICE_ID_HELIOS: 817 if (hdrtype == 0x80) 818 model_str = "LP11002 4Gb 2-port PCI-X2"; 819 else 820 model_str = "LP11000 4Gb PCI-X2"; 821 break; 822 case PCI_DEVICE_ID_HELIOS_SCSP: 823 model_str = "LP11000-SP 4Gb PCI-X2"; 824 break; 825 case PCI_DEVICE_ID_HELIOS_DCSP: 826 model_str = "LP11002-SP 4Gb 2-port PCI-X2"; 827 break; 828 case PCI_DEVICE_ID_NEPTUNE: 829 if (hdrtype == 0x80) 830 model_str = "LPe1002 4Gb 2-port"; 831 else 832 model_str = "LPe1000 4Gb PCIe"; 833 break; 834 case PCI_DEVICE_ID_NEPTUNE_SCSP: 835 model_str = "LPe1000-SP 4Gb PCIe"; 836 break; 837 case PCI_DEVICE_ID_NEPTUNE_DCSP: 838 model_str = "LPe1002-SP 4Gb 2-port PCIe"; 839 break; 840 case PCI_DEVICE_ID_BMID: 841 model_str = "LP1150 4Gb PCI-X2"; 842 break; 843 case PCI_DEVICE_ID_BSMB: 844 model_str = "LP111 4Gb PCI-X2"; 845 break; 846 case PCI_DEVICE_ID_ZEPHYR: 847 if (hdrtype == 0x80) 848 model_str = "LPe11002 4Gb 2-port PCIe"; 849 else 850 model_str = "LPe11000 4Gb PCIe"; 851 break; 852 case PCI_DEVICE_ID_ZEPHYR_SCSP: 853 model_str = "LPe11000-SP 4Gb PCIe"; 854 break; 855 case PCI_DEVICE_ID_ZEPHYR_DCSP: 856 model_str = "LPe11002-SP 4Gb 2-port PCIe"; 857 break; 858 case PCI_DEVICE_ID_ZMID: 859 model_str = "LPe1150 4Gb PCIe"; 860 break; 861 case PCI_DEVICE_ID_ZSMB: 862 model_str = "LPe111 4Gb PCIe"; 863 break; 864 case PCI_DEVICE_ID_LP101: 865 model_str = "LP101 2Gb PCI-X"; 866 break; 867 case PCI_DEVICE_ID_LP10000S: 868 model_str = "LP10000-S 2Gb PCI"; 869 break; 870 case PCI_DEVICE_ID_LP11000S: 871 case PCI_DEVICE_ID_LPE11000S: 872 switch (dev_subid) { 873 case PCI_SUBSYSTEM_ID_LP11000S: 874 model_str = "LP11002-S 4Gb PCI-X2"; 875 break; 876 case PCI_SUBSYSTEM_ID_LP11002S: 877 model_str = "LP11000-S 4Gb 2-port PCI-X2"; 878 break; 879 case PCI_SUBSYSTEM_ID_LPE11000S: 880 model_str = "LPe11002-S 4Gb PCIe"; 881 break; 882 case PCI_SUBSYSTEM_ID_LPE11002S: 883 model_str = "LPe11002-S 4Gb 2-port PCIe"; 884 break; 885 case PCI_SUBSYSTEM_ID_LPE11010S: 886 model_str = "LPe11010-S 4Gb 10-port PCIe"; 887 break; 888 default: 889 break; 890 } 891 break; 892 default: 893 break; 894 } 895 if (mdp) 896 sscanf(model_str, "%s", mdp); 897 if (descp) 898 sprintf(descp, "Emulex %s Fibre Channel Adapter", model_str); 899} 900 901/**************************************************/ 902/* lpfc_post_buffer */ 903/* */ 904/* This routine will post count buffers to the */ 905/* ring with the QUE_RING_BUF_CN command. This */ 906/* allows 3 buffers / command to be posted. */ 907/* Returns the number of buffers NOT posted. */ 908/**************************************************/ 909int 910lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt, 911 int type) 912{ 913 IOCB_t *icmd; 914 struct lpfc_iocbq *iocb; 915 struct lpfc_dmabuf *mp1, *mp2; 916 917 cnt += pring->missbufcnt; 918 919 /* While there are buffers to post */ 920 while (cnt > 0) { 921 /* Allocate buffer for command iocb */ 922 spin_lock_irq(phba->host->host_lock); 923 iocb = lpfc_sli_get_iocbq(phba); 924 spin_unlock_irq(phba->host->host_lock); 925 if (iocb == NULL) { 926 pring->missbufcnt = cnt; 927 return cnt; 928 } 929 icmd = &iocb->iocb; 930 931 /* 2 buffers can be posted per command */ 932 /* Allocate buffer to post */ 933 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 934 if (mp1) 935 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 936 &mp1->phys); 937 if (mp1 == 0 || mp1->virt == 0) { 938 kfree(mp1); 939 spin_lock_irq(phba->host->host_lock); 940 lpfc_sli_release_iocbq(phba, iocb); 941 spin_unlock_irq(phba->host->host_lock); 942 pring->missbufcnt = cnt; 943 return cnt; 944 } 945 946 INIT_LIST_HEAD(&mp1->list); 947 /* Allocate buffer to post */ 948 if (cnt > 1) { 949 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 950 if (mp2) 951 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 952 &mp2->phys); 953 if (mp2 == 0 || mp2->virt == 0) { 954 kfree(mp2); 955 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 956 kfree(mp1); 957 spin_lock_irq(phba->host->host_lock); 958 lpfc_sli_release_iocbq(phba, iocb); 959 spin_unlock_irq(phba->host->host_lock); 960 pring->missbufcnt = cnt; 961 return cnt; 962 } 963 964 INIT_LIST_HEAD(&mp2->list); 965 } else { 966 mp2 = NULL; 967 } 968 969 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 970 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 971 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 972 icmd->ulpBdeCount = 1; 973 cnt--; 974 if (mp2) { 975 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 976 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 977 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 978 cnt--; 979 icmd->ulpBdeCount = 2; 980 } 981 982 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 983 icmd->ulpLe = 1; 984 985 spin_lock_irq(phba->host->host_lock); 986 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) { 987 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 988 kfree(mp1); 989 cnt++; 990 if (mp2) { 991 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 992 kfree(mp2); 993 cnt++; 994 } 995 lpfc_sli_release_iocbq(phba, iocb); 996 pring->missbufcnt = cnt; 997 spin_unlock_irq(phba->host->host_lock); 998 return cnt; 999 } 1000 spin_unlock_irq(phba->host->host_lock); 1001 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 1002 if (mp2) { 1003 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 1004 } 1005 } 1006 pring->missbufcnt = 0; 1007 return 0; 1008} 1009 1010/************************************************************************/ 1011/* */ 1012/* lpfc_post_rcv_buf */ 1013/* This routine post initial rcv buffers to the configured rings */ 1014/* */ 1015/************************************************************************/ 1016static int 1017lpfc_post_rcv_buf(struct lpfc_hba * phba) 1018{ 1019 struct lpfc_sli *psli = &phba->sli; 1020 1021 /* Ring 0, ELS / CT buffers */ 1022 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1); 1023 /* Ring 2 - FCP no buffers needed */ 1024 1025 return 0; 1026} 1027 1028#define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 1029 1030/************************************************************************/ 1031/* */ 1032/* lpfc_sha_init */ 1033/* */ 1034/************************************************************************/ 1035static void 1036lpfc_sha_init(uint32_t * HashResultPointer) 1037{ 1038 HashResultPointer[0] = 0x67452301; 1039 HashResultPointer[1] = 0xEFCDAB89; 1040 HashResultPointer[2] = 0x98BADCFE; 1041 HashResultPointer[3] = 0x10325476; 1042 HashResultPointer[4] = 0xC3D2E1F0; 1043} 1044 1045/************************************************************************/ 1046/* */ 1047/* lpfc_sha_iterate */ 1048/* */ 1049/************************************************************************/ 1050static void 1051lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 1052{ 1053 int t; 1054 uint32_t TEMP; 1055 uint32_t A, B, C, D, E; 1056 t = 16; 1057 do { 1058 HashWorkingPointer[t] = 1059 S(1, 1060 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 1061 8] ^ 1062 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 1063 } while (++t <= 79); 1064 t = 0; 1065 A = HashResultPointer[0]; 1066 B = HashResultPointer[1]; 1067 C = HashResultPointer[2]; 1068 D = HashResultPointer[3]; 1069 E = HashResultPointer[4]; 1070 1071 do { 1072 if (t < 20) { 1073 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 1074 } else if (t < 40) { 1075 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 1076 } else if (t < 60) { 1077 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 1078 } else { 1079 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 1080 } 1081 TEMP += S(5, A) + E + HashWorkingPointer[t]; 1082 E = D; 1083 D = C; 1084 C = S(30, B); 1085 B = A; 1086 A = TEMP; 1087 } while (++t <= 79); 1088 1089 HashResultPointer[0] += A; 1090 HashResultPointer[1] += B; 1091 HashResultPointer[2] += C; 1092 HashResultPointer[3] += D; 1093 HashResultPointer[4] += E; 1094 1095} 1096 1097/************************************************************************/ 1098/* */ 1099/* lpfc_challenge_key */ 1100/* */ 1101/************************************************************************/ 1102static void 1103lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 1104{ 1105 *HashWorking = (*RandomChallenge ^ *HashWorking); 1106} 1107 1108/************************************************************************/ 1109/* */ 1110/* lpfc_hba_init */ 1111/* */ 1112/************************************************************************/ 1113void 1114lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 1115{ 1116 int t; 1117 uint32_t *HashWorking; 1118 uint32_t *pwwnn = phba->wwnn; 1119 1120 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL); 1121 if (!HashWorking) 1122 return; 1123 1124 memset(HashWorking, 0, (80 * sizeof(uint32_t))); 1125 HashWorking[0] = HashWorking[78] = *pwwnn++; 1126 HashWorking[1] = HashWorking[79] = *pwwnn; 1127 1128 for (t = 0; t < 7; t++) 1129 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 1130 1131 lpfc_sha_init(hbainit); 1132 lpfc_sha_iterate(hbainit, HashWorking); 1133 kfree(HashWorking); 1134} 1135 1136static void 1137lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind) 1138{ 1139 struct lpfc_nodelist *ndlp, *next_ndlp; 1140 1141 /* clean up phba - lpfc specific */ 1142 lpfc_can_disctmo(phba); 1143 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list, 1144 nlp_listp) { 1145 lpfc_nlp_remove(phba, ndlp); 1146 } 1147 1148 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list, 1149 nlp_listp) { 1150 lpfc_nlp_remove(phba, ndlp); 1151 } 1152 1153 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list, 1154 nlp_listp) { 1155 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST); 1156 } 1157 1158 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list, 1159 nlp_listp) { 1160 lpfc_nlp_remove(phba, ndlp); 1161 } 1162 1163 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list, 1164 nlp_listp) { 1165 lpfc_nlp_remove(phba, ndlp); 1166 } 1167 1168 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list, 1169 nlp_listp) { 1170 lpfc_nlp_remove(phba, ndlp); 1171 } 1172 1173 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list, 1174 nlp_listp) { 1175 lpfc_nlp_remove(phba, ndlp); 1176 } 1177 1178 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list, 1179 nlp_listp) { 1180 lpfc_nlp_remove(phba, ndlp); 1181 } 1182 1183 INIT_LIST_HEAD(&phba->fc_nlpmap_list); 1184 INIT_LIST_HEAD(&phba->fc_nlpunmap_list); 1185 INIT_LIST_HEAD(&phba->fc_unused_list); 1186 INIT_LIST_HEAD(&phba->fc_plogi_list); 1187 INIT_LIST_HEAD(&phba->fc_adisc_list); 1188 INIT_LIST_HEAD(&phba->fc_reglogin_list); 1189 INIT_LIST_HEAD(&phba->fc_prli_list); 1190 INIT_LIST_HEAD(&phba->fc_npr_list); 1191 1192 phba->fc_map_cnt = 0; 1193 phba->fc_unmap_cnt = 0; 1194 phba->fc_plogi_cnt = 0; 1195 phba->fc_adisc_cnt = 0; 1196 phba->fc_reglogin_cnt = 0; 1197 phba->fc_prli_cnt = 0; 1198 phba->fc_npr_cnt = 0; 1199 phba->fc_unused_cnt= 0; 1200 return; 1201} 1202 1203static void 1204lpfc_establish_link_tmo(unsigned long ptr) 1205{ 1206 struct lpfc_hba *phba = (struct lpfc_hba *)ptr; 1207 unsigned long iflag; 1208 1209 1210 /* Re-establishing Link, timer expired */ 1211 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT, 1212 "%d:1300 Re-establishing Link, timer expired " 1213 "Data: x%x x%x\n", 1214 phba->brd_no, phba->fc_flag, phba->hba_state); 1215 spin_lock_irqsave(phba->host->host_lock, iflag); 1216 phba->fc_flag &= ~FC_ESTABLISH_LINK; 1217 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1218} 1219 1220static int 1221lpfc_stop_timer(struct lpfc_hba * phba) 1222{ 1223 struct lpfc_sli *psli = &phba->sli; 1224 1225 /* Instead of a timer, this has been converted to a 1226 * deferred procedding list. 1227 */ 1228 while (!list_empty(&phba->freebufList)) { 1229 1230 struct lpfc_dmabuf *mp = NULL; 1231 1232 list_remove_head((&phba->freebufList), mp, 1233 struct lpfc_dmabuf, list); 1234 if (mp) { 1235 lpfc_mbuf_free(phba, mp->virt, mp->phys); 1236 kfree(mp); 1237 } 1238 } 1239 1240 del_timer_sync(&phba->fcp_poll_timer); 1241 del_timer_sync(&phba->fc_estabtmo); 1242 del_timer_sync(&phba->fc_disctmo); 1243 del_timer_sync(&phba->fc_fdmitmo); 1244 del_timer_sync(&phba->els_tmofunc); 1245 psli = &phba->sli; 1246 del_timer_sync(&psli->mbox_tmo); 1247 return(1); 1248} 1249 1250int 1251lpfc_online(struct lpfc_hba * phba) 1252{ 1253 if (!phba) 1254 return 0; 1255 1256 if (!(phba->fc_flag & FC_OFFLINE_MODE)) 1257 return 0; 1258 1259 lpfc_printf_log(phba, 1260 KERN_WARNING, 1261 LOG_INIT, 1262 "%d:0458 Bring Adapter online\n", 1263 phba->brd_no); 1264 1265 if (!lpfc_sli_queue_setup(phba)) 1266 return 1; 1267 1268 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */ 1269 return 1; 1270 1271 spin_lock_irq(phba->host->host_lock); 1272 phba->fc_flag &= ~FC_OFFLINE_MODE; 1273 spin_unlock_irq(phba->host->host_lock); 1274 1275 return 0; 1276} 1277 1278int 1279lpfc_offline(struct lpfc_hba * phba) 1280{ 1281 struct lpfc_sli_ring *pring; 1282 struct lpfc_sli *psli; 1283 unsigned long iflag; 1284 int i = 0; 1285 1286 if (!phba) 1287 return 0; 1288 1289 if (phba->fc_flag & FC_OFFLINE_MODE) 1290 return 0; 1291 1292 psli = &phba->sli; 1293 pring = &psli->ring[psli->fcp_ring]; 1294 1295 lpfc_linkdown(phba); 1296 1297 /* The linkdown event takes 30 seconds to timeout. */ 1298 while (pring->txcmplq_cnt) { 1299 mdelay(10); 1300 if (i++ > 3000) 1301 break; 1302 } 1303 1304 /* stop all timers associated with this hba */ 1305 lpfc_stop_timer(phba); 1306 phba->work_hba_events = 0; 1307 1308 lpfc_printf_log(phba, 1309 KERN_WARNING, 1310 LOG_INIT, 1311 "%d:0460 Bring Adapter offline\n", 1312 phba->brd_no); 1313 1314 /* Bring down the SLI Layer and cleanup. The HBA is offline 1315 now. */ 1316 lpfc_sli_hba_down(phba); 1317 lpfc_cleanup(phba, 1); 1318 spin_lock_irqsave(phba->host->host_lock, iflag); 1319 phba->fc_flag |= FC_OFFLINE_MODE; 1320 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1321 return 0; 1322} 1323 1324/****************************************************************************** 1325* Function name: lpfc_scsi_free 1326* 1327* Description: Called from lpfc_pci_remove_one free internal driver resources 1328* 1329******************************************************************************/ 1330static int 1331lpfc_scsi_free(struct lpfc_hba * phba) 1332{ 1333 struct lpfc_scsi_buf *sb, *sb_next; 1334 struct lpfc_iocbq *io, *io_next; 1335 1336 spin_lock_irq(phba->host->host_lock); 1337 /* Release all the lpfc_scsi_bufs maintained by this host. */ 1338 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) { 1339 list_del(&sb->list); 1340 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data, 1341 sb->dma_handle); 1342 kfree(sb); 1343 phba->total_scsi_bufs--; 1344 } 1345 1346 /* Release all the lpfc_iocbq entries maintained by this host. */ 1347 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) { 1348 list_del(&io->list); 1349 kfree(io); 1350 phba->total_iocbq_bufs--; 1351 } 1352 1353 spin_unlock_irq(phba->host->host_lock); 1354 1355 return 0; 1356} 1357 1358 1359static int __devinit 1360lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 1361{ 1362 struct Scsi_Host *host; 1363 struct lpfc_hba *phba; 1364 struct lpfc_sli *psli; 1365 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 1366 unsigned long bar0map_len, bar2map_len; 1367 int error = -ENODEV, retval; 1368 int i; 1369 uint16_t iotag; 1370 1371 if (pci_enable_device(pdev)) 1372 goto out; 1373 if (pci_request_regions(pdev, LPFC_DRIVER_NAME)) 1374 goto out_disable_device; 1375 1376 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba)); 1377 if (!host) 1378 goto out_release_regions; 1379 1380 phba = (struct lpfc_hba*)host->hostdata; 1381 memset(phba, 0, sizeof (struct lpfc_hba)); 1382 phba->host = host; 1383 1384 phba->fc_flag |= FC_LOADING; 1385 phba->pcidev = pdev; 1386 1387 /* Assign an unused board number */ 1388 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL)) 1389 goto out_put_host; 1390 1391 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no); 1392 if (error) 1393 goto out_put_host; 1394 1395 host->unique_id = phba->brd_no; 1396 init_MUTEX(&phba->hba_can_block); 1397 INIT_LIST_HEAD(&phba->ctrspbuflist); 1398 INIT_LIST_HEAD(&phba->rnidrspbuflist); 1399 INIT_LIST_HEAD(&phba->freebufList); 1400 1401 /* Initialize timers used by driver */ 1402 init_timer(&phba->fc_estabtmo); 1403 phba->fc_estabtmo.function = lpfc_establish_link_tmo; 1404 phba->fc_estabtmo.data = (unsigned long)phba; 1405 init_timer(&phba->fc_disctmo); 1406 phba->fc_disctmo.function = lpfc_disc_timeout; 1407 phba->fc_disctmo.data = (unsigned long)phba; 1408 1409 init_timer(&phba->fc_fdmitmo); 1410 phba->fc_fdmitmo.function = lpfc_fdmi_tmo; 1411 phba->fc_fdmitmo.data = (unsigned long)phba; 1412 init_timer(&phba->els_tmofunc); 1413 phba->els_tmofunc.function = lpfc_els_timeout; 1414 phba->els_tmofunc.data = (unsigned long)phba; 1415 psli = &phba->sli; 1416 init_timer(&psli->mbox_tmo); 1417 psli->mbox_tmo.function = lpfc_mbox_timeout; 1418 psli->mbox_tmo.data = (unsigned long)phba; 1419 1420 init_timer(&phba->fcp_poll_timer); 1421 phba->fcp_poll_timer.function = lpfc_poll_timeout; 1422 phba->fcp_poll_timer.data = (unsigned long)phba; 1423 1424 /* 1425 * Get all the module params for configuring this host and then 1426 * establish the host parameters. 1427 */ 1428 lpfc_get_cfgparam(phba); 1429 1430 host->max_id = LPFC_MAX_TARGET; 1431 host->max_lun = phba->cfg_max_luns; 1432 host->this_id = -1; 1433 1434 /* Initialize all internally managed lists. */ 1435 INIT_LIST_HEAD(&phba->fc_nlpmap_list); 1436 INIT_LIST_HEAD(&phba->fc_nlpunmap_list); 1437 INIT_LIST_HEAD(&phba->fc_unused_list); 1438 INIT_LIST_HEAD(&phba->fc_plogi_list); 1439 INIT_LIST_HEAD(&phba->fc_adisc_list); 1440 INIT_LIST_HEAD(&phba->fc_reglogin_list); 1441 INIT_LIST_HEAD(&phba->fc_prli_list); 1442 INIT_LIST_HEAD(&phba->fc_npr_list); 1443 1444 1445 pci_set_master(pdev); 1446 retval = pci_set_mwi(pdev); 1447 if (retval) 1448 dev_printk(KERN_WARNING, &pdev->dev, 1449 "Warning: pci_set_mwi returned %d\n", retval); 1450 1451 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0) 1452 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0) 1453 goto out_idr_remove; 1454 1455 /* 1456 * Get the bus address of Bar0 and Bar2 and the number of bytes 1457 * required by each mapping. 1458 */ 1459 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0); 1460 bar0map_len = pci_resource_len(phba->pcidev, 0); 1461 1462 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2); 1463 bar2map_len = pci_resource_len(phba->pcidev, 2); 1464 1465 /* Map HBA SLIM to a kernel virtual address. */ 1466 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 1467 if (!phba->slim_memmap_p) { 1468 error = -ENODEV; 1469 dev_printk(KERN_ERR, &pdev->dev, 1470 "ioremap failed for SLIM memory.\n"); 1471 goto out_idr_remove; 1472 } 1473 1474 /* Map HBA Control Registers to a kernel virtual address. */ 1475 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 1476 if (!phba->ctrl_regs_memmap_p) { 1477 error = -ENODEV; 1478 dev_printk(KERN_ERR, &pdev->dev, 1479 "ioremap failed for HBA control registers.\n"); 1480 goto out_iounmap_slim; 1481 } 1482 1483 /* Allocate memory for SLI-2 structures */ 1484 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE, 1485 &phba->slim2p_mapping, GFP_KERNEL); 1486 if (!phba->slim2p) 1487 goto out_iounmap; 1488 1489 memset(phba->slim2p, 0, SLI2_SLIM_SIZE); 1490 1491 /* Initialize the SLI Layer to run with lpfc HBAs. */ 1492 lpfc_sli_setup(phba); 1493 lpfc_sli_queue_setup(phba); 1494 1495 error = lpfc_mem_alloc(phba); 1496 if (error) 1497 goto out_free_slim; 1498 1499 /* Initialize and populate the iocb list per host. */ 1500 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 1501 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) { 1502 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 1503 if (iocbq_entry == NULL) { 1504 printk(KERN_ERR "%s: only allocated %d iocbs of " 1505 "expected %d count. Unloading driver.\n", 1506 __FUNCTION__, i, LPFC_IOCB_LIST_CNT); 1507 error = -ENOMEM; 1508 goto out_free_iocbq; 1509 } 1510 1511 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq)); 1512 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 1513 if (iotag == 0) { 1514 kfree (iocbq_entry); 1515 printk(KERN_ERR "%s: failed to allocate IOTAG. " 1516 "Unloading driver.\n", 1517 __FUNCTION__); 1518 error = -ENOMEM; 1519 goto out_free_iocbq; 1520 } 1521 spin_lock_irq(phba->host->host_lock); 1522 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 1523 phba->total_iocbq_bufs++; 1524 spin_unlock_irq(phba->host->host_lock); 1525 } 1526 1527 /* Initialize HBA structure */ 1528 phba->fc_edtov = FF_DEF_EDTOV; 1529 phba->fc_ratov = FF_DEF_RATOV; 1530 phba->fc_altov = FF_DEF_ALTOV; 1531 phba->fc_arbtov = FF_DEF_ARBTOV; 1532 1533 INIT_LIST_HEAD(&phba->work_list); 1534 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT); 1535 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 1536 1537 /* Startup the kernel thread for this host adapter. */ 1538 phba->worker_thread = kthread_run(lpfc_do_work, phba, 1539 "lpfc_worker_%d", phba->brd_no); 1540 if (IS_ERR(phba->worker_thread)) { 1541 error = PTR_ERR(phba->worker_thread); 1542 goto out_free_iocbq; 1543 } 1544 1545 /* We can rely on a queue depth attribute only after SLI HBA setup */ 1546 host->can_queue = phba->cfg_hba_queue_depth - 10; 1547 1548 /* Tell the midlayer we support 16 byte commands */ 1549 host->max_cmd_len = 16; 1550 1551 /* Initialize the list of scsi buffers used by driver for scsi IO. */ 1552 spin_lock_init(&phba->scsi_buf_list_lock); 1553 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list); 1554 1555 host->transportt = lpfc_transport_template; 1556 pci_set_drvdata(pdev, host); 1557 error = scsi_add_host(host, &pdev->dev); 1558 if (error) 1559 goto out_kthread_stop; 1560 1561 error = lpfc_alloc_sysfs_attr(phba); 1562 if (error) 1563 goto out_kthread_stop; 1564 1565 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ, 1566 LPFC_DRIVER_NAME, phba); 1567 if (error) { 1568 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1569 "%d:0451 Enable interrupt handler failed\n", 1570 phba->brd_no); 1571 goto out_free_sysfs_attr; 1572 } 1573 phba->MBslimaddr = phba->slim_memmap_p; 1574 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 1575 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 1576 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 1577 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 1578 1579 error = lpfc_sli_hba_setup(phba); 1580 if (error) 1581 goto out_free_irq; 1582 1583 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 1584 spin_lock_irq(phba->host->host_lock); 1585 lpfc_poll_start_timer(phba); 1586 spin_unlock_irq(phba->host->host_lock); 1587 } 1588 1589 /* 1590 * set fixed host attributes 1591 * Must done after lpfc_sli_hba_setup() 1592 */ 1593 1594 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn); 1595 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn); 1596 fc_host_supported_classes(host) = FC_COS_CLASS3; 1597 1598 memset(fc_host_supported_fc4s(host), 0, 1599 sizeof(fc_host_supported_fc4s(host))); 1600 fc_host_supported_fc4s(host)[2] = 1; 1601 fc_host_supported_fc4s(host)[7] = 1; 1602 1603 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host)); 1604 1605 fc_host_supported_speeds(host) = 0; 1606 switch (FC_JEDEC_ID(phba->vpd.rev.biuRev)) { 1607 case VIPER_JEDEC_ID: 1608 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT; 1609 break; 1610 case HELIOS_JEDEC_ID: 1611 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT; 1612 /* Fall through */ 1613 case CENTAUR_2G_JEDEC_ID: 1614 case PEGASUS_JEDEC_ID: 1615 case THOR_JEDEC_ID: 1616 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT; 1617 /* Fall through */ 1618 default: 1619 fc_host_supported_speeds(host) = FC_PORTSPEED_1GBIT; 1620 } 1621 1622 fc_host_maxframe_size(host) = 1623 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 1624 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb); 1625 1626 /* This value is also unchanging */ 1627 memset(fc_host_active_fc4s(host), 0, 1628 sizeof(fc_host_active_fc4s(host))); 1629 fc_host_active_fc4s(host)[2] = 1; 1630 fc_host_active_fc4s(host)[7] = 1; 1631 1632 spin_lock_irq(phba->host->host_lock); 1633 phba->fc_flag &= ~FC_LOADING; 1634 spin_unlock_irq(phba->host->host_lock); 1635 return 0; 1636 1637out_free_irq: 1638 lpfc_stop_timer(phba); 1639 phba->work_hba_events = 0; 1640 free_irq(phba->pcidev->irq, phba); 1641out_free_sysfs_attr: 1642 lpfc_free_sysfs_attr(phba); 1643out_kthread_stop: 1644 kthread_stop(phba->worker_thread); 1645out_free_iocbq: 1646 list_for_each_entry_safe(iocbq_entry, iocbq_next, 1647 &phba->lpfc_iocb_list, list) { 1648 spin_lock_irq(phba->host->host_lock); 1649 kfree(iocbq_entry); 1650 phba->total_iocbq_bufs--; 1651 spin_unlock_irq(phba->host->host_lock); 1652 } 1653 lpfc_mem_free(phba); 1654out_free_slim: 1655 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p, 1656 phba->slim2p_mapping); 1657out_iounmap: 1658 iounmap(phba->ctrl_regs_memmap_p); 1659out_iounmap_slim: 1660 iounmap(phba->slim_memmap_p); 1661out_idr_remove: 1662 idr_remove(&lpfc_hba_index, phba->brd_no); 1663out_put_host: 1664 scsi_host_put(host); 1665out_release_regions: 1666 pci_release_regions(pdev); 1667out_disable_device: 1668 pci_disable_device(pdev); 1669out: 1670 return error; 1671} 1672 1673static void __devexit 1674lpfc_pci_remove_one(struct pci_dev *pdev) 1675{ 1676 struct Scsi_Host *host = pci_get_drvdata(pdev); 1677 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata; 1678 unsigned long iflag; 1679 1680 lpfc_free_sysfs_attr(phba); 1681 1682 spin_lock_irqsave(phba->host->host_lock, iflag); 1683 phba->fc_flag |= FC_UNLOADING; 1684 1685 spin_unlock_irqrestore(phba->host->host_lock, iflag); 1686 1687 fc_remove_host(phba->host); 1688 scsi_remove_host(phba->host); 1689 1690 kthread_stop(phba->worker_thread); 1691 1692 /* 1693 * Bring down the SLI Layer. This step disable all interrupts, 1694 * clears the rings, discards all mailbox commands, and resets 1695 * the HBA. 1696 */ 1697 lpfc_sli_hba_down(phba); 1698 1699 /* Release the irq reservation */ 1700 free_irq(phba->pcidev->irq, phba); 1701 1702 lpfc_cleanup(phba, 0); 1703 lpfc_stop_timer(phba); 1704 phba->work_hba_events = 0; 1705 1706 /* 1707 * Call scsi_free before mem_free since scsi bufs are released to their 1708 * corresponding pools here. 1709 */ 1710 lpfc_scsi_free(phba); 1711 lpfc_mem_free(phba); 1712 1713 /* Free resources associated with SLI2 interface */ 1714 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 1715 phba->slim2p, phba->slim2p_mapping); 1716 1717 /* unmap adapter SLIM and Control Registers */ 1718 iounmap(phba->ctrl_regs_memmap_p); 1719 iounmap(phba->slim_memmap_p); 1720 1721 pci_release_regions(phba->pcidev); 1722 pci_disable_device(phba->pcidev); 1723 1724 idr_remove(&lpfc_hba_index, phba->brd_no); 1725 scsi_host_put(phba->host); 1726 1727 pci_set_drvdata(pdev, NULL); 1728} 1729 1730static struct pci_device_id lpfc_id_table[] = { 1731 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER, 1732 PCI_ANY_ID, PCI_ANY_ID, }, 1733 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY, 1734 PCI_ANY_ID, PCI_ANY_ID, }, 1735 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR, 1736 PCI_ANY_ID, PCI_ANY_ID, }, 1737 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS, 1738 PCI_ANY_ID, PCI_ANY_ID, }, 1739 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR, 1740 PCI_ANY_ID, PCI_ANY_ID, }, 1741 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY, 1742 PCI_ANY_ID, PCI_ANY_ID, }, 1743 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY, 1744 PCI_ANY_ID, PCI_ANY_ID, }, 1745 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY, 1746 PCI_ANY_ID, PCI_ANY_ID, }, 1747 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY, 1748 PCI_ANY_ID, PCI_ANY_ID, }, 1749 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE, 1750 PCI_ANY_ID, PCI_ANY_ID, }, 1751 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP, 1752 PCI_ANY_ID, PCI_ANY_ID, }, 1753 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP, 1754 PCI_ANY_ID, PCI_ANY_ID, }, 1755 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS, 1756 PCI_ANY_ID, PCI_ANY_ID, }, 1757 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP, 1758 PCI_ANY_ID, PCI_ANY_ID, }, 1759 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP, 1760 PCI_ANY_ID, PCI_ANY_ID, }, 1761 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID, 1762 PCI_ANY_ID, PCI_ANY_ID, }, 1763 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB, 1764 PCI_ANY_ID, PCI_ANY_ID, }, 1765 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR, 1766 PCI_ANY_ID, PCI_ANY_ID, }, 1767 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP, 1768 PCI_ANY_ID, PCI_ANY_ID, }, 1769 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP, 1770 PCI_ANY_ID, PCI_ANY_ID, }, 1771 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID, 1772 PCI_ANY_ID, PCI_ANY_ID, }, 1773 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB, 1774 PCI_ANY_ID, PCI_ANY_ID, }, 1775 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY, 1776 PCI_ANY_ID, PCI_ANY_ID, }, 1777 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101, 1778 PCI_ANY_ID, PCI_ANY_ID, }, 1779 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S, 1780 PCI_ANY_ID, PCI_ANY_ID, }, 1781 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S, 1782 PCI_ANY_ID, PCI_ANY_ID, }, 1783 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S, 1784 PCI_ANY_ID, PCI_ANY_ID, }, 1785 { 0 } 1786}; 1787 1788MODULE_DEVICE_TABLE(pci, lpfc_id_table); 1789 1790static struct pci_driver lpfc_driver = { 1791 .name = LPFC_DRIVER_NAME, 1792 .id_table = lpfc_id_table, 1793 .probe = lpfc_pci_probe_one, 1794 .remove = __devexit_p(lpfc_pci_remove_one), 1795}; 1796 1797static int __init 1798lpfc_init(void) 1799{ 1800 int error = 0; 1801 1802 printk(LPFC_MODULE_DESC "\n"); 1803 printk(LPFC_COPYRIGHT "\n"); 1804 1805 lpfc_transport_template = 1806 fc_attach_transport(&lpfc_transport_functions); 1807 if (!lpfc_transport_template) 1808 return -ENOMEM; 1809 error = pci_register_driver(&lpfc_driver); 1810 if (error) 1811 fc_release_transport(lpfc_transport_template); 1812 1813 return error; 1814} 1815 1816static void __exit 1817lpfc_exit(void) 1818{ 1819 pci_unregister_driver(&lpfc_driver); 1820 fc_release_transport(lpfc_transport_template); 1821} 1822 1823module_init(lpfc_init); 1824module_exit(lpfc_exit); 1825MODULE_LICENSE("GPL"); 1826MODULE_DESCRIPTION(LPFC_MODULE_DESC); 1827MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com"); 1828MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 1829