mv_sas.c revision 6ceae7c6234f2961dc59912412e8c0706d825873
1/*
2 * Marvell 88SE64xx/88SE94xx main function
3 *
4 * Copyright 2007 Red Hat, Inc.
5 * Copyright 2008 Marvell. <kewei@marvell.com>
6 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
7 *
8 * This file is licensed under GPLv2.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; version 2 of the
13 * License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
23 * USA
24*/
25
26#include "mv_sas.h"
27
28static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
29{
30	if (task->lldd_task) {
31		struct mvs_slot_info *slot;
32		slot = task->lldd_task;
33		*tag = slot->slot_tag;
34		return 1;
35	}
36	return 0;
37}
38
39void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
40{
41	void *bitmap = mvi->tags;
42	clear_bit(tag, bitmap);
43}
44
45void mvs_tag_free(struct mvs_info *mvi, u32 tag)
46{
47	mvs_tag_clear(mvi, tag);
48}
49
50void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
51{
52	void *bitmap = mvi->tags;
53	set_bit(tag, bitmap);
54}
55
56inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
57{
58	unsigned int index, tag;
59	void *bitmap = mvi->tags;
60
61	index = find_first_zero_bit(bitmap, mvi->tags_num);
62	tag = index;
63	if (tag >= mvi->tags_num)
64		return -SAS_QUEUE_FULL;
65	mvs_tag_set(mvi, tag);
66	*tag_out = tag;
67	return 0;
68}
69
70void mvs_tag_init(struct mvs_info *mvi)
71{
72	int i;
73	for (i = 0; i < mvi->tags_num; ++i)
74		mvs_tag_clear(mvi, i);
75}
76
77struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
78{
79	unsigned long i = 0, j = 0, hi = 0;
80	struct sas_ha_struct *sha = dev->port->ha;
81	struct mvs_info *mvi = NULL;
82	struct asd_sas_phy *phy;
83
84	while (sha->sas_port[i]) {
85		if (sha->sas_port[i] == dev->port) {
86			phy =  container_of(sha->sas_port[i]->phy_list.next,
87				struct asd_sas_phy, port_phy_el);
88			j = 0;
89			while (sha->sas_phy[j]) {
90				if (sha->sas_phy[j] == phy)
91					break;
92				j++;
93			}
94			break;
95		}
96		i++;
97	}
98	hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
99	mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
100
101	return mvi;
102
103}
104
105int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
106{
107	unsigned long i = 0, j = 0, n = 0, num = 0;
108	struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
109	struct mvs_info *mvi = mvi_dev->mvi_info;
110	struct sas_ha_struct *sha = dev->port->ha;
111
112	while (sha->sas_port[i]) {
113		if (sha->sas_port[i] == dev->port) {
114			struct asd_sas_phy *phy;
115			list_for_each_entry(phy,
116				&sha->sas_port[i]->phy_list, port_phy_el) {
117				j = 0;
118				while (sha->sas_phy[j]) {
119					if (sha->sas_phy[j] == phy)
120						break;
121					j++;
122				}
123				phyno[n] = (j >= mvi->chip->n_phy) ?
124					(j - mvi->chip->n_phy) : j;
125				num++;
126				n++;
127			}
128			break;
129		}
130		i++;
131	}
132	return num;
133}
134
135struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
136						u8 reg_set)
137{
138	u32 dev_no;
139	for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
140		if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
141			continue;
142
143		if (mvi->devices[dev_no].taskfileset == reg_set)
144			return &mvi->devices[dev_no];
145	}
146	return NULL;
147}
148
149static inline void mvs_free_reg_set(struct mvs_info *mvi,
150				struct mvs_device *dev)
151{
152	if (!dev) {
153		mv_printk("device has been free.\n");
154		return;
155	}
156	if (dev->taskfileset == MVS_ID_NOT_MAPPED)
157		return;
158	MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
159}
160
161static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
162				struct mvs_device *dev)
163{
164	if (dev->taskfileset != MVS_ID_NOT_MAPPED)
165		return 0;
166	return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
167}
168
169void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
170{
171	u32 no;
172	for_each_phy(phy_mask, phy_mask, no) {
173		if (!(phy_mask & 1))
174			continue;
175		MVS_CHIP_DISP->phy_reset(mvi, no, hard);
176	}
177}
178
179int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
180			void *funcdata)
181{
182	int rc = 0, phy_id = sas_phy->id;
183	u32 tmp, i = 0, hi;
184	struct sas_ha_struct *sha = sas_phy->ha;
185	struct mvs_info *mvi = NULL;
186
187	while (sha->sas_phy[i]) {
188		if (sha->sas_phy[i] == sas_phy)
189			break;
190		i++;
191	}
192	hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
193	mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
194
195	switch (func) {
196	case PHY_FUNC_SET_LINK_RATE:
197		MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
198		break;
199
200	case PHY_FUNC_HARD_RESET:
201		tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
202		if (tmp & PHY_RST_HARD)
203			break;
204		MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
205		break;
206
207	case PHY_FUNC_LINK_RESET:
208		MVS_CHIP_DISP->phy_enable(mvi, phy_id);
209		MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
210		break;
211
212	case PHY_FUNC_DISABLE:
213		MVS_CHIP_DISP->phy_disable(mvi, phy_id);
214		break;
215	case PHY_FUNC_RELEASE_SPINUP_HOLD:
216	default:
217		rc = -EOPNOTSUPP;
218	}
219	msleep(200);
220	return rc;
221}
222
223void __devinit mvs_set_sas_addr(struct mvs_info *mvi, int port_id,
224				u32 off_lo, u32 off_hi, u64 sas_addr)
225{
226	u32 lo = (u32)sas_addr;
227	u32 hi = (u32)(sas_addr>>32);
228
229	MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
230	MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
231	MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
232	MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
233}
234
235static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
236{
237	struct mvs_phy *phy = &mvi->phy[i];
238	struct asd_sas_phy *sas_phy = &phy->sas_phy;
239	struct sas_ha_struct *sas_ha;
240	if (!phy->phy_attached)
241		return;
242
243	if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
244		&& phy->phy_type & PORT_TYPE_SAS) {
245		return;
246	}
247
248	sas_ha = mvi->sas;
249	sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
250
251	if (sas_phy->phy) {
252		struct sas_phy *sphy = sas_phy->phy;
253
254		sphy->negotiated_linkrate = sas_phy->linkrate;
255		sphy->minimum_linkrate = phy->minimum_linkrate;
256		sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
257		sphy->maximum_linkrate = phy->maximum_linkrate;
258		sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
259	}
260
261	if (phy->phy_type & PORT_TYPE_SAS) {
262		struct sas_identify_frame *id;
263
264		id = (struct sas_identify_frame *)phy->frame_rcvd;
265		id->dev_type = phy->identify.device_type;
266		id->initiator_bits = SAS_PROTOCOL_ALL;
267		id->target_bits = phy->identify.target_port_protocols;
268	} else if (phy->phy_type & PORT_TYPE_SATA) {
269		/*Nothing*/
270	}
271	mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
272
273	sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
274
275	mvi->sas->notify_port_event(sas_phy,
276				   PORTE_BYTES_DMAED);
277}
278
279void mvs_scan_start(struct Scsi_Host *shost)
280{
281	int i, j;
282	unsigned short core_nr;
283	struct mvs_info *mvi;
284	struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
285	struct mvs_prv_info *mvs_prv = sha->lldd_ha;
286
287	core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
288
289	for (j = 0; j < core_nr; j++) {
290		mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
291		for (i = 0; i < mvi->chip->n_phy; ++i)
292			mvs_bytes_dmaed(mvi, i);
293	}
294	mvs_prv->scan_finished = 1;
295}
296
297int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
298{
299	struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
300	struct mvs_prv_info *mvs_prv = sha->lldd_ha;
301
302	if (mvs_prv->scan_finished == 0)
303		return 0;
304
305	scsi_flush_work(shost);
306	return 1;
307}
308
309static int mvs_task_prep_smp(struct mvs_info *mvi,
310			     struct mvs_task_exec_info *tei)
311{
312	int elem, rc, i;
313	struct sas_task *task = tei->task;
314	struct mvs_cmd_hdr *hdr = tei->hdr;
315	struct domain_device *dev = task->dev;
316	struct asd_sas_port *sas_port = dev->port;
317	struct scatterlist *sg_req, *sg_resp;
318	u32 req_len, resp_len, tag = tei->tag;
319	void *buf_tmp;
320	u8 *buf_oaf;
321	dma_addr_t buf_tmp_dma;
322	void *buf_prd;
323	struct mvs_slot_info *slot = &mvi->slot_info[tag];
324	u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
325
326	/*
327	 * DMA-map SMP request, response buffers
328	 */
329	sg_req = &task->smp_task.smp_req;
330	elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE);
331	if (!elem)
332		return -ENOMEM;
333	req_len = sg_dma_len(sg_req);
334
335	sg_resp = &task->smp_task.smp_resp;
336	elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
337	if (!elem) {
338		rc = -ENOMEM;
339		goto err_out;
340	}
341	resp_len = SB_RFB_MAX;
342
343	/* must be in dwords */
344	if ((req_len & 0x3) || (resp_len & 0x3)) {
345		rc = -EINVAL;
346		goto err_out_2;
347	}
348
349	/*
350	 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
351	 */
352
353	/* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
354	buf_tmp = slot->buf;
355	buf_tmp_dma = slot->buf_dma;
356
357	hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
358
359	/* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
360	buf_oaf = buf_tmp;
361	hdr->open_frame = cpu_to_le64(buf_tmp_dma);
362
363	buf_tmp += MVS_OAF_SZ;
364	buf_tmp_dma += MVS_OAF_SZ;
365
366	/* region 3: PRD table *********************************** */
367	buf_prd = buf_tmp;
368	if (tei->n_elem)
369		hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
370	else
371		hdr->prd_tbl = 0;
372
373	i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
374	buf_tmp += i;
375	buf_tmp_dma += i;
376
377	/* region 4: status buffer (larger the PRD, smaller this buf) ****** */
378	slot->response = buf_tmp;
379	hdr->status_buf = cpu_to_le64(buf_tmp_dma);
380	if (mvi->flags & MVF_FLAG_SOC)
381		hdr->reserved[0] = 0;
382
383	/*
384	 * Fill in TX ring and command slot header
385	 */
386	slot->tx = mvi->tx_prod;
387	mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
388					TXQ_MODE_I | tag |
389					(sas_port->phy_mask << TXQ_PHY_SHIFT));
390
391	hdr->flags |= flags;
392	hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
393	hdr->tags = cpu_to_le32(tag);
394	hdr->data_len = 0;
395
396	/* generate open address frame hdr (first 12 bytes) */
397	/* initiator, SMP, ftype 1h */
398	buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
399	buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
400	*(u16 *)(buf_oaf + 2) = 0xFFFF;		/* SAS SPEC */
401	memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
402
403	/* fill in PRD (scatter/gather) table, if any */
404	MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
405
406	return 0;
407
408err_out_2:
409	dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
410		     PCI_DMA_FROMDEVICE);
411err_out:
412	dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
413		     PCI_DMA_TODEVICE);
414	return rc;
415}
416
417static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
418{
419	struct ata_queued_cmd *qc = task->uldd_task;
420
421	if (qc) {
422		if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
423			qc->tf.command == ATA_CMD_FPDMA_READ) {
424			*tag = qc->tag;
425			return 1;
426		}
427	}
428
429	return 0;
430}
431
432static int mvs_task_prep_ata(struct mvs_info *mvi,
433			     struct mvs_task_exec_info *tei)
434{
435	struct sas_task *task = tei->task;
436	struct domain_device *dev = task->dev;
437	struct mvs_device *mvi_dev = dev->lldd_dev;
438	struct mvs_cmd_hdr *hdr = tei->hdr;
439	struct asd_sas_port *sas_port = dev->port;
440	struct mvs_slot_info *slot;
441	void *buf_prd;
442	u32 tag = tei->tag, hdr_tag;
443	u32 flags, del_q;
444	void *buf_tmp;
445	u8 *buf_cmd, *buf_oaf;
446	dma_addr_t buf_tmp_dma;
447	u32 i, req_len, resp_len;
448	const u32 max_resp_len = SB_RFB_MAX;
449
450	if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
451		mv_dprintk("Have not enough regiset for dev %d.\n",
452			mvi_dev->device_id);
453		return -EBUSY;
454	}
455	slot = &mvi->slot_info[tag];
456	slot->tx = mvi->tx_prod;
457	del_q = TXQ_MODE_I | tag |
458		(TXQ_CMD_STP << TXQ_CMD_SHIFT) |
459		(sas_port->phy_mask << TXQ_PHY_SHIFT) |
460		(mvi_dev->taskfileset << TXQ_SRS_SHIFT);
461	mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
462
463	if (task->data_dir == DMA_FROM_DEVICE)
464		flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
465	else
466		flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
467
468	if (task->ata_task.use_ncq)
469		flags |= MCH_FPDMA;
470	if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) {
471		if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
472			flags |= MCH_ATAPI;
473	}
474
475	hdr->flags = cpu_to_le32(flags);
476
477	if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
478		task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
479	else
480		hdr_tag = tag;
481
482	hdr->tags = cpu_to_le32(hdr_tag);
483
484	hdr->data_len = cpu_to_le32(task->total_xfer_len);
485
486	/*
487	 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
488	 */
489
490	/* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
491	buf_cmd = buf_tmp = slot->buf;
492	buf_tmp_dma = slot->buf_dma;
493
494	hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
495
496	buf_tmp += MVS_ATA_CMD_SZ;
497	buf_tmp_dma += MVS_ATA_CMD_SZ;
498
499	/* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
500	/* used for STP.  unused for SATA? */
501	buf_oaf = buf_tmp;
502	hdr->open_frame = cpu_to_le64(buf_tmp_dma);
503
504	buf_tmp += MVS_OAF_SZ;
505	buf_tmp_dma += MVS_OAF_SZ;
506
507	/* region 3: PRD table ********************************************* */
508	buf_prd = buf_tmp;
509
510	if (tei->n_elem)
511		hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
512	else
513		hdr->prd_tbl = 0;
514	i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
515
516	buf_tmp += i;
517	buf_tmp_dma += i;
518
519	/* region 4: status buffer (larger the PRD, smaller this buf) ****** */
520	slot->response = buf_tmp;
521	hdr->status_buf = cpu_to_le64(buf_tmp_dma);
522	if (mvi->flags & MVF_FLAG_SOC)
523		hdr->reserved[0] = 0;
524
525	req_len = sizeof(struct host_to_dev_fis);
526	resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
527	    sizeof(struct mvs_err_info) - i;
528
529	/* request, response lengths */
530	resp_len = min(resp_len, max_resp_len);
531	hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
532
533	if (likely(!task->ata_task.device_control_reg_update))
534		task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
535	/* fill in command FIS and ATAPI CDB */
536	memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
537	if (dev->sata_dev.command_set == ATAPI_COMMAND_SET)
538		memcpy(buf_cmd + STP_ATAPI_CMD,
539			task->ata_task.atapi_packet, 16);
540
541	/* generate open address frame hdr (first 12 bytes) */
542	/* initiator, STP, ftype 1h */
543	buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
544	buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
545	*(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
546	memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
547
548	/* fill in PRD (scatter/gather) table, if any */
549	MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
550
551	if (task->data_dir == DMA_FROM_DEVICE)
552		MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
553				TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
554
555	return 0;
556}
557
558static int mvs_task_prep_ssp(struct mvs_info *mvi,
559			     struct mvs_task_exec_info *tei, int is_tmf,
560			     struct mvs_tmf_task *tmf)
561{
562	struct sas_task *task = tei->task;
563	struct mvs_cmd_hdr *hdr = tei->hdr;
564	struct mvs_port *port = tei->port;
565	struct domain_device *dev = task->dev;
566	struct mvs_device *mvi_dev = dev->lldd_dev;
567	struct asd_sas_port *sas_port = dev->port;
568	struct mvs_slot_info *slot;
569	void *buf_prd;
570	struct ssp_frame_hdr *ssp_hdr;
571	void *buf_tmp;
572	u8 *buf_cmd, *buf_oaf, fburst = 0;
573	dma_addr_t buf_tmp_dma;
574	u32 flags;
575	u32 resp_len, req_len, i, tag = tei->tag;
576	const u32 max_resp_len = SB_RFB_MAX;
577	u32 phy_mask;
578
579	slot = &mvi->slot_info[tag];
580
581	phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
582		sas_port->phy_mask) & TXQ_PHY_MASK;
583
584	slot->tx = mvi->tx_prod;
585	mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
586				(TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
587				(phy_mask << TXQ_PHY_SHIFT));
588
589	flags = MCH_RETRY;
590	if (task->ssp_task.enable_first_burst) {
591		flags |= MCH_FBURST;
592		fburst = (1 << 7);
593	}
594	if (is_tmf)
595		flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
596	else
597		flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
598
599	hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
600	hdr->tags = cpu_to_le32(tag);
601	hdr->data_len = cpu_to_le32(task->total_xfer_len);
602
603	/*
604	 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
605	 */
606
607	/* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
608	buf_cmd = buf_tmp = slot->buf;
609	buf_tmp_dma = slot->buf_dma;
610
611	hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
612
613	buf_tmp += MVS_SSP_CMD_SZ;
614	buf_tmp_dma += MVS_SSP_CMD_SZ;
615
616	/* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
617	buf_oaf = buf_tmp;
618	hdr->open_frame = cpu_to_le64(buf_tmp_dma);
619
620	buf_tmp += MVS_OAF_SZ;
621	buf_tmp_dma += MVS_OAF_SZ;
622
623	/* region 3: PRD table ********************************************* */
624	buf_prd = buf_tmp;
625	if (tei->n_elem)
626		hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
627	else
628		hdr->prd_tbl = 0;
629
630	i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
631	buf_tmp += i;
632	buf_tmp_dma += i;
633
634	/* region 4: status buffer (larger the PRD, smaller this buf) ****** */
635	slot->response = buf_tmp;
636	hdr->status_buf = cpu_to_le64(buf_tmp_dma);
637	if (mvi->flags & MVF_FLAG_SOC)
638		hdr->reserved[0] = 0;
639
640	resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
641	    sizeof(struct mvs_err_info) - i;
642	resp_len = min(resp_len, max_resp_len);
643
644	req_len = sizeof(struct ssp_frame_hdr) + 28;
645
646	/* request, response lengths */
647	hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
648
649	/* generate open address frame hdr (first 12 bytes) */
650	/* initiator, SSP, ftype 1h */
651	buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
652	buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
653	*(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
654	memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
655
656	/* fill in SSP frame header (Command Table.SSP frame header) */
657	ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
658
659	if (is_tmf)
660		ssp_hdr->frame_type = SSP_TASK;
661	else
662		ssp_hdr->frame_type = SSP_COMMAND;
663
664	memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
665	       HASHED_SAS_ADDR_SIZE);
666	memcpy(ssp_hdr->hashed_src_addr,
667	       dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
668	ssp_hdr->tag = cpu_to_be16(tag);
669
670	/* fill in IU for TASK and Command Frame */
671	buf_cmd += sizeof(*ssp_hdr);
672	memcpy(buf_cmd, &task->ssp_task.LUN, 8);
673
674	if (ssp_hdr->frame_type != SSP_TASK) {
675		buf_cmd[9] = fburst | task->ssp_task.task_attr |
676				(task->ssp_task.task_prio << 3);
677		memcpy(buf_cmd + 12, &task->ssp_task.cdb, 16);
678	} else{
679		buf_cmd[10] = tmf->tmf;
680		switch (tmf->tmf) {
681		case TMF_ABORT_TASK:
682		case TMF_QUERY_TASK:
683			buf_cmd[12] =
684				(tmf->tag_of_task_to_be_managed >> 8) & 0xff;
685			buf_cmd[13] =
686				tmf->tag_of_task_to_be_managed & 0xff;
687			break;
688		default:
689			break;
690		}
691	}
692	/* fill in PRD (scatter/gather) table, if any */
693	MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
694	return 0;
695}
696
697#define	DEV_IS_GONE(mvi_dev)	((!mvi_dev || (mvi_dev->dev_type == NO_DEVICE)))
698static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
699				struct mvs_tmf_task *tmf, int *pass)
700{
701	struct domain_device *dev = task->dev;
702	struct mvs_device *mvi_dev = dev->lldd_dev;
703	struct mvs_task_exec_info tei;
704	struct mvs_slot_info *slot;
705	u32 tag = 0xdeadbeef, n_elem = 0;
706	int rc = 0;
707
708	if (!dev->port) {
709		struct task_status_struct *tsm = &task->task_status;
710
711		tsm->resp = SAS_TASK_UNDELIVERED;
712		tsm->stat = SAS_PHY_DOWN;
713		/*
714		 * libsas will use dev->port, should
715		 * not call task_done for sata
716		 */
717		if (dev->dev_type != SATA_DEV)
718			task->task_done(task);
719		return rc;
720	}
721
722	if (DEV_IS_GONE(mvi_dev)) {
723		if (mvi_dev)
724			mv_dprintk("device %d not ready.\n",
725				mvi_dev->device_id);
726		else
727			mv_dprintk("device %016llx not ready.\n",
728				SAS_ADDR(dev->sas_addr));
729
730			rc = SAS_PHY_DOWN;
731			return rc;
732	}
733	tei.port = dev->port->lldd_port;
734	if (tei.port && !tei.port->port_attached && !tmf) {
735		if (sas_protocol_ata(task->task_proto)) {
736			struct task_status_struct *ts = &task->task_status;
737			mv_dprintk("SATA/STP port %d does not attach"
738					"device.\n", dev->port->id);
739			ts->resp = SAS_TASK_COMPLETE;
740			ts->stat = SAS_PHY_DOWN;
741
742			task->task_done(task);
743
744		} else {
745			struct task_status_struct *ts = &task->task_status;
746			mv_dprintk("SAS port %d does not attach"
747				"device.\n", dev->port->id);
748			ts->resp = SAS_TASK_UNDELIVERED;
749			ts->stat = SAS_PHY_DOWN;
750			task->task_done(task);
751		}
752		return rc;
753	}
754
755	if (!sas_protocol_ata(task->task_proto)) {
756		if (task->num_scatter) {
757			n_elem = dma_map_sg(mvi->dev,
758					    task->scatter,
759					    task->num_scatter,
760					    task->data_dir);
761			if (!n_elem) {
762				rc = -ENOMEM;
763				goto prep_out;
764			}
765		}
766	} else {
767		n_elem = task->num_scatter;
768	}
769
770	rc = mvs_tag_alloc(mvi, &tag);
771	if (rc)
772		goto err_out;
773
774	slot = &mvi->slot_info[tag];
775
776	task->lldd_task = NULL;
777	slot->n_elem = n_elem;
778	slot->slot_tag = tag;
779
780	slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
781	if (!slot->buf)
782		goto err_out_tag;
783	memset(slot->buf, 0, MVS_SLOT_BUF_SZ);
784
785	tei.task = task;
786	tei.hdr = &mvi->slot[tag];
787	tei.tag = tag;
788	tei.n_elem = n_elem;
789	switch (task->task_proto) {
790	case SAS_PROTOCOL_SMP:
791		rc = mvs_task_prep_smp(mvi, &tei);
792		break;
793	case SAS_PROTOCOL_SSP:
794		rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
795		break;
796	case SAS_PROTOCOL_SATA:
797	case SAS_PROTOCOL_STP:
798	case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
799		rc = mvs_task_prep_ata(mvi, &tei);
800		break;
801	default:
802		dev_printk(KERN_ERR, mvi->dev,
803			"unknown sas_task proto: 0x%x\n",
804			task->task_proto);
805		rc = -EINVAL;
806		break;
807	}
808
809	if (rc) {
810		mv_dprintk("rc is %x\n", rc);
811		goto err_out_slot_buf;
812	}
813	slot->task = task;
814	slot->port = tei.port;
815	task->lldd_task = slot;
816	list_add_tail(&slot->entry, &tei.port->list);
817	spin_lock(&task->task_state_lock);
818	task->task_state_flags |= SAS_TASK_AT_INITIATOR;
819	spin_unlock(&task->task_state_lock);
820
821	mvi_dev->running_req++;
822	++(*pass);
823	mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
824
825	return rc;
826
827err_out_slot_buf:
828	pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
829err_out_tag:
830	mvs_tag_free(mvi, tag);
831err_out:
832
833	dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
834	if (!sas_protocol_ata(task->task_proto))
835		if (n_elem)
836			dma_unmap_sg(mvi->dev, task->scatter, n_elem,
837				     task->data_dir);
838prep_out:
839	return rc;
840}
841
842static struct mvs_task_list *mvs_task_alloc_list(int *num, gfp_t gfp_flags)
843{
844	struct mvs_task_list *first = NULL;
845
846	for (; *num > 0; --*num) {
847		struct mvs_task_list *mvs_list = kmem_cache_zalloc(mvs_task_list_cache, gfp_flags);
848
849		if (!mvs_list)
850			break;
851
852		INIT_LIST_HEAD(&mvs_list->list);
853		if (!first)
854			first = mvs_list;
855		else
856			list_add_tail(&mvs_list->list, &first->list);
857
858	}
859
860	return first;
861}
862
863static inline void mvs_task_free_list(struct mvs_task_list *mvs_list)
864{
865	LIST_HEAD(list);
866	struct list_head *pos, *a;
867	struct mvs_task_list *mlist = NULL;
868
869	__list_add(&list, mvs_list->list.prev, &mvs_list->list);
870
871	list_for_each_safe(pos, a, &list) {
872		list_del_init(pos);
873		mlist = list_entry(pos, struct mvs_task_list, list);
874		kmem_cache_free(mvs_task_list_cache, mlist);
875	}
876}
877
878static int mvs_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
879				struct completion *completion, int is_tmf,
880				struct mvs_tmf_task *tmf)
881{
882	struct domain_device *dev = task->dev;
883	struct mvs_info *mvi = NULL;
884	u32 rc = 0;
885	u32 pass = 0;
886	unsigned long flags = 0;
887
888	mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
889
890	if ((dev->dev_type == SATA_DEV) && (dev->sata_dev.ap != NULL))
891		spin_unlock_irq(dev->sata_dev.ap->lock);
892
893	spin_lock_irqsave(&mvi->lock, flags);
894	rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
895	if (rc)
896		dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
897
898	if (likely(pass))
899			MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
900				(MVS_CHIP_SLOT_SZ - 1));
901	spin_unlock_irqrestore(&mvi->lock, flags);
902
903	if ((dev->dev_type == SATA_DEV) && (dev->sata_dev.ap != NULL))
904		spin_lock_irq(dev->sata_dev.ap->lock);
905
906	return rc;
907}
908
909static int mvs_collector_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
910				struct completion *completion, int is_tmf,
911				struct mvs_tmf_task *tmf)
912{
913	struct domain_device *dev = task->dev;
914	struct mvs_prv_info *mpi = dev->port->ha->lldd_ha;
915	struct mvs_info *mvi = NULL;
916	struct sas_task *t = task;
917	struct mvs_task_list *mvs_list = NULL, *a;
918	LIST_HEAD(q);
919	int pass[2] = {0};
920	u32 rc = 0;
921	u32 n = num;
922	unsigned long flags = 0;
923
924	mvs_list = mvs_task_alloc_list(&n, gfp_flags);
925	if (n) {
926		printk(KERN_ERR "%s: mvs alloc list failed.\n", __func__);
927		rc = -ENOMEM;
928		goto free_list;
929	}
930
931	__list_add(&q, mvs_list->list.prev, &mvs_list->list);
932
933	list_for_each_entry(a, &q, list) {
934		a->task = t;
935		t = list_entry(t->list.next, struct sas_task, list);
936	}
937
938	list_for_each_entry(a, &q , list) {
939
940		t = a->task;
941		mvi = ((struct mvs_device *)t->dev->lldd_dev)->mvi_info;
942
943		spin_lock_irqsave(&mvi->lock, flags);
944		rc = mvs_task_prep(t, mvi, is_tmf, tmf, &pass[mvi->id]);
945		if (rc)
946			dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
947		spin_unlock_irqrestore(&mvi->lock, flags);
948	}
949
950	if (likely(pass[0]))
951			MVS_CHIP_DISP->start_delivery(mpi->mvi[0],
952				(mpi->mvi[0]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
953
954	if (likely(pass[1]))
955			MVS_CHIP_DISP->start_delivery(mpi->mvi[1],
956				(mpi->mvi[1]->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
957
958	list_del_init(&q);
959
960free_list:
961	if (mvs_list)
962		mvs_task_free_list(mvs_list);
963
964	return rc;
965}
966
967int mvs_queue_command(struct sas_task *task, const int num,
968			gfp_t gfp_flags)
969{
970	struct mvs_device *mvi_dev = task->dev->lldd_dev;
971	struct sas_ha_struct *sas = mvi_dev->mvi_info->sas;
972
973	if (sas->lldd_max_execute_num < 2)
974		return mvs_task_exec(task, num, gfp_flags, NULL, 0, NULL);
975	else
976		return mvs_collector_task_exec(task, num, gfp_flags, NULL, 0, NULL);
977}
978
979static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
980{
981	u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
982	mvs_tag_clear(mvi, slot_idx);
983}
984
985static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
986			  struct mvs_slot_info *slot, u32 slot_idx)
987{
988	if (!slot->task)
989		return;
990	if (!sas_protocol_ata(task->task_proto))
991		if (slot->n_elem)
992			dma_unmap_sg(mvi->dev, task->scatter,
993				     slot->n_elem, task->data_dir);
994
995	switch (task->task_proto) {
996	case SAS_PROTOCOL_SMP:
997		dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
998			     PCI_DMA_FROMDEVICE);
999		dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
1000			     PCI_DMA_TODEVICE);
1001		break;
1002
1003	case SAS_PROTOCOL_SATA:
1004	case SAS_PROTOCOL_STP:
1005	case SAS_PROTOCOL_SSP:
1006	default:
1007		/* do nothing */
1008		break;
1009	}
1010
1011	if (slot->buf) {
1012		pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
1013		slot->buf = NULL;
1014	}
1015	list_del_init(&slot->entry);
1016	task->lldd_task = NULL;
1017	slot->task = NULL;
1018	slot->port = NULL;
1019	slot->slot_tag = 0xFFFFFFFF;
1020	mvs_slot_free(mvi, slot_idx);
1021}
1022
1023static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
1024{
1025	struct mvs_phy *phy = &mvi->phy[phy_no];
1026	struct mvs_port *port = phy->port;
1027	int j, no;
1028
1029	for_each_phy(port->wide_port_phymap, j, no) {
1030		if (j & 1) {
1031			MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1032						PHYR_WIDE_PORT);
1033			MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1034						port->wide_port_phymap);
1035		} else {
1036			MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1037						PHYR_WIDE_PORT);
1038			MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1039						0);
1040		}
1041	}
1042}
1043
1044static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
1045{
1046	u32 tmp;
1047	struct mvs_phy *phy = &mvi->phy[i];
1048	struct mvs_port *port = phy->port;
1049
1050	tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
1051	if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
1052		if (!port)
1053			phy->phy_attached = 1;
1054		return tmp;
1055	}
1056
1057	if (port) {
1058		if (phy->phy_type & PORT_TYPE_SAS) {
1059			port->wide_port_phymap &= ~(1U << i);
1060			if (!port->wide_port_phymap)
1061				port->port_attached = 0;
1062			mvs_update_wideport(mvi, i);
1063		} else if (phy->phy_type & PORT_TYPE_SATA)
1064			port->port_attached = 0;
1065		phy->port = NULL;
1066		phy->phy_attached = 0;
1067		phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
1068	}
1069	return 0;
1070}
1071
1072static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
1073{
1074	u32 *s = (u32 *) buf;
1075
1076	if (!s)
1077		return NULL;
1078
1079	MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
1080	s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
1081
1082	MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
1083	s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
1084
1085	MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
1086	s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
1087
1088	MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
1089	s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
1090
1091	if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
1092		s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
1093
1094	return s;
1095}
1096
1097static u32 mvs_is_sig_fis_received(u32 irq_status)
1098{
1099	return irq_status & PHYEV_SIG_FIS;
1100}
1101
1102static void mvs_sig_remove_timer(struct mvs_phy *phy)
1103{
1104	if (phy->timer.function)
1105		del_timer(&phy->timer);
1106	phy->timer.function = NULL;
1107}
1108
1109void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
1110{
1111	struct mvs_phy *phy = &mvi->phy[i];
1112	struct sas_identify_frame *id;
1113
1114	id = (struct sas_identify_frame *)phy->frame_rcvd;
1115
1116	if (get_st) {
1117		phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
1118		phy->phy_status = mvs_is_phy_ready(mvi, i);
1119	}
1120
1121	if (phy->phy_status) {
1122		int oob_done = 0;
1123		struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
1124
1125		oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1126
1127		MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1128		if (phy->phy_type & PORT_TYPE_SATA) {
1129			phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1130			if (mvs_is_sig_fis_received(phy->irq_status)) {
1131				mvs_sig_remove_timer(phy);
1132				phy->phy_attached = 1;
1133				phy->att_dev_sas_addr =
1134					i + mvi->id * mvi->chip->n_phy;
1135				if (oob_done)
1136					sas_phy->oob_mode = SATA_OOB_MODE;
1137				phy->frame_rcvd_size =
1138				    sizeof(struct dev_to_host_fis);
1139				mvs_get_d2h_reg(mvi, i, id);
1140			} else {
1141				u32 tmp;
1142				dev_printk(KERN_DEBUG, mvi->dev,
1143					"Phy%d : No sig fis\n", i);
1144				tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1145				MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1146						tmp | PHYEV_SIG_FIS);
1147				phy->phy_attached = 0;
1148				phy->phy_type &= ~PORT_TYPE_SATA;
1149				goto out_done;
1150			}
1151		}	else if (phy->phy_type & PORT_TYPE_SAS
1152			|| phy->att_dev_info & PORT_SSP_INIT_MASK) {
1153			phy->phy_attached = 1;
1154			phy->identify.device_type =
1155				phy->att_dev_info & PORT_DEV_TYPE_MASK;
1156
1157			if (phy->identify.device_type == SAS_END_DEV)
1158				phy->identify.target_port_protocols =
1159							SAS_PROTOCOL_SSP;
1160			else if (phy->identify.device_type != NO_DEVICE)
1161				phy->identify.target_port_protocols =
1162							SAS_PROTOCOL_SMP;
1163			if (oob_done)
1164				sas_phy->oob_mode = SAS_OOB_MODE;
1165			phy->frame_rcvd_size =
1166			    sizeof(struct sas_identify_frame);
1167		}
1168		memcpy(sas_phy->attached_sas_addr,
1169			&phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1170
1171		if (MVS_CHIP_DISP->phy_work_around)
1172			MVS_CHIP_DISP->phy_work_around(mvi, i);
1173	}
1174	mv_dprintk("phy %d attach dev info is %x\n",
1175		i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1176	mv_dprintk("phy %d attach sas addr is %llx\n",
1177		i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1178out_done:
1179	if (get_st)
1180		MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1181}
1182
1183static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1184{
1185	struct sas_ha_struct *sas_ha = sas_phy->ha;
1186	struct mvs_info *mvi = NULL; int i = 0, hi;
1187	struct mvs_phy *phy = sas_phy->lldd_phy;
1188	struct asd_sas_port *sas_port = sas_phy->port;
1189	struct mvs_port *port;
1190	unsigned long flags = 0;
1191	if (!sas_port)
1192		return;
1193
1194	while (sas_ha->sas_phy[i]) {
1195		if (sas_ha->sas_phy[i] == sas_phy)
1196			break;
1197		i++;
1198	}
1199	hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1200	mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1201	if (i >= mvi->chip->n_phy)
1202		port = &mvi->port[i - mvi->chip->n_phy];
1203	else
1204		port = &mvi->port[i];
1205	if (lock)
1206		spin_lock_irqsave(&mvi->lock, flags);
1207	port->port_attached = 1;
1208	phy->port = port;
1209	sas_port->lldd_port = port;
1210	if (phy->phy_type & PORT_TYPE_SAS) {
1211		port->wide_port_phymap = sas_port->phy_mask;
1212		mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1213		mvs_update_wideport(mvi, sas_phy->id);
1214	}
1215	if (lock)
1216		spin_unlock_irqrestore(&mvi->lock, flags);
1217}
1218
1219static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1220{
1221	struct domain_device *dev;
1222	struct mvs_phy *phy = sas_phy->lldd_phy;
1223	struct mvs_info *mvi = phy->mvi;
1224	struct asd_sas_port *port = sas_phy->port;
1225	int phy_no = 0;
1226
1227	while (phy != &mvi->phy[phy_no]) {
1228		phy_no++;
1229		if (phy_no >= MVS_MAX_PHYS)
1230			return;
1231	}
1232	list_for_each_entry(dev, &port->dev_list, dev_list_node)
1233		mvs_do_release_task(phy->mvi, phy_no, dev);
1234
1235}
1236
1237
1238void mvs_port_formed(struct asd_sas_phy *sas_phy)
1239{
1240	mvs_port_notify_formed(sas_phy, 1);
1241}
1242
1243void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1244{
1245	mvs_port_notify_deformed(sas_phy, 1);
1246}
1247
1248struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1249{
1250	u32 dev;
1251	for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1252		if (mvi->devices[dev].dev_type == NO_DEVICE) {
1253			mvi->devices[dev].device_id = dev;
1254			return &mvi->devices[dev];
1255		}
1256	}
1257
1258	if (dev == MVS_MAX_DEVICES)
1259		mv_printk("max support %d devices, ignore ..\n",
1260			MVS_MAX_DEVICES);
1261
1262	return NULL;
1263}
1264
1265void mvs_free_dev(struct mvs_device *mvi_dev)
1266{
1267	u32 id = mvi_dev->device_id;
1268	memset(mvi_dev, 0, sizeof(*mvi_dev));
1269	mvi_dev->device_id = id;
1270	mvi_dev->dev_type = NO_DEVICE;
1271	mvi_dev->dev_status = MVS_DEV_NORMAL;
1272	mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1273}
1274
1275int mvs_dev_found_notify(struct domain_device *dev, int lock)
1276{
1277	unsigned long flags = 0;
1278	int res = 0;
1279	struct mvs_info *mvi = NULL;
1280	struct domain_device *parent_dev = dev->parent;
1281	struct mvs_device *mvi_device;
1282
1283	mvi = mvs_find_dev_mvi(dev);
1284
1285	if (lock)
1286		spin_lock_irqsave(&mvi->lock, flags);
1287
1288	mvi_device = mvs_alloc_dev(mvi);
1289	if (!mvi_device) {
1290		res = -1;
1291		goto found_out;
1292	}
1293	dev->lldd_dev = mvi_device;
1294	mvi_device->dev_status = MVS_DEV_NORMAL;
1295	mvi_device->dev_type = dev->dev_type;
1296	mvi_device->mvi_info = mvi;
1297	mvi_device->sas_device = dev;
1298	if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
1299		int phy_id;
1300		u8 phy_num = parent_dev->ex_dev.num_phys;
1301		struct ex_phy *phy;
1302		for (phy_id = 0; phy_id < phy_num; phy_id++) {
1303			phy = &parent_dev->ex_dev.ex_phy[phy_id];
1304			if (SAS_ADDR(phy->attached_sas_addr) ==
1305				SAS_ADDR(dev->sas_addr)) {
1306				mvi_device->attached_phy = phy_id;
1307				break;
1308			}
1309		}
1310
1311		if (phy_id == phy_num) {
1312			mv_printk("Error: no attached dev:%016llx"
1313				"at ex:%016llx.\n",
1314				SAS_ADDR(dev->sas_addr),
1315				SAS_ADDR(parent_dev->sas_addr));
1316			res = -1;
1317		}
1318	}
1319
1320found_out:
1321	if (lock)
1322		spin_unlock_irqrestore(&mvi->lock, flags);
1323	return res;
1324}
1325
1326int mvs_dev_found(struct domain_device *dev)
1327{
1328	return mvs_dev_found_notify(dev, 1);
1329}
1330
1331void mvs_dev_gone_notify(struct domain_device *dev)
1332{
1333	unsigned long flags = 0;
1334	struct mvs_device *mvi_dev = dev->lldd_dev;
1335	struct mvs_info *mvi = mvi_dev->mvi_info;
1336
1337	spin_lock_irqsave(&mvi->lock, flags);
1338
1339	if (mvi_dev) {
1340		mv_dprintk("found dev[%d:%x] is gone.\n",
1341			mvi_dev->device_id, mvi_dev->dev_type);
1342		mvs_release_task(mvi, dev);
1343		mvs_free_reg_set(mvi, mvi_dev);
1344		mvs_free_dev(mvi_dev);
1345	} else {
1346		mv_dprintk("found dev has gone.\n");
1347	}
1348	dev->lldd_dev = NULL;
1349	mvi_dev->sas_device = NULL;
1350
1351	spin_unlock_irqrestore(&mvi->lock, flags);
1352}
1353
1354
1355void mvs_dev_gone(struct domain_device *dev)
1356{
1357	mvs_dev_gone_notify(dev);
1358}
1359
1360static void mvs_task_done(struct sas_task *task)
1361{
1362	if (!del_timer(&task->timer))
1363		return;
1364	complete(&task->completion);
1365}
1366
1367static void mvs_tmf_timedout(unsigned long data)
1368{
1369	struct sas_task *task = (struct sas_task *)data;
1370
1371	task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1372	complete(&task->completion);
1373}
1374
1375#define MVS_TASK_TIMEOUT 20
1376static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1377			void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1378{
1379	int res, retry;
1380	struct sas_task *task = NULL;
1381
1382	for (retry = 0; retry < 3; retry++) {
1383		task = sas_alloc_task(GFP_KERNEL);
1384		if (!task)
1385			return -ENOMEM;
1386
1387		task->dev = dev;
1388		task->task_proto = dev->tproto;
1389
1390		memcpy(&task->ssp_task, parameter, para_len);
1391		task->task_done = mvs_task_done;
1392
1393		task->timer.data = (unsigned long) task;
1394		task->timer.function = mvs_tmf_timedout;
1395		task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1396		add_timer(&task->timer);
1397
1398		res = mvs_task_exec(task, 1, GFP_KERNEL, NULL, 1, tmf);
1399
1400		if (res) {
1401			del_timer(&task->timer);
1402			mv_printk("executing internel task failed:%d\n", res);
1403			goto ex_err;
1404		}
1405
1406		wait_for_completion(&task->completion);
1407		res = TMF_RESP_FUNC_FAILED;
1408		/* Even TMF timed out, return direct. */
1409		if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1410			if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1411				mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1412				goto ex_err;
1413			}
1414		}
1415
1416		if (task->task_status.resp == SAS_TASK_COMPLETE &&
1417		    task->task_status.stat == SAM_STAT_GOOD) {
1418			res = TMF_RESP_FUNC_COMPLETE;
1419			break;
1420		}
1421
1422		if (task->task_status.resp == SAS_TASK_COMPLETE &&
1423		      task->task_status.stat == SAS_DATA_UNDERRUN) {
1424			/* no error, but return the number of bytes of
1425			 * underrun */
1426			res = task->task_status.residual;
1427			break;
1428		}
1429
1430		if (task->task_status.resp == SAS_TASK_COMPLETE &&
1431		      task->task_status.stat == SAS_DATA_OVERRUN) {
1432			mv_dprintk("blocked task error.\n");
1433			res = -EMSGSIZE;
1434			break;
1435		} else {
1436			mv_dprintk(" task to dev %016llx response: 0x%x "
1437				    "status 0x%x\n",
1438				    SAS_ADDR(dev->sas_addr),
1439				    task->task_status.resp,
1440				    task->task_status.stat);
1441			sas_free_task(task);
1442			task = NULL;
1443
1444		}
1445	}
1446ex_err:
1447	BUG_ON(retry == 3 && task != NULL);
1448	sas_free_task(task);
1449	return res;
1450}
1451
1452static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1453				u8 *lun, struct mvs_tmf_task *tmf)
1454{
1455	struct sas_ssp_task ssp_task;
1456	if (!(dev->tproto & SAS_PROTOCOL_SSP))
1457		return TMF_RESP_FUNC_ESUPP;
1458
1459	memcpy(ssp_task.LUN, lun, 8);
1460
1461	return mvs_exec_internal_tmf_task(dev, &ssp_task,
1462				sizeof(ssp_task), tmf);
1463}
1464
1465
1466/*  Standard mandates link reset for ATA  (type 0)
1467    and hard reset for SSP (type 1) , only for RECOVERY */
1468static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1469{
1470	int rc;
1471	struct sas_phy *phy = sas_find_local_phy(dev);
1472	int reset_type = (dev->dev_type == SATA_DEV ||
1473			(dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1474	rc = sas_phy_reset(phy, reset_type);
1475	msleep(2000);
1476	return rc;
1477}
1478
1479/* mandatory SAM-3 */
1480int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1481{
1482	unsigned long flags;
1483	int rc = TMF_RESP_FUNC_FAILED;
1484	struct mvs_tmf_task tmf_task;
1485	struct mvs_device * mvi_dev = dev->lldd_dev;
1486	struct mvs_info *mvi = mvi_dev->mvi_info;
1487
1488	tmf_task.tmf = TMF_LU_RESET;
1489	mvi_dev->dev_status = MVS_DEV_EH;
1490	rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1491	if (rc == TMF_RESP_FUNC_COMPLETE) {
1492		spin_lock_irqsave(&mvi->lock, flags);
1493		mvs_release_task(mvi, dev);
1494		spin_unlock_irqrestore(&mvi->lock, flags);
1495	}
1496	/* If failed, fall-through I_T_Nexus reset */
1497	mv_printk("%s for device[%x]:rc= %d\n", __func__,
1498			mvi_dev->device_id, rc);
1499	return rc;
1500}
1501
1502int mvs_I_T_nexus_reset(struct domain_device *dev)
1503{
1504	unsigned long flags;
1505	int rc = TMF_RESP_FUNC_FAILED;
1506    struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev;
1507	struct mvs_info *mvi = mvi_dev->mvi_info;
1508
1509	if (mvi_dev->dev_status != MVS_DEV_EH)
1510		return TMF_RESP_FUNC_COMPLETE;
1511	else
1512		mvi_dev->dev_status = MVS_DEV_NORMAL;
1513	rc = mvs_debug_I_T_nexus_reset(dev);
1514	mv_printk("%s for device[%x]:rc= %d\n",
1515		__func__, mvi_dev->device_id, rc);
1516
1517	spin_lock_irqsave(&mvi->lock, flags);
1518	mvs_release_task(mvi, dev);
1519	spin_unlock_irqrestore(&mvi->lock, flags);
1520
1521	return rc;
1522}
1523/* optional SAM-3 */
1524int mvs_query_task(struct sas_task *task)
1525{
1526	u32 tag;
1527	struct scsi_lun lun;
1528	struct mvs_tmf_task tmf_task;
1529	int rc = TMF_RESP_FUNC_FAILED;
1530
1531	if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1532		struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1533		struct domain_device *dev = task->dev;
1534		struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1535		struct mvs_info *mvi = mvi_dev->mvi_info;
1536
1537		int_to_scsilun(cmnd->device->lun, &lun);
1538		rc = mvs_find_tag(mvi, task, &tag);
1539		if (rc == 0) {
1540			rc = TMF_RESP_FUNC_FAILED;
1541			return rc;
1542		}
1543
1544		tmf_task.tmf = TMF_QUERY_TASK;
1545		tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1546
1547		rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1548		switch (rc) {
1549		/* The task is still in Lun, release it then */
1550		case TMF_RESP_FUNC_SUCC:
1551		/* The task is not in Lun or failed, reset the phy */
1552		case TMF_RESP_FUNC_FAILED:
1553		case TMF_RESP_FUNC_COMPLETE:
1554			break;
1555		}
1556	}
1557	mv_printk("%s:rc= %d\n", __func__, rc);
1558	return rc;
1559}
1560
1561/*  mandatory SAM-3, still need free task/slot info */
1562int mvs_abort_task(struct sas_task *task)
1563{
1564	struct scsi_lun lun;
1565	struct mvs_tmf_task tmf_task;
1566	struct domain_device *dev = task->dev;
1567	struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1568	struct mvs_info *mvi;
1569	int rc = TMF_RESP_FUNC_FAILED;
1570	unsigned long flags;
1571	u32 tag;
1572
1573	if (!mvi_dev) {
1574		mv_printk("Device has removed\n");
1575		return TMF_RESP_FUNC_FAILED;
1576	}
1577
1578	mvi = mvi_dev->mvi_info;
1579
1580	spin_lock_irqsave(&task->task_state_lock, flags);
1581	if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1582		spin_unlock_irqrestore(&task->task_state_lock, flags);
1583		rc = TMF_RESP_FUNC_COMPLETE;
1584		goto out;
1585	}
1586	spin_unlock_irqrestore(&task->task_state_lock, flags);
1587	mvi_dev->dev_status = MVS_DEV_EH;
1588	if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1589		struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1590
1591		int_to_scsilun(cmnd->device->lun, &lun);
1592		rc = mvs_find_tag(mvi, task, &tag);
1593		if (rc == 0) {
1594			mv_printk("No such tag in %s\n", __func__);
1595			rc = TMF_RESP_FUNC_FAILED;
1596			return rc;
1597		}
1598
1599		tmf_task.tmf = TMF_ABORT_TASK;
1600		tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1601
1602		rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1603
1604		/* if successful, clear the task and callback forwards.*/
1605		if (rc == TMF_RESP_FUNC_COMPLETE) {
1606			u32 slot_no;
1607			struct mvs_slot_info *slot;
1608
1609			if (task->lldd_task) {
1610				slot = task->lldd_task;
1611				slot_no = (u32) (slot - mvi->slot_info);
1612				spin_lock_irqsave(&mvi->lock, flags);
1613				mvs_slot_complete(mvi, slot_no, 1);
1614				spin_unlock_irqrestore(&mvi->lock, flags);
1615			}
1616		}
1617
1618	} else if (task->task_proto & SAS_PROTOCOL_SATA ||
1619		task->task_proto & SAS_PROTOCOL_STP) {
1620		if (SATA_DEV == dev->dev_type) {
1621			struct mvs_slot_info *slot = task->lldd_task;
1622			u32 slot_idx = (u32)(slot - mvi->slot_info);
1623			mv_dprintk("mvs_abort_task() mvi=%p task=%p "
1624				   "slot=%p slot_idx=x%x\n",
1625				   mvi, task, slot, slot_idx);
1626			mvs_tmf_timedout((unsigned long)task);
1627			mvs_slot_task_free(mvi, task, slot, slot_idx);
1628			rc = TMF_RESP_FUNC_COMPLETE;
1629			goto out;
1630		}
1631
1632	}
1633out:
1634	if (rc != TMF_RESP_FUNC_COMPLETE)
1635		mv_printk("%s:rc= %d\n", __func__, rc);
1636	return rc;
1637}
1638
1639int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
1640{
1641	int rc = TMF_RESP_FUNC_FAILED;
1642	struct mvs_tmf_task tmf_task;
1643
1644	tmf_task.tmf = TMF_ABORT_TASK_SET;
1645	rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1646
1647	return rc;
1648}
1649
1650int mvs_clear_aca(struct domain_device *dev, u8 *lun)
1651{
1652	int rc = TMF_RESP_FUNC_FAILED;
1653	struct mvs_tmf_task tmf_task;
1654
1655	tmf_task.tmf = TMF_CLEAR_ACA;
1656	rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1657
1658	return rc;
1659}
1660
1661int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1662{
1663	int rc = TMF_RESP_FUNC_FAILED;
1664	struct mvs_tmf_task tmf_task;
1665
1666	tmf_task.tmf = TMF_CLEAR_TASK_SET;
1667	rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1668
1669	return rc;
1670}
1671
1672static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1673			u32 slot_idx, int err)
1674{
1675	struct mvs_device *mvi_dev = task->dev->lldd_dev;
1676	struct task_status_struct *tstat = &task->task_status;
1677	struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1678	int stat = SAM_STAT_GOOD;
1679
1680
1681	resp->frame_len = sizeof(struct dev_to_host_fis);
1682	memcpy(&resp->ending_fis[0],
1683	       SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1684	       sizeof(struct dev_to_host_fis));
1685	tstat->buf_valid_size = sizeof(*resp);
1686	if (unlikely(err)) {
1687		if (unlikely(err & CMD_ISS_STPD))
1688			stat = SAS_OPEN_REJECT;
1689		else
1690			stat = SAS_PROTO_RESPONSE;
1691       }
1692
1693	return stat;
1694}
1695
1696void mvs_set_sense(u8 *buffer, int len, int d_sense,
1697		int key, int asc, int ascq)
1698{
1699	memset(buffer, 0, len);
1700
1701	if (d_sense) {
1702		/* Descriptor format */
1703		if (len < 4) {
1704			mv_printk("Length %d of sense buffer too small to "
1705				"fit sense %x:%x:%x", len, key, asc, ascq);
1706		}
1707
1708		buffer[0] = 0x72;		/* Response Code	*/
1709		if (len > 1)
1710			buffer[1] = key;	/* Sense Key */
1711		if (len > 2)
1712			buffer[2] = asc;	/* ASC	*/
1713		if (len > 3)
1714			buffer[3] = ascq;	/* ASCQ	*/
1715	} else {
1716		if (len < 14) {
1717			mv_printk("Length %d of sense buffer too small to "
1718				"fit sense %x:%x:%x", len, key, asc, ascq);
1719		}
1720
1721		buffer[0] = 0x70;		/* Response Code	*/
1722		if (len > 2)
1723			buffer[2] = key;	/* Sense Key */
1724		if (len > 7)
1725			buffer[7] = 0x0a;	/* Additional Sense Length */
1726		if (len > 12)
1727			buffer[12] = asc;	/* ASC */
1728		if (len > 13)
1729			buffer[13] = ascq; /* ASCQ */
1730	}
1731
1732	return;
1733}
1734
1735void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1736				u8 key, u8 asc, u8 asc_q)
1737{
1738	iu->datapres = 2;
1739	iu->response_data_len = 0;
1740	iu->sense_data_len = 17;
1741	iu->status = 02;
1742	mvs_set_sense(iu->sense_data, 17, 0,
1743			key, asc, asc_q);
1744}
1745
1746static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1747			 u32 slot_idx)
1748{
1749	struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1750	int stat;
1751	u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
1752	u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
1753	u32 tfs = 0;
1754	enum mvs_port_type type = PORT_TYPE_SAS;
1755
1756	if (err_dw0 & CMD_ISS_STPD)
1757		MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1758
1759	MVS_CHIP_DISP->command_active(mvi, slot_idx);
1760
1761	stat = SAM_STAT_CHECK_CONDITION;
1762	switch (task->task_proto) {
1763	case SAS_PROTOCOL_SSP:
1764	{
1765		stat = SAS_ABORTED_TASK;
1766		if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1767			struct ssp_response_iu *iu = slot->response +
1768				sizeof(struct mvs_err_info);
1769			mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1770			sas_ssp_task_response(mvi->dev, task, iu);
1771			stat = SAM_STAT_CHECK_CONDITION;
1772		}
1773		if (err_dw1 & bit(31))
1774			mv_printk("reuse same slot, retry command.\n");
1775		break;
1776	}
1777	case SAS_PROTOCOL_SMP:
1778		stat = SAM_STAT_CHECK_CONDITION;
1779		break;
1780
1781	case SAS_PROTOCOL_SATA:
1782	case SAS_PROTOCOL_STP:
1783	case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1784	{
1785		task->ata_task.use_ncq = 0;
1786		stat = SAS_PROTO_RESPONSE;
1787		mvs_sata_done(mvi, task, slot_idx, err_dw0);
1788	}
1789		break;
1790	default:
1791		break;
1792	}
1793
1794	return stat;
1795}
1796
1797int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1798{
1799	u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1800	struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1801	struct sas_task *task = slot->task;
1802	struct mvs_device *mvi_dev = NULL;
1803	struct task_status_struct *tstat;
1804	struct domain_device *dev;
1805	u32 aborted;
1806
1807	void *to;
1808	enum exec_status sts;
1809
1810	if (unlikely(!task || !task->lldd_task || !task->dev))
1811		return -1;
1812
1813	tstat = &task->task_status;
1814	dev = task->dev;
1815	mvi_dev = dev->lldd_dev;
1816
1817	spin_lock(&task->task_state_lock);
1818	task->task_state_flags &=
1819		~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1820	task->task_state_flags |= SAS_TASK_STATE_DONE;
1821	/* race condition*/
1822	aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1823	spin_unlock(&task->task_state_lock);
1824
1825	memset(tstat, 0, sizeof(*tstat));
1826	tstat->resp = SAS_TASK_COMPLETE;
1827
1828	if (unlikely(aborted)) {
1829		tstat->stat = SAS_ABORTED_TASK;
1830		if (mvi_dev && mvi_dev->running_req)
1831			mvi_dev->running_req--;
1832		if (sas_protocol_ata(task->task_proto))
1833			mvs_free_reg_set(mvi, mvi_dev);
1834
1835		mvs_slot_task_free(mvi, task, slot, slot_idx);
1836		return -1;
1837	}
1838
1839	/* when no device attaching, go ahead and complete by error handling*/
1840	if (unlikely(!mvi_dev || flags)) {
1841		if (!mvi_dev)
1842			mv_dprintk("port has not device.\n");
1843		tstat->stat = SAS_PHY_DOWN;
1844		goto out;
1845	}
1846
1847	/* error info record present */
1848	if (unlikely((rx_desc & RXQ_ERR) && (*(u64 *) slot->response))) {
1849		mv_dprintk("port %d slot %d rx_desc %X has error info"
1850			"%016llX.\n", slot->port->sas_port.id, slot_idx,
1851			 rx_desc, (u64)(*(u64 *)slot->response));
1852		tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1853		tstat->resp = SAS_TASK_COMPLETE;
1854		goto out;
1855	}
1856
1857	switch (task->task_proto) {
1858	case SAS_PROTOCOL_SSP:
1859		/* hw says status == 0, datapres == 0 */
1860		if (rx_desc & RXQ_GOOD) {
1861			tstat->stat = SAM_STAT_GOOD;
1862			tstat->resp = SAS_TASK_COMPLETE;
1863		}
1864		/* response frame present */
1865		else if (rx_desc & RXQ_RSP) {
1866			struct ssp_response_iu *iu = slot->response +
1867						sizeof(struct mvs_err_info);
1868			sas_ssp_task_response(mvi->dev, task, iu);
1869		} else
1870			tstat->stat = SAM_STAT_CHECK_CONDITION;
1871		break;
1872
1873	case SAS_PROTOCOL_SMP: {
1874			struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1875			tstat->stat = SAM_STAT_GOOD;
1876			to = kmap_atomic(sg_page(sg_resp), KM_IRQ0);
1877			memcpy(to + sg_resp->offset,
1878				slot->response + sizeof(struct mvs_err_info),
1879				sg_dma_len(sg_resp));
1880			kunmap_atomic(to, KM_IRQ0);
1881			break;
1882		}
1883
1884	case SAS_PROTOCOL_SATA:
1885	case SAS_PROTOCOL_STP:
1886	case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1887			tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1888			break;
1889		}
1890
1891	default:
1892		tstat->stat = SAM_STAT_CHECK_CONDITION;
1893		break;
1894	}
1895	if (!slot->port->port_attached) {
1896		mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1897		tstat->stat = SAS_PHY_DOWN;
1898	}
1899
1900
1901out:
1902	if (mvi_dev && mvi_dev->running_req) {
1903		mvi_dev->running_req--;
1904		if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
1905			mvs_free_reg_set(mvi, mvi_dev);
1906	}
1907	mvs_slot_task_free(mvi, task, slot, slot_idx);
1908	sts = tstat->stat;
1909
1910	spin_unlock(&mvi->lock);
1911	if (task->task_done)
1912		task->task_done(task);
1913
1914	spin_lock(&mvi->lock);
1915
1916	return sts;
1917}
1918
1919void mvs_do_release_task(struct mvs_info *mvi,
1920		int phy_no, struct domain_device *dev)
1921{
1922	u32 slot_idx;
1923	struct mvs_phy *phy;
1924	struct mvs_port *port;
1925	struct mvs_slot_info *slot, *slot2;
1926
1927	phy = &mvi->phy[phy_no];
1928	port = phy->port;
1929	if (!port)
1930		return;
1931	/* clean cmpl queue in case request is already finished */
1932	mvs_int_rx(mvi, false);
1933
1934
1935
1936	list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1937		struct sas_task *task;
1938		slot_idx = (u32) (slot - mvi->slot_info);
1939		task = slot->task;
1940
1941		if (dev && task->dev != dev)
1942			continue;
1943
1944		mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1945			slot_idx, slot->slot_tag, task);
1946		MVS_CHIP_DISP->command_active(mvi, slot_idx);
1947
1948		mvs_slot_complete(mvi, slot_idx, 1);
1949	}
1950}
1951
1952void mvs_release_task(struct mvs_info *mvi,
1953		      struct domain_device *dev)
1954{
1955	int i, phyno[WIDE_PORT_MAX_PHY], num;
1956	num = mvs_find_dev_phyno(dev, phyno);
1957	for (i = 0; i < num; i++)
1958		mvs_do_release_task(mvi, phyno[i], dev);
1959}
1960
1961static void mvs_phy_disconnected(struct mvs_phy *phy)
1962{
1963	phy->phy_attached = 0;
1964	phy->att_dev_info = 0;
1965	phy->att_dev_sas_addr = 0;
1966}
1967
1968static void mvs_work_queue(struct work_struct *work)
1969{
1970	struct delayed_work *dw = container_of(work, struct delayed_work, work);
1971	struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1972	struct mvs_info *mvi = mwq->mvi;
1973	unsigned long flags;
1974	u32 phy_no = (unsigned long) mwq->data;
1975	struct sas_ha_struct *sas_ha = mvi->sas;
1976	struct mvs_phy *phy = &mvi->phy[phy_no];
1977	struct asd_sas_phy *sas_phy = &phy->sas_phy;
1978
1979	spin_lock_irqsave(&mvi->lock, flags);
1980	if (mwq->handler & PHY_PLUG_EVENT) {
1981
1982		if (phy->phy_event & PHY_PLUG_OUT) {
1983			u32 tmp;
1984			struct sas_identify_frame *id;
1985			id = (struct sas_identify_frame *)phy->frame_rcvd;
1986			tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1987			phy->phy_event &= ~PHY_PLUG_OUT;
1988			if (!(tmp & PHY_READY_MASK)) {
1989				sas_phy_disconnected(sas_phy);
1990				mvs_phy_disconnected(phy);
1991				sas_ha->notify_phy_event(sas_phy,
1992					PHYE_LOSS_OF_SIGNAL);
1993				mv_dprintk("phy%d Removed Device\n", phy_no);
1994			} else {
1995				MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1996				mvs_update_phyinfo(mvi, phy_no, 1);
1997				mvs_bytes_dmaed(mvi, phy_no);
1998				mvs_port_notify_formed(sas_phy, 0);
1999				mv_dprintk("phy%d Attached Device\n", phy_no);
2000			}
2001		}
2002	} else if (mwq->handler & EXP_BRCT_CHG) {
2003		phy->phy_event &= ~EXP_BRCT_CHG;
2004		sas_ha->notify_port_event(sas_phy,
2005				PORTE_BROADCAST_RCVD);
2006		mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
2007	}
2008	list_del(&mwq->entry);
2009	spin_unlock_irqrestore(&mvi->lock, flags);
2010	kfree(mwq);
2011}
2012
2013static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
2014{
2015	struct mvs_wq *mwq;
2016	int ret = 0;
2017
2018	mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
2019	if (mwq) {
2020		mwq->mvi = mvi;
2021		mwq->data = data;
2022		mwq->handler = handler;
2023		MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
2024		list_add_tail(&mwq->entry, &mvi->wq_list);
2025		schedule_delayed_work(&mwq->work_q, HZ * 2);
2026	} else
2027		ret = -ENOMEM;
2028
2029	return ret;
2030}
2031
2032static void mvs_sig_time_out(unsigned long tphy)
2033{
2034	struct mvs_phy *phy = (struct mvs_phy *)tphy;
2035	struct mvs_info *mvi = phy->mvi;
2036	u8 phy_no;
2037
2038	for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
2039		if (&mvi->phy[phy_no] == phy) {
2040			mv_dprintk("Get signature time out, reset phy %d\n",
2041				phy_no+mvi->id*mvi->chip->n_phy);
2042			MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
2043		}
2044	}
2045}
2046
2047void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
2048{
2049	u32 tmp;
2050	struct mvs_phy *phy = &mvi->phy[phy_no];
2051
2052	phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
2053	MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
2054	mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
2055		MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
2056	mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
2057		phy->irq_status);
2058
2059	/*
2060	* events is port event now ,
2061	* we need check the interrupt status which belongs to per port.
2062	*/
2063
2064	if (phy->irq_status & PHYEV_DCDR_ERR) {
2065		mv_dprintk("phy %d STP decoding error.\n",
2066		phy_no + mvi->id*mvi->chip->n_phy);
2067	}
2068
2069	if (phy->irq_status & PHYEV_POOF) {
2070		mdelay(500);
2071		if (!(phy->phy_event & PHY_PLUG_OUT)) {
2072			int dev_sata = phy->phy_type & PORT_TYPE_SATA;
2073			int ready;
2074			mvs_do_release_task(mvi, phy_no, NULL);
2075			phy->phy_event |= PHY_PLUG_OUT;
2076			MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
2077			mvs_handle_event(mvi,
2078				(void *)(unsigned long)phy_no,
2079				PHY_PLUG_EVENT);
2080			ready = mvs_is_phy_ready(mvi, phy_no);
2081			if (ready || dev_sata) {
2082				if (MVS_CHIP_DISP->stp_reset)
2083					MVS_CHIP_DISP->stp_reset(mvi,
2084							phy_no);
2085				else
2086					MVS_CHIP_DISP->phy_reset(mvi,
2087							phy_no, MVS_SOFT_RESET);
2088				return;
2089			}
2090		}
2091	}
2092
2093	if (phy->irq_status & PHYEV_COMWAKE) {
2094		tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2095		MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2096					tmp | PHYEV_SIG_FIS);
2097		if (phy->timer.function == NULL) {
2098			phy->timer.data = (unsigned long)phy;
2099			phy->timer.function = mvs_sig_time_out;
2100			phy->timer.expires = jiffies + 5*HZ;
2101			add_timer(&phy->timer);
2102		}
2103	}
2104	if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2105		phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
2106		mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2107		if (phy->phy_status) {
2108			mdelay(10);
2109			MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2110			if (phy->phy_type & PORT_TYPE_SATA) {
2111				tmp = MVS_CHIP_DISP->read_port_irq_mask(
2112						mvi, phy_no);
2113				tmp &= ~PHYEV_SIG_FIS;
2114				MVS_CHIP_DISP->write_port_irq_mask(mvi,
2115							phy_no, tmp);
2116			}
2117			mvs_update_phyinfo(mvi, phy_no, 0);
2118			if (phy->phy_type & PORT_TYPE_SAS) {
2119				MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
2120				mdelay(10);
2121			}
2122
2123			mvs_bytes_dmaed(mvi, phy_no);
2124			/* whether driver is going to handle hot plug */
2125			if (phy->phy_event & PHY_PLUG_OUT) {
2126				mvs_port_notify_formed(&phy->sas_phy, 0);
2127				phy->phy_event &= ~PHY_PLUG_OUT;
2128			}
2129		} else {
2130			mv_dprintk("plugin interrupt but phy%d is gone\n",
2131				phy_no + mvi->id*mvi->chip->n_phy);
2132		}
2133	} else if (phy->irq_status & PHYEV_BROAD_CH) {
2134		mv_dprintk("phy %d broadcast change.\n",
2135			phy_no + mvi->id*mvi->chip->n_phy);
2136		mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
2137				EXP_BRCT_CHG);
2138	}
2139}
2140
2141int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
2142{
2143	u32 rx_prod_idx, rx_desc;
2144	bool attn = false;
2145
2146	/* the first dword in the RX ring is special: it contains
2147	 * a mirror of the hardware's RX producer index, so that
2148	 * we don't have to stall the CPU reading that register.
2149	 * The actual RX ring is offset by one dword, due to this.
2150	 */
2151	rx_prod_idx = mvi->rx_cons;
2152	mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2153	if (mvi->rx_cons == 0xfff)	/* h/w hasn't touched RX ring yet */
2154		return 0;
2155
2156	/* The CMPL_Q may come late, read from register and try again
2157	* note: if coalescing is enabled,
2158	* it will need to read from register every time for sure
2159	*/
2160	if (unlikely(mvi->rx_cons == rx_prod_idx))
2161		mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2162
2163	if (mvi->rx_cons == rx_prod_idx)
2164		return 0;
2165
2166	while (mvi->rx_cons != rx_prod_idx) {
2167		/* increment our internal RX consumer pointer */
2168		rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2169		rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2170
2171		if (likely(rx_desc & RXQ_DONE))
2172			mvs_slot_complete(mvi, rx_desc, 0);
2173		if (rx_desc & RXQ_ATTN) {
2174			attn = true;
2175		} else if (rx_desc & RXQ_ERR) {
2176			if (!(rx_desc & RXQ_DONE))
2177				mvs_slot_complete(mvi, rx_desc, 0);
2178		} else if (rx_desc & RXQ_SLOT_RESET) {
2179			mvs_slot_free(mvi, rx_desc);
2180		}
2181	}
2182
2183	if (attn && self_clear)
2184		MVS_CHIP_DISP->int_full(mvi);
2185	return 0;
2186}
2187
2188