qla_fw.h revision df613b96077cee826b14089ae6e75eeabf71faa3
1fa90c54f6d27664cc67691f9e52d9165e0c25ca7Andrew Vasquez/* 2fa90c54f6d27664cc67691f9e52d9165e0c25ca7Andrew Vasquez * QLogic Fibre Channel HBA Driver 3fa90c54f6d27664cc67691f9e52d9165e0c25ca7Andrew Vasquez * Copyright (c) 2003-2005 QLogic Corporation 4fa90c54f6d27664cc67691f9e52d9165e0c25ca7Andrew Vasquez * 5fa90c54f6d27664cc67691f9e52d9165e0c25ca7Andrew Vasquez * See LICENSE.qla2xxx for copyright and licensing details. 6fa90c54f6d27664cc67691f9e52d9165e0c25ca7Andrew Vasquez */ 73d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#ifndef __QLA_FW_H 83d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define __QLA_FW_H 93d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MBS_CHECKSUM_ERROR 0x4010 11c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define MBS_INVALID_PRODUCT_KEY 0x4020 123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * Firmware Options. 153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FO1_ENABLE_PUREX BIT_10 173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FO1_DISABLE_LED_CTRL BIT_6 18c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FO1_ENABLE_8016 BIT_0 193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FO2_ENABLE_SEL_CLASS2 BIT_5 203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FO3_NO_ABTS_ON_LINKDOWN BIT_14 21c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FO3_HOLD_STS_IOCB BIT_12 223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * Port Database structure definition for ISP 24xx. 253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDO_FORCE_ADISC BIT_1 273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDO_FORCE_PLOGI BIT_0 283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PORT_DATABASE_24XX_SIZE 64 313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct port_database_24xx { 323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t flags; 333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDF_TASK_RETRY_ID BIT_14 343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDF_FC_TAPE BIT_7 353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDF_ACK0_CAPABLE BIT_6 363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDF_FCP2_CONF BIT_5 373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDF_CLASS_2 BIT_4 383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDF_HARD_ADDR BIT_1 393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t current_login_state; 413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t last_login_state; 423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDS_PLOGI_PENDING 0x03 433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDS_PLOGI_COMPLETE 0x04 443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDS_PRLI_PENDING 0x05 453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDS_PRLI_COMPLETE 0x06 463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDS_PORT_UNAVAILABLE 0x07 473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDS_PRLO_PENDING 0x09 483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDS_LOGO_PENDING 0x11 493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PDS_PRLI2_PENDING 0x12 503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t hard_address[3]; 523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_1; 533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; 553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sequence_id; 563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t port_timer; 583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t receive_data_size; 623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_2; 633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t prli_svc_param_word_0[2]; /* Big endian */ 653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Bits 15-0 of word 0 */ 663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t prli_svc_param_word_3[2]; /* Big endian */ 673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Bits 15-0 of word 3 */ 683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_name[WWN_SIZE]; 703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t node_name[WWN_SIZE]; 713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 723d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_3[24]; 733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 752c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Justruct vp_database_24xx { 762c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t vp_status; 772c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t options; 782c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t id; 792c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t port_name[WWN_SIZE]; 802c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t node_name[WWN_SIZE]; 812c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t port_id_low; 822c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t port_id_high; 832c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju}; 842c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju 853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct nvram_24xx { 863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* NVRAM header. */ 873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t id[4]; 883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nvram_version; 893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_0; 903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Firmware Initialization Control Block. */ 923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t version; 933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_1; 943d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t frame_payload_size; 953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t execution_throttle; 963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t exchange_count; 973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t hard_address; 983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_name[WWN_SIZE]; 1003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t node_name[WWN_SIZE]; 1013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t login_retry_count; 1033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t link_down_on_nos; 1043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t interrupt_delay_timer; 1053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t login_timeout; 1063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t firmware_options_1; 1083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t firmware_options_2; 1093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t firmware_options_3; 1103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 56. */ 1123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* 1143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0 = Control Enable 1153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 1-15 = 1163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * 1173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0-7 = Reserved 1183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 8-10 = Output Swing 1G 1193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 11-13 = Output Emphasis 1G 1203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 14-15 = Reserved 1213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * 1223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0-7 = Reserved 1233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 8-10 = Output Swing 2G 1243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 11-13 = Output Emphasis 2G 1253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 14-15 = Reserved 1263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * 1273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0-7 = Reserved 1283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 8-10 = Output Swing 4G 1293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 11-13 = Output Emphasis 4G 1303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 14-15 = Reserved 1313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 1323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t seriallink_options[4]; 1333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_2[16]; 1353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 96. */ 1373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_3[16]; 1383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* PCIe table entries. */ 1403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_4[16]; 1413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 160. */ 1433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_5[16]; 1443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 192. */ 1463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_6[16]; 1473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 224. */ 1493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_7[16]; 1503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* 1523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0 = Enable spinup delay 1533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 1 = Disable BIOS 1543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 2 = Enable Memory Map BIOS 1553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 3 = Enable Selectable Boot 1563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 4 = Disable RISC code load 157d4c760c2119fca982f335d83ff9095479c5d6737Andrew Vasquez * BIT 5 = Disable Serdes 1583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 6 = 1593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 7 = 1603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * 1613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 8 = 1623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 9 = 1633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 10 = Enable lip full login 1643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 11 = Enable target reset 1653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 12 = 1663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 13 = 1673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 14 = 1683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 15 = Enable alternate WWN 1693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * 1703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 16-31 = 1713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 1723d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t host_p; 1733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t alternate_port_name[WWN_SIZE]; 1753d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t alternate_node_name[WWN_SIZE]; 1763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t boot_port_name[WWN_SIZE]; 1783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t boot_lun_number; 1793d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_8; 1803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1813d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t alt1_boot_port_name[WWN_SIZE]; 1823d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t alt1_boot_lun_number; 1833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_9; 1843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t alt2_boot_port_name[WWN_SIZE]; 1863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t alt2_boot_lun_number; 1873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_10; 1883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t alt3_boot_port_name[WWN_SIZE]; 1903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t alt3_boot_lun_number; 1913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_11; 1923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* 1943d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0 = Selective Login 1953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 1 = Alt-Boot Enable 1963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 2 = Reserved 1973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 3 = Boot Order List 1983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 4 = Reserved 1993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 5 = Selective LUN 2003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 6 = Reserved 2013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 7-31 = 2023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 2033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t efi_parameters; 2043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reset_delay; 2063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_12; 2073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_13; 2083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t boot_id_number; 2103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_14; 2113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t max_luns_per_target; 2133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_15; 2143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t port_down_retry_count; 2163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t link_down_timeout; 2173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* FCode parameters. */ 2193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t fcode_parameter; 2203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_16[3]; 2223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 352. */ 2243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t prev_drv_ver_major; 2253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t prev_drv_ver_submajob; 2263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t prev_drv_ver_minor; 2273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t prev_drv_ver_subminor; 2283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t prev_bios_ver_major; 2303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t prev_bios_ver_minor; 2313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t prev_efi_ver_major; 2333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t prev_efi_ver_minor; 2343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t prev_fw_ver_major; 2363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t prev_fw_ver_minor; 2373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t prev_fw_ver_subminor; 2383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_17[8]; 2403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 384. */ 2423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_18[16]; 2433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 416. */ 2453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_19[16]; 2463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 448. */ 2483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_20[16]; 2493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 480. */ 2513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t model_name[16]; 2523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_21[2]; 2543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Offset 500. */ 2563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* HW Parameter Block. */ 2573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t pcie_table_sig; 2583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t pcie_table_offset; 2593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t subsystem_vendor_id; 2613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t subsystem_device_id; 2623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t checksum; 2643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 2653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 2673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * ISP Initialization Control Block. 2683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * Little endian except where noted. 2693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 2703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define ICB_VERSION 1 2713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct init_cb_24xx { 2723d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t version; 2733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_1; 2743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2753d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t frame_payload_size; 2763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t execution_throttle; 2773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t exchange_count; 2783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2793d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t hard_address; 2803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2813d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_name[WWN_SIZE]; /* Big endian. */ 2823d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t node_name[WWN_SIZE]; /* Big endian. */ 2833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t response_q_inpointer; 2853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t request_q_outpointer; 2863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t login_retry_count; 2883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t prio_request_q_outpointer; 2903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t response_q_length; 2923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t request_q_length; 2933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2943ea66e28c20e3b23749c9001c58b37ad44263442Andrew Vasquez uint16_t link_down_on_nos; /* Milliseconds. */ 2953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t prio_request_q_length; 2973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 2983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t request_q_address[2]; 2993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t response_q_address[2]; 3003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t prio_request_q_address[2]; 3013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_2[8]; 3033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t atio_q_inpointer; 3053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t atio_q_length; 3063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t atio_q_address[2]; 3073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t interrupt_delay_timer; /* 100us increments. */ 3093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t login_timeout; 3103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* 3123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0 = Enable Hard Loop Id 3133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 1 = Enable Fairness 3143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 2 = Enable Full-Duplex 3153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 3 = Reserved 3163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 4 = Enable Target Mode 3173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 5 = Disable Initiator Mode 3183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 6 = Reserved 3193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 7 = Reserved 3203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * 3213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 8 = Reserved 3223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 9 = Non Participating LIP 3233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 10 = Descending Loop ID Search 3243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 11 = Acquire Loop ID in LIPA 3253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 12 = Reserved 3263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 13 = Full Login after LIP 3273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 14 = Node Name Option 3283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 15-31 = Reserved 3293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 3303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t firmware_options_1; 3313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* 3333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0 = Operation Mode bit 0 3343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 1 = Operation Mode bit 1 3353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 2 = Operation Mode bit 2 3363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 3 = Operation Mode bit 3 3373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 4 = Connection Options bit 0 3383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 5 = Connection Options bit 1 3393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 6 = Connection Options bit 2 3403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 7 = Enable Non part on LIHA failure 3413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * 3423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 8 = Enable Class 2 3433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 9 = Enable ACK0 3443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 10 = Reserved 3453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 11 = Enable FC-SP Security 3463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 12 = FC Tape Enable 347c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez * BIT 13 = Reserved 348c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez * BIT 14 = Enable Target PRLI Control 349c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez * BIT 15-31 = Reserved 3503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 3513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t firmware_options_2; 3523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* 3543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0 = Reserved 3553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 1 = Soft ID only 3563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 2 = Reserved 3573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 3 = Reserved 3583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 4 = FCP RSP Payload bit 0 3593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 5 = FCP RSP Payload bit 1 3603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 6 = Enable Receive Out-of-Order data frame handling 3613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 7 = Disable Automatic PLOGI on Local Loop 3623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * 3633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 8 = Reserved 3643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 9 = Enable Out-of-Order FCP_XFER_RDY relative offset handling 3653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 10 = Reserved 3663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 11 = Reserved 3673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 12 = Reserved 3683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 13 = Data Rate bit 0 3693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 14 = Data Rate bit 1 3703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 15 = Data Rate bit 2 371c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez * BIT 16 = Enable 75 ohm Termination Select 372c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez * BIT 17-31 = Reserved 3733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 3743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t firmware_options_3; 3753d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_3[24]; 3773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 3783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3793d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 3803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * ISP queue - command entry structure definition. 3813d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 3823d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define COMMAND_TYPE_6 0x48 /* Command Type 6 entry */ 3833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct cmd_type_6 { 3843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 3853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 3863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sys_define; /* System defined. */ 3873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 3883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 3903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 3923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t timeout; /* Command timeout. */ 3933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3943d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t dseg_count; /* Data segment count. */ 3953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 3963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t fcp_rsp_dsd_len; /* FCP_RSP DSD length. */ 3973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 398661c3f6cc32e1307fc7df724149884c95e98358dAndrew Vasquez struct scsi_lun lun; /* FCP LUN (BE). */ 3993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t control_flags; /* Control flags. */ 4013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CF_DATA_SEG_DESCR_ENABLE BIT_2 4023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CF_READ_DATA BIT_1 4033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CF_WRITE_DATA BIT_0 4043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t fcp_cmnd_dseg_len; /* Data segment length. */ 4063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t fcp_cmnd_dseg_address[2]; /* Data segment address. */ 4073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t fcp_rsp_dseg_address[2]; /* Data segment address. */ 4093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t byte_count; /* Total byte count. */ 4113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; /* PortID of destination port. */ 4133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_index; 4143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t fcp_data_dseg_address[2]; /* Data segment address. */ 4163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t fcp_data_dseg_len; /* Data segment length. */ 4173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_1; /* MUST be set to 0. */ 4183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 4193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define COMMAND_TYPE_7 0x18 /* Command Type 7 entry */ 4213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct cmd_type_7 { 4223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 4233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 4243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sys_define; /* System defined. */ 4253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 4263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 4283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 4303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t timeout; /* Command timeout. */ 4313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FW_MAX_TIMEOUT 0x1999 4323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t dseg_count; /* Data segment count. */ 4343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_1; 4353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 436661c3f6cc32e1307fc7df724149884c95e98358dAndrew Vasquez struct scsi_lun lun; /* FCP LUN (BE). */ 4373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t task_mgmt_flags; /* Task management flags. */ 4393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TMF_CLEAR_ACA BIT_14 4403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TMF_TARGET_RESET BIT_13 4413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TMF_LUN_RESET BIT_12 4423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TMF_CLEAR_TASK_SET BIT_10 4433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TMF_ABORT_TASK_SET BIT_9 444c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define TMF_DSD_LIST_ENABLE BIT_2 4453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TMF_READ_DATA BIT_1 4463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TMF_WRITE_DATA BIT_0 4473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t task; 4493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TSK_SIMPLE 0 4503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TSK_HEAD_OF_QUEUE 1 4513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TSK_ORDERED 2 4523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TSK_ACA 4 4533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TSK_UNTAGGED 5 4543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t crn; 4563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t fcp_cdb[MAX_CMDSZ]; /* SCSI command words. */ 4583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t byte_count; /* Total byte count. */ 4593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; /* PortID of destination port. */ 4613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_index; 4623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t dseg_0_address[2]; /* Data segment 0 address. */ 4643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t dseg_0_len; /* Data segment 0 length. */ 4653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 4663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 4683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * ISP queue - status entry structure definition. 4693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 4703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define STATUS_TYPE 0x03 /* Status entry. */ 4713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct sts_entry_24xx { 4723d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 4733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 4743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sys_define; /* System defined. */ 4753d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 4763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 4783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4793d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t comp_status; /* Completion status. */ 4803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t ox_id; /* OX_ID used by the firmware. */ 4813d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 482ed17c71b5d11327efd40666fd621486f964fae4fRavi Anand uint32_t residual_len; /* FW calc residual transfer length. */ 4833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_1; 4853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t state_flags; /* State flags. */ 4863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define SF_TRANSFERRED_DATA BIT_11 4873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define SF_FCP_RSP_DMA BIT_0 4883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_2; 4903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t scsi_status; /* SCSI status. */ 4913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define SS_CONFIRMATION_REQ BIT_12 4923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t rsp_residual_count; /* FCP RSP residual count. */ 4943d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t sense_len; /* FCP SENSE length. */ 4963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t rsp_data_len; /* FCP response data length. */ 4973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 4983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t data[28]; /* FCP response/sense information. */ 4993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 5003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 5023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * Status entry completion status 5033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 5043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_DATA_REASSEMBLY_ERROR 0x11 /* Data Reassembly Error.. */ 5053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_ABTS_BY_TARGET 0x13 /* Target send ABTS to abort IOCB. */ 5063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_FW_RESOURCE 0x2C /* Firmware Resource Unavailable. */ 5073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_TASK_MGMT_OVERRUN 0x30 /* Task management overrun (8+). */ 5083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_ABORT_BY_TARGET 0x47 /* Abort By Target. */ 5093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 5113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * ISP queue - marker entry structure definition. 5123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 5133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MARKER_TYPE 0x04 /* Marker entry. */ 5143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct mrk_entry_24xx { 5153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 5163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 5173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t handle_count; /* Handle count. */ 5183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 5193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 5213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 5233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t modifier; /* Modifier (7-0). */ 5253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MK_SYNC_ID_LUN 0 /* Synchronize ID/LUN */ 5263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MK_SYNC_ID 1 /* Synchronize ID */ 5273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MK_SYNC_ALL 2 /* Synchronize all ID/LUN */ 5283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_1; 5293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_2; 5313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_index; 5323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_3; 5343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t lun[8]; /* FCP LUN (BE). */ 5363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_4[40]; 5373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 5383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 5403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * ISP queue - CT Pass-Through entry structure definition. 5413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 5423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CT_IOCB_TYPE 0x29 /* CT Pass-Through IOCB entry */ 5433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct ct_entry_24xx { 5443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 5453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 5463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sys_define; /* System Defined. */ 5473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 5483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 5503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t comp_status; /* Completion status. */ 5523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 5543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t cmd_dsd_count; 5563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_index; 5583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_1; 5593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t timeout; /* Command timeout. */ 5613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_2; 5623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t rsp_dsd_count; 5643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_3[10]; 5663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t rsp_byte_count; 5683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t cmd_byte_count; 5693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t dseg_0_address[2]; /* Data segment 0 address. */ 5713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t dseg_0_len; /* Data segment 0 length. */ 5723d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t dseg_1_address[2]; /* Data segment 1 address. */ 5733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t dseg_1_len; /* Data segment 1 length. */ 5743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 5753d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 5773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * ISP queue - ELS Pass-Through entry structure definition. 5783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 5793d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define ELS_IOCB_TYPE 0x53 /* ELS Pass-Through IOCB entry */ 5803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct els_entry_24xx { 5813d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 5823d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 5833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sys_define; /* System Defined. */ 5843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 5853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 5873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_1; 5893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 5913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t tx_dsd_count; 5933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 5943d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_index; 5953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sof_type; 5963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define EST_SOFI3 (1 << 4) 5973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define EST_SOFI2 (3 << 4) 5983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 599c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez uint32_t rx_xchg_address; /* Receive exchange address. */ 6003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t rx_dsd_count; 6013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t opcode; 6033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_2; 6043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; 6063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_3; 6073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_4; 6093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t control_flags; /* Control flags. */ 6113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define ECF_PAYLOAD_DESCR_MASK (BIT_15|BIT_14|BIT_13) 6123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define EPD_ELS_COMMAND (0 << 13) 6133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define EPD_ELS_ACC (1 << 13) 6143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define EPD_ELS_RJT (2 << 13) 6153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define EPD_RX_XCHG (3 << 13) 6163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define ECF_CLR_PASSTHRU_PEND BIT_12 6173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define ECF_INCL_FRAME_HDR BIT_11 6183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t rx_byte_count; 6203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t tx_byte_count; 6213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t tx_address[2]; /* Data segment 0 address. */ 6233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t tx_len; /* Data segment 0 length. */ 6243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t rx_address[2]; /* Data segment 1 address. */ 6253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t rx_len; /* Data segment 1 length. */ 6263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 6273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 6293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * ISP queue - Mailbox Command entry structure definition. 6303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 6313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MBX_IOCB_TYPE 0x39 6323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct mbx_entry_24xx { 6333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 6343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 6353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t handle_count; /* Handle count. */ 6363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 6373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 6393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mbx[28]; 6413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 6423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LOGINOUT_PORT_IOCB_TYPE 0x52 /* Login/Logout Port entry. */ 6453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct logio_entry_24xx { 6463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 6473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 6483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sys_define; /* System defined. */ 6493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 6503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 6523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t comp_status; /* Completion status. */ 6543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_LOGIO_ERROR 0x31 /* Login/Logout IOCB error. */ 6553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 6573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t control_flags; /* Control flags. */ 6593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Modifiers. */ 660c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define LCF_INCLUDE_SNS BIT_10 /* Include SNS (FFFFFC) during LOGO. */ 6613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_FCP2_OVERRIDE BIT_9 /* Set/Reset word 3 of PRLI. */ 6623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_CLASS_2 BIT_8 /* Enable class 2 during PLOGI. */ 6633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_FREE_NPORT BIT_7 /* Release NPORT handle after LOGO. */ 6643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_EXPL_LOGO BIT_6 /* Perform an explicit LOGO. */ 6653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_SKIP_PRLI BIT_5 /* Skip PRLI after PLOGI. */ 6663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_IMPL_LOGO_ALL BIT_5 /* Implicit LOGO to all ports. */ 6673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_COND_PLOGI BIT_4 /* PLOGI only if not logged-in. */ 6683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_IMPL_LOGO BIT_4 /* Perform an implicit LOGO. */ 6693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_IMPL_PRLO BIT_4 /* Perform an implicit PRLO. */ 6703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Commands. */ 6713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_COMMAND_PLOGI 0x00 /* PLOGI. */ 6723d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_COMMAND_PRLI 0x01 /* PRLI. */ 6733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_COMMAND_PDISC 0x02 /* PDISC. */ 6743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_COMMAND_ADISC 0x03 /* ADISC. */ 6753d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_COMMAND_LOGO 0x08 /* LOGO. */ 6763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_COMMAND_PRLO 0x09 /* PRLO. */ 6773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LCF_COMMAND_TPRLO 0x0A /* TPRLO. */ 6783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6793d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_index; 6803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_1; 6813d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6823d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; /* PortID of destination port. */ 6833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t rsp_size; /* Response size in 32bit words. */ 6853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t io_parameter[11]; /* General I/O parameters. */ 6873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NOLINK 0x01 6883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NOIOCB 0x02 6893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NOXCB 0x03 6903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_CMD_FAILED 0x04 6913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NOFABRIC 0x05 6923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_FW_NOT_READY 0x07 6933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NOT_LOGGED_IN 0x09 6943d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NOPCB 0x0A 6953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 6963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_ELS_REJECT 0x18 6973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_CMD_PARAM_ERR 0x19 6983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_PORTID_USED 0x1A 6993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NPORT_USED 0x1B 7003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NONPORT 0x1C 7013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_LOGGED_IN 0x1D 7023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define LSC_SCODE_NOFLOGI_ACC 0x1F 7033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 7043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TSK_MGMT_IOCB_TYPE 0x14 7063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct tsk_mgmt_entry { 7073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 7083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 7093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t handle_count; /* Handle count. */ 7103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 7113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 7133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 7153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_1; 7173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t delay; /* Activity delay in seconds. */ 7193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t timeout; /* Command timeout. */ 7213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t lun[8]; /* FCP LUN (BE). */ 7233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t control_flags; /* Control Flags. */ 7253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TCF_NOTMCMD_TO_TARGET BIT_31 7263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TCF_LUN_RESET BIT_4 7273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TCF_ABORT_TASK_SET BIT_3 7283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TCF_CLEAR_TASK_SET BIT_2 7293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TCF_TARGET_RESET BIT_1 7303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define TCF_CLEAR_ACA BIT_0 7313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_2[20]; 7333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; /* PortID of destination port. */ 7353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_index; 7363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_3[12]; 7383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 7393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define ABORT_IOCB_TYPE 0x33 7413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct abort_entry_24xx { 7423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 7433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 7443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t handle_count; /* Handle count. */ 7453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 7463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 7483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t nport_handle; /* N_PORT handle. */ 7503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* or Completion status. */ 7513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t options; /* Options. */ 7533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define AOF_NO_ABTS BIT_0 /* Do not send any ABTS. */ 7543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle_to_abort; /* System handle to abort. */ 7563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_1[32]; 7583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; /* PortID of destination port. */ 7603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_index; 7613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_2[12]; 7633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 7643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* 7663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * ISP I/O Register Set structure definitions. 7673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 7683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct device_reg_24xx { 7693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t flash_addr; /* Flash/NVRAM BIOS address. */ 7703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FARX_DATA_FLAG BIT_31 7713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FARX_ACCESS_FLASH_CONF 0x7FFD0000 7723d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FARX_ACCESS_FLASH_DATA 0x7FF00000 7733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FARX_ACCESS_NVRAM_CONF 0x7FFF0000 7743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FARX_ACCESS_NVRAM_DATA 0x7FFE0000 7753d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FA_NVRAM_FUNC0_ADDR 0x80 7773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FA_NVRAM_FUNC1_ADDR 0x180 7783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 7796f6417905cf272337a9762e1f92a1fffa651fcd3Andrew Vasquez#define FA_NVRAM_VPD_SIZE 0x200 7803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FA_NVRAM_VPD0_ADDR 0x00 7813d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FA_NVRAM_VPD1_ADDR 0x100 782b7cc176c9eb3aa6989ac099efd8bdd6d0eaa784aJoe Carnuccio 783b7cc176c9eb3aa6989ac099efd8bdd6d0eaa784aJoe Carnuccio#define FA_BOOT_CODE_ADDR 0x00000 7843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* 7853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * RISC code begins at offset 512KB 7863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * within flash. Consisting of two 7873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * contiguous RISC code segments. 7883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 7893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FA_RISC_CODE_ADDR 0x20000 7903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define FA_RISC_CODE_SEGMENTS 2 7913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 792c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FA_FW_AREA_ADDR 0x40000 793c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FA_VPD_NVRAM_ADDR 0x48000 794c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FA_FEATURE_ADDR 0x4C000 795c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FA_FLASH_DESCR_ADDR 0x50000 796c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FA_HW_EVENT_ADDR 0x54000 797c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FA_BOOT_LOG_ADDR 0x58000 798c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FA_FW_DUMP0_ADDR 0x60000 799c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define FA_FW_DUMP1_ADDR 0x70000 800c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez 8013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t flash_data; /* Flash/NVRAM BIOS data. */ 8023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t ctrl_status; /* Control/Status. */ 8043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_FLASH_ACCESS_ERROR BIT_18 /* Flash/NVRAM Access Error. */ 8053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_DMA_ACTIVE BIT_17 /* DMA Active status. */ 8063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_DMA_SHUTDOWN BIT_16 /* DMA Shutdown control status. */ 8073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_FUNCTION BIT_15 /* Function number. */ 8083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* PCI-X Bus Mode. */ 8093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_PCIX_BUS_MODE_MASK (BIT_11|BIT_10|BIT_9|BIT_8) 8103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PBM_PCI_33MHZ (0 << 8) 8113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PBM_PCIX_M1_66MHZ (1 << 8) 8123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PBM_PCIX_M1_100MHZ (2 << 8) 8133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PBM_PCIX_M1_133MHZ (3 << 8) 8143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PBM_PCIX_M2_66MHZ (5 << 8) 8153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PBM_PCIX_M2_100MHZ (6 << 8) 8163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PBM_PCIX_M2_133MHZ (7 << 8) 8173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define PBM_PCI_66MHZ (8 << 8) 8183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Max Write Burst byte count. */ 8193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4) 8203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MWB_512_BYTES (0 << 4) 8213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MWB_1024_BYTES (1 << 4) 8223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MWB_2048_BYTES (2 << 4) 8233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MWB_4096_BYTES (3 << 4) 8243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_64BIT_SLOT BIT_2 /* PCI 64-Bit Bus Slot. */ 8263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable. */ 8273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CSRX_ISP_SOFT_RESET BIT_0 /* ISP soft reset. */ 8283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t ictrl; /* Interrupt control. */ 8303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define ICRX_EN_RISC_INT BIT_3 /* Enable RISC interrupts on PCI. */ 8313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t istatus; /* Interrupt status. */ 8333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define ISRX_RISC_INT BIT_3 /* RISC interrupt. */ 8343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t unused_1[2]; /* Gap. */ 8363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Request Queue. */ 8383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t req_q_in; /* In-Pointer. */ 8393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t req_q_out; /* Out-Pointer. */ 8403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Response Queue. */ 8413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t rsp_q_in; /* In-Pointer. */ 8423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t rsp_q_out; /* Out-Pointer. */ 8433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Priority Request Queue. */ 8443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t preq_q_in; /* In-Pointer. */ 8453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t preq_q_out; /* Out-Pointer. */ 8463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t unused_2[2]; /* Gap. */ 8483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* ATIO Queue. */ 8503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t atio_q_in; /* In-Pointer. */ 8513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t atio_q_out; /* Out-Pointer. */ 8523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t host_status; 8543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HSRX_RISC_INT BIT_15 /* RISC to Host interrupt. */ 8553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HSRX_RISC_PAUSED BIT_8 /* RISC Paused. */ 8563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t hccr; /* Host command & control register. */ 8583d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* HCCR statuses. */ 8593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_HOST_INT BIT_6 /* Host to RISC interrupt bit. */ 8603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_RISC_RESET BIT_5 /* RISC Reset mode bit. */ 8613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_RISC_PAUSE BIT_4 /* RISC Pause mode bit. */ 8623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* HCCR commands. */ 8633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* NOOP. */ 8643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_NOOP 0x00000000 8653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Set RISC Reset. */ 8663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_SET_RISC_RESET 0x10000000 8673d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Clear RISC Reset. */ 8683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_CLR_RISC_RESET 0x20000000 8693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Set RISC Pause. */ 8703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_SET_RISC_PAUSE 0x30000000 8713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Releases RISC Pause. */ 8723d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_REL_RISC_PAUSE 0x40000000 8733d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Set HOST to RISC interrupt. */ 8743d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_SET_HOST_INT 0x50000000 8753d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Clear HOST to RISC interrupt. */ 8763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_CLR_HOST_INT 0x60000000 8773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Clear RISC to PCI interrupt. */ 8783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define HCCRX_CLR_RISC_INT 0xA0000000 8793d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t gpiod; /* GPIO Data register. */ 881c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez 8823d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* LED update mask. */ 8833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPDX_LED_UPDATE_MASK (BIT_20|BIT_19|BIT_18) 8843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Data update mask. */ 8853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPDX_DATA_UPDATE_MASK (BIT_17|BIT_16) 886c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez /* Data update mask. */ 887c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define GPDX_DATA_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16) 8883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* LED control mask. */ 8893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2) 8903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* LED bit values. Color names as 8913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * referenced in fw spec. 8923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 8933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPDX_LED_YELLOW_ON BIT_2 8943d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPDX_LED_GREEN_ON BIT_3 8953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPDX_LED_AMBER_ON BIT_4 8963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Data in/out. */ 8973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPDX_DATA_INOUT (BIT_1|BIT_0) 8983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 8993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t gpioe; /* GPIO Enable register. */ 9003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Enable update mask. */ 9013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPEX_ENABLE_UPDATE_MASK (BIT_17|BIT_16) 902c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez /* Enable update mask. */ 903c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez#define GPEX_ENABLE_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16) 9043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Enable. */ 9053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define GPEX_ENABLE (BIT_1|BIT_0) 9063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 9073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t iobase_addr; /* I/O Bus Base Address register. */ 9083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 9093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t unused_3[10]; /* Gap. */ 9103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 9113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox0; 9123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox1; 9133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox2; 9143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox3; 9153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox4; 9163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox5; 9173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox6; 9183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox7; 9193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox8; 9203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox9; 9213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox10; 9223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox11; 9233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox12; 9243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox13; 9253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox14; 9263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox15; 9273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox16; 9283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox17; 9293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox18; 9303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox19; 9313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox20; 9323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox21; 9333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox22; 9343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox23; 9353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox24; 9363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox25; 9373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox26; 9383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox27; 9393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox28; 9403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox29; 9413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox30; 9423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t mailbox31; 943c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez 944c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez uint32_t iobase_window; 945b58369273956775c3e8b7bbbe152593d52762099Andrew Vasquez uint32_t iobase_c4; 94605236a050f8e3a20962bad98ad8ceb94bbdb748cAndrew Vasquez uint32_t iobase_c8; 94705236a050f8e3a20962bad98ad8ceb94bbdb748cAndrew Vasquez uint32_t unused_4_1[6]; /* Gap. */ 948c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez uint32_t iobase_q; 949c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez uint32_t unused_5[2]; /* Gap. */ 950c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez uint32_t iobase_select; 951c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez uint32_t unused_6[2]; /* Gap. */ 952c3a2f0dfe1cecac76950f340f540c1a887dd2500Andrew Vasquez uint32_t iobase_sdata; 9533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 9543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 95500b6bd25166e2a4bad23c614c10c55993bb2489eAndrew Vasquez/* Trace Control *************************************************************/ 95600b6bd25166e2a4bad23c614c10c55993bb2489eAndrew Vasquez 95700b6bd25166e2a4bad23c614c10c55993bb2489eAndrew Vasquez#define TC_AEN_DISABLE 0 95800b6bd25166e2a4bad23c614c10c55993bb2489eAndrew Vasquez 95900b6bd25166e2a4bad23c614c10c55993bb2489eAndrew Vasquez#define TC_EFT_ENABLE 4 96000b6bd25166e2a4bad23c614c10c55993bb2489eAndrew Vasquez#define TC_EFT_DISABLE 5 96100b6bd25166e2a4bad23c614c10c55993bb2489eAndrew Vasquez 962df613b96077cee826b14089ae6e75eeabf71faa3Andrew Vasquez#define TC_FCE_ENABLE 8 963df613b96077cee826b14089ae6e75eeabf71faa3Andrew Vasquez#define TC_FCE_OPTIONS 0 964df613b96077cee826b14089ae6e75eeabf71faa3Andrew Vasquez#define TC_FCE_DEFAULT_RX_SIZE 2112 965df613b96077cee826b14089ae6e75eeabf71faa3Andrew Vasquez#define TC_FCE_DEFAULT_TX_SIZE 2112 966df613b96077cee826b14089ae6e75eeabf71faa3Andrew Vasquez#define TC_FCE_DISABLE 9 967df613b96077cee826b14089ae6e75eeabf71faa3Andrew Vasquez#define TC_FCE_DISABLE_TRACE BIT_0 968df613b96077cee826b14089ae6e75eeabf71faa3Andrew Vasquez 9693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* MID Support ***************************************************************/ 9703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 971eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez#define MIN_MULTI_ID_FABRIC 64 /* Must be power-of-2. */ 972eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez#define MAX_MULTI_ID_FABRIC 256 /* ... */ 973eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez 974eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez#define for_each_mapped_vp_idx(_ha, _idx) \ 975eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez for (_idx = find_next_bit((_ha)->vp_idx_map, \ 976eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez (_ha)->max_npiv_vports + 1, 1); \ 977eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez _idx <= (_ha)->max_npiv_vports; \ 978eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez _idx = find_next_bit((_ha)->vp_idx_map, \ 979eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez (_ha)->max_npiv_vports + 1, _idx + 1)) \ 9803d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 9813d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct mid_conf_entry_24xx { 9823d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t reserved_1; 9833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 9843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* 9853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 0 = Enable Hard Loop Id 9863d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 1 = Acquire Loop ID in LIPA 9873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 2 = ID not Acquired 9883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 3 = Enable VP 9893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 4 = Enable Initiator Mode 9903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 5 = Disable Target Mode 9913d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez * BIT 6-7 = Reserved 9923d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez */ 9933d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t options; 9943d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 9953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t hard_address; 9963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 9973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_name[WWN_SIZE]; 9983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t node_name[WWN_SIZE]; 9993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 10003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct mid_init_cb_24xx { 10023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez struct init_cb_24xx init_cb; 10033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10043d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t count; 10053d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t options; 10063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 1007eb66dc60be5a72bc940458a5adfd400e4d810d49Andrew Vasquez struct mid_conf_entry_24xx entries[MAX_MULTI_ID_FABRIC]; 10083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 10093d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10103d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct mid_db_entry_24xx { 10123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t status; 10133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MDBS_NON_PARTIC BIT_3 10143d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MDBS_ID_ACQUIRED BIT_1 10153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define MDBS_ENABLED BIT_0 10163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t options; 10183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t hard_address; 10193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10203d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_name[WWN_SIZE]; 10213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t node_name[WWN_SIZE]; 10223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10233d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; 10243d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_1; 10253d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 10263d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10272c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju /* 10282c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju * Virtual Fabric ID type definition. 10292c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju */ 10302c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Jutypedef struct vf_id { 10312c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t id : 12; 10322c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t priority : 4; 10332c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju} vf_id_t; 10342c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju 10352c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju/* 10362c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju * Virtual Fabric HopCt type definition. 10372c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju */ 10382c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Jutypedef struct vf_hopct { 10392c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t reserved : 8; 10402c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t hopct : 8; 10412c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju} vf_hopct_t; 10422c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju 10432c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju/* 10442c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju * Virtual Port Control IOCB 10452c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju */ 10463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define VP_CTRL_IOCB_TYPE 0x30 /* Vitual Port Control entry. */ 10473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct vp_ctrl_entry_24xx { 10483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 10493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 10503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sys_define; /* System defined. */ 10513d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 10523d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10533d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 10543d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10553d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t vp_idx_failed; 10563d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10573d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t comp_status; /* Completion status. */ 10582c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju#define CS_VCE_IOCB_ERROR 0x01 /* Error processing IOCB */ 10593d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_VCE_ACQ_ID_ERROR 0x02 /* Error while acquireing ID. */ 10603d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_VCE_BUSY 0x05 /* Firmware not ready to accept cmd. */ 10613d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10623d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t command; 10633d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define VCE_COMMAND_ENABLE_VPS 0x00 /* Enable VPs. */ 10643d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define VCE_COMMAND_DISABLE_VPS 0x08 /* Disable VPs. */ 10653d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define VCE_COMMAND_DISABLE_VPS_REINIT 0x09 /* Disable VPs and reinit link. */ 10663d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define VCE_COMMAND_DISABLE_VPS_LOGO 0x0a /* Disable VPs and LOGO ports. */ 10672c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju#define VCE_COMMAND_DISABLE_VPS_LOGO_ALL 0x0b /* Disable VPs and LOGO ports. */ 10683d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10693d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t vp_count; 10703d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10713d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_idx_map[16]; 10722c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t flags; 10732c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju struct vf_id id; 10742c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t reserved_4; 10752c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju struct vf_hopct hopct; 10762c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t reserved_5[8]; 10773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 10783d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10792c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju/* 10802c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju * Modify Virtual Port Configuration IOCB 10812c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju */ 10823d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define VP_CONFIG_IOCB_TYPE 0x31 /* Vitual Port Config entry. */ 10833d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct vp_config_entry_24xx { 10843d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 10853d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 10862c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t handle_count; 10873d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 10883d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10893d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 10903d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10912c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t flags; 10922c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju#define CS_VF_BIND_VPORTS_TO_VF BIT_0 10932c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju#define CS_VF_SET_QOS_OF_VPORTS BIT_1 10942c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju#define CS_VF_SET_HOPS_OF_VPORTS BIT_2 10953d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 10963d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t comp_status; /* Completion status. */ 10973d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_VCT_STS_ERROR 0x01 /* Specified VPs were not disabled. */ 10983d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_VCT_CNT_ERROR 0x02 /* Invalid VP count. */ 10993d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_VCT_ERROR 0x03 /* Unknown error. */ 11003d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_VCT_IDX_ERROR 0x02 /* Invalid VP index. */ 11013d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define CS_VCT_BUSY 0x05 /* Firmware not ready to accept cmd. */ 11023d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11033d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t command; 11042c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju#define VCT_COMMAND_MOD_VPS 0x00 /* Modify VP configurations. */ 11052c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju#define VCT_COMMAND_MOD_ENABLE_VPS 0x01 /* Modify configuration & enable VPs. */ 11063d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11073d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_count; 11083d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11092c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t vp_index1; 11102c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t vp_index2; 11113d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11123d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t options_idx1; 11133d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t hard_address_idx1; 11142c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t reserved_vp1; 11153d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_name_idx1[WWN_SIZE]; 11163d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t node_name_idx1[WWN_SIZE]; 11173d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11183d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t options_idx2; 11193d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t hard_address_idx2; 11202c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t reserved_vp2; 11213d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_name_idx2[WWN_SIZE]; 11223d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t node_name_idx2[WWN_SIZE]; 11232c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju struct vf_id id; 11242c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t reserved_4; 11252c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju struct vf_hopct hopct; 11262c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t reserved_5; 11273d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 11283d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11293d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#define VP_RPT_ID_IOCB_TYPE 0x32 /* Report ID Acquisition entry. */ 11303d71644cf952fd1157a13173237258422ba3c569Andrew Vasquezstruct vp_rpt_id_entry_24xx { 11313d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_type; /* Entry type. */ 11323d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_count; /* Entry count. */ 11333d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t sys_define; /* System defined. */ 11343d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t entry_status; /* Entry Status. */ 11353d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11363d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint32_t handle; /* System handle. */ 11373d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11383d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t vp_count; /* Format 0 -- | VP setup | VP acq |. */ 11393d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Format 1 -- | VP count |. */ 11403d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint16_t vp_idx; /* Format 0 -- Reserved. */ 11413d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez /* Format 1 -- VP status and index. */ 11423d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11433d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t port_id[3]; 11443d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t format; 11453d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11463d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t vp_idx_map[16]; 11473d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11483d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez uint8_t reserved_4[32]; 11493d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez}; 11503d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez 11512c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju#define VF_EVFP_IOCB_TYPE 0x26 /* Exchange Virtual Fabric Parameters entry. */ 11522c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Justruct vf_evfp_entry_24xx { 11532c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t entry_type; /* Entry type. */ 11542c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t entry_count; /* Entry count. */ 11552c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t sys_define; /* System defined. */ 11562c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint8_t entry_status; /* Entry Status. */ 11572c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju 11582c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint32_t handle; /* System handle. */ 11592c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t comp_status; /* Completion status. */ 11602c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t timeout; /* timeout */ 11612c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t adim_tagging_mode; 11622c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju 11632c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t vfport_id; 11642c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint32_t exch_addr; 11652c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju 11662c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t nport_handle; /* N_PORT handle. */ 11672c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint16_t control_flags; 11682c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint32_t io_parameter_0; 11692c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint32_t io_parameter_1; 11702c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint32_t tx_address[2]; /* Data segment 0 address. */ 11712c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint32_t tx_len; /* Data segment 0 length. */ 11722c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint32_t rx_address[2]; /* Data segment 1 address. */ 11732c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju uint32_t rx_len; /* Data segment 1 length. */ 11742c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju}; 11752c3dfe3f6ad8daff5acdb01713e4f2b116e78136Seokmann Ju 11763d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez/* END MID Support ***********************************************************/ 11773d71644cf952fd1157a13173237258422ba3c569Andrew Vasquez#endif 1178