addi_common.h revision 34c43922e62708d45e9660eee4b4f1fb7b4bf2c7
1/* 2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module. 3 * 4 * ADDI-DATA GmbH 5 * Dieselstrasse 3 6 * D-77833 Ottersweier 7 * Tel: +19(0)7223/9493-0 8 * Fax: +49(0)7223/9493-92 9 * http://www.addi-data-com 10 * info@addi-data.com 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the Free 14 * Software Foundation; either version 2 of the License, or (at your option) 15 * any later version. 16 */ 17 18#include <linux/kernel.h> 19#include <linux/module.h> 20#include <linux/sched.h> 21#include <linux/mm.h> 22#include <linux/slab.h> 23#include <linux/errno.h> 24#include <linux/ioport.h> 25#include <linux/delay.h> 26#include <linux/interrupt.h> 27#include <linux/timex.h> 28#include <linux/timer.h> 29#include <linux/pci.h> 30#include <linux/io.h> 31#include <linux/kmod.h> 32#include <linux/uaccess.h> 33#include "../../comedidev.h" 34#include "addi_amcc_s5933.h" 35 36#define ERROR -1 37#define SUCCESS 1 38 39/* variable type definition */ 40typedef void VOID, *PVOID; 41typedef char CHAR, *PCHAR; 42typedef const CHAR *PCSTR; 43typedef unsigned char BYTE, *PBYTE; 44typedef short SHORT, *PSHORT; 45typedef unsigned short USHORT, *PUSHORT; 46typedef unsigned short WORD, *PWORD; 47typedef int INT, *PINT;; 48typedef unsigned int UINT, *PUINT; 49typedef int LONG, *PLONG; /* 32-bit */ 50typedef unsigned int ULONG, *PULONG; /* 32-bit */ 51typedef unsigned int DWORD, *PDWORD; /* 32-bit */ 52typedef unsigned long ULONG_PTR; 53 54typedef const comedi_lrange *PCRANGE; 55 56#define LOBYTE(W) (BYTE)((W) & 0xFF) 57#define HIBYTE(W) (BYTE)(((W) >> 8) & 0xFF) 58#define MAKEWORD(H, L) (USHORT)((L) | ((H) << 8)) 59#define LOWORD(W) (USHORT)((W) & 0xFFFF) 60#define HIWORD(W) (USHORT)(((W) >> 16) & 0xFFFF) 61#define MAKEDWORD(H, L) (UINT)((L) | ((H) << 16)) 62 63#define ADDI_ENABLE 1 64#define ADDI_DISABLE 0 65#define APCI1710_SAVE_INTERRUPT 1 66 67#define ADDIDATA_EEPROM 1 68#define ADDIDATA_NO_EEPROM 0 69#define ADDIDATA_93C76 "93C76" 70#define ADDIDATA_S5920 "S5920" 71#define ADDIDATA_S5933 "S5933" 72#define ADDIDATA_9054 "9054" 73 74/* ADDIDATA Enable Disable */ 75#define ADDIDATA_ENABLE 1 76#define ADDIDATA_DISABLE 0 77 78/* Structures */ 79 80/* structure for the boardtype */ 81typedef struct { 82 PCSTR pc_DriverName; // driver name 83 INT i_VendorId; //PCI vendor a device ID of card 84 INT i_DeviceId; 85 INT i_IorangeBase0; 86 INT i_IorangeBase1; 87 INT i_IorangeBase2; // base 2 range 88 INT i_IorangeBase3; // base 3 range 89 INT i_PCIEeprom; // eeprom present or not 90 PCHAR pc_EepromChip; // type of chip 91 INT i_NbrAiChannel; // num of A/D chans 92 INT i_NbrAiChannelDiff; // num of A/D chans in diff mode 93 INT i_AiChannelList; // len of chanlist 94 INT i_NbrAoChannel; // num of D/A chans 95 INT i_AiMaxdata; // resolution of A/D 96 INT i_AoMaxdata; // resolution of D/A 97 PCRANGE pr_AiRangelist; // rangelist for A/D 98 PCRANGE pr_AoRangelist; // rangelist for D/A 99 100 INT i_NbrDiChannel; // Number of DI channels 101 INT i_NbrDoChannel; // Number of DO channels 102 INT i_DoMaxdata; // data to set all chanels high 103 104 INT i_NbrTTLChannel; // Number of TTL channels 105 PCRANGE pr_TTLRangelist; // rangelist for TTL 106 107 INT i_Dma; // dma present or not 108 INT i_Timer; // timer subdevice present or not 109 BYTE b_AvailableConvertUnit; 110 UINT ui_MinAcquisitiontimeNs; // Minimum Acquisition in Nano secs 111 UINT ui_MinDelaytimeNs; // Minimum Delay in Nano secs 112 113 /* interrupt and reset */ 114 void (*v_hwdrv_Interrupt)(int irq, void *d); 115 int (*i_hwdrv_Reset)(struct comedi_device *dev); 116 117 /* Subdevice functions */ 118 119 /* ANALOG INPUT */ 120 int (*i_hwdrv_InsnConfigAnalogInput)(struct comedi_device *dev, 121 struct comedi_subdevice *s, 122 comedi_insn *insn, 123 unsigned int *data); 124 int (*i_hwdrv_InsnReadAnalogInput)(struct comedi_device *dev, 125 struct comedi_subdevice *s, 126 comedi_insn *insn, 127 unsigned int *data); 128 int (*i_hwdrv_InsnWriteAnalogInput)(struct comedi_device *dev, 129 struct comedi_subdevice *s, 130 comedi_insn *insn, 131 unsigned int *data); 132 int (*i_hwdrv_InsnBitsAnalogInput)(struct comedi_device *dev, 133 struct comedi_subdevice *s, 134 comedi_insn *insn, 135 unsigned int *data); 136 int (*i_hwdrv_CommandTestAnalogInput)(struct comedi_device *dev, 137 struct comedi_subdevice *s, 138 comedi_cmd *cmd); 139 int (*i_hwdrv_CommandAnalogInput)(struct comedi_device *dev, 140 struct comedi_subdevice *s); 141 int (*i_hwdrv_CancelAnalogInput)(struct comedi_device *dev, 142 struct comedi_subdevice *s); 143 144 /* Analog Output */ 145 int (*i_hwdrv_InsnConfigAnalogOutput)(struct comedi_device *dev, 146 struct comedi_subdevice *s, 147 comedi_insn *insn, 148 unsigned int *data); 149 int (*i_hwdrv_InsnWriteAnalogOutput)(struct comedi_device *dev, 150 struct comedi_subdevice *s, 151 comedi_insn *insn, 152 unsigned int *data); 153 int (*i_hwdrv_InsnBitsAnalogOutput)(struct comedi_device *dev, 154 struct comedi_subdevice *s, 155 comedi_insn *insn, 156 unsigned int *data); 157 158 /* Digital Input */ 159 int (*i_hwdrv_InsnConfigDigitalInput) (struct comedi_device *dev, 160 struct comedi_subdevice *s, 161 comedi_insn *insn, 162 unsigned int *data); 163 int (*i_hwdrv_InsnReadDigitalInput) (struct comedi_device *dev, 164 struct comedi_subdevice *s, 165 comedi_insn *insn, 166 unsigned int *data); 167 int (*i_hwdrv_InsnWriteDigitalInput) (struct comedi_device *dev, 168 struct comedi_subdevice *s, 169 comedi_insn *insn, 170 unsigned int *data); 171 int (*i_hwdrv_InsnBitsDigitalInput) (struct comedi_device *dev, 172 struct comedi_subdevice *s, 173 comedi_insn *insn, 174 unsigned int *data); 175 176 /* Digital Output */ 177 int (*i_hwdrv_InsnConfigDigitalOutput)(struct comedi_device *dev, 178 struct comedi_subdevice *s, 179 comedi_insn *insn, 180 unsigned int *data); 181 int (*i_hwdrv_InsnWriteDigitalOutput)(struct comedi_device *dev, 182 struct comedi_subdevice *s, 183 comedi_insn *insn, 184 unsigned int *data); 185 int (*i_hwdrv_InsnBitsDigitalOutput)(struct comedi_device *dev, 186 struct comedi_subdevice *s, 187 comedi_insn *insn, 188 unsigned int *data); 189 int (*i_hwdrv_InsnReadDigitalOutput)(struct comedi_device *dev, 190 struct comedi_subdevice *s, 191 comedi_insn *insn, 192 unsigned int *data); 193 194 /* TIMER */ 195 int (*i_hwdrv_InsnConfigTimer)(struct comedi_device *dev, 196 struct comedi_subdevice *s, 197 comedi_insn *insn, unsigned int *data); 198 int (*i_hwdrv_InsnWriteTimer)(struct comedi_device *dev, 199 struct comedi_subdevice *s, comedi_insn *insn, 200 unsigned int *data); 201 int (*i_hwdrv_InsnReadTimer)(struct comedi_device *dev, struct comedi_subdevice *s, 202 comedi_insn *insn, unsigned int *data); 203 int (*i_hwdrv_InsnBitsTimer)(struct comedi_device *dev, struct comedi_subdevice *s, 204 comedi_insn *insn, unsigned int *data); 205 206 /* TTL IO */ 207 int (*i_hwdr_ConfigInitTTLIO)(struct comedi_device *dev, 208 struct comedi_subdevice *s, comedi_insn *insn, 209 unsigned int *data); 210 int (*i_hwdr_ReadTTLIOBits)(struct comedi_device *dev, struct comedi_subdevice *s, 211 comedi_insn *insn, unsigned int *data); 212 int (*i_hwdr_ReadTTLIOAllPortValue)(struct comedi_device *dev, 213 struct comedi_subdevice *s, 214 comedi_insn *insn, 215 unsigned int *data); 216 int (*i_hwdr_WriteTTLIOChlOnOff)(struct comedi_device *dev, 217 struct comedi_subdevice *s, 218 comedi_insn *insn, unsigned int *data); 219} boardtype; 220 221//MODULE INFO STRUCTURE 222 223typedef union { 224 /* Incremental counter infos */ 225 struct { 226 union { 227 struct { 228 BYTE b_ModeRegister1; 229 BYTE b_ModeRegister2; 230 BYTE b_ModeRegister3; 231 BYTE b_ModeRegister4; 232 } s_ByteModeRegister; 233 DWORD dw_ModeRegister1_2_3_4; 234 } s_ModeRegister; 235 236 struct { 237 unsigned int b_IndexInit:1; 238 unsigned int b_CounterInit:1; 239 unsigned int b_ReferenceInit:1; 240 unsigned int b_IndexInterruptOccur:1; 241 unsigned int b_CompareLogicInit:1; 242 unsigned int b_FrequencyMeasurementInit:1; 243 unsigned int b_FrequencyMeasurementEnable:1; 244 } s_InitFlag; 245 246 } s_SiemensCounterInfo; 247 248 /* SSI infos */ 249 struct { 250 BYTE b_SSIProfile; 251 BYTE b_PositionTurnLength; 252 BYTE b_TurnCptLength; 253 BYTE b_SSIInit; 254 } s_SSICounterInfo; 255 256 /* TTL I/O infos */ 257 struct { 258 BYTE b_TTLInit; 259 BYTE b_PortConfiguration[4]; 260 } s_TTLIOInfo; 261 262 /* Digital I/O infos */ 263 struct { 264 BYTE b_DigitalInit; 265 BYTE b_ChannelAMode; 266 BYTE b_ChannelBMode; 267 BYTE b_OutputMemoryEnabled; 268 DWORD dw_OutputMemory; 269 } s_DigitalIOInfo; 270 271 /*********************/ 272 /* 82X54 timer infos */ 273 /*********************/ 274 275 struct { 276 struct { 277 BYTE b_82X54Init; 278 BYTE b_InputClockSelection; 279 BYTE b_InputClockLevel; 280 BYTE b_OutputLevel; 281 BYTE b_HardwareGateLevel; 282 DWORD dw_ConfigurationWord; 283 } s_82X54TimerInfo[3]; 284 BYTE b_InterruptMask; 285 } s_82X54ModuleInfo; 286 287 /*********************/ 288 /* Chronometer infos */ 289 /*********************/ 290 291 struct { 292 BYTE b_ChronoInit; 293 BYTE b_InterruptMask; 294 BYTE b_PCIInputClock; 295 BYTE b_TimingUnit; 296 BYTE b_CycleMode; 297 double d_TimingInterval; 298 DWORD dw_ConfigReg; 299 } s_ChronoModuleInfo; 300 301 /***********************/ 302 /* Pulse encoder infos */ 303 /***********************/ 304 305 struct { 306 struct { 307 BYTE b_PulseEncoderInit; 308 } s_PulseEncoderInfo[4]; 309 DWORD dw_SetRegister; 310 DWORD dw_ControlRegister; 311 DWORD dw_StatusRegister; 312 } s_PulseEncoderModuleInfo; 313 314 /* Tor conter infos */ 315 struct { 316 struct { 317 BYTE b_TorCounterInit; 318 BYTE b_TimingUnit; 319 BYTE b_InterruptEnable; 320 double d_TimingInterval; 321 ULONG ul_RealTimingInterval; 322 } s_TorCounterInfo[2]; 323 BYTE b_PCIInputClock; 324 } s_TorCounterModuleInfo; 325 326 /* PWM infos */ 327 struct { 328 struct { 329 BYTE b_PWMInit; 330 BYTE b_TimingUnit; 331 BYTE b_InterruptEnable; 332 double d_LowTiming; 333 double d_HighTiming; 334 ULONG ul_RealLowTiming; 335 ULONG ul_RealHighTiming; 336 } s_PWMInfo[2]; 337 BYTE b_ClockSelection; 338 } s_PWMModuleInfo; 339 340 /* ETM infos */ 341 struct { 342 struct { 343 BYTE b_ETMEnable; 344 BYTE b_ETMInterrupt; 345 } s_ETMInfo[2]; 346 BYTE b_ETMInit; 347 BYTE b_TimingUnit; 348 BYTE b_ClockSelection; 349 double d_TimingInterval; 350 ULONG ul_Timing; 351 } s_ETMModuleInfo; 352 353 /* CDA infos */ 354 struct { 355 BYTE b_CDAEnable; 356 BYTE b_CDAInterrupt; 357 BYTE b_CDAInit; 358 BYTE b_FctSelection; 359 BYTE b_CDAReadFIFOOverflow; 360 } s_CDAModuleInfo; 361 362} str_ModuleInfo; 363 364/* Private structure for the addi_apci3120 driver */ 365typedef struct { 366 367 INT iobase; 368 INT i_IobaseAmcc; // base+size for AMCC chip 369 INT i_IobaseAddon; //addon base address 370 INT i_IobaseReserved; 371 ULONG_PTR dw_AiBase; 372 struct pcilst_struct *amcc; // ptr too AMCC data 373 BYTE allocated; // we have blocked card 374 BYTE b_ValidDriver; // driver is ok 375 BYTE b_AiContinuous; // we do unlimited AI 376 BYTE b_AiInitialisation; 377 UINT ui_AiActualScan; //how many scans we finished 378 UINT ui_AiBufferPtr; // data buffer ptr in samples 379 UINT ui_AiNbrofChannels; // how many channels is measured 380 UINT ui_AiScanLength; // Length of actual scanlist 381 UINT ui_AiActualScanPosition; // position in actual scan 382 PUINT pui_AiChannelList; // actual chanlist 383 UINT ui_AiChannelList[32]; // actual chanlist 384 BYTE b_AiChannelConfiguration[32]; // actual chanlist 385 UINT ui_AiReadData[32]; 386 DWORD dw_AiInitialised; 387 UINT ui_AiTimer0; //Timer Constant for Timer0 388 UINT ui_AiTimer1; //Timer constant for Timer1 389 UINT ui_AiFlags; 390 UINT ui_AiDataLength; 391 short *AiData; // Pointer to sample data 392 UINT ui_AiNbrofScans; // number of scans to do 393 USHORT us_UseDma; // To use Dma or not 394 BYTE b_DmaDoubleBuffer; // we can use double buffering 395 UINT ui_DmaActualBuffer; // which buffer is used now 396 //*UPDATE-0.7.57->0.7.68 397 //ULONG ul_DmaBufferVirtual[2];// pointers to begin of DMA buffer 398 short *ul_DmaBufferVirtual[2]; // pointers to begin of DMA buffer 399 ULONG ul_DmaBufferHw[2]; // hw address of DMA buff 400 UINT ui_DmaBufferSize[2]; // size of dma buffer in bytes 401 UINT ui_DmaBufferUsesize[2]; // which size we may now used for transfer 402 UINT ui_DmaBufferSamples[2]; // size in samples 403 UINT ui_DmaBufferPages[2]; // number of pages in buffer 404 BYTE b_DigitalOutputRegister; // Digital Output Register 405 BYTE b_OutputMemoryStatus; 406 BYTE b_AnalogInputChannelNbr; // Analog input channel Nbr 407 BYTE b_AnalogOutputChannelNbr; // Analog input Output Nbr 408 BYTE b_TimerSelectMode; // Contain data written at iobase + 0C 409 BYTE b_ModeSelectRegister; // Contain data written at iobase + 0E 410 USHORT us_OutputRegister; // Contain data written at iobase + 0 411 BYTE b_InterruptState; 412 BYTE b_TimerInit; // Specify if InitTimerWatchdog was load 413 BYTE b_TimerStarted; // Specify if timer 2 is running or not 414 BYTE b_Timer2Mode; // Specify the timer 2 mode 415 BYTE b_Timer2Interrupt; //Timer2 interrupt enable or disable 416 BYTE b_AiCyclicAcquisition; // indicate cyclic acquisition 417 BYTE b_InterruptMode; // eoc eos or dma 418 BYTE b_EocEosInterrupt; // Enable disable eoc eos interrupt 419 UINT ui_EocEosConversionTime; 420 BYTE b_EocEosConversionTimeBase; 421 BYTE b_SingelDiff; 422 BYTE b_ExttrigEnable; /* To enable or disable external trigger */ 423 424 /* Pointer to the current process */ 425 struct task_struct *tsk_Current; 426 boardtype *ps_BoardInfo; 427 428 /* Hardware board infos for 1710 */ 429 struct { 430 UINT ui_Address; /* Board address */ 431 UINT ui_FlashAddress; 432 BYTE b_InterruptNbr; /* Board interrupt number */ 433 BYTE b_SlotNumber; /* PCI slot number */ 434 BYTE b_BoardVersion; 435 DWORD dw_MolduleConfiguration[4]; /* Module config */ 436 } s_BoardInfos; 437 438 /* Interrupt infos */ 439 struct { 440 ULONG ul_InterruptOccur; /* 0 : No interrupt occur */ 441 /* > 0 : Interrupt occur */ 442 UINT ui_Read; /* Read FIFO */ 443 UINT ui_Write; /* Write FIFO */ 444 struct { 445 BYTE b_OldModuleMask; 446 ULONG ul_OldInterruptMask; /* Interrupt mask */ 447 ULONG ul_OldCounterLatchValue; /* Interrupt counter value */ 448 } s_FIFOInterruptParameters[APCI1710_SAVE_INTERRUPT]; 449 } s_InterruptParameters; 450 451 str_ModuleInfo s_ModuleInfo[4]; 452 ULONG ul_TTLPortConfiguration[10]; 453 454} addi_private; 455 456static unsigned short pci_list_builded; /* set to 1 when list of card is known */ 457 458/* Function declarations */ 459static int i_ADDI_Attach(struct comedi_device *dev, comedi_devconfig *it); 460static int i_ADDI_Detach(struct comedi_device *dev); 461static int i_ADDI_Reset(struct comedi_device *dev); 462 463static irqreturn_t v_ADDI_Interrupt(int irq, void *d PT_REGS_ARG); 464static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev, struct comedi_subdevice *s, 465 comedi_insn *insn, unsigned int *data); 466