addi_common.h revision c995fe9475e062bab6f5a45ed28cd2d3d955ef43 
1/**
2@verbatim
3
4Copyright (C) 2004,2005  ADDI-DATA GmbH for the source code of this module.
5
6        ADDI-DATA GmbH
7        Dieselstrasse 3
8        D-77833 Ottersweier
9        Tel: +19(0)7223/9493-0
10        Fax: +49(0)7223/9493-92
11        http://www.addi-data-com
12        info@addi-data.com
13
14This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
15
16This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
20You shoud also find the complete GPL in the COPYING file accompanying this source code.
21
22@endverbatim
23*/
24/*
25
26  +-----------------------------------------------------------------------+
27  | (C) ADDI-DATA GmbH          Dieselstrasse 3      D-77833 Ottersweier  |
28  +-----------------------------------------------------------------------+
29  | Tel : +49 (0) 7223/9493-0     | email    : info@addi-data.com         |
30  | Fax : +49 (0) 7223/9493-92    | Internet : http://www.addi-data.com   |
31  +-----------------------------------------------------------------------+
32  | Project   : ADDI-DATA	  | Compiler : GCC 		          |
33  | Modulname : addi_common.h     | Version  : 2.96                       |
34  +-------------------------------+---------------------------------------+
35  | Project manager: Eric Stolz   | Date     :  02/12/2002                |
36  +-----------------------------------------------------------------------+
37  | Description : ADDI COMMON Header File                                 |
38  +-----------------------------------------------------------------------+
39*/
40
41//including header files
42
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/sched.h>
46#include <linux/mm.h>
47//#include <linux/malloc.h>
48#include <linux/slab.h>
49#include <linux/errno.h>
50#include <linux/ioport.h>
51#include <linux/delay.h>
52#include <linux/interrupt.h>
53#include <linux/timex.h>
54#include <linux/timer.h>
55#include <linux/pci.h>
56#include <asm/io.h>
57#include "../../comedidev.h"
58#include "addi_amcc_s5933.h"
59#include <linux/kmod.h>
60#include <asm/uaccess.h>
61
62#define ERROR  -1
63#define SUCCESS 1
64
65// variable type definition
66
67typedef void VOID, *PVOID;
68typedef char CHAR, *PCHAR;
69typedef const CHAR *PCSTR;
70typedef unsigned char BYTE, *PBYTE;
71typedef short SHORT, *PSHORT;
72typedef unsigned short USHORT, *PUSHORT;
73typedef unsigned short WORD, *PWORD;
74typedef int INT, *PINT;;
75typedef unsigned int UINT, *PUINT;
76typedef int LONG, *PLONG;	/* 32-bit */
77typedef unsigned int ULONG, *PULONG;	/* 32-bit */
78typedef unsigned int DWORD, *PDWORD;	/* 32-bit */
79typedef unsigned long ULONG_PTR;
80
81typedef const comedi_lrange *PCRANGE;
82#define LOBYTE(W)								 (BYTE         )((W)&0xFF)
83#define HIBYTE(W)                                (BYTE         )(((W)>>8)&0xFF)
84#define MAKEWORD(H,L)                            (USHORT       )((L)|( (H)<<8) )
85#define LOWORD(W)								 (USHORT       )((W)&0xFFFF)
86#define HIWORD(W)                                (USHORT       )(((W)>>16)&0xFFFF)
87#define MAKEDWORD(H,L)  						(UINT         )((L)|( (H)<<16) )
88
89#define ADDI_ENABLE   1
90#define ADDI_DISABLE  0
91#define APCI1710_SAVE_INTERRUPT 1
92
93#define ADDIDATA_EEPROM    	  1
94#define ADDIDATA_NO_EEPROM    0
95#define ADDIDATA_93C76        "93C76"
96#define ADDIDATA_S5920        "S5920"
97#define ADDIDATA_S5933        "S5933"
98#define ADDIDATA_9054         "9054"
99
100//ADDIDATA Enable Disable
101#define ADDIDATA_ENABLE                            1
102#define ADDIDATA_DISABLE                           0
103
104// Structures
105// structure for the boardtype
106typedef struct {
107
108	PCSTR pc_DriverName;	// driver name
109	INT i_VendorId;		//PCI vendor a device ID of card
110	INT i_DeviceId;
111	INT i_IorangeBase0;
112	INT i_IorangeBase1;
113	INT i_IorangeBase2;	//  base 2 range
114	INT i_IorangeBase3;	//  base 3 range
115	INT i_PCIEeprom;	// eeprom present or not
116	PCHAR pc_EepromChip;	// type of chip
117	INT i_NbrAiChannel;	// num of A/D chans
118	INT i_NbrAiChannelDiff;	// num of A/D chans in diff mode
119	INT i_AiChannelList;	// len of chanlist
120	INT i_NbrAoChannel;	// num of D/A chans
121	INT i_AiMaxdata;	// resolution of A/D
122	INT i_AoMaxdata;	// resolution of D/A
123	PCRANGE pr_AiRangelist;	// rangelist for A/D
124	PCRANGE pr_AoRangelist;	// rangelist for D/A
125
126	INT i_NbrDiChannel;	// Number of DI channels
127	INT i_NbrDoChannel;	// Number of DO channels
128	INT i_DoMaxdata;	// data to set all chanels high
129
130	INT i_NbrTTLChannel;	// Number of TTL channels
131	PCRANGE pr_TTLRangelist;	// rangelist for TTL
132
133	INT i_Dma;		// dma present or not
134	INT i_Timer;		//   timer subdevice present or not
135	BYTE b_AvailableConvertUnit;
136	UINT ui_MinAcquisitiontimeNs;	// Minimum Acquisition in Nano secs
137	UINT ui_MinDelaytimeNs;	// Minimum Delay in Nano secs
138
139// interrupt and reset
140	void (*v_hwdrv_Interrupt) (int irq, void *d);
141	int (*i_hwdrv_Reset) (comedi_device * dev);
142
143//Subdevice functions
144//ANALOG INPUT
145
146	int (*i_hwdrv_InsnConfigAnalogInput) (comedi_device * dev,
147		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
148	int (*i_hwdrv_InsnReadAnalogInput) (comedi_device * dev,
149		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
150	int (*i_hwdrv_InsnWriteAnalogInput) (comedi_device * dev,
151		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
152	int (*i_hwdrv_InsnBitsAnalogInput) (comedi_device * dev,
153		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
154	int (*i_hwdrv_CommandTestAnalogInput) (comedi_device * dev,
155		comedi_subdevice * s, comedi_cmd * cmd);
156	int (*i_hwdrv_CommandAnalogInput) (comedi_device * dev,
157		comedi_subdevice * s);
158	int (*i_hwdrv_CancelAnalogInput) (comedi_device * dev,
159		comedi_subdevice * s);
160
161//Analog Output
162	int (*i_hwdrv_InsnConfigAnalogOutput) (comedi_device * dev,
163		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
164	int (*i_hwdrv_InsnWriteAnalogOutput) (comedi_device * dev,
165		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
166	int (*i_hwdrv_InsnBitsAnalogOutput) (comedi_device * dev,
167		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
168
169//Digital Input
170	int (*i_hwdrv_InsnConfigDigitalInput) (comedi_device * dev,
171		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
172	int (*i_hwdrv_InsnReadDigitalInput) (comedi_device * dev,
173		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
174	int (*i_hwdrv_InsnWriteDigitalInput) (comedi_device * dev,
175		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
176	int (*i_hwdrv_InsnBitsDigitalInput) (comedi_device * dev,
177		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
178
179//Digital Output
180	int (*i_hwdrv_InsnConfigDigitalOutput) (comedi_device * dev,
181		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
182	int (*i_hwdrv_InsnWriteDigitalOutput) (comedi_device * dev,
183		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
184	int (*i_hwdrv_InsnBitsDigitalOutput) (comedi_device * dev,
185		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
186	int (*i_hwdrv_InsnReadDigitalOutput) (comedi_device * dev,
187		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
188
189//TIMER
190	int (*i_hwdrv_InsnConfigTimer) (comedi_device * dev,
191		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
192	int (*i_hwdrv_InsnWriteTimer) (comedi_device * dev,
193		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
194	int (*i_hwdrv_InsnReadTimer) (comedi_device * dev, comedi_subdevice * s,
195		comedi_insn * insn, lsampl_t * data);
196	int (*i_hwdrv_InsnBitsTimer) (comedi_device * dev, comedi_subdevice * s,
197		comedi_insn * insn, lsampl_t * data);
198
199//TTL IO
200	int (*i_hwdr_ConfigInitTTLIO) (comedi_device * dev,
201		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
202	int (*i_hwdr_ReadTTLIOBits) (comedi_device * dev, comedi_subdevice * s,
203		comedi_insn * insn, lsampl_t * data);
204	int (*i_hwdr_ReadTTLIOAllPortValue) (comedi_device * dev,
205		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
206	int (*i_hwdr_WriteTTLIOChlOnOff) (comedi_device * dev,
207		comedi_subdevice * s, comedi_insn * insn, lsampl_t * data);
208} boardtype;
209
210//MODULE INFO STRUCTURE
211
212typedef union {
213      /*****************************/
214	/* Incremental counter infos */
215      /*****************************/
216
217	struct {
218		union {
219			struct {
220				BYTE b_ModeRegister1;
221				BYTE b_ModeRegister2;
222				BYTE b_ModeRegister3;
223				BYTE b_ModeRegister4;
224			} s_ByteModeRegister;
225			DWORD dw_ModeRegister1_2_3_4;
226		} s_ModeRegister;
227
228		struct {
229			unsigned int b_IndexInit:1;
230			unsigned int b_CounterInit:1;
231			unsigned int b_ReferenceInit:1;
232			unsigned int b_IndexInterruptOccur:1;
233			unsigned int b_CompareLogicInit:1;
234			unsigned int b_FrequencyMeasurementInit:1;
235			unsigned int b_FrequencyMeasurementEnable:1;
236		} s_InitFlag;
237
238	} s_SiemensCounterInfo;
239
240      /*************/
241	/* SSI infos */
242      /*************/
243
244	struct {
245		BYTE b_SSIProfile;
246		BYTE b_PositionTurnLength;
247		BYTE b_TurnCptLength;
248		BYTE b_SSIInit;
249	} s_SSICounterInfo;
250
251      /*****************/
252	/* TTL I/O infos */
253      /*****************/
254
255	struct {
256		BYTE b_TTLInit;
257		BYTE b_PortConfiguration[4];
258	} s_TTLIOInfo;
259
260      /*********************/
261	/* Digital I/O infos */
262      /*********************/
263
264	struct {
265		BYTE b_DigitalInit;
266		BYTE b_ChannelAMode;
267		BYTE b_ChannelBMode;
268		BYTE b_OutputMemoryEnabled;
269		DWORD dw_OutputMemory;
270	} s_DigitalIOInfo;
271
272      /*********************/
273	/* 82X54 timer infos */
274      /*********************/
275
276	struct {
277		struct {
278			BYTE b_82X54Init;
279			BYTE b_InputClockSelection;
280			BYTE b_InputClockLevel;
281			BYTE b_OutputLevel;
282			BYTE b_HardwareGateLevel;
283			DWORD dw_ConfigurationWord;
284		} s_82X54TimerInfo[3];
285		BYTE b_InterruptMask;
286	} s_82X54ModuleInfo;
287
288      /*********************/
289	/* Chronometer infos */
290      /*********************/
291
292	struct {
293		BYTE b_ChronoInit;
294		BYTE b_InterruptMask;
295		BYTE b_PCIInputClock;
296		BYTE b_TimingUnit;
297		BYTE b_CycleMode;
298		double d_TimingInterval;
299		DWORD dw_ConfigReg;
300	} s_ChronoModuleInfo;
301
302      /***********************/
303	/* Pulse encoder infos */
304      /***********************/
305
306	struct {
307		struct {
308			BYTE b_PulseEncoderInit;
309		} s_PulseEncoderInfo[4];
310		DWORD dw_SetRegister;
311		DWORD dw_ControlRegister;
312		DWORD dw_StatusRegister;
313	} s_PulseEncoderModuleInfo;
314
315      /********************/
316	/* Tor conter infos */
317      /********************/
318
319	struct {
320		struct {
321			BYTE b_TorCounterInit;
322			BYTE b_TimingUnit;
323			BYTE b_InterruptEnable;
324			double d_TimingInterval;
325			ULONG ul_RealTimingInterval;
326		} s_TorCounterInfo[2];
327		BYTE b_PCIInputClock;
328	} s_TorCounterModuleInfo;
329
330      /*************/
331	/* PWM infos */
332      /*************/
333
334	struct {
335		struct {
336			BYTE b_PWMInit;
337			BYTE b_TimingUnit;
338			BYTE b_InterruptEnable;
339			double d_LowTiming;
340			double d_HighTiming;
341			ULONG ul_RealLowTiming;
342			ULONG ul_RealHighTiming;
343		} s_PWMInfo[2];
344		BYTE b_ClockSelection;
345	} s_PWMModuleInfo;
346
347      /*************/
348	/* ETM infos */
349      /*************/
350
351	struct {
352		struct {
353			BYTE b_ETMEnable;
354			BYTE b_ETMInterrupt;
355		} s_ETMInfo[2];
356		BYTE b_ETMInit;
357		BYTE b_TimingUnit;
358		BYTE b_ClockSelection;
359		double d_TimingInterval;
360		ULONG ul_Timing;
361	} s_ETMModuleInfo;
362
363      /*************/
364	/* CDA infos */
365      /*************/
366
367	struct {
368		BYTE b_CDAEnable;
369		BYTE b_CDAInterrupt;
370		BYTE b_CDAInit;
371		BYTE b_FctSelection;
372		BYTE b_CDAReadFIFOOverflow;
373	} s_CDAModuleInfo;
374
375} str_ModuleInfo;
376// Private structure for the addi_apci3120 driver
377
378typedef struct {
379
380	INT iobase;
381	INT i_IobaseAmcc;	// base+size for AMCC chip
382	INT i_IobaseAddon;	//addon base address
383	INT i_IobaseReserved;
384	ULONG_PTR dw_AiBase;
385	struct pcilst_struct *amcc;	// ptr too AMCC data
386	BYTE allocated;		// we have blocked card
387	BYTE b_ValidDriver;	// driver is ok
388	BYTE b_AiContinuous;	// we do unlimited AI
389	BYTE b_AiInitialisation;
390	UINT ui_AiActualScan;	//how many scans we finished
391	UINT ui_AiBufferPtr;	// data buffer ptr in samples
392	UINT ui_AiNbrofChannels;	// how many channels is measured
393	UINT ui_AiScanLength;	// Length of actual scanlist
394	UINT ui_AiActualScanPosition;	// position in actual scan
395	PUINT pui_AiChannelList;	// actual chanlist
396	UINT ui_AiChannelList[32];	// actual chanlist
397	BYTE b_AiChannelConfiguration[32];	// actual chanlist
398	UINT ui_AiReadData[32];
399	DWORD dw_AiInitialised;
400	UINT ui_AiTimer0;	//Timer Constant for Timer0
401	UINT ui_AiTimer1;	//Timer constant for Timer1
402	UINT ui_AiFlags;
403	UINT ui_AiDataLength;
404	sampl_t *AiData;	// Pointer to sample data
405	UINT ui_AiNbrofScans;	// number of scans to do
406	USHORT us_UseDma;	// To use Dma or not
407	BYTE b_DmaDoubleBuffer;	// we can use double buffering
408	UINT ui_DmaActualBuffer;	// which buffer is used now
409	//*UPDATE-0.7.57->0.7.68
410	//ULONG               ul_DmaBufferVirtual[2];// pointers to begin of DMA buffer
411	sampl_t *ul_DmaBufferVirtual[2];	// pointers to begin of DMA buffer
412	ULONG ul_DmaBufferHw[2];	// hw address of DMA buff
413	UINT ui_DmaBufferSize[2];	// size of dma buffer in bytes
414	UINT ui_DmaBufferUsesize[2];	// which size we may now used for transfer
415	UINT ui_DmaBufferSamples[2];	// size in samples
416	UINT ui_DmaBufferPages[2];	// number of pages in buffer
417	BYTE b_DigitalOutputRegister;	// Digital Output Register
418	BYTE b_OutputMemoryStatus;
419	BYTE b_AnalogInputChannelNbr;	// Analog input channel Nbr
420	BYTE b_AnalogOutputChannelNbr;	// Analog input Output  Nbr
421	BYTE b_TimerSelectMode;	// Contain data written at iobase + 0C
422	BYTE b_ModeSelectRegister;	// Contain data written at iobase + 0E
423	USHORT us_OutputRegister;	// Contain data written at iobase + 0
424	BYTE b_InterruptState;
425	BYTE b_TimerInit;	// Specify if InitTimerWatchdog was load
426	BYTE b_TimerStarted;	// Specify if timer 2 is running or not
427	BYTE b_Timer2Mode;	// Specify the timer 2 mode
428	BYTE b_Timer2Interrupt;	//Timer2  interrupt enable or disable
429	BYTE b_AiCyclicAcquisition;	// indicate cyclic acquisition
430	BYTE b_InterruptMode;	// eoc eos or dma
431	BYTE b_EocEosInterrupt;	// Enable disable eoc eos interrupt
432	UINT ui_EocEosConversionTime;
433	BYTE b_EocEosConversionTimeBase;
434	BYTE b_SingelDiff;
435	BYTE b_ExttrigEnable;	//  To enable or disable external trigger
436
437	struct task_struct *tsk_Current;	// Pointer to the current process
438	boardtype *ps_BoardInfo;
439
440	// Hardware board infos for 1710
441
442	struct {
443		UINT ui_Address;	// Board address
444		UINT ui_FlashAddress;
445		BYTE b_InterruptNbr;	// Board interrupt number
446		BYTE b_SlotNumber;	// PCI slot number
447		BYTE b_BoardVersion;
448		DWORD dw_MolduleConfiguration[4];	// Module configuration
449	} s_BoardInfos;
450
451	    /*******************/
452	/* Interrupt infos */
453	   /*******************/
454
455	struct {
456		ULONG ul_InterruptOccur;	/* 0   : No interrupt occur  */
457		/* > 0 : Interrupt occur     */
458		UINT ui_Read;	/* Read FIFO                 */
459		UINT ui_Write;	/* Write FIFO                */
460		struct {
461			BYTE b_OldModuleMask;
462			ULONG ul_OldInterruptMask;	/* Interrupt mask          */
463			ULONG ul_OldCounterLatchValue;	/* Interrupt counter value */
464		} s_FIFOInterruptParameters[APCI1710_SAVE_INTERRUPT];
465	} s_InterruptParameters;
466
467	str_ModuleInfo s_ModuleInfo[4];
468	ULONG ul_TTLPortConfiguration[10];
469
470} addi_private;
471
472static unsigned short pci_list_builded = 0;	/* set to 1 when list of card is known */
473
474//Function declarations
475
476static int i_ADDI_Attach(comedi_device * dev, comedi_devconfig * it);
477static int i_ADDI_Detach(comedi_device * dev);
478static int i_ADDI_Reset(comedi_device * dev);
479
480static irqreturn_t v_ADDI_Interrupt(int irq, void *d PT_REGS_ARG);
481static int i_ADDIDATA_InsnReadEeprom(comedi_device * dev, comedi_subdevice * s,
482	comedi_insn * insn, lsampl_t * data);
483