adl_pci9111.c revision 2f6df34cd3455245c44b420d7c3fb11d1137df79
1/* 2 3 comedi/drivers/adl_pci9111.c 4 5 Hardware driver for PCI9111 ADLink cards: 6 7 PCI-9111HR 8 9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr> 10 11 This program is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 2 of the License, or 14 (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software 23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24*/ 25 26/* 27Driver: adl_pci9111 28Description: Adlink PCI-9111HR 29Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr> 30Devices: [ADLink] PCI-9111HR (adl_pci9111) 31Status: experimental 32 33Supports: 34 35 - ai_insn read 36 - ao_insn read/write 37 - di_insn read 38 - do_insn read/write 39 - ai_do_cmd mode with the following sources: 40 41 - start_src TRIG_NOW 42 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT 43 - convert_src TRIG_TIMER TRIG_EXT 44 - scan_end_src TRIG_COUNT 45 - stop_src TRIG_COUNT TRIG_NONE 46 47 The scanned channels must be consecutive and start from 0. They must 48 all have the same range and aref. 49 50Configuration options: 51 52 [0] - PCI bus number (optional) 53 [1] - PCI slot number (optional) 54 55 If bus/slot is not specified, the first available PCI 56 device will be used. 57 58*/ 59 60/* 61CHANGELOG: 62 63 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be 64 a multiple of chanlist_len*convert_arg. 65 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data. 66 2002/02/18 Added external trigger support for analog input. 67 68TODO: 69 70 - Really test implemented functionality. 71 - Add support for the PCI-9111DG with a probe routine to identify the card 72 type (perhaps with the help of the channel number readback of the A/D Data 73 register). 74 - Add external multiplexer support. 75 76*/ 77 78#include "../comedidev.h" 79 80#include <linux/delay.h> 81#include <linux/interrupt.h> 82 83#include "8253.h" 84#include "comedi_pci.h" 85#include "comedi_fc.h" 86 87#define PCI9111_DRIVER_NAME "adl_pci9111" 88#define PCI9111_HR_DEVICE_ID 0x9111 89 90/* TODO: Add other pci9111 board id */ 91 92#define PCI9111_IO_RANGE 0x0100 93 94#define PCI9111_FIFO_HALF_SIZE 512 95 96#define PCI9111_AI_CHANNEL_NBR 16 97 98#define PCI9111_AI_RESOLUTION 12 99#define PCI9111_AI_RESOLUTION_MASK 0x0FFF 100#define PCI9111_AI_RESOLUTION_2_CMP_BIT 0x0800 101 102#define PCI9111_HR_AI_RESOLUTION 16 103#define PCI9111_HR_AI_RESOLUTION_MASK 0xFFFF 104#define PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 0x8000 105 106#define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000 107#define PCI9111_AO_CHANNEL_NBR 1 108#define PCI9111_AO_RESOLUTION 12 109#define PCI9111_AO_RESOLUTION_MASK 0x0FFF 110#define PCI9111_DI_CHANNEL_NBR 16 111#define PCI9111_DO_CHANNEL_NBR 16 112#define PCI9111_DO_MASK 0xFFFF 113 114#define PCI9111_RANGE_SETTING_DELAY 10 115#define PCI9111_AI_INSTANT_READ_UDELAY_US 2 116#define PCI9111_AI_INSTANT_READ_TIMEOUT 100 117 118#define PCI9111_8254_CLOCK_PERIOD_NS 500 119 120#define PCI9111_8254_COUNTER_0 0x00 121#define PCI9111_8254_COUNTER_1 0x40 122#define PCI9111_8254_COUNTER_2 0x80 123#define PCI9111_8254_COUNTER_LATCH 0x00 124#define PCI9111_8254_READ_LOAD_LSB_ONLY 0x10 125#define PCI9111_8254_READ_LOAD_MSB_ONLY 0x20 126#define PCI9111_8254_READ_LOAD_LSB_MSB 0x30 127#define PCI9111_8254_MODE_0 0x00 128#define PCI9111_8254_MODE_1 0x02 129#define PCI9111_8254_MODE_2 0x04 130#define PCI9111_8254_MODE_3 0x06 131#define PCI9111_8254_MODE_4 0x08 132#define PCI9111_8254_MODE_5 0x0A 133#define PCI9111_8254_BINARY_COUNTER 0x00 134#define PCI9111_8254_BCD_COUNTER 0x01 135 136/* IO address map */ 137 138#define PCI9111_REGISTER_AD_FIFO_VALUE 0x00 /* AD Data stored 139 in FIFO */ 140#define PCI9111_REGISTER_DA_OUTPUT 0x00 141#define PCI9111_REGISTER_DIGITAL_IO 0x02 142#define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04 143#define PCI9111_REGISTER_AD_CHANNEL_CONTROL 0x06 /* Channel 144 selection */ 145#define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06 146#define PCI9111_REGISTER_INPUT_SIGNAL_RANGE 0x08 147#define PCI9111_REGISTER_RANGE_STATUS_READBACK 0x08 148#define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A 149#define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A 150#define PCI9111_REGISTER_SOFTWARE_TRIGGER 0x0E 151#define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C 152#define PCI9111_REGISTER_8254_COUNTER_0 0x40 153#define PCI9111_REGISTER_8254_COUNTER_1 0x42 154#define PCI9111_REGISTER_8254_COUNTER_2 0X44 155#define PCI9111_REGISTER_8254_CONTROL 0x46 156#define PCI9111_REGISTER_INTERRUPT_CLEAR 0x48 157 158#define PCI9111_TRIGGER_MASK 0x0F 159#define PCI9111_PTRG_OFF (0 << 3) 160#define PCI9111_PTRG_ON (1 << 3) 161#define PCI9111_EITS_EXTERNAL (1 << 2) 162#define PCI9111_EITS_INTERNAL (0 << 2) 163#define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1) 164#define PCI9111_TPST_TIMER_PACER (1 << 1) 165#define PCI9111_ASCAN_ON (1 << 0) 166#define PCI9111_ASCAN_OFF (0 << 0) 167 168#define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0) 169#define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0) 170#define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1) 171#define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1) 172#define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2) 173#define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2) 174 175#define PCI9111_CHANNEL_MASK 0x0F 176 177#define PCI9111_RANGE_MASK 0x07 178#define PCI9111_FIFO_EMPTY_MASK 0x10 179#define PCI9111_FIFO_HALF_FULL_MASK 0x20 180#define PCI9111_FIFO_FULL_MASK 0x40 181#define PCI9111_AD_BUSY_MASK 0x80 182 183#define PCI9111_IO_BASE (dev->iobase) 184 185/* 186 * Define inlined function 187 */ 188 189#define pci9111_trigger_and_autoscan_get() \ 190 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F) 191 192#define pci9111_trigger_and_autoscan_set(flags) \ 193 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL) 194 195#define pci9111_interrupt_and_fifo_get() \ 196 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) >> 4) \ 197 &0x03) 198 199#define pci9111_interrupt_and_fifo_set(flags) \ 200 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL) 201 202#define pci9111_interrupt_clear() \ 203 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR) 204 205#define pci9111_software_trigger() \ 206 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER) 207 208#define pci9111_fifo_reset() do { \ 209 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \ 210 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \ 211 outb(PCI9111_FFEN_SET_FIFO_DISABLE, \ 212 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \ 213 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \ 214 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \ 215 } while (0) 216 217#define pci9111_is_fifo_full() \ 218 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 219 PCI9111_FIFO_FULL_MASK) == 0) 220 221#define pci9111_is_fifo_half_full() \ 222 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 223 PCI9111_FIFO_HALF_FULL_MASK) == 0) 224 225#define pci9111_is_fifo_empty() \ 226 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 227 PCI9111_FIFO_EMPTY_MASK) == 0) 228 229#define pci9111_ai_channel_set(channel) \ 230 outb((channel)&PCI9111_CHANNEL_MASK, \ 231 PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL) 232 233#define pci9111_ai_channel_get() \ 234 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \ 235 &PCI9111_CHANNEL_MASK) 236 237#define pci9111_ai_range_set(range) \ 238 outb((range)&PCI9111_RANGE_MASK, \ 239 PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE) 240 241#define pci9111_ai_range_get() \ 242 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \ 243 &PCI9111_RANGE_MASK) 244 245#define pci9111_ai_get_data() \ 246 (((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \ 247 &PCI9111_AI_RESOLUTION_MASK) \ 248 ^ PCI9111_AI_RESOLUTION_2_CMP_BIT) 249 250#define pci9111_hr_ai_get_data() \ 251 (inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) & PCI9111_HR_AI_RESOLUTION_MASK) \ 252 ^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 253 254#define pci9111_ao_set_data(data) \ 255 outw(data&PCI9111_AO_RESOLUTION_MASK, PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT) 256 257#define pci9111_di_get_bits() \ 258 inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO) 259 260#define pci9111_do_set_bits(bits) \ 261 outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO) 262 263#define pci9111_8254_control_set(flags) \ 264 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL) 265 266#define pci9111_8254_counter_0_set(data) \ 267 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \ 268 outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0) 269 270#define pci9111_8254_counter_1_set(data) \ 271 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \ 272 outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1) 273 274#define pci9111_8254_counter_2_set(data) \ 275 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \ 276 outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2) 277 278/* Function prototypes */ 279 280static int pci9111_attach(struct comedi_device *dev, 281 struct comedi_devconfig *it); 282static int pci9111_detach(struct comedi_device *dev); 283static void pci9111_ai_munge(struct comedi_device *dev, 284 struct comedi_subdevice *s, void *data, 285 unsigned int num_bytes, 286 unsigned int start_chan_index); 287 288static const struct comedi_lrange pci9111_hr_ai_range = { 289 5, 290 { 291 BIP_RANGE(10), 292 BIP_RANGE(5), 293 BIP_RANGE(2.5), 294 BIP_RANGE(1.25), 295 BIP_RANGE(0.625) 296 } 297}; 298 299static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = { 300 { 301 PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID, PCI_ANY_ID, 302 PCI_ANY_ID, 0, 0, 0}, 303 /* { PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, */ 304 { 305 0} 306}; 307 308MODULE_DEVICE_TABLE(pci, pci9111_pci_table); 309 310/* */ 311/* Board specification structure */ 312/* */ 313 314struct pci9111_board { 315 const char *name; /* driver name */ 316 int device_id; 317 int ai_channel_nbr; /* num of A/D chans */ 318 int ao_channel_nbr; /* num of D/A chans */ 319 int ai_resolution; /* resolution of A/D */ 320 int ai_resolution_mask; 321 int ao_resolution; /* resolution of D/A */ 322 int ao_resolution_mask; 323 const struct comedi_lrange *ai_range_list; /* rangelist for A/D */ 324 const struct comedi_lrange *ao_range_list; /* rangelist for D/A */ 325 unsigned int ai_acquisition_period_min_ns; 326}; 327 328static const struct pci9111_board pci9111_boards[] = { 329 { 330 .name = "pci9111_hr", 331 .device_id = PCI9111_HR_DEVICE_ID, 332 .ai_channel_nbr = PCI9111_AI_CHANNEL_NBR, 333 .ao_channel_nbr = PCI9111_AO_CHANNEL_NBR, 334 .ai_resolution = PCI9111_HR_AI_RESOLUTION, 335 .ai_resolution_mask = PCI9111_HR_AI_RESOLUTION_MASK, 336 .ao_resolution = PCI9111_AO_RESOLUTION, 337 .ao_resolution_mask = PCI9111_AO_RESOLUTION_MASK, 338 .ai_range_list = &pci9111_hr_ai_range, 339 .ao_range_list = &range_bipolar10, 340 .ai_acquisition_period_min_ns = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS} 341}; 342 343#define pci9111_board_nbr \ 344 (sizeof(pci9111_boards)/sizeof(struct pci9111_board)) 345 346static struct comedi_driver pci9111_driver = { 347 .driver_name = PCI9111_DRIVER_NAME, 348 .module = THIS_MODULE, 349 .attach = pci9111_attach, 350 .detach = pci9111_detach, 351}; 352 353COMEDI_PCI_INITCLEANUP(pci9111_driver, pci9111_pci_table); 354 355/* Private data structure */ 356 357struct pci9111_private_data { 358 struct pci_dev *pci_device; 359 unsigned long io_range; /* PCI6503 io range */ 360 361 unsigned long lcr_io_base; /* Local configuration register base address */ 362 unsigned long lcr_io_range; 363 364 int stop_counter; 365 int stop_is_none; 366 367 unsigned int scan_delay; 368 unsigned int chanlist_len; 369 unsigned int chunk_counter; 370 unsigned int chunk_num_samples; 371 372 int ao_readback; /* Last written analog output data */ 373 374 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer pacer */ 375 unsigned int timer_divisor_2; 376 377 int is_valid; /* Is device valid */ 378 379 short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE]; 380}; 381 382#define dev_private ((struct pci9111_private_data *)dev->private) 383 384/* ------------------------------------------------------------------ */ 385/* PLX9050 SECTION */ 386/* ------------------------------------------------------------------ */ 387 388#define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c 389 390#define PLX9050_LINTI1_ENABLE (1 << 0) 391#define PLX9050_LINTI1_ACTIVE_HIGH (1 << 1) 392#define PLX9050_LINTI1_STATUS (1 << 2) 393#define PLX9050_LINTI2_ENABLE (1 << 3) 394#define PLX9050_LINTI2_ACTIVE_HIGH (1 << 4) 395#define PLX9050_LINTI2_STATUS (1 << 5) 396#define PLX9050_PCI_INTERRUPT_ENABLE (1 << 6) 397#define PLX9050_SOFTWARE_INTERRUPT (1 << 7) 398 399static void plx9050_interrupt_control(unsigned long io_base, 400 bool LINTi1_enable, 401 bool LINTi1_active_high, 402 bool LINTi2_enable, 403 bool LINTi2_active_high, 404 bool interrupt_enable) 405{ 406 int flags = 0; 407 408 if (LINTi1_enable) 409 flags |= PLX9050_LINTI1_ENABLE; 410 if (LINTi1_active_high) 411 flags |= PLX9050_LINTI1_ACTIVE_HIGH; 412 if (LINTi2_enable) 413 flags |= PLX9050_LINTI2_ENABLE; 414 if (LINTi2_active_high) 415 flags |= PLX9050_LINTI2_ACTIVE_HIGH; 416 417 if (interrupt_enable) 418 flags |= PLX9050_PCI_INTERRUPT_ENABLE; 419 420 outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL); 421} 422 423/* ------------------------------------------------------------------ */ 424/* MISCELLANEOUS SECTION */ 425/* ------------------------------------------------------------------ */ 426 427/* 8254 timer */ 428 429static void pci9111_timer_set(struct comedi_device *dev) 430{ 431 pci9111_8254_control_set(PCI9111_8254_COUNTER_0 | 432 PCI9111_8254_READ_LOAD_LSB_MSB | 433 PCI9111_8254_MODE_0 | 434 PCI9111_8254_BINARY_COUNTER); 435 436 pci9111_8254_control_set(PCI9111_8254_COUNTER_1 | 437 PCI9111_8254_READ_LOAD_LSB_MSB | 438 PCI9111_8254_MODE_2 | 439 PCI9111_8254_BINARY_COUNTER); 440 441 pci9111_8254_control_set(PCI9111_8254_COUNTER_2 | 442 PCI9111_8254_READ_LOAD_LSB_MSB | 443 PCI9111_8254_MODE_2 | 444 PCI9111_8254_BINARY_COUNTER); 445 446 udelay(1); 447 448 pci9111_8254_counter_2_set(dev_private->timer_divisor_2); 449 pci9111_8254_counter_1_set(dev_private->timer_divisor_1); 450} 451 452enum pci9111_trigger_sources { 453 software, 454 timer_pacer, 455 external 456}; 457 458static void pci9111_trigger_source_set(struct comedi_device *dev, 459 enum pci9111_trigger_sources source) 460{ 461 int flags; 462 463 flags = pci9111_trigger_and_autoscan_get() & 0x09; 464 465 switch (source) { 466 case software: 467 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER; 468 break; 469 470 case timer_pacer: 471 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER; 472 break; 473 474 case external: 475 flags |= PCI9111_EITS_EXTERNAL; 476 break; 477 } 478 479 pci9111_trigger_and_autoscan_set(flags); 480} 481 482static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger) 483{ 484 int flags; 485 486 flags = pci9111_trigger_and_autoscan_get() & 0x07; 487 488 if (pretrigger) 489 flags |= PCI9111_PTRG_ON; 490 491 pci9111_trigger_and_autoscan_set(flags); 492} 493 494static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan) 495{ 496 int flags; 497 498 flags = pci9111_trigger_and_autoscan_get() & 0x0e; 499 500 if (autoscan) 501 flags |= PCI9111_ASCAN_ON; 502 503 pci9111_trigger_and_autoscan_set(flags); 504} 505 506enum pci9111_ISC0_sources { 507 irq_on_eoc, 508 irq_on_fifo_half_full 509}; 510 511enum pci9111_ISC1_sources { 512 irq_on_timer_tick, 513 irq_on_external_trigger 514}; 515 516static void pci9111_interrupt_source_set(struct comedi_device *dev, 517 enum pci9111_ISC0_sources irq_0_source, 518 enum pci9111_ISC1_sources irq_1_source) 519{ 520 int flags; 521 522 flags = pci9111_interrupt_and_fifo_get() & 0x04; 523 524 if (irq_0_source == irq_on_fifo_half_full) 525 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL; 526 527 if (irq_1_source == irq_on_external_trigger) 528 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG; 529 530 pci9111_interrupt_and_fifo_set(flags); 531} 532 533/* ------------------------------------------------------------------ */ 534/* HARDWARE TRIGGERED ANALOG INPUT SECTION */ 535/* ------------------------------------------------------------------ */ 536 537/* Cancel analog input autoscan */ 538 539#undef AI_DO_CMD_DEBUG 540 541static int pci9111_ai_cancel(struct comedi_device *dev, 542 struct comedi_subdevice *s) 543{ 544 /* Disable interrupts */ 545 546 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true, 547 true, false); 548 549 pci9111_trigger_source_set(dev, software); 550 551 pci9111_autoscan_set(dev, false); 552 553 pci9111_fifo_reset(); 554 555#ifdef AI_DO_CMD_DEBUG 556 printk(PCI9111_DRIVER_NAME ": ai_cancel\n"); 557#endif 558 559 return 0; 560} 561 562/* Test analog input command */ 563 564#define pci9111_check_trigger_src(src, flags) \ 565 tmp = src; \ 566 src &= flags; \ 567 if (!src || tmp != src) error++ 568 569static int 570pci9111_ai_do_cmd_test(struct comedi_device *dev, 571 struct comedi_subdevice *s, struct comedi_cmd *cmd) 572{ 573 int tmp; 574 int error = 0; 575 int range, reference; 576 int i; 577 struct pci9111_board *board = (struct pci9111_board *)dev->board_ptr; 578 579 /* Step 1 : check if trigger are trivialy valid */ 580 581 pci9111_check_trigger_src(cmd->start_src, TRIG_NOW); 582 pci9111_check_trigger_src(cmd->scan_begin_src, 583 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT); 584 pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT); 585 pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT); 586 pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE); 587 588 if (error) 589 return 1; 590 591 /* step 2 : make sure trigger sources are unique and mutually compatible */ 592 593 if (cmd->start_src != TRIG_NOW) 594 error++; 595 596 if ((cmd->scan_begin_src != TRIG_TIMER) && 597 (cmd->scan_begin_src != TRIG_FOLLOW) && 598 (cmd->scan_begin_src != TRIG_EXT)) 599 error++; 600 601 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT)) 602 error++; 603 if ((cmd->convert_src == TRIG_TIMER) && 604 !((cmd->scan_begin_src == TRIG_TIMER) || 605 (cmd->scan_begin_src == TRIG_FOLLOW))) 606 error++; 607 if ((cmd->convert_src == TRIG_EXT) && 608 !((cmd->scan_begin_src == TRIG_EXT) || 609 (cmd->scan_begin_src == TRIG_FOLLOW))) 610 error++; 611 612 613 if (cmd->scan_end_src != TRIG_COUNT) 614 error++; 615 if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE)) 616 error++; 617 618 if (error) 619 return 2; 620 621 /* Step 3 : make sure arguments are trivialy compatible */ 622 623 if (cmd->chanlist_len < 1) { 624 cmd->chanlist_len = 1; 625 error++; 626 } 627 628 if (cmd->chanlist_len > board->ai_channel_nbr) { 629 cmd->chanlist_len = board->ai_channel_nbr; 630 error++; 631 } 632 633 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) { 634 cmd->start_arg = 0; 635 error++; 636 } 637 638 if ((cmd->convert_src == TRIG_TIMER) && 639 (cmd->convert_arg < board->ai_acquisition_period_min_ns)) { 640 cmd->convert_arg = board->ai_acquisition_period_min_ns; 641 error++; 642 } 643 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) { 644 cmd->convert_arg = 0; 645 error++; 646 } 647 648 if ((cmd->scan_begin_src == TRIG_TIMER) && 649 (cmd->scan_begin_arg < board->ai_acquisition_period_min_ns)) { 650 cmd->scan_begin_arg = board->ai_acquisition_period_min_ns; 651 error++; 652 } 653 if ((cmd->scan_begin_src == TRIG_FOLLOW) && (cmd->scan_begin_arg != 0)) { 654 cmd->scan_begin_arg = 0; 655 error++; 656 } 657 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) { 658 cmd->scan_begin_arg = 0; 659 error++; 660 } 661 662 if ((cmd->scan_end_src == TRIG_COUNT) && 663 (cmd->scan_end_arg != cmd->chanlist_len)) { 664 cmd->scan_end_arg = cmd->chanlist_len; 665 error++; 666 } 667 668 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) { 669 cmd->stop_arg = 1; 670 error++; 671 } 672 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) { 673 cmd->stop_arg = 0; 674 error++; 675 } 676 677 if (error) 678 return 3; 679 680 /* Step 4 : fix up any arguments */ 681 682 if (cmd->convert_src == TRIG_TIMER) { 683 tmp = cmd->convert_arg; 684 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS, 685 &(dev_private->timer_divisor_1), 686 &(dev_private->timer_divisor_2), 687 &(cmd->convert_arg), 688 cmd->flags & TRIG_ROUND_MASK); 689 if (tmp != cmd->convert_arg) 690 error++; 691 } 692 /* There's only one timer on this card, so the scan_begin timer must */ 693 /* be a multiple of chanlist_len*convert_arg */ 694 695 if (cmd->scan_begin_src == TRIG_TIMER) { 696 697 unsigned int scan_begin_min; 698 unsigned int scan_begin_arg; 699 unsigned int scan_factor; 700 701 scan_begin_min = cmd->chanlist_len * cmd->convert_arg; 702 703 if (cmd->scan_begin_arg != scan_begin_min) { 704 if (scan_begin_min < cmd->scan_begin_arg) { 705 scan_factor = 706 cmd->scan_begin_arg / scan_begin_min; 707 scan_begin_arg = scan_factor * scan_begin_min; 708 if (cmd->scan_begin_arg != scan_begin_arg) { 709 cmd->scan_begin_arg = scan_begin_arg; 710 error++; 711 } 712 } else { 713 cmd->scan_begin_arg = scan_begin_min; 714 error++; 715 } 716 } 717 } 718 719 if (error) 720 return 4; 721 722 /* Step 5 : check channel list */ 723 724 if (cmd->chanlist) { 725 726 range = CR_RANGE(cmd->chanlist[0]); 727 reference = CR_AREF(cmd->chanlist[0]); 728 729 if (cmd->chanlist_len > 1) { 730 for (i = 0; i < cmd->chanlist_len; i++) { 731 if (CR_CHAN(cmd->chanlist[i]) != i) { 732 comedi_error(dev, 733 "entries in chanlist must be consecutive " 734 "channels,counting upwards from 0\n"); 735 error++; 736 } 737 if (CR_RANGE(cmd->chanlist[i]) != range) { 738 comedi_error(dev, 739 "entries in chanlist must all have the same gain\n"); 740 error++; 741 } 742 if (CR_AREF(cmd->chanlist[i]) != reference) { 743 comedi_error(dev, 744 "entries in chanlist must all have the same reference\n"); 745 error++; 746 } 747 } 748 } else { 749 if ((CR_CHAN(cmd->chanlist[0]) > 750 (board->ai_channel_nbr - 1)) 751 || (CR_CHAN(cmd->chanlist[0]) < 0)) { 752 comedi_error(dev, 753 "channel number is out of limits\n"); 754 error++; 755 } 756 } 757 } 758 759 if (error) 760 return 5; 761 762 return 0; 763 764} 765 766/* Analog input command */ 767 768static int pci9111_ai_do_cmd(struct comedi_device *dev, 769 struct comedi_subdevice *subdevice) 770{ 771 struct comedi_cmd *async_cmd = &subdevice->async->cmd; 772 773 if (!dev->irq) { 774 comedi_error(dev, 775 "no irq assigned for PCI9111, cannot do hardware conversion"); 776 return -1; 777 } 778 /* Set channel scan limit */ 779 /* PCI9111 allows only scanning from channel 0 to channel n */ 780 /* TODO: handle the case of an external multiplexer */ 781 782 if (async_cmd->chanlist_len > 1) { 783 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1); 784 pci9111_autoscan_set(dev, true); 785 } else { 786 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0])); 787 pci9111_autoscan_set(dev, false); 788 } 789 790 /* Set gain */ 791 /* This is the same gain on every channel */ 792 793 pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0])); 794 795 /* Set counter */ 796 797 switch (async_cmd->stop_src) { 798 case TRIG_COUNT: 799 dev_private->stop_counter = 800 async_cmd->stop_arg * async_cmd->chanlist_len; 801 dev_private->stop_is_none = 0; 802 break; 803 804 case TRIG_NONE: 805 dev_private->stop_counter = 0; 806 dev_private->stop_is_none = 1; 807 break; 808 809 default: 810 comedi_error(dev, "Invalid stop trigger"); 811 return -1; 812 } 813 814 /* Set timer pacer */ 815 816 dev_private->scan_delay = 0; 817 switch (async_cmd->convert_src) { 818 case TRIG_TIMER: 819 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS, 820 &(dev_private->timer_divisor_1), 821 &(dev_private->timer_divisor_2), 822 &(async_cmd->convert_arg), 823 async_cmd-> 824 flags & TRIG_ROUND_MASK); 825#ifdef AI_DO_CMD_DEBUG 826 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n", 827 dev_private->timer_divisor_1, 828 dev_private->timer_divisor_2); 829#endif 830 831 pci9111_trigger_source_set(dev, software); 832 pci9111_timer_set(dev); 833 pci9111_fifo_reset(); 834 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full, 835 irq_on_timer_tick); 836 pci9111_trigger_source_set(dev, timer_pacer); 837 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, 838 false, true, true); 839 840 dev_private->scan_delay = 841 (async_cmd->scan_begin_arg / (async_cmd->convert_arg * 842 async_cmd->chanlist_len)) - 1; 843 844 break; 845 846 case TRIG_EXT: 847 848 pci9111_trigger_source_set(dev, external); 849 pci9111_fifo_reset(); 850 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full, 851 irq_on_timer_tick); 852 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, 853 false, true, true); 854 855 break; 856 857 default: 858 comedi_error(dev, "Invalid convert trigger"); 859 return -1; 860 } 861 862 dev_private->stop_counter *= (1 + dev_private->scan_delay); 863 dev_private->chanlist_len = async_cmd->chanlist_len; 864 dev_private->chunk_counter = 0; 865 dev_private->chunk_num_samples = 866 dev_private->chanlist_len * (1 + dev_private->scan_delay); 867 868#ifdef AI_DO_CMD_DEBUG 869 printk(PCI9111_DRIVER_NAME ": start interruptions!\n"); 870 printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n", 871 pci9111_trigger_and_autoscan_get()); 872 printk(PCI9111_DRIVER_NAME ": irq source = %2x\n", 873 pci9111_interrupt_and_fifo_get()); 874 printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n"); 875 printk(PCI9111_DRIVER_NAME ": stop counter = %d\n", 876 dev_private->stop_counter); 877 printk(PCI9111_DRIVER_NAME ": scan delay = %d\n", 878 dev_private->scan_delay); 879 printk(PCI9111_DRIVER_NAME ": chanlist_len = %d\n", 880 dev_private->chanlist_len); 881 printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n", 882 dev_private->chunk_num_samples); 883#endif 884 885 return 0; 886} 887 888static void pci9111_ai_munge(struct comedi_device *dev, 889 struct comedi_subdevice *s, void *data, 890 unsigned int num_bytes, 891 unsigned int start_chan_index) 892{ 893 unsigned int i, num_samples = num_bytes / sizeof(short); 894 short *array = data; 895 int resolution = 896 ((struct pci9111_board *)dev->board_ptr)->ai_resolution; 897 898 for (i = 0; i < num_samples; i++) { 899 if (resolution == PCI9111_HR_AI_RESOLUTION) 900 array[i] = 901 (array[i] & PCI9111_HR_AI_RESOLUTION_MASK) ^ 902 PCI9111_HR_AI_RESOLUTION_2_CMP_BIT; 903 else 904 array[i] = 905 ((array[i] >> 4) & PCI9111_AI_RESOLUTION_MASK) ^ 906 PCI9111_AI_RESOLUTION_2_CMP_BIT; 907 } 908} 909 910/* ------------------------------------------------------------------ */ 911/* INTERRUPT SECTION */ 912/* ------------------------------------------------------------------ */ 913 914#undef INTERRUPT_DEBUG 915 916static irqreturn_t pci9111_interrupt(int irq, void *p_device) 917{ 918 struct comedi_device *dev = p_device; 919 struct comedi_subdevice *subdevice = dev->read_subdev; 920 struct comedi_async *async; 921 unsigned long irq_flags; 922 unsigned char intcsr; 923 924 if (!dev->attached) { 925 /* Ignore interrupt before device fully attached. */ 926 /* Might not even have allocated subdevices yet! */ 927 return IRQ_NONE; 928 } 929 930 async = subdevice->async; 931 932 spin_lock_irqsave(&dev->spinlock, irq_flags); 933 934 /* Check if we are source of interrupt */ 935 intcsr = inb(dev_private->lcr_io_base + 936 PLX9050_REGISTER_INTERRUPT_CONTROL); 937 if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0) 938 && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) 939 == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) 940 || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS)) 941 == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) { 942 /* Not the source of the interrupt. */ 943 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */ 944 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 945 return IRQ_NONE; 946 } 947 948 if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) == 949 (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) { 950 /* Interrupt comes from fifo_half-full signal */ 951 952 if (pci9111_is_fifo_full()) { 953 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 954 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow"); 955 pci9111_interrupt_clear(); 956 pci9111_ai_cancel(dev, subdevice); 957 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; 958 comedi_event(dev, subdevice); 959 960 return IRQ_HANDLED; 961 } 962 963 if (pci9111_is_fifo_half_full()) { 964 unsigned int num_samples; 965 unsigned int bytes_written = 0; 966 967#ifdef INTERRUPT_DEBUG 968 printk(PCI9111_DRIVER_NAME ": fifo is half full\n"); 969#endif 970 971 num_samples = 972 PCI9111_FIFO_HALF_SIZE > 973 dev_private->stop_counter 974 && !dev_private-> 975 stop_is_none ? dev_private->stop_counter : 976 PCI9111_FIFO_HALF_SIZE; 977 insw(PCI9111_IO_BASE + PCI9111_REGISTER_AD_FIFO_VALUE, 978 dev_private->ai_bounce_buffer, num_samples); 979 980 if (dev_private->scan_delay < 1) { 981 bytes_written = 982 cfc_write_array_to_buffer(subdevice, 983 dev_private-> 984 ai_bounce_buffer, 985 num_samples * 986 sizeof(short)); 987 } else { 988 int position = 0; 989 int to_read; 990 991 while (position < num_samples) { 992 if (dev_private->chunk_counter < 993 dev_private->chanlist_len) { 994 to_read = 995 dev_private->chanlist_len - 996 dev_private->chunk_counter; 997 998 if (to_read > 999 num_samples - position) 1000 to_read = 1001 num_samples - 1002 position; 1003 1004 bytes_written += 1005 cfc_write_array_to_buffer 1006 (subdevice, 1007 dev_private->ai_bounce_buffer 1008 + position, 1009 to_read * sizeof(short)); 1010 } else { 1011 to_read = 1012 dev_private->chunk_num_samples 1013 - 1014 dev_private->chunk_counter; 1015 if (to_read > 1016 num_samples - position) 1017 to_read = 1018 num_samples - 1019 position; 1020 1021 bytes_written += 1022 sizeof(short) * to_read; 1023 } 1024 1025 position += to_read; 1026 dev_private->chunk_counter += to_read; 1027 1028 if (dev_private->chunk_counter >= 1029 dev_private->chunk_num_samples) 1030 dev_private->chunk_counter = 0; 1031 } 1032 } 1033 1034 dev_private->stop_counter -= 1035 bytes_written / sizeof(short); 1036 } 1037 } 1038 1039 if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) { 1040 async->events |= COMEDI_CB_EOA; 1041 pci9111_ai_cancel(dev, subdevice); 1042 } 1043 1044 /* Very important, otherwise another interrupt request will be inserted 1045 * and will cause driver hangs on processing interrupt event. */ 1046 1047 pci9111_interrupt_clear(); 1048 1049 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1050 1051 comedi_event(dev, subdevice); 1052 1053 return IRQ_HANDLED; 1054} 1055 1056/* ------------------------------------------------------------------ */ 1057/* INSTANT ANALOG INPUT OUTPUT SECTION */ 1058/* ------------------------------------------------------------------ */ 1059 1060/* analog instant input */ 1061 1062#undef AI_INSN_DEBUG 1063 1064static int pci9111_ai_insn_read(struct comedi_device *dev, 1065 struct comedi_subdevice *subdevice, 1066 struct comedi_insn *insn, unsigned int *data) 1067{ 1068 int resolution = 1069 ((struct pci9111_board *)dev->board_ptr)->ai_resolution; 1070 1071 int timeout, i; 1072 1073#ifdef AI_INSN_DEBUG 1074 printk(PCI9111_DRIVER_NAME ": ai_insn set c/r/n = %2x/%2x/%2x\n", 1075 CR_CHAN((&insn->chanspec)[0]), 1076 CR_RANGE((&insn->chanspec)[0]), insn->n); 1077#endif 1078 1079 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0])); 1080 1081 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0])) 1082 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0])); 1083 1084 pci9111_fifo_reset(); 1085 1086 for (i = 0; i < insn->n; i++) { 1087 pci9111_software_trigger(); 1088 1089 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT; 1090 1091 while (timeout--) { 1092 if (!pci9111_is_fifo_empty()) 1093 goto conversion_done; 1094 } 1095 1096 comedi_error(dev, "A/D read timeout"); 1097 data[i] = 0; 1098 pci9111_fifo_reset(); 1099 return -ETIME; 1100 1101conversion_done: 1102 1103 if (resolution == PCI9111_HR_AI_RESOLUTION) 1104 data[i] = pci9111_hr_ai_get_data(); 1105 else 1106 data[i] = pci9111_ai_get_data(); 1107 } 1108 1109#ifdef AI_INSN_DEBUG 1110 printk(PCI9111_DRIVER_NAME ": ai_insn get c/r/t = %2x/%2x/%2x\n", 1111 pci9111_ai_channel_get(), 1112 pci9111_ai_range_get(), pci9111_trigger_and_autoscan_get()); 1113#endif 1114 1115 return i; 1116} 1117 1118/* Analog instant output */ 1119 1120static int 1121pci9111_ao_insn_write(struct comedi_device *dev, 1122 struct comedi_subdevice *s, struct comedi_insn *insn, 1123 unsigned int *data) 1124{ 1125 int i; 1126 1127 for (i = 0; i < insn->n; i++) { 1128 pci9111_ao_set_data(data[i]); 1129 dev_private->ao_readback = data[i]; 1130 } 1131 1132 return i; 1133} 1134 1135/* Analog output readback */ 1136 1137static int pci9111_ao_insn_read(struct comedi_device *dev, 1138 struct comedi_subdevice *s, 1139 struct comedi_insn *insn, unsigned int *data) 1140{ 1141 int i; 1142 1143 for (i = 0; i < insn->n; i++) 1144 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK; 1145 1146 return i; 1147} 1148 1149/* ------------------------------------------------------------------ */ 1150/* DIGITAL INPUT OUTPUT SECTION */ 1151/* ------------------------------------------------------------------ */ 1152 1153/* Digital inputs */ 1154 1155static int pci9111_di_insn_bits(struct comedi_device *dev, 1156 struct comedi_subdevice *subdevice, 1157 struct comedi_insn *insn, unsigned int *data) 1158{ 1159 unsigned int bits; 1160 1161 bits = pci9111_di_get_bits(); 1162 data[1] = bits; 1163 1164 return 2; 1165} 1166 1167/* Digital outputs */ 1168 1169static int pci9111_do_insn_bits(struct comedi_device *dev, 1170 struct comedi_subdevice *subdevice, 1171 struct comedi_insn *insn, unsigned int *data) 1172{ 1173 unsigned int bits; 1174 1175 /* Only set bits that have been masked */ 1176 /* data[0] = mask */ 1177 /* data[1] = bit state */ 1178 1179 data[0] &= PCI9111_DO_MASK; 1180 1181 bits = subdevice->state; 1182 bits &= ~data[0]; 1183 bits |= data[0] & data[1]; 1184 subdevice->state = bits; 1185 1186 pci9111_do_set_bits(bits); 1187 1188 data[1] = bits; 1189 1190 return 2; 1191} 1192 1193/* ------------------------------------------------------------------ */ 1194/* INITIALISATION SECTION */ 1195/* ------------------------------------------------------------------ */ 1196 1197/* Reset device */ 1198 1199static int pci9111_reset(struct comedi_device *dev) 1200{ 1201 /* Set trigger source to software */ 1202 1203 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true, 1204 true, false); 1205 1206 pci9111_trigger_source_set(dev, software); 1207 pci9111_pretrigger_set(dev, false); 1208 pci9111_autoscan_set(dev, false); 1209 1210 /* Reset 8254 chip */ 1211 1212 dev_private->timer_divisor_1 = 0; 1213 dev_private->timer_divisor_2 = 0; 1214 1215 pci9111_timer_set(dev); 1216 1217 return 0; 1218} 1219 1220/* Attach */ 1221/* - Register PCI device */ 1222/* - Declare device driver capability */ 1223 1224static int pci9111_attach(struct comedi_device *dev, 1225 struct comedi_devconfig *it) 1226{ 1227 struct comedi_subdevice *subdevice; 1228 unsigned long io_base, io_range, lcr_io_base, lcr_io_range; 1229 struct pci_dev *pci_device; 1230 int error, i; 1231 const struct pci9111_board *board; 1232 1233 if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0) 1234 return -ENOMEM; 1235 /* Probe the device to determine what device in the series it is. */ 1236 1237 printk("comedi%d: " PCI9111_DRIVER_NAME " driver\n", dev->minor); 1238 1239 for (pci_device = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL); 1240 pci_device != NULL; 1241 pci_device = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pci_device)) { 1242 if (pci_device->vendor == PCI_VENDOR_ID_ADLINK) { 1243 for (i = 0; i < pci9111_board_nbr; i++) { 1244 if (pci9111_boards[i].device_id == 1245 pci_device->device) { 1246 /* was a particular bus/slot requested? */ 1247 if ((it->options[0] != 0) 1248 || (it->options[1] != 0)) { 1249 /* are we on the wrong bus/slot? */ 1250 if (pci_device->bus->number != 1251 it->options[0] 1252 || 1253 PCI_SLOT(pci_device->devfn) 1254 != it->options[1]) { 1255 continue; 1256 } 1257 } 1258 1259 dev->board_ptr = pci9111_boards + i; 1260 board = 1261 (struct pci9111_board *) 1262 dev->board_ptr; 1263 dev_private->pci_device = pci_device; 1264 goto found; 1265 } 1266 } 1267 } 1268 } 1269 1270 printk("comedi%d: no supported board found! (req. bus/slot : %d/%d)\n", 1271 dev->minor, it->options[0], it->options[1]); 1272 return -EIO; 1273 1274found: 1275 1276 printk("comedi%d: found %s (b:s:f=%d:%d:%d) , irq=%d\n", 1277 dev->minor, 1278 pci9111_boards[i].name, 1279 pci_device->bus->number, 1280 PCI_SLOT(pci_device->devfn), 1281 PCI_FUNC(pci_device->devfn), pci_device->irq); 1282 1283 /* TODO: Warn about non-tested boards. */ 1284 1285 /* Read local configuration register base address [PCI_BASE_ADDRESS #1]. */ 1286 1287 lcr_io_base = pci_resource_start(pci_device, 1); 1288 lcr_io_range = pci_resource_len(pci_device, 1); 1289 1290 printk 1291 ("comedi%d: local configuration registers at address 0x%4lx [0x%4lx]\n", 1292 dev->minor, lcr_io_base, lcr_io_range); 1293 1294 /* Enable PCI device and request regions */ 1295 if (comedi_pci_enable(pci_device, PCI9111_DRIVER_NAME) < 0) { 1296 printk 1297 ("comedi%d: Failed to enable PCI device and request regions\n", 1298 dev->minor); 1299 return -EIO; 1300 } 1301 /* Read PCI6308 register base address [PCI_BASE_ADDRESS #2]. */ 1302 1303 io_base = pci_resource_start(pci_device, 2); 1304 io_range = pci_resource_len(pci_device, 2); 1305 1306 printk("comedi%d: 6503 registers at address 0x%4lx [0x%4lx]\n", 1307 dev->minor, io_base, io_range); 1308 1309 dev->iobase = io_base; 1310 dev->board_name = board->name; 1311 dev_private->io_range = io_range; 1312 dev_private->is_valid = 0; 1313 dev_private->lcr_io_base = lcr_io_base; 1314 dev_private->lcr_io_range = lcr_io_range; 1315 1316 pci9111_reset(dev); 1317 1318 /* Irq setup */ 1319 1320 dev->irq = 0; 1321 if (pci_device->irq > 0) { 1322 if (request_irq(pci_device->irq, pci9111_interrupt, 1323 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) { 1324 printk("comedi%d: unable to allocate irq %u\n", 1325 dev->minor, pci_device->irq); 1326 return -EINVAL; 1327 } 1328 } 1329 dev->irq = pci_device->irq; 1330 1331 /* TODO: Add external multiplexer setup (according to option[2]). */ 1332 1333 error = alloc_subdevices(dev, 4); 1334 if (error < 0) 1335 return error; 1336 1337 subdevice = dev->subdevices + 0; 1338 dev->read_subdev = subdevice; 1339 1340 subdevice->type = COMEDI_SUBD_AI; 1341 subdevice->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ; 1342 1343 /* TODO: Add external multiplexer data */ 1344 /* if (devpriv->usemux) { subdevice->n_chan = devpriv->usemux; } */ 1345 /* else { subdevice->n_chan = this_board->n_aichan; } */ 1346 1347 subdevice->n_chan = board->ai_channel_nbr; 1348 subdevice->maxdata = board->ai_resolution_mask; 1349 subdevice->len_chanlist = board->ai_channel_nbr; 1350 subdevice->range_table = board->ai_range_list; 1351 subdevice->cancel = pci9111_ai_cancel; 1352 subdevice->insn_read = pci9111_ai_insn_read; 1353 subdevice->do_cmdtest = pci9111_ai_do_cmd_test; 1354 subdevice->do_cmd = pci9111_ai_do_cmd; 1355 subdevice->munge = pci9111_ai_munge; 1356 1357 subdevice = dev->subdevices + 1; 1358 subdevice->type = COMEDI_SUBD_AO; 1359 subdevice->subdev_flags = SDF_WRITABLE | SDF_COMMON; 1360 subdevice->n_chan = board->ao_channel_nbr; 1361 subdevice->maxdata = board->ao_resolution_mask; 1362 subdevice->len_chanlist = board->ao_channel_nbr; 1363 subdevice->range_table = board->ao_range_list; 1364 subdevice->insn_write = pci9111_ao_insn_write; 1365 subdevice->insn_read = pci9111_ao_insn_read; 1366 1367 subdevice = dev->subdevices + 2; 1368 subdevice->type = COMEDI_SUBD_DI; 1369 subdevice->subdev_flags = SDF_READABLE; 1370 subdevice->n_chan = PCI9111_DI_CHANNEL_NBR; 1371 subdevice->maxdata = 1; 1372 subdevice->range_table = &range_digital; 1373 subdevice->insn_bits = pci9111_di_insn_bits; 1374 1375 subdevice = dev->subdevices + 3; 1376 subdevice->type = COMEDI_SUBD_DO; 1377 subdevice->subdev_flags = SDF_READABLE | SDF_WRITABLE; 1378 subdevice->n_chan = PCI9111_DO_CHANNEL_NBR; 1379 subdevice->maxdata = 1; 1380 subdevice->range_table = &range_digital; 1381 subdevice->insn_bits = pci9111_do_insn_bits; 1382 1383 dev_private->is_valid = 1; 1384 1385 return 0; 1386} 1387 1388/* Detach */ 1389 1390static int pci9111_detach(struct comedi_device *dev) 1391{ 1392 /* Reset device */ 1393 1394 if (dev->private != NULL) { 1395 if (dev_private->is_valid) 1396 pci9111_reset(dev); 1397 1398 } 1399 /* Release previously allocated irq */ 1400 1401 if (dev->irq != 0) 1402 free_irq(dev->irq, dev); 1403 1404 if (dev_private != NULL && dev_private->pci_device != NULL) { 1405 if (dev->iobase) 1406 comedi_pci_disable(dev_private->pci_device); 1407 pci_dev_put(dev_private->pci_device); 1408 } 1409 1410 return 0; 1411} 1412