adl_pci9111.c revision 525d1b1395858606103d4663a570cc8725ff2ced
1/* 2 3 comedi/drivers/adl_pci9111.c 4 5 Hardware driver for PCI9111 ADLink cards: 6 7 PCI-9111HR 8 9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr> 10 11 This program is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 2 of the License, or 14 (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software 23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24*/ 25 26/* 27Driver: adl_pci9111 28Description: Adlink PCI-9111HR 29Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr> 30Devices: [ADLink] PCI-9111HR (adl_pci9111) 31Status: experimental 32 33Supports: 34 35 - ai_insn read 36 - ao_insn read/write 37 - di_insn read 38 - do_insn read/write 39 - ai_do_cmd mode with the following sources: 40 41 - start_src TRIG_NOW 42 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT 43 - convert_src TRIG_TIMER TRIG_EXT 44 - scan_end_src TRIG_COUNT 45 - stop_src TRIG_COUNT TRIG_NONE 46 47 The scanned channels must be consecutive and start from 0. They must 48 all have the same range and aref. 49 50Configuration options: 51 52 [0] - PCI bus number (optional) 53 [1] - PCI slot number (optional) 54 55 If bus/slot is not specified, the first available PCI 56 device will be used. 57 58*/ 59 60/* 61CHANGELOG: 62 63 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be 64 a multiple of chanlist_len*convert_arg. 65 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data. 66 2002/02/18 Added external trigger support for analog input. 67 68TODO: 69 70 - Really test implemented functionality. 71 - Add support for the PCI-9111DG with a probe routine to identify the card type 72 (perhaps with the help of the channel number readback of the A/D Data register). 73 - Add external multiplexer support. 74 75*/ 76 77#include "../comedidev.h" 78 79#include <linux/delay.h> 80#include <linux/interrupt.h> 81 82#include "8253.h" 83#include "comedi_pci.h" 84#include "comedi_fc.h" 85 86#define PCI9111_DRIVER_NAME "adl_pci9111" 87#define PCI9111_HR_DEVICE_ID 0x9111 88 89/* TODO: Add other pci9111 board id */ 90 91#define PCI9111_IO_RANGE 0x0100 92 93#define PCI9111_FIFO_HALF_SIZE 512 94 95#define PCI9111_AI_CHANNEL_NBR 16 96 97#define PCI9111_AI_RESOLUTION 12 98#define PCI9111_AI_RESOLUTION_MASK 0x0FFF 99#define PCI9111_AI_RESOLUTION_2_CMP_BIT 0x0800 100 101#define PCI9111_HR_AI_RESOLUTION 16 102#define PCI9111_HR_AI_RESOLUTION_MASK 0xFFFF 103#define PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 0x8000 104 105#define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000 106#define PCI9111_AO_CHANNEL_NBR 1 107#define PCI9111_AO_RESOLUTION 12 108#define PCI9111_AO_RESOLUTION_MASK 0x0FFF 109#define PCI9111_DI_CHANNEL_NBR 16 110#define PCI9111_DO_CHANNEL_NBR 16 111#define PCI9111_DO_MASK 0xFFFF 112 113#define PCI9111_RANGE_SETTING_DELAY 10 114#define PCI9111_AI_INSTANT_READ_UDELAY_US 2 115#define PCI9111_AI_INSTANT_READ_TIMEOUT 100 116 117#define PCI9111_8254_CLOCK_PERIOD_NS 500 118 119#define PCI9111_8254_COUNTER_0 0x00 120#define PCI9111_8254_COUNTER_1 0x40 121#define PCI9111_8254_COUNTER_2 0x80 122#define PCI9111_8254_COUNTER_LATCH 0x00 123#define PCI9111_8254_READ_LOAD_LSB_ONLY 0x10 124#define PCI9111_8254_READ_LOAD_MSB_ONLY 0x20 125#define PCI9111_8254_READ_LOAD_LSB_MSB 0x30 126#define PCI9111_8254_MODE_0 0x00 127#define PCI9111_8254_MODE_1 0x02 128#define PCI9111_8254_MODE_2 0x04 129#define PCI9111_8254_MODE_3 0x06 130#define PCI9111_8254_MODE_4 0x08 131#define PCI9111_8254_MODE_5 0x0A 132#define PCI9111_8254_BINARY_COUNTER 0x00 133#define PCI9111_8254_BCD_COUNTER 0x01 134 135/* IO address map */ 136 137#define PCI9111_REGISTER_AD_FIFO_VALUE 0x00 /* AD Data stored in FIFO */ 138#define PCI9111_REGISTER_DA_OUTPUT 0x00 139#define PCI9111_REGISTER_DIGITAL_IO 0x02 140#define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04 141#define PCI9111_REGISTER_AD_CHANNEL_CONTROL 0x06 /* Channel selection */ 142#define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06 143#define PCI9111_REGISTER_INPUT_SIGNAL_RANGE 0x08 144#define PCI9111_REGISTER_RANGE_STATUS_READBACK 0x08 145#define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A 146#define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A 147#define PCI9111_REGISTER_SOFTWARE_TRIGGER 0x0E 148#define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C 149#define PCI9111_REGISTER_8254_COUNTER_0 0x40 150#define PCI9111_REGISTER_8254_COUNTER_1 0x42 151#define PCI9111_REGISTER_8254_COUNTER_2 0X44 152#define PCI9111_REGISTER_8254_CONTROL 0x46 153#define PCI9111_REGISTER_INTERRUPT_CLEAR 0x48 154 155#define PCI9111_TRIGGER_MASK 0x0F 156#define PCI9111_PTRG_OFF (0 << 3) 157#define PCI9111_PTRG_ON (1 << 3) 158#define PCI9111_EITS_EXTERNAL (1 << 2) 159#define PCI9111_EITS_INTERNAL (0 << 2) 160#define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1) 161#define PCI9111_TPST_TIMER_PACER (1 << 1) 162#define PCI9111_ASCAN_ON (1 << 0) 163#define PCI9111_ASCAN_OFF (0 << 0) 164 165#define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0) 166#define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0) 167#define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1) 168#define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1) 169#define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2) 170#define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2) 171 172#define PCI9111_CHANNEL_MASK 0x0F 173 174#define PCI9111_RANGE_MASK 0x07 175#define PCI9111_FIFO_EMPTY_MASK 0x10 176#define PCI9111_FIFO_HALF_FULL_MASK 0x20 177#define PCI9111_FIFO_FULL_MASK 0x40 178#define PCI9111_AD_BUSY_MASK 0x80 179 180#define PCI9111_IO_BASE dev->iobase 181 182/* 183 * Define inlined function 184 */ 185 186#define pci9111_trigger_and_autoscan_get() \ 187 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F) 188 189#define pci9111_trigger_and_autoscan_set(flags) \ 190 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL) 191 192#define pci9111_interrupt_and_fifo_get() \ 193 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) >> 4) &0x03) 194 195#define pci9111_interrupt_and_fifo_set(flags) \ 196 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL) 197 198#define pci9111_interrupt_clear() \ 199 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR) 200 201#define pci9111_software_trigger() \ 202 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER) 203 204#define pci9111_fifo_reset() \ 205 outb(PCI9111_FFEN_SET_FIFO_ENABLE, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \ 206 outb(PCI9111_FFEN_SET_FIFO_DISABLE, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \ 207 outb(PCI9111_FFEN_SET_FIFO_ENABLE, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL) 208 209#define pci9111_is_fifo_full() \ 210 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 211 PCI9111_FIFO_FULL_MASK)==0) 212 213#define pci9111_is_fifo_half_full() \ 214 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 215 PCI9111_FIFO_HALF_FULL_MASK)==0) 216 217#define pci9111_is_fifo_empty() \ 218 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 219 PCI9111_FIFO_EMPTY_MASK)==0) 220 221#define pci9111_ai_channel_set(channel) \ 222 outb((channel)&PCI9111_CHANNEL_MASK, PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL) 223 224#define pci9111_ai_channel_get() \ 225 inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK)&PCI9111_CHANNEL_MASK 226 227#define pci9111_ai_range_set(range) \ 228 outb((range)&PCI9111_RANGE_MASK, PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE) 229 230#define pci9111_ai_range_get() \ 231 inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)&PCI9111_RANGE_MASK 232 233#define pci9111_ai_get_data() \ 234 ((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4)&PCI9111_AI_RESOLUTION_MASK) \ 235 ^ PCI9111_AI_RESOLUTION_2_CMP_BIT 236 237#define pci9111_hr_ai_get_data() \ 238 (inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) & PCI9111_HR_AI_RESOLUTION_MASK) \ 239 ^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 240 241#define pci9111_ao_set_data(data) \ 242 outw(data&PCI9111_AO_RESOLUTION_MASK, PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT) 243 244#define pci9111_di_get_bits() \ 245 inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO) 246 247#define pci9111_do_set_bits(bits) \ 248 outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO) 249 250#define pci9111_8254_control_set(flags) \ 251 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL) 252 253#define pci9111_8254_counter_0_set(data) \ 254 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \ 255 outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0) 256 257#define pci9111_8254_counter_1_set(data) \ 258 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \ 259 outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1) 260 261#define pci9111_8254_counter_2_set(data) \ 262 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \ 263 outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2) 264 265/* Function prototypes */ 266 267static int pci9111_attach(struct comedi_device *dev, 268 struct comedi_devconfig *it); 269static int pci9111_detach(struct comedi_device *dev); 270static void pci9111_ai_munge(struct comedi_device *dev, 271 struct comedi_subdevice *s, void *data, 272 unsigned int num_bytes, 273 unsigned int start_chan_index); 274 275static const struct comedi_lrange pci9111_hr_ai_range = { 276 5, 277 { 278 BIP_RANGE(10), 279 BIP_RANGE(5), 280 BIP_RANGE(2.5), 281 BIP_RANGE(1.25), 282 BIP_RANGE(0.625) 283 } 284}; 285 286static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = { 287 { 288 PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID, PCI_ANY_ID, 289 PCI_ANY_ID, 0, 0, 0}, 290 /* { PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, */ 291 { 292 0} 293}; 294 295MODULE_DEVICE_TABLE(pci, pci9111_pci_table); 296 297/* */ 298/* Board specification structure */ 299/* */ 300 301struct pci9111_board { 302 const char *name; /* driver name */ 303 int device_id; 304 int ai_channel_nbr; /* num of A/D chans */ 305 int ao_channel_nbr; /* num of D/A chans */ 306 int ai_resolution; /* resolution of A/D */ 307 int ai_resolution_mask; 308 int ao_resolution; /* resolution of D/A */ 309 int ao_resolution_mask; 310 const struct comedi_lrange *ai_range_list; /* rangelist for A/D */ 311 const struct comedi_lrange *ao_range_list; /* rangelist for D/A */ 312 unsigned int ai_acquisition_period_min_ns; 313}; 314 315static const struct pci9111_board pci9111_boards[] = { 316 { 317 .name = "pci9111_hr", 318 .device_id = PCI9111_HR_DEVICE_ID, 319 .ai_channel_nbr = PCI9111_AI_CHANNEL_NBR, 320 .ao_channel_nbr = PCI9111_AO_CHANNEL_NBR, 321 .ai_resolution = PCI9111_HR_AI_RESOLUTION, 322 .ai_resolution_mask = PCI9111_HR_AI_RESOLUTION_MASK, 323 .ao_resolution = PCI9111_AO_RESOLUTION, 324 .ao_resolution_mask = PCI9111_AO_RESOLUTION_MASK, 325 .ai_range_list = &pci9111_hr_ai_range, 326 .ao_range_list = &range_bipolar10, 327 .ai_acquisition_period_min_ns = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS} 328}; 329 330#define pci9111_board_nbr \ 331 (sizeof(pci9111_boards)/sizeof(struct pci9111_board)) 332 333static struct comedi_driver pci9111_driver = { 334 .driver_name = PCI9111_DRIVER_NAME, 335 .module = THIS_MODULE, 336 .attach = pci9111_attach, 337 .detach = pci9111_detach, 338}; 339 340COMEDI_PCI_INITCLEANUP(pci9111_driver, pci9111_pci_table); 341 342/* Private data structure */ 343 344struct pci9111_private_data { 345 struct pci_dev *pci_device; 346 unsigned long io_range; /* PCI6503 io range */ 347 348 unsigned long lcr_io_base; /* Local configuration register base address */ 349 unsigned long lcr_io_range; 350 351 int stop_counter; 352 int stop_is_none; 353 354 unsigned int scan_delay; 355 unsigned int chanlist_len; 356 unsigned int chunk_counter; 357 unsigned int chunk_num_samples; 358 359 int ao_readback; /* Last written analog output data */ 360 361 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer pacer */ 362 unsigned int timer_divisor_2; 363 364 int is_valid; /* Is device valid */ 365 366 short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE]; 367}; 368 369#define dev_private ((struct pci9111_private_data *)dev->private) 370 371/* ------------------------------------------------------------------ */ 372/* PLX9050 SECTION */ 373/* ------------------------------------------------------------------ */ 374 375#define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c 376 377#define PLX9050_LINTI1_ENABLE (1 << 0) 378#define PLX9050_LINTI1_ACTIVE_HIGH (1 << 1) 379#define PLX9050_LINTI1_STATUS (1 << 2) 380#define PLX9050_LINTI2_ENABLE (1 << 3) 381#define PLX9050_LINTI2_ACTIVE_HIGH (1 << 4) 382#define PLX9050_LINTI2_STATUS (1 << 5) 383#define PLX9050_PCI_INTERRUPT_ENABLE (1 << 6) 384#define PLX9050_SOFTWARE_INTERRUPT (1 << 7) 385 386static void plx9050_interrupt_control(unsigned long io_base, 387 bool LINTi1_enable, 388 bool LINTi1_active_high, 389 bool LINTi2_enable, 390 bool LINTi2_active_high, 391 bool interrupt_enable) 392{ 393 int flags = 0; 394 395 if (LINTi1_enable) 396 flags |= PLX9050_LINTI1_ENABLE; 397 if (LINTi1_active_high) 398 flags |= PLX9050_LINTI1_ACTIVE_HIGH; 399 if (LINTi2_enable) 400 flags |= PLX9050_LINTI2_ENABLE; 401 if (LINTi2_active_high) 402 flags |= PLX9050_LINTI2_ACTIVE_HIGH; 403 404 if (interrupt_enable) 405 flags |= PLX9050_PCI_INTERRUPT_ENABLE; 406 407 outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL); 408} 409 410/* ------------------------------------------------------------------ */ 411/* MISCELLANEOUS SECTION */ 412/* ------------------------------------------------------------------ */ 413 414/* 8254 timer */ 415 416static void pci9111_timer_set(struct comedi_device *dev) 417{ 418 pci9111_8254_control_set(PCI9111_8254_COUNTER_0 | 419 PCI9111_8254_READ_LOAD_LSB_MSB | 420 PCI9111_8254_MODE_0 | 421 PCI9111_8254_BINARY_COUNTER); 422 423 pci9111_8254_control_set(PCI9111_8254_COUNTER_1 | 424 PCI9111_8254_READ_LOAD_LSB_MSB | 425 PCI9111_8254_MODE_2 | 426 PCI9111_8254_BINARY_COUNTER); 427 428 pci9111_8254_control_set(PCI9111_8254_COUNTER_2 | 429 PCI9111_8254_READ_LOAD_LSB_MSB | 430 PCI9111_8254_MODE_2 | 431 PCI9111_8254_BINARY_COUNTER); 432 433 udelay(1); 434 435 pci9111_8254_counter_2_set(dev_private->timer_divisor_2); 436 pci9111_8254_counter_1_set(dev_private->timer_divisor_1); 437} 438 439enum pci9111_trigger_sources { 440 software, 441 timer_pacer, 442 external 443}; 444 445static void pci9111_trigger_source_set(struct comedi_device *dev, 446 enum pci9111_trigger_sources source) 447{ 448 int flags; 449 450 flags = pci9111_trigger_and_autoscan_get() & 0x09; 451 452 switch (source) { 453 case software: 454 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER; 455 break; 456 457 case timer_pacer: 458 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER; 459 break; 460 461 case external: 462 flags |= PCI9111_EITS_EXTERNAL; 463 break; 464 } 465 466 pci9111_trigger_and_autoscan_set(flags); 467} 468 469static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger) 470{ 471 int flags; 472 473 flags = pci9111_trigger_and_autoscan_get() & 0x07; 474 475 if (pretrigger) 476 flags |= PCI9111_PTRG_ON; 477 478 pci9111_trigger_and_autoscan_set(flags); 479} 480 481static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan) 482{ 483 int flags; 484 485 flags = pci9111_trigger_and_autoscan_get() & 0x0e; 486 487 if (autoscan) 488 flags |= PCI9111_ASCAN_ON; 489 490 pci9111_trigger_and_autoscan_set(flags); 491} 492 493enum pci9111_ISC0_sources { 494 irq_on_eoc, 495 irq_on_fifo_half_full 496}; 497 498enum pci9111_ISC1_sources { 499 irq_on_timer_tick, 500 irq_on_external_trigger 501}; 502 503static void pci9111_interrupt_source_set(struct comedi_device *dev, 504 enum pci9111_ISC0_sources irq_0_source, 505 enum pci9111_ISC1_sources irq_1_source) 506{ 507 int flags; 508 509 flags = pci9111_interrupt_and_fifo_get() & 0x04; 510 511 if (irq_0_source == irq_on_fifo_half_full) 512 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL; 513 514 if (irq_1_source == irq_on_external_trigger) 515 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG; 516 517 pci9111_interrupt_and_fifo_set(flags); 518} 519 520/* ------------------------------------------------------------------ */ 521/* HARDWARE TRIGGERED ANALOG INPUT SECTION */ 522/* ------------------------------------------------------------------ */ 523 524/* Cancel analog input autoscan */ 525 526#undef AI_DO_CMD_DEBUG 527 528static int pci9111_ai_cancel(struct comedi_device *dev, 529 struct comedi_subdevice *s) 530{ 531 /* Disable interrupts */ 532 533 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true, 534 true, false); 535 536 pci9111_trigger_source_set(dev, software); 537 538 pci9111_autoscan_set(dev, false); 539 540 pci9111_fifo_reset(); 541 542#ifdef AI_DO_CMD_DEBUG 543 printk(PCI9111_DRIVER_NAME ": ai_cancel\n"); 544#endif 545 546 return 0; 547} 548 549/* Test analog input command */ 550 551#define pci9111_check_trigger_src(src, flags) \ 552 tmp = src; \ 553 src &= flags; \ 554 if (!src || tmp != src) error++ 555 556static int 557pci9111_ai_do_cmd_test(struct comedi_device *dev, 558 struct comedi_subdevice *s, struct comedi_cmd *cmd) 559{ 560 int tmp; 561 int error = 0; 562 int range, reference; 563 int i; 564 struct pci9111_board *board = (struct pci9111_board *)dev->board_ptr; 565 566 /* Step 1 : check if trigger are trivialy valid */ 567 568 pci9111_check_trigger_src(cmd->start_src, TRIG_NOW); 569 pci9111_check_trigger_src(cmd->scan_begin_src, 570 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT); 571 pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT); 572 pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT); 573 pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE); 574 575 if (error) 576 return 1; 577 578 /* step 2 : make sure trigger sources are unique and mutually compatible */ 579 580 if (cmd->start_src != TRIG_NOW) 581 error++; 582 583 if ((cmd->scan_begin_src != TRIG_TIMER) && 584 (cmd->scan_begin_src != TRIG_FOLLOW) && 585 (cmd->scan_begin_src != TRIG_EXT)) 586 error++; 587 588 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT)) 589 error++; 590 if ((cmd->convert_src == TRIG_TIMER) && 591 !((cmd->scan_begin_src == TRIG_TIMER) || 592 (cmd->scan_begin_src == TRIG_FOLLOW))) 593 error++; 594 if ((cmd->convert_src == TRIG_EXT) && 595 !((cmd->scan_begin_src == TRIG_EXT) || 596 (cmd->scan_begin_src == TRIG_FOLLOW))) 597 error++; 598 599 600 if (cmd->scan_end_src != TRIG_COUNT) 601 error++; 602 if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE)) 603 error++; 604 605 if (error) 606 return 2; 607 608 /* Step 3 : make sure arguments are trivialy compatible */ 609 610 if (cmd->chanlist_len < 1) { 611 cmd->chanlist_len = 1; 612 error++; 613 } 614 615 if (cmd->chanlist_len > board->ai_channel_nbr) { 616 cmd->chanlist_len = board->ai_channel_nbr; 617 error++; 618 } 619 620 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) { 621 cmd->start_arg = 0; 622 error++; 623 } 624 625 if ((cmd->convert_src == TRIG_TIMER) && 626 (cmd->convert_arg < board->ai_acquisition_period_min_ns)) { 627 cmd->convert_arg = board->ai_acquisition_period_min_ns; 628 error++; 629 } 630 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) { 631 cmd->convert_arg = 0; 632 error++; 633 } 634 635 if ((cmd->scan_begin_src == TRIG_TIMER) && 636 (cmd->scan_begin_arg < board->ai_acquisition_period_min_ns)) { 637 cmd->scan_begin_arg = board->ai_acquisition_period_min_ns; 638 error++; 639 } 640 if ((cmd->scan_begin_src == TRIG_FOLLOW) && (cmd->scan_begin_arg != 0)) { 641 cmd->scan_begin_arg = 0; 642 error++; 643 } 644 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) { 645 cmd->scan_begin_arg = 0; 646 error++; 647 } 648 649 if ((cmd->scan_end_src == TRIG_COUNT) && 650 (cmd->scan_end_arg != cmd->chanlist_len)) { 651 cmd->scan_end_arg = cmd->chanlist_len; 652 error++; 653 } 654 655 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) { 656 cmd->stop_arg = 1; 657 error++; 658 } 659 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) { 660 cmd->stop_arg = 0; 661 error++; 662 } 663 664 if (error) 665 return 3; 666 667 /* Step 4 : fix up any arguments */ 668 669 if (cmd->convert_src == TRIG_TIMER) { 670 tmp = cmd->convert_arg; 671 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS, 672 &(dev_private->timer_divisor_1), 673 &(dev_private->timer_divisor_2), 674 &(cmd->convert_arg), 675 cmd->flags & TRIG_ROUND_MASK); 676 if (tmp != cmd->convert_arg) 677 error++; 678 } 679 /* There's only one timer on this card, so the scan_begin timer must */ 680 /* be a multiple of chanlist_len*convert_arg */ 681 682 if (cmd->scan_begin_src == TRIG_TIMER) { 683 684 unsigned int scan_begin_min; 685 unsigned int scan_begin_arg; 686 unsigned int scan_factor; 687 688 scan_begin_min = cmd->chanlist_len * cmd->convert_arg; 689 690 if (cmd->scan_begin_arg != scan_begin_min) { 691 if (scan_begin_min < cmd->scan_begin_arg) { 692 scan_factor = 693 cmd->scan_begin_arg / scan_begin_min; 694 scan_begin_arg = scan_factor * scan_begin_min; 695 if (cmd->scan_begin_arg != scan_begin_arg) { 696 cmd->scan_begin_arg = scan_begin_arg; 697 error++; 698 } 699 } else { 700 cmd->scan_begin_arg = scan_begin_min; 701 error++; 702 } 703 } 704 } 705 706 if (error) 707 return 4; 708 709 /* Step 5 : check channel list */ 710 711 if (cmd->chanlist) { 712 713 range = CR_RANGE(cmd->chanlist[0]); 714 reference = CR_AREF(cmd->chanlist[0]); 715 716 if (cmd->chanlist_len > 1) { 717 for (i = 0; i < cmd->chanlist_len; i++) { 718 if (CR_CHAN(cmd->chanlist[i]) != i) { 719 comedi_error(dev, 720 "entries in chanlist must be consecutive " 721 "channels,counting upwards from 0\n"); 722 error++; 723 } 724 if (CR_RANGE(cmd->chanlist[i]) != range) { 725 comedi_error(dev, 726 "entries in chanlist must all have the same gain\n"); 727 error++; 728 } 729 if (CR_AREF(cmd->chanlist[i]) != reference) { 730 comedi_error(dev, 731 "entries in chanlist must all have the same reference\n"); 732 error++; 733 } 734 } 735 } else { 736 if ((CR_CHAN(cmd->chanlist[0]) > 737 (board->ai_channel_nbr - 1)) 738 || (CR_CHAN(cmd->chanlist[0]) < 0)) { 739 comedi_error(dev, 740 "channel number is out of limits\n"); 741 error++; 742 } 743 } 744 } 745 746 if (error) 747 return 5; 748 749 return 0; 750 751} 752 753/* Analog input command */ 754 755static int pci9111_ai_do_cmd(struct comedi_device *dev, 756 struct comedi_subdevice *subdevice) 757{ 758 struct comedi_cmd *async_cmd = &subdevice->async->cmd; 759 760 if (!dev->irq) { 761 comedi_error(dev, 762 "no irq assigned for PCI9111, cannot do hardware conversion"); 763 return -1; 764 } 765 /* Set channel scan limit */ 766 /* PCI9111 allows only scanning from channel 0 to channel n */ 767 /* TODO: handle the case of an external multiplexer */ 768 769 if (async_cmd->chanlist_len > 1) { 770 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1); 771 pci9111_autoscan_set(dev, true); 772 } else { 773 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0])); 774 pci9111_autoscan_set(dev, false); 775 } 776 777 /* Set gain */ 778 /* This is the same gain on every channel */ 779 780 pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0])); 781 782 /* Set counter */ 783 784 switch (async_cmd->stop_src) { 785 case TRIG_COUNT: 786 dev_private->stop_counter = 787 async_cmd->stop_arg * async_cmd->chanlist_len; 788 dev_private->stop_is_none = 0; 789 break; 790 791 case TRIG_NONE: 792 dev_private->stop_counter = 0; 793 dev_private->stop_is_none = 1; 794 break; 795 796 default: 797 comedi_error(dev, "Invalid stop trigger"); 798 return -1; 799 } 800 801 /* Set timer pacer */ 802 803 dev_private->scan_delay = 0; 804 switch (async_cmd->convert_src) { 805 case TRIG_TIMER: 806 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS, 807 &(dev_private->timer_divisor_1), 808 &(dev_private->timer_divisor_2), 809 &(async_cmd->convert_arg), 810 async_cmd-> 811 flags & TRIG_ROUND_MASK); 812#ifdef AI_DO_CMD_DEBUG 813 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n", 814 dev_private->timer_divisor_1, 815 dev_private->timer_divisor_2); 816#endif 817 818 pci9111_trigger_source_set(dev, software); 819 pci9111_timer_set(dev); 820 pci9111_fifo_reset(); 821 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full, 822 irq_on_timer_tick); 823 pci9111_trigger_source_set(dev, timer_pacer); 824 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, 825 false, true, true); 826 827 dev_private->scan_delay = 828 (async_cmd->scan_begin_arg / (async_cmd->convert_arg * 829 async_cmd->chanlist_len)) - 1; 830 831 break; 832 833 case TRIG_EXT: 834 835 pci9111_trigger_source_set(dev, external); 836 pci9111_fifo_reset(); 837 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full, 838 irq_on_timer_tick); 839 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, 840 false, true, true); 841 842 break; 843 844 default: 845 comedi_error(dev, "Invalid convert trigger"); 846 return -1; 847 } 848 849 dev_private->stop_counter *= (1 + dev_private->scan_delay); 850 dev_private->chanlist_len = async_cmd->chanlist_len; 851 dev_private->chunk_counter = 0; 852 dev_private->chunk_num_samples = 853 dev_private->chanlist_len * (1 + dev_private->scan_delay); 854 855#ifdef AI_DO_CMD_DEBUG 856 printk(PCI9111_DRIVER_NAME ": start interruptions!\n"); 857 printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n", 858 pci9111_trigger_and_autoscan_get()); 859 printk(PCI9111_DRIVER_NAME ": irq source = %2x\n", 860 pci9111_interrupt_and_fifo_get()); 861 printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n"); 862 printk(PCI9111_DRIVER_NAME ": stop counter = %d\n", 863 dev_private->stop_counter); 864 printk(PCI9111_DRIVER_NAME ": scan delay = %d\n", 865 dev_private->scan_delay); 866 printk(PCI9111_DRIVER_NAME ": chanlist_len = %d\n", 867 dev_private->chanlist_len); 868 printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n", 869 dev_private->chunk_num_samples); 870#endif 871 872 return 0; 873} 874 875static void pci9111_ai_munge(struct comedi_device *dev, 876 struct comedi_subdevice *s, void *data, 877 unsigned int num_bytes, 878 unsigned int start_chan_index) 879{ 880 unsigned int i, num_samples = num_bytes / sizeof(short); 881 short *array = data; 882 int resolution = 883 ((struct pci9111_board *)dev->board_ptr)->ai_resolution; 884 885 for (i = 0; i < num_samples; i++) { 886 if (resolution == PCI9111_HR_AI_RESOLUTION) 887 array[i] = 888 (array[i] & PCI9111_HR_AI_RESOLUTION_MASK) ^ 889 PCI9111_HR_AI_RESOLUTION_2_CMP_BIT; 890 else 891 array[i] = 892 ((array[i] >> 4) & PCI9111_AI_RESOLUTION_MASK) ^ 893 PCI9111_AI_RESOLUTION_2_CMP_BIT; 894 } 895} 896 897/* ------------------------------------------------------------------ */ 898/* INTERRUPT SECTION */ 899/* ------------------------------------------------------------------ */ 900 901#undef INTERRUPT_DEBUG 902 903static irqreturn_t pci9111_interrupt(int irq, void *p_device) 904{ 905 struct comedi_device *dev = p_device; 906 struct comedi_subdevice *subdevice = dev->read_subdev; 907 struct comedi_async *async; 908 unsigned long irq_flags; 909 unsigned char intcsr; 910 911 if (!dev->attached) { 912 /* Ignore interrupt before device fully attached. */ 913 /* Might not even have allocated subdevices yet! */ 914 return IRQ_NONE; 915 } 916 917 async = subdevice->async; 918 919 spin_lock_irqsave(&dev->spinlock, irq_flags); 920 921 /* Check if we are source of interrupt */ 922 intcsr = inb(dev_private->lcr_io_base + 923 PLX9050_REGISTER_INTERRUPT_CONTROL); 924 if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0) 925 && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) 926 == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) 927 || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS)) 928 == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) { 929 /* Not the source of the interrupt. */ 930 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */ 931 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 932 return IRQ_NONE; 933 } 934 935 if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) == 936 (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) { 937 /* Interrupt comes from fifo_half-full signal */ 938 939 if (pci9111_is_fifo_full()) { 940 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 941 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow"); 942 pci9111_interrupt_clear(); 943 pci9111_ai_cancel(dev, subdevice); 944 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; 945 comedi_event(dev, subdevice); 946 947 return IRQ_HANDLED; 948 } 949 950 if (pci9111_is_fifo_half_full()) { 951 unsigned int num_samples; 952 unsigned int bytes_written = 0; 953 954#ifdef INTERRUPT_DEBUG 955 printk(PCI9111_DRIVER_NAME ": fifo is half full\n"); 956#endif 957 958 num_samples = 959 PCI9111_FIFO_HALF_SIZE > 960 dev_private->stop_counter 961 && !dev_private-> 962 stop_is_none ? dev_private->stop_counter : 963 PCI9111_FIFO_HALF_SIZE; 964 insw(PCI9111_IO_BASE + PCI9111_REGISTER_AD_FIFO_VALUE, 965 dev_private->ai_bounce_buffer, num_samples); 966 967 if (dev_private->scan_delay < 1) { 968 bytes_written = 969 cfc_write_array_to_buffer(subdevice, 970 dev_private-> 971 ai_bounce_buffer, 972 num_samples * 973 sizeof(short)); 974 } else { 975 int position = 0; 976 int to_read; 977 978 while (position < num_samples) { 979 if (dev_private->chunk_counter < 980 dev_private->chanlist_len) { 981 to_read = 982 dev_private->chanlist_len - 983 dev_private->chunk_counter; 984 985 if (to_read > 986 num_samples - position) 987 to_read = 988 num_samples - 989 position; 990 991 bytes_written += 992 cfc_write_array_to_buffer 993 (subdevice, 994 dev_private->ai_bounce_buffer 995 + position, 996 to_read * sizeof(short)); 997 } else { 998 to_read = 999 dev_private->chunk_num_samples 1000 - 1001 dev_private->chunk_counter; 1002 if (to_read > 1003 num_samples - position) 1004 to_read = 1005 num_samples - 1006 position; 1007 1008 bytes_written += 1009 sizeof(short) * to_read; 1010 } 1011 1012 position += to_read; 1013 dev_private->chunk_counter += to_read; 1014 1015 if (dev_private->chunk_counter >= 1016 dev_private->chunk_num_samples) 1017 dev_private->chunk_counter = 0; 1018 } 1019 } 1020 1021 dev_private->stop_counter -= 1022 bytes_written / sizeof(short); 1023 } 1024 } 1025 1026 if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) { 1027 async->events |= COMEDI_CB_EOA; 1028 pci9111_ai_cancel(dev, subdevice); 1029 } 1030 1031 /* Very important, otherwise another interrupt request will be inserted 1032 * and will cause driver hangs on processing interrupt event. */ 1033 1034 pci9111_interrupt_clear(); 1035 1036 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1037 1038 comedi_event(dev, subdevice); 1039 1040 return IRQ_HANDLED; 1041} 1042 1043/* ------------------------------------------------------------------ */ 1044/* INSTANT ANALOG INPUT OUTPUT SECTION */ 1045/* ------------------------------------------------------------------ */ 1046 1047/* analog instant input */ 1048 1049#undef AI_INSN_DEBUG 1050 1051static int pci9111_ai_insn_read(struct comedi_device *dev, 1052 struct comedi_subdevice *subdevice, 1053 struct comedi_insn *insn, unsigned int *data) 1054{ 1055 int resolution = 1056 ((struct pci9111_board *)dev->board_ptr)->ai_resolution; 1057 1058 int timeout, i; 1059 1060#ifdef AI_INSN_DEBUG 1061 printk(PCI9111_DRIVER_NAME ": ai_insn set c/r/n = %2x/%2x/%2x\n", 1062 CR_CHAN((&insn->chanspec)[0]), 1063 CR_RANGE((&insn->chanspec)[0]), insn->n); 1064#endif 1065 1066 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0])); 1067 1068 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0])) 1069 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0])); 1070 1071 pci9111_fifo_reset(); 1072 1073 for (i = 0; i < insn->n; i++) { 1074 pci9111_software_trigger(); 1075 1076 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT; 1077 1078 while (timeout--) { 1079 if (!pci9111_is_fifo_empty()) 1080 goto conversion_done; 1081 } 1082 1083 comedi_error(dev, "A/D read timeout"); 1084 data[i] = 0; 1085 pci9111_fifo_reset(); 1086 return -ETIME; 1087 1088conversion_done: 1089 1090 if (resolution == PCI9111_HR_AI_RESOLUTION) 1091 data[i] = pci9111_hr_ai_get_data(); 1092 else 1093 data[i] = pci9111_ai_get_data(); 1094 } 1095 1096#ifdef AI_INSN_DEBUG 1097 printk(PCI9111_DRIVER_NAME ": ai_insn get c/r/t = %2x/%2x/%2x\n", 1098 pci9111_ai_channel_get(), 1099 pci9111_ai_range_get(), pci9111_trigger_and_autoscan_get()); 1100#endif 1101 1102 return i; 1103} 1104 1105/* Analog instant output */ 1106 1107static int 1108pci9111_ao_insn_write(struct comedi_device *dev, 1109 struct comedi_subdevice *s, struct comedi_insn *insn, 1110 unsigned int *data) 1111{ 1112 int i; 1113 1114 for (i = 0; i < insn->n; i++) { 1115 pci9111_ao_set_data(data[i]); 1116 dev_private->ao_readback = data[i]; 1117 } 1118 1119 return i; 1120} 1121 1122/* Analog output readback */ 1123 1124static int pci9111_ao_insn_read(struct comedi_device *dev, 1125 struct comedi_subdevice *s, 1126 struct comedi_insn *insn, unsigned int *data) 1127{ 1128 int i; 1129 1130 for (i = 0; i < insn->n; i++) 1131 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK; 1132 1133 return i; 1134} 1135 1136/* ------------------------------------------------------------------ */ 1137/* DIGITAL INPUT OUTPUT SECTION */ 1138/* ------------------------------------------------------------------ */ 1139 1140/* Digital inputs */ 1141 1142static int pci9111_di_insn_bits(struct comedi_device *dev, 1143 struct comedi_subdevice *subdevice, 1144 struct comedi_insn *insn, unsigned int *data) 1145{ 1146 unsigned int bits; 1147 1148 bits = pci9111_di_get_bits(); 1149 data[1] = bits; 1150 1151 return 2; 1152} 1153 1154/* Digital outputs */ 1155 1156static int pci9111_do_insn_bits(struct comedi_device *dev, 1157 struct comedi_subdevice *subdevice, 1158 struct comedi_insn *insn, unsigned int *data) 1159{ 1160 unsigned int bits; 1161 1162 /* Only set bits that have been masked */ 1163 /* data[0] = mask */ 1164 /* data[1] = bit state */ 1165 1166 data[0] &= PCI9111_DO_MASK; 1167 1168 bits = subdevice->state; 1169 bits &= ~data[0]; 1170 bits |= data[0] & data[1]; 1171 subdevice->state = bits; 1172 1173 pci9111_do_set_bits(bits); 1174 1175 data[1] = bits; 1176 1177 return 2; 1178} 1179 1180/* ------------------------------------------------------------------ */ 1181/* INITIALISATION SECTION */ 1182/* ------------------------------------------------------------------ */ 1183 1184/* Reset device */ 1185 1186static int pci9111_reset(struct comedi_device *dev) 1187{ 1188 /* Set trigger source to software */ 1189 1190 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true, 1191 true, false); 1192 1193 pci9111_trigger_source_set(dev, software); 1194 pci9111_pretrigger_set(dev, false); 1195 pci9111_autoscan_set(dev, false); 1196 1197 /* Reset 8254 chip */ 1198 1199 dev_private->timer_divisor_1 = 0; 1200 dev_private->timer_divisor_2 = 0; 1201 1202 pci9111_timer_set(dev); 1203 1204 return 0; 1205} 1206 1207/* Attach */ 1208/* - Register PCI device */ 1209/* - Declare device driver capability */ 1210 1211static int pci9111_attach(struct comedi_device *dev, 1212 struct comedi_devconfig *it) 1213{ 1214 struct comedi_subdevice *subdevice; 1215 unsigned long io_base, io_range, lcr_io_base, lcr_io_range; 1216 struct pci_dev *pci_device; 1217 int error, i; 1218 const struct pci9111_board *board; 1219 1220 if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0) 1221 return -ENOMEM; 1222 /* Probe the device to determine what device in the series it is. */ 1223 1224 printk("comedi%d: " PCI9111_DRIVER_NAME " driver\n", dev->minor); 1225 1226 for (pci_device = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL); 1227 pci_device != NULL; 1228 pci_device = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pci_device)) { 1229 if (pci_device->vendor == PCI_VENDOR_ID_ADLINK) { 1230 for (i = 0; i < pci9111_board_nbr; i++) { 1231 if (pci9111_boards[i].device_id == 1232 pci_device->device) { 1233 /* was a particular bus/slot requested? */ 1234 if ((it->options[0] != 0) 1235 || (it->options[1] != 0)) { 1236 /* are we on the wrong bus/slot? */ 1237 if (pci_device->bus->number != 1238 it->options[0] 1239 || 1240 PCI_SLOT(pci_device->devfn) 1241 != it->options[1]) { 1242 continue; 1243 } 1244 } 1245 1246 dev->board_ptr = pci9111_boards + i; 1247 board = 1248 (struct pci9111_board *) 1249 dev->board_ptr; 1250 dev_private->pci_device = pci_device; 1251 goto found; 1252 } 1253 } 1254 } 1255 } 1256 1257 printk("comedi%d: no supported board found! (req. bus/slot : %d/%d)\n", 1258 dev->minor, it->options[0], it->options[1]); 1259 return -EIO; 1260 1261found: 1262 1263 printk("comedi%d: found %s (b:s:f=%d:%d:%d) , irq=%d\n", 1264 dev->minor, 1265 pci9111_boards[i].name, 1266 pci_device->bus->number, 1267 PCI_SLOT(pci_device->devfn), 1268 PCI_FUNC(pci_device->devfn), pci_device->irq); 1269 1270 /* TODO: Warn about non-tested boards. */ 1271 1272 /* Read local configuration register base address [PCI_BASE_ADDRESS #1]. */ 1273 1274 lcr_io_base = pci_resource_start(pci_device, 1); 1275 lcr_io_range = pci_resource_len(pci_device, 1); 1276 1277 printk 1278 ("comedi%d: local configuration registers at address 0x%4lx [0x%4lx]\n", 1279 dev->minor, lcr_io_base, lcr_io_range); 1280 1281 /* Enable PCI device and request regions */ 1282 if (comedi_pci_enable(pci_device, PCI9111_DRIVER_NAME) < 0) { 1283 printk 1284 ("comedi%d: Failed to enable PCI device and request regions\n", 1285 dev->minor); 1286 return -EIO; 1287 } 1288 /* Read PCI6308 register base address [PCI_BASE_ADDRESS #2]. */ 1289 1290 io_base = pci_resource_start(pci_device, 2); 1291 io_range = pci_resource_len(pci_device, 2); 1292 1293 printk("comedi%d: 6503 registers at address 0x%4lx [0x%4lx]\n", 1294 dev->minor, io_base, io_range); 1295 1296 dev->iobase = io_base; 1297 dev->board_name = board->name; 1298 dev_private->io_range = io_range; 1299 dev_private->is_valid = 0; 1300 dev_private->lcr_io_base = lcr_io_base; 1301 dev_private->lcr_io_range = lcr_io_range; 1302 1303 pci9111_reset(dev); 1304 1305 /* Irq setup */ 1306 1307 dev->irq = 0; 1308 if (pci_device->irq > 0) { 1309 if (request_irq(pci_device->irq, pci9111_interrupt, 1310 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) { 1311 printk("comedi%d: unable to allocate irq %u\n", 1312 dev->minor, pci_device->irq); 1313 return -EINVAL; 1314 } 1315 } 1316 dev->irq = pci_device->irq; 1317 1318 /* TODO: Add external multiplexer setup (according to option[2]). */ 1319 1320 error = alloc_subdevices(dev, 4); 1321 if (error < 0) 1322 return error; 1323 1324 subdevice = dev->subdevices + 0; 1325 dev->read_subdev = subdevice; 1326 1327 subdevice->type = COMEDI_SUBD_AI; 1328 subdevice->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ; 1329 1330 /* TODO: Add external multiplexer data */ 1331 /* if (devpriv->usemux) { subdevice->n_chan = devpriv->usemux; } */ 1332 /* else { subdevice->n_chan = this_board->n_aichan; } */ 1333 1334 subdevice->n_chan = board->ai_channel_nbr; 1335 subdevice->maxdata = board->ai_resolution_mask; 1336 subdevice->len_chanlist = board->ai_channel_nbr; 1337 subdevice->range_table = board->ai_range_list; 1338 subdevice->cancel = pci9111_ai_cancel; 1339 subdevice->insn_read = pci9111_ai_insn_read; 1340 subdevice->do_cmdtest = pci9111_ai_do_cmd_test; 1341 subdevice->do_cmd = pci9111_ai_do_cmd; 1342 subdevice->munge = pci9111_ai_munge; 1343 1344 subdevice = dev->subdevices + 1; 1345 subdevice->type = COMEDI_SUBD_AO; 1346 subdevice->subdev_flags = SDF_WRITABLE | SDF_COMMON; 1347 subdevice->n_chan = board->ao_channel_nbr; 1348 subdevice->maxdata = board->ao_resolution_mask; 1349 subdevice->len_chanlist = board->ao_channel_nbr; 1350 subdevice->range_table = board->ao_range_list; 1351 subdevice->insn_write = pci9111_ao_insn_write; 1352 subdevice->insn_read = pci9111_ao_insn_read; 1353 1354 subdevice = dev->subdevices + 2; 1355 subdevice->type = COMEDI_SUBD_DI; 1356 subdevice->subdev_flags = SDF_READABLE; 1357 subdevice->n_chan = PCI9111_DI_CHANNEL_NBR; 1358 subdevice->maxdata = 1; 1359 subdevice->range_table = &range_digital; 1360 subdevice->insn_bits = pci9111_di_insn_bits; 1361 1362 subdevice = dev->subdevices + 3; 1363 subdevice->type = COMEDI_SUBD_DO; 1364 subdevice->subdev_flags = SDF_READABLE | SDF_WRITABLE; 1365 subdevice->n_chan = PCI9111_DO_CHANNEL_NBR; 1366 subdevice->maxdata = 1; 1367 subdevice->range_table = &range_digital; 1368 subdevice->insn_bits = pci9111_do_insn_bits; 1369 1370 dev_private->is_valid = 1; 1371 1372 return 0; 1373} 1374 1375/* Detach */ 1376 1377static int pci9111_detach(struct comedi_device *dev) 1378{ 1379 /* Reset device */ 1380 1381 if (dev->private != NULL) { 1382 if (dev_private->is_valid) 1383 pci9111_reset(dev); 1384 1385 } 1386 /* Release previously allocated irq */ 1387 1388 if (dev->irq != 0) 1389 free_irq(dev->irq, dev); 1390 1391 if (dev_private != NULL && dev_private->pci_device != NULL) { 1392 if (dev->iobase) 1393 comedi_pci_disable(dev_private->pci_device); 1394 pci_dev_put(dev_private->pci_device); 1395 } 1396 1397 return 0; 1398} 1399