adl_pci9111.c revision 842ec6ba3bdf6de35359726b0428095fdd0f9b45
1/* 2 3comedi/drivers/adl_pci9111.c 4 5Hardware driver for PCI9111 ADLink cards: 6 7PCI-9111HR 8 9Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr> 10 11This program is free software; you can redistribute it and/or modify 12it under the terms of the GNU General Public License as published by 13the Free Software Foundation; either version 2 of the License, or 14(at your option) any later version. 15 16This program is distributed in the hope that it will be useful, 17but WITHOUT ANY WARRANTY; without even the implied warranty of 18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19GNU General Public License for more details. 20 21You should have received a copy of the GNU General Public License 22along with this program; if not, write to the Free Software 23Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24*/ 25 26/* 27Driver: adl_pci9111 28Description: Adlink PCI-9111HR 29Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr> 30Devices: [ADLink] PCI-9111HR (adl_pci9111) 31Status: experimental 32 33Supports: 34 35 - ai_insn read 36 - ao_insn read/write 37 - di_insn read 38 - do_insn read/write 39 - ai_do_cmd mode with the following sources: 40 41 - start_src TRIG_NOW 42 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT 43 - convert_src TRIG_TIMER TRIG_EXT 44 - scan_end_src TRIG_COUNT 45 - stop_src TRIG_COUNT TRIG_NONE 46 47The scanned channels must be consecutive and start from 0. They must 48all have the same range and aref. 49 50Configuration options: 51 52 [0] - PCI bus number (optional) 53 [1] - PCI slot number (optional) 54 55If bus/slot is not specified, the first available PCI 56device will be used. 57 58*/ 59 60/* 61CHANGELOG: 62 632005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be 64a multiple of chanlist_len*convert_arg. 652002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data. 662002/02/18 Added external trigger support for analog input. 67 68TODO: 69 70 - Really test implemented functionality. 71 - Add support for the PCI-9111DG with a probe routine to identify 72 the card type (perhaps with the help of the channel number readback 73 of the A/D Data register). 74 - Add external multiplexer support. 75 76*/ 77 78#include "../comedidev.h" 79 80#include <linux/delay.h> 81#include <linux/interrupt.h> 82 83#include "8253.h" 84#include "comedi_pci.h" 85#include "comedi_fc.h" 86 87#define PCI9111_DRIVER_NAME "adl_pci9111" 88#define PCI9111_HR_DEVICE_ID 0x9111 89 90/* TODO: Add other pci9111 board id */ 91 92#define PCI9111_IO_RANGE 0x0100 93 94#define PCI9111_FIFO_HALF_SIZE 512 95 96#define PCI9111_AI_CHANNEL_NBR 16 97 98#define PCI9111_AI_RESOLUTION 12 99#define PCI9111_AI_RESOLUTION_MASK 0x0FFF 100#define PCI9111_AI_RESOLUTION_2_CMP_BIT 0x0800 101 102#define PCI9111_HR_AI_RESOLUTION 16 103#define PCI9111_HR_AI_RESOLUTION_MASK 0xFFFF 104#define PCI9111_HR_AI_RESOLUTION_2_CMP_BIT 0x8000 105 106#define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000 107#define PCI9111_AO_CHANNEL_NBR 1 108#define PCI9111_AO_RESOLUTION 12 109#define PCI9111_AO_RESOLUTION_MASK 0x0FFF 110#define PCI9111_DI_CHANNEL_NBR 16 111#define PCI9111_DO_CHANNEL_NBR 16 112#define PCI9111_DO_MASK 0xFFFF 113 114#define PCI9111_RANGE_SETTING_DELAY 10 115#define PCI9111_AI_INSTANT_READ_UDELAY_US 2 116#define PCI9111_AI_INSTANT_READ_TIMEOUT 100 117 118#define PCI9111_8254_CLOCK_PERIOD_NS 500 119 120#define PCI9111_8254_COUNTER_0 0x00 121#define PCI9111_8254_COUNTER_1 0x40 122#define PCI9111_8254_COUNTER_2 0x80 123#define PCI9111_8254_COUNTER_LATCH 0x00 124#define PCI9111_8254_READ_LOAD_LSB_ONLY 0x10 125#define PCI9111_8254_READ_LOAD_MSB_ONLY 0x20 126#define PCI9111_8254_READ_LOAD_LSB_MSB 0x30 127#define PCI9111_8254_MODE_0 0x00 128#define PCI9111_8254_MODE_1 0x02 129#define PCI9111_8254_MODE_2 0x04 130#define PCI9111_8254_MODE_3 0x06 131#define PCI9111_8254_MODE_4 0x08 132#define PCI9111_8254_MODE_5 0x0A 133#define PCI9111_8254_BINARY_COUNTER 0x00 134#define PCI9111_8254_BCD_COUNTER 0x01 135 136/* IO address map */ 137 138#define PCI9111_REGISTER_AD_FIFO_VALUE 0x00 /* AD Data stored 139 in FIFO */ 140#define PCI9111_REGISTER_DA_OUTPUT 0x00 141#define PCI9111_REGISTER_DIGITAL_IO 0x02 142#define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04 143#define PCI9111_REGISTER_AD_CHANNEL_CONTROL 0x06 /* Channel 144 selection */ 145#define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06 146#define PCI9111_REGISTER_INPUT_SIGNAL_RANGE 0x08 147#define PCI9111_REGISTER_RANGE_STATUS_READBACK 0x08 148#define PCI9111_REGISTER_TRIGGER_MODE_CONTROL 0x0A 149#define PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK 0x0A 150#define PCI9111_REGISTER_SOFTWARE_TRIGGER 0x0E 151#define PCI9111_REGISTER_INTERRUPT_CONTROL 0x0C 152#define PCI9111_REGISTER_8254_COUNTER_0 0x40 153#define PCI9111_REGISTER_8254_COUNTER_1 0x42 154#define PCI9111_REGISTER_8254_COUNTER_2 0X44 155#define PCI9111_REGISTER_8254_CONTROL 0x46 156#define PCI9111_REGISTER_INTERRUPT_CLEAR 0x48 157 158#define PCI9111_TRIGGER_MASK 0x0F 159#define PCI9111_PTRG_OFF (0 << 3) 160#define PCI9111_PTRG_ON (1 << 3) 161#define PCI9111_EITS_EXTERNAL (1 << 2) 162#define PCI9111_EITS_INTERNAL (0 << 2) 163#define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1) 164#define PCI9111_TPST_TIMER_PACER (1 << 1) 165#define PCI9111_ASCAN_ON (1 << 0) 166#define PCI9111_ASCAN_OFF (0 << 0) 167 168#define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0) 169#define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0) 170#define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1) 171#define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1) 172#define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2) 173#define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2) 174 175#define PCI9111_CHANNEL_MASK 0x0F 176 177#define PCI9111_RANGE_MASK 0x07 178#define PCI9111_FIFO_EMPTY_MASK 0x10 179#define PCI9111_FIFO_HALF_FULL_MASK 0x20 180#define PCI9111_FIFO_FULL_MASK 0x40 181#define PCI9111_AD_BUSY_MASK 0x80 182 183#define PCI9111_IO_BASE (dev->iobase) 184 185/* 186 * Define inlined function 187 */ 188 189#define pci9111_trigger_and_autoscan_get() \ 190 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F) 191 192#define pci9111_trigger_and_autoscan_set(flags) \ 193 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL) 194 195#define pci9111_interrupt_and_fifo_get() \ 196 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \ 197 >> 4) & 0x03) 198 199#define pci9111_interrupt_and_fifo_set(flags) \ 200 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL) 201 202#define pci9111_interrupt_clear() \ 203 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR) 204 205#define pci9111_software_trigger() \ 206 outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER) 207 208#define pci9111_fifo_reset() do { \ 209 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \ 210 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \ 211 outb(PCI9111_FFEN_SET_FIFO_DISABLE, \ 212 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \ 213 outb(PCI9111_FFEN_SET_FIFO_ENABLE, \ 214 PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \ 215 } while (0) 216 217#define pci9111_is_fifo_full() \ 218 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 219 PCI9111_FIFO_FULL_MASK) == 0) 220 221#define pci9111_is_fifo_half_full() \ 222 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 223 PCI9111_FIFO_HALF_FULL_MASK) == 0) 224 225#define pci9111_is_fifo_empty() \ 226 ((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \ 227 PCI9111_FIFO_EMPTY_MASK) == 0) 228 229#define pci9111_ai_channel_set(channel) \ 230 outb((channel)&PCI9111_CHANNEL_MASK, \ 231 PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL) 232 233#define pci9111_ai_channel_get() \ 234 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \ 235 &PCI9111_CHANNEL_MASK) 236 237#define pci9111_ai_range_set(range) \ 238 outb((range)&PCI9111_RANGE_MASK, \ 239 PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE) 240 241#define pci9111_ai_range_get() \ 242 (inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \ 243 &PCI9111_RANGE_MASK) 244 245#define pci9111_ai_get_data() \ 246 (((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \ 247 &PCI9111_AI_RESOLUTION_MASK) \ 248 ^ PCI9111_AI_RESOLUTION_2_CMP_BIT) 249 250#define pci9111_hr_ai_get_data() \ 251 ((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) \ 252 &PCI9111_HR_AI_RESOLUTION_MASK) \ 253 ^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT) 254 255#define pci9111_ao_set_data(data) \ 256 outw(data&PCI9111_AO_RESOLUTION_MASK, \ 257 PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT) 258 259#define pci9111_di_get_bits() \ 260 inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO) 261 262#define pci9111_do_set_bits(bits) \ 263 outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO) 264 265#define pci9111_8254_control_set(flags) \ 266 outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL) 267 268#define pci9111_8254_counter_0_set(data) \ 269 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \ 270 outb((data >> 8) & 0xFF, \ 271 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0) 272 273#define pci9111_8254_counter_1_set(data) \ 274 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \ 275 outb((data >> 8) & 0xFF, \ 276 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1) 277 278#define pci9111_8254_counter_2_set(data) \ 279 outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \ 280 outb((data >> 8) & 0xFF, \ 281 PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2) 282 283/* Function prototypes */ 284 285static int pci9111_attach(struct comedi_device *dev, 286 struct comedi_devconfig *it); 287static int pci9111_detach(struct comedi_device *dev); 288static void pci9111_ai_munge(struct comedi_device *dev, 289 struct comedi_subdevice *s, void *data, 290 unsigned int num_bytes, 291 unsigned int start_chan_index); 292 293static const struct comedi_lrange pci9111_hr_ai_range = { 294 5, 295 { 296 BIP_RANGE(10), 297 BIP_RANGE(5), 298 BIP_RANGE(2.5), 299 BIP_RANGE(1.25), 300 BIP_RANGE(0.625) 301 } 302}; 303 304static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = { 305 { PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 306 0, 0, 0 }, 307 /* { PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 308 * 0, 0, 0 }, */ 309 { 0 } 310}; 311 312MODULE_DEVICE_TABLE(pci, pci9111_pci_table); 313 314/* */ 315/* Board specification structure */ 316/* */ 317 318struct pci9111_board { 319 const char *name; /* driver name */ 320 int device_id; 321 int ai_channel_nbr; /* num of A/D chans */ 322 int ao_channel_nbr; /* num of D/A chans */ 323 int ai_resolution; /* resolution of A/D */ 324 int ai_resolution_mask; 325 int ao_resolution; /* resolution of D/A */ 326 int ao_resolution_mask; 327 const struct comedi_lrange *ai_range_list; /* rangelist for A/D */ 328 const struct comedi_lrange *ao_range_list; /* rangelist for D/A */ 329 unsigned int ai_acquisition_period_min_ns; 330}; 331 332static const struct pci9111_board pci9111_boards[] = { 333 { 334 .name = "pci9111_hr", 335 .device_id = PCI9111_HR_DEVICE_ID, 336 .ai_channel_nbr = PCI9111_AI_CHANNEL_NBR, 337 .ao_channel_nbr = PCI9111_AO_CHANNEL_NBR, 338 .ai_resolution = PCI9111_HR_AI_RESOLUTION, 339 .ai_resolution_mask = PCI9111_HR_AI_RESOLUTION_MASK, 340 .ao_resolution = PCI9111_AO_RESOLUTION, 341 .ao_resolution_mask = PCI9111_AO_RESOLUTION_MASK, 342 .ai_range_list = &pci9111_hr_ai_range, 343 .ao_range_list = &range_bipolar10, 344 .ai_acquisition_period_min_ns = PCI9111_AI_ACQUISITION_PERIOD_MIN_NS} 345}; 346 347#define pci9111_board_nbr \ 348 (sizeof(pci9111_boards)/sizeof(struct pci9111_board)) 349 350static struct comedi_driver pci9111_driver = { 351 .driver_name = PCI9111_DRIVER_NAME, 352 .module = THIS_MODULE, 353 .attach = pci9111_attach, 354 .detach = pci9111_detach, 355}; 356 357static int __devinit pci9111_driver_pci_probe(struct pci_dev *dev, 358 const struct pci_device_id *ent) 359{ 360 return comedi_pci_auto_config(dev, pci9111_driver.driver_name); 361} 362 363static void __devexit pci9111_driver_pci_remove(struct pci_dev *dev) 364{ 365 comedi_pci_auto_unconfig(dev); 366} 367 368static struct pci_driver pci9111_driver_pci_driver = { 369 .id_table = pci9111_pci_table, 370 .probe = &pci9111_driver_pci_probe, 371 .remove = __devexit_p(&pci9111_driver_pci_remove) 372}; 373 374static int __init pci9111_driver_init_module(void) 375{ 376 int retval; 377 378 retval = comedi_driver_register(&pci9111_driver); 379 if (retval < 0) 380 return retval; 381 382 pci9111_driver_pci_driver.name = (char *)pci9111_driver.driver_name; 383 return pci_register_driver(&pci9111_driver_pci_driver); 384} 385 386static void __exit pci9111_driver_cleanup_module(void) 387{ 388 pci_unregister_driver(&pci9111_driver_pci_driver); 389 comedi_driver_unregister(&pci9111_driver); 390} 391 392module_init(pci9111_driver_init_module); 393module_exit(pci9111_driver_cleanup_module); 394 395/* Private data structure */ 396 397struct pci9111_private_data { 398 struct pci_dev *pci_device; 399 unsigned long io_range; /* PCI6503 io range */ 400 401 unsigned long lcr_io_base; /* Local configuration register base 402 * address */ 403 unsigned long lcr_io_range; 404 405 int stop_counter; 406 int stop_is_none; 407 408 unsigned int scan_delay; 409 unsigned int chanlist_len; 410 unsigned int chunk_counter; 411 unsigned int chunk_num_samples; 412 413 int ao_readback; /* Last written analog output data */ 414 415 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer 416 * pacer */ 417 unsigned int timer_divisor_2; 418 419 int is_valid; /* Is device valid */ 420 421 short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE]; 422}; 423 424#define dev_private ((struct pci9111_private_data *)dev->private) 425 426/* ------------------------------------------------------------------ */ 427/* PLX9050 SECTION */ 428/* ------------------------------------------------------------------ */ 429 430#define PLX9050_REGISTER_INTERRUPT_CONTROL 0x4c 431 432#define PLX9050_LINTI1_ENABLE (1 << 0) 433#define PLX9050_LINTI1_ACTIVE_HIGH (1 << 1) 434#define PLX9050_LINTI1_STATUS (1 << 2) 435#define PLX9050_LINTI2_ENABLE (1 << 3) 436#define PLX9050_LINTI2_ACTIVE_HIGH (1 << 4) 437#define PLX9050_LINTI2_STATUS (1 << 5) 438#define PLX9050_PCI_INTERRUPT_ENABLE (1 << 6) 439#define PLX9050_SOFTWARE_INTERRUPT (1 << 7) 440 441static void plx9050_interrupt_control(unsigned long io_base, 442 bool LINTi1_enable, 443 bool LINTi1_active_high, 444 bool LINTi2_enable, 445 bool LINTi2_active_high, 446 bool interrupt_enable) 447{ 448 int flags = 0; 449 450 if (LINTi1_enable) 451 flags |= PLX9050_LINTI1_ENABLE; 452 if (LINTi1_active_high) 453 flags |= PLX9050_LINTI1_ACTIVE_HIGH; 454 if (LINTi2_enable) 455 flags |= PLX9050_LINTI2_ENABLE; 456 if (LINTi2_active_high) 457 flags |= PLX9050_LINTI2_ACTIVE_HIGH; 458 459 if (interrupt_enable) 460 flags |= PLX9050_PCI_INTERRUPT_ENABLE; 461 462 outb(flags, io_base + PLX9050_REGISTER_INTERRUPT_CONTROL); 463} 464 465/* ------------------------------------------------------------------ */ 466/* MISCELLANEOUS SECTION */ 467/* ------------------------------------------------------------------ */ 468 469/* 8254 timer */ 470 471static void pci9111_timer_set(struct comedi_device *dev) 472{ 473 pci9111_8254_control_set(PCI9111_8254_COUNTER_0 | 474 PCI9111_8254_READ_LOAD_LSB_MSB | 475 PCI9111_8254_MODE_0 | 476 PCI9111_8254_BINARY_COUNTER); 477 478 pci9111_8254_control_set(PCI9111_8254_COUNTER_1 | 479 PCI9111_8254_READ_LOAD_LSB_MSB | 480 PCI9111_8254_MODE_2 | 481 PCI9111_8254_BINARY_COUNTER); 482 483 pci9111_8254_control_set(PCI9111_8254_COUNTER_2 | 484 PCI9111_8254_READ_LOAD_LSB_MSB | 485 PCI9111_8254_MODE_2 | 486 PCI9111_8254_BINARY_COUNTER); 487 488 udelay(1); 489 490 pci9111_8254_counter_2_set(dev_private->timer_divisor_2); 491 pci9111_8254_counter_1_set(dev_private->timer_divisor_1); 492} 493 494enum pci9111_trigger_sources { 495 software, 496 timer_pacer, 497 external 498}; 499 500static void pci9111_trigger_source_set(struct comedi_device *dev, 501 enum pci9111_trigger_sources source) 502{ 503 int flags; 504 505 flags = pci9111_trigger_and_autoscan_get() & 0x09; 506 507 switch (source) { 508 case software: 509 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER; 510 break; 511 512 case timer_pacer: 513 flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER; 514 break; 515 516 case external: 517 flags |= PCI9111_EITS_EXTERNAL; 518 break; 519 } 520 521 pci9111_trigger_and_autoscan_set(flags); 522} 523 524static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger) 525{ 526 int flags; 527 528 flags = pci9111_trigger_and_autoscan_get() & 0x07; 529 530 if (pretrigger) 531 flags |= PCI9111_PTRG_ON; 532 533 pci9111_trigger_and_autoscan_set(flags); 534} 535 536static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan) 537{ 538 int flags; 539 540 flags = pci9111_trigger_and_autoscan_get() & 0x0e; 541 542 if (autoscan) 543 flags |= PCI9111_ASCAN_ON; 544 545 pci9111_trigger_and_autoscan_set(flags); 546} 547 548enum pci9111_ISC0_sources { 549 irq_on_eoc, 550 irq_on_fifo_half_full 551}; 552 553enum pci9111_ISC1_sources { 554 irq_on_timer_tick, 555 irq_on_external_trigger 556}; 557 558static void pci9111_interrupt_source_set(struct comedi_device *dev, 559 enum pci9111_ISC0_sources irq_0_source, 560 enum pci9111_ISC1_sources irq_1_source) 561{ 562 int flags; 563 564 flags = pci9111_interrupt_and_fifo_get() & 0x04; 565 566 if (irq_0_source == irq_on_fifo_half_full) 567 flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL; 568 569 if (irq_1_source == irq_on_external_trigger) 570 flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG; 571 572 pci9111_interrupt_and_fifo_set(flags); 573} 574 575/* ------------------------------------------------------------------ */ 576/* HARDWARE TRIGGERED ANALOG INPUT SECTION */ 577/* ------------------------------------------------------------------ */ 578 579/* Cancel analog input autoscan */ 580 581#undef AI_DO_CMD_DEBUG 582 583static int pci9111_ai_cancel(struct comedi_device *dev, 584 struct comedi_subdevice *s) 585{ 586 /* Disable interrupts */ 587 588 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true, 589 true, false); 590 591 pci9111_trigger_source_set(dev, software); 592 593 pci9111_autoscan_set(dev, false); 594 595 pci9111_fifo_reset(); 596 597#ifdef AI_DO_CMD_DEBUG 598 printk(PCI9111_DRIVER_NAME ": ai_cancel\n"); 599#endif 600 601 return 0; 602} 603 604/* Test analog input command */ 605 606#define pci9111_check_trigger_src(src, flags) do { \ 607 tmp = src; \ 608 src &= flags; \ 609 if (!src || tmp != src) \ 610 error++; \ 611 } while (false); 612 613static int 614pci9111_ai_do_cmd_test(struct comedi_device *dev, 615 struct comedi_subdevice *s, struct comedi_cmd *cmd) 616{ 617 int tmp; 618 int error = 0; 619 int range, reference; 620 int i; 621 struct pci9111_board *board = (struct pci9111_board *)dev->board_ptr; 622 623 /* Step 1 : check if trigger are trivialy valid */ 624 625 pci9111_check_trigger_src(cmd->start_src, TRIG_NOW); 626 pci9111_check_trigger_src(cmd->scan_begin_src, 627 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT); 628 pci9111_check_trigger_src(cmd->convert_src, TRIG_TIMER | TRIG_EXT); 629 pci9111_check_trigger_src(cmd->scan_end_src, TRIG_COUNT); 630 pci9111_check_trigger_src(cmd->stop_src, TRIG_COUNT | TRIG_NONE); 631 632 if (error) 633 return 1; 634 635 /* step 2 : make sure trigger sources are unique and mutually 636 * compatible */ 637 638 if (cmd->start_src != TRIG_NOW) 639 error++; 640 641 if ((cmd->scan_begin_src != TRIG_TIMER) && 642 (cmd->scan_begin_src != TRIG_FOLLOW) && 643 (cmd->scan_begin_src != TRIG_EXT)) 644 error++; 645 646 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT)) 647 error++; 648 if ((cmd->convert_src == TRIG_TIMER) && 649 !((cmd->scan_begin_src == TRIG_TIMER) || 650 (cmd->scan_begin_src == TRIG_FOLLOW))) 651 error++; 652 if ((cmd->convert_src == TRIG_EXT) && 653 !((cmd->scan_begin_src == TRIG_EXT) || 654 (cmd->scan_begin_src == TRIG_FOLLOW))) 655 error++; 656 657 658 if (cmd->scan_end_src != TRIG_COUNT) 659 error++; 660 if ((cmd->stop_src != TRIG_COUNT) && (cmd->stop_src != TRIG_NONE)) 661 error++; 662 663 if (error) 664 return 2; 665 666 /* Step 3 : make sure arguments are trivialy compatible */ 667 668 if (cmd->chanlist_len < 1) { 669 cmd->chanlist_len = 1; 670 error++; 671 } 672 673 if (cmd->chanlist_len > board->ai_channel_nbr) { 674 cmd->chanlist_len = board->ai_channel_nbr; 675 error++; 676 } 677 678 if ((cmd->start_src == TRIG_NOW) && (cmd->start_arg != 0)) { 679 cmd->start_arg = 0; 680 error++; 681 } 682 683 if ((cmd->convert_src == TRIG_TIMER) && 684 (cmd->convert_arg < board->ai_acquisition_period_min_ns)) { 685 cmd->convert_arg = board->ai_acquisition_period_min_ns; 686 error++; 687 } 688 if ((cmd->convert_src == TRIG_EXT) && (cmd->convert_arg != 0)) { 689 cmd->convert_arg = 0; 690 error++; 691 } 692 693 if ((cmd->scan_begin_src == TRIG_TIMER) && 694 (cmd->scan_begin_arg < board->ai_acquisition_period_min_ns)) { 695 cmd->scan_begin_arg = board->ai_acquisition_period_min_ns; 696 error++; 697 } 698 if ((cmd->scan_begin_src == TRIG_FOLLOW) 699 && (cmd->scan_begin_arg != 0)) { 700 cmd->scan_begin_arg = 0; 701 error++; 702 } 703 if ((cmd->scan_begin_src == TRIG_EXT) && (cmd->scan_begin_arg != 0)) { 704 cmd->scan_begin_arg = 0; 705 error++; 706 } 707 708 if ((cmd->scan_end_src == TRIG_COUNT) && 709 (cmd->scan_end_arg != cmd->chanlist_len)) { 710 cmd->scan_end_arg = cmd->chanlist_len; 711 error++; 712 } 713 714 if ((cmd->stop_src == TRIG_COUNT) && (cmd->stop_arg < 1)) { 715 cmd->stop_arg = 1; 716 error++; 717 } 718 if ((cmd->stop_src == TRIG_NONE) && (cmd->stop_arg != 0)) { 719 cmd->stop_arg = 0; 720 error++; 721 } 722 723 if (error) 724 return 3; 725 726 /* Step 4 : fix up any arguments */ 727 728 if (cmd->convert_src == TRIG_TIMER) { 729 tmp = cmd->convert_arg; 730 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS, 731 &(dev_private->timer_divisor_1), 732 &(dev_private->timer_divisor_2), 733 &(cmd->convert_arg), 734 cmd->flags & TRIG_ROUND_MASK); 735 if (tmp != cmd->convert_arg) 736 error++; 737 } 738 /* There's only one timer on this card, so the scan_begin timer must */ 739 /* be a multiple of chanlist_len*convert_arg */ 740 741 if (cmd->scan_begin_src == TRIG_TIMER) { 742 743 unsigned int scan_begin_min; 744 unsigned int scan_begin_arg; 745 unsigned int scan_factor; 746 747 scan_begin_min = cmd->chanlist_len * cmd->convert_arg; 748 749 if (cmd->scan_begin_arg != scan_begin_min) { 750 if (scan_begin_min < cmd->scan_begin_arg) { 751 scan_factor = 752 cmd->scan_begin_arg / scan_begin_min; 753 scan_begin_arg = scan_factor * scan_begin_min; 754 if (cmd->scan_begin_arg != scan_begin_arg) { 755 cmd->scan_begin_arg = scan_begin_arg; 756 error++; 757 } 758 } else { 759 cmd->scan_begin_arg = scan_begin_min; 760 error++; 761 } 762 } 763 } 764 765 if (error) 766 return 4; 767 768 /* Step 5 : check channel list */ 769 770 if (cmd->chanlist) { 771 772 range = CR_RANGE(cmd->chanlist[0]); 773 reference = CR_AREF(cmd->chanlist[0]); 774 775 if (cmd->chanlist_len > 1) { 776 for (i = 0; i < cmd->chanlist_len; i++) { 777 if (CR_CHAN(cmd->chanlist[i]) != i) { 778 comedi_error(dev, 779 "entries in chanlist must be consecutive " 780 "channels,counting upwards from 0\n"); 781 error++; 782 } 783 if (CR_RANGE(cmd->chanlist[i]) != range) { 784 comedi_error(dev, 785 "entries in chanlist must all have the same gain\n"); 786 error++; 787 } 788 if (CR_AREF(cmd->chanlist[i]) != reference) { 789 comedi_error(dev, 790 "entries in chanlist must all have the same reference\n"); 791 error++; 792 } 793 } 794 } else { 795 if ((CR_CHAN(cmd->chanlist[0]) > 796 (board->ai_channel_nbr - 1)) 797 || (CR_CHAN(cmd->chanlist[0]) < 0)) { 798 comedi_error(dev, 799 "channel number is out of limits\n"); 800 error++; 801 } 802 } 803 } 804 805 if (error) 806 return 5; 807 808 return 0; 809 810} 811 812/* Analog input command */ 813 814static int pci9111_ai_do_cmd(struct comedi_device *dev, 815 struct comedi_subdevice *subdevice) 816{ 817 struct comedi_cmd *async_cmd = &subdevice->async->cmd; 818 819 if (!dev->irq) { 820 comedi_error(dev, 821 "no irq assigned for PCI9111, cannot do hardware conversion"); 822 return -1; 823 } 824 /* Set channel scan limit */ 825 /* PCI9111 allows only scanning from channel 0 to channel n */ 826 /* TODO: handle the case of an external multiplexer */ 827 828 if (async_cmd->chanlist_len > 1) { 829 pci9111_ai_channel_set((async_cmd->chanlist_len) - 1); 830 pci9111_autoscan_set(dev, true); 831 } else { 832 pci9111_ai_channel_set(CR_CHAN(async_cmd->chanlist[0])); 833 pci9111_autoscan_set(dev, false); 834 } 835 836 /* Set gain */ 837 /* This is the same gain on every channel */ 838 839 pci9111_ai_range_set(CR_RANGE(async_cmd->chanlist[0])); 840 841 /* Set counter */ 842 843 switch (async_cmd->stop_src) { 844 case TRIG_COUNT: 845 dev_private->stop_counter = 846 async_cmd->stop_arg * async_cmd->chanlist_len; 847 dev_private->stop_is_none = 0; 848 break; 849 850 case TRIG_NONE: 851 dev_private->stop_counter = 0; 852 dev_private->stop_is_none = 1; 853 break; 854 855 default: 856 comedi_error(dev, "Invalid stop trigger"); 857 return -1; 858 } 859 860 /* Set timer pacer */ 861 862 dev_private->scan_delay = 0; 863 switch (async_cmd->convert_src) { 864 case TRIG_TIMER: 865 i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS, 866 &(dev_private->timer_divisor_1), 867 &(dev_private->timer_divisor_2), 868 &(async_cmd->convert_arg), 869 async_cmd-> 870 flags & TRIG_ROUND_MASK); 871#ifdef AI_DO_CMD_DEBUG 872 printk(PCI9111_DRIVER_NAME ": divisors = %d, %d\n", 873 dev_private->timer_divisor_1, 874 dev_private->timer_divisor_2); 875#endif 876 877 pci9111_trigger_source_set(dev, software); 878 pci9111_timer_set(dev); 879 pci9111_fifo_reset(); 880 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full, 881 irq_on_timer_tick); 882 pci9111_trigger_source_set(dev, timer_pacer); 883 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, 884 false, true, true); 885 886 if (async_cmd->scan_begin_src == TRIG_TIMER) { 887 dev_private->scan_delay = 888 (async_cmd->scan_begin_arg / 889 (async_cmd->convert_arg * 890 async_cmd->chanlist_len)) - 1; 891 } 892 893 break; 894 895 case TRIG_EXT: 896 897 pci9111_trigger_source_set(dev, external); 898 pci9111_fifo_reset(); 899 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full, 900 irq_on_timer_tick); 901 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, 902 false, true, true); 903 904 break; 905 906 default: 907 comedi_error(dev, "Invalid convert trigger"); 908 return -1; 909 } 910 911 dev_private->stop_counter *= (1 + dev_private->scan_delay); 912 dev_private->chanlist_len = async_cmd->chanlist_len; 913 dev_private->chunk_counter = 0; 914 dev_private->chunk_num_samples = 915 dev_private->chanlist_len * (1 + dev_private->scan_delay); 916 917#ifdef AI_DO_CMD_DEBUG 918 printk(PCI9111_DRIVER_NAME ": start interruptions!\n"); 919 printk(PCI9111_DRIVER_NAME ": trigger source = %2x\n", 920 pci9111_trigger_and_autoscan_get()); 921 printk(PCI9111_DRIVER_NAME ": irq source = %2x\n", 922 pci9111_interrupt_and_fifo_get()); 923 printk(PCI9111_DRIVER_NAME ": ai_do_cmd\n"); 924 printk(PCI9111_DRIVER_NAME ": stop counter = %d\n", 925 dev_private->stop_counter); 926 printk(PCI9111_DRIVER_NAME ": scan delay = %d\n", 927 dev_private->scan_delay); 928 printk(PCI9111_DRIVER_NAME ": chanlist_len = %d\n", 929 dev_private->chanlist_len); 930 printk(PCI9111_DRIVER_NAME ": chunk num samples = %d\n", 931 dev_private->chunk_num_samples); 932#endif 933 934 return 0; 935} 936 937static void pci9111_ai_munge(struct comedi_device *dev, 938 struct comedi_subdevice *s, void *data, 939 unsigned int num_bytes, 940 unsigned int start_chan_index) 941{ 942 unsigned int i, num_samples = num_bytes / sizeof(short); 943 short *array = data; 944 int resolution = 945 ((struct pci9111_board *)dev->board_ptr)->ai_resolution; 946 947 for (i = 0; i < num_samples; i++) { 948 if (resolution == PCI9111_HR_AI_RESOLUTION) 949 array[i] = 950 (array[i] & PCI9111_HR_AI_RESOLUTION_MASK) ^ 951 PCI9111_HR_AI_RESOLUTION_2_CMP_BIT; 952 else 953 array[i] = 954 ((array[i] >> 4) & PCI9111_AI_RESOLUTION_MASK) ^ 955 PCI9111_AI_RESOLUTION_2_CMP_BIT; 956 } 957} 958 959/* ------------------------------------------------------------------ */ 960/* INTERRUPT SECTION */ 961/* ------------------------------------------------------------------ */ 962 963#undef INTERRUPT_DEBUG 964 965static irqreturn_t pci9111_interrupt(int irq, void *p_device) 966{ 967 struct comedi_device *dev = p_device; 968 struct comedi_subdevice *subdevice = dev->read_subdev; 969 struct comedi_async *async; 970 unsigned long irq_flags; 971 unsigned char intcsr; 972 973 if (!dev->attached) { 974 /* Ignore interrupt before device fully attached. */ 975 /* Might not even have allocated subdevices yet! */ 976 return IRQ_NONE; 977 } 978 979 async = subdevice->async; 980 981 spin_lock_irqsave(&dev->spinlock, irq_flags); 982 983 /* Check if we are source of interrupt */ 984 intcsr = inb(dev_private->lcr_io_base + 985 PLX9050_REGISTER_INTERRUPT_CONTROL); 986 if (!(((intcsr & PLX9050_PCI_INTERRUPT_ENABLE) != 0) 987 && (((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) 988 == (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) 989 || ((intcsr & (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS)) 990 == (PLX9050_LINTI2_ENABLE | PLX9050_LINTI2_STATUS))))) { 991 /* Not the source of the interrupt. */ 992 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */ 993 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 994 return IRQ_NONE; 995 } 996 997 if ((intcsr & (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) == 998 (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) { 999 /* Interrupt comes from fifo_half-full signal */ 1000 1001 if (pci9111_is_fifo_full()) { 1002 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1003 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow"); 1004 pci9111_interrupt_clear(); 1005 pci9111_ai_cancel(dev, subdevice); 1006 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; 1007 comedi_event(dev, subdevice); 1008 1009 return IRQ_HANDLED; 1010 } 1011 1012 if (pci9111_is_fifo_half_full()) { 1013 unsigned int num_samples; 1014 unsigned int bytes_written = 0; 1015 1016#ifdef INTERRUPT_DEBUG 1017 printk(PCI9111_DRIVER_NAME ": fifo is half full\n"); 1018#endif 1019 1020 num_samples = 1021 PCI9111_FIFO_HALF_SIZE > 1022 dev_private->stop_counter 1023 && !dev_private-> 1024 stop_is_none ? dev_private->stop_counter : 1025 PCI9111_FIFO_HALF_SIZE; 1026 insw(PCI9111_IO_BASE + PCI9111_REGISTER_AD_FIFO_VALUE, 1027 dev_private->ai_bounce_buffer, num_samples); 1028 1029 if (dev_private->scan_delay < 1) { 1030 bytes_written = 1031 cfc_write_array_to_buffer(subdevice, 1032 dev_private-> 1033 ai_bounce_buffer, 1034 num_samples * 1035 sizeof(short)); 1036 } else { 1037 int position = 0; 1038 int to_read; 1039 1040 while (position < num_samples) { 1041 if (dev_private->chunk_counter < 1042 dev_private->chanlist_len) { 1043 to_read = 1044 dev_private->chanlist_len - 1045 dev_private->chunk_counter; 1046 1047 if (to_read > 1048 num_samples - position) 1049 to_read = 1050 num_samples - 1051 position; 1052 1053 bytes_written += 1054 cfc_write_array_to_buffer 1055 (subdevice, 1056 dev_private->ai_bounce_buffer 1057 + position, 1058 to_read * sizeof(short)); 1059 } else { 1060 to_read = 1061 dev_private->chunk_num_samples 1062 - 1063 dev_private->chunk_counter; 1064 if (to_read > 1065 num_samples - position) 1066 to_read = 1067 num_samples - 1068 position; 1069 1070 bytes_written += 1071 sizeof(short) * to_read; 1072 } 1073 1074 position += to_read; 1075 dev_private->chunk_counter += to_read; 1076 1077 if (dev_private->chunk_counter >= 1078 dev_private->chunk_num_samples) 1079 dev_private->chunk_counter = 0; 1080 } 1081 } 1082 1083 dev_private->stop_counter -= 1084 bytes_written / sizeof(short); 1085 } 1086 } 1087 1088 if ((dev_private->stop_counter == 0) && (!dev_private->stop_is_none)) { 1089 async->events |= COMEDI_CB_EOA; 1090 pci9111_ai_cancel(dev, subdevice); 1091 } 1092 1093 /* Very important, otherwise another interrupt request will be inserted 1094 * and will cause driver hangs on processing interrupt event. */ 1095 1096 pci9111_interrupt_clear(); 1097 1098 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1099 1100 comedi_event(dev, subdevice); 1101 1102 return IRQ_HANDLED; 1103} 1104 1105/* ------------------------------------------------------------------ */ 1106/* INSTANT ANALOG INPUT OUTPUT SECTION */ 1107/* ------------------------------------------------------------------ */ 1108 1109/* analog instant input */ 1110 1111#undef AI_INSN_DEBUG 1112 1113static int pci9111_ai_insn_read(struct comedi_device *dev, 1114 struct comedi_subdevice *subdevice, 1115 struct comedi_insn *insn, unsigned int *data) 1116{ 1117 int resolution = 1118 ((struct pci9111_board *)dev->board_ptr)->ai_resolution; 1119 1120 int timeout, i; 1121 1122#ifdef AI_INSN_DEBUG 1123 printk(PCI9111_DRIVER_NAME ": ai_insn set c/r/n = %2x/%2x/%2x\n", 1124 CR_CHAN((&insn->chanspec)[0]), 1125 CR_RANGE((&insn->chanspec)[0]), insn->n); 1126#endif 1127 1128 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0])); 1129 1130 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0])) 1131 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0])); 1132 1133 pci9111_fifo_reset(); 1134 1135 for (i = 0; i < insn->n; i++) { 1136 pci9111_software_trigger(); 1137 1138 timeout = PCI9111_AI_INSTANT_READ_TIMEOUT; 1139 1140 while (timeout--) { 1141 if (!pci9111_is_fifo_empty()) 1142 goto conversion_done; 1143 } 1144 1145 comedi_error(dev, "A/D read timeout"); 1146 data[i] = 0; 1147 pci9111_fifo_reset(); 1148 return -ETIME; 1149 1150conversion_done: 1151 1152 if (resolution == PCI9111_HR_AI_RESOLUTION) 1153 data[i] = pci9111_hr_ai_get_data(); 1154 else 1155 data[i] = pci9111_ai_get_data(); 1156 } 1157 1158#ifdef AI_INSN_DEBUG 1159 printk(PCI9111_DRIVER_NAME ": ai_insn get c/r/t = %2x/%2x/%2x\n", 1160 pci9111_ai_channel_get(), 1161 pci9111_ai_range_get(), pci9111_trigger_and_autoscan_get()); 1162#endif 1163 1164 return i; 1165} 1166 1167/* Analog instant output */ 1168 1169static int 1170pci9111_ao_insn_write(struct comedi_device *dev, 1171 struct comedi_subdevice *s, struct comedi_insn *insn, 1172 unsigned int *data) 1173{ 1174 int i; 1175 1176 for (i = 0; i < insn->n; i++) { 1177 pci9111_ao_set_data(data[i]); 1178 dev_private->ao_readback = data[i]; 1179 } 1180 1181 return i; 1182} 1183 1184/* Analog output readback */ 1185 1186static int pci9111_ao_insn_read(struct comedi_device *dev, 1187 struct comedi_subdevice *s, 1188 struct comedi_insn *insn, unsigned int *data) 1189{ 1190 int i; 1191 1192 for (i = 0; i < insn->n; i++) 1193 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK; 1194 1195 return i; 1196} 1197 1198/* ------------------------------------------------------------------ */ 1199/* DIGITAL INPUT OUTPUT SECTION */ 1200/* ------------------------------------------------------------------ */ 1201 1202/* Digital inputs */ 1203 1204static int pci9111_di_insn_bits(struct comedi_device *dev, 1205 struct comedi_subdevice *subdevice, 1206 struct comedi_insn *insn, unsigned int *data) 1207{ 1208 unsigned int bits; 1209 1210 bits = pci9111_di_get_bits(); 1211 data[1] = bits; 1212 1213 return 2; 1214} 1215 1216/* Digital outputs */ 1217 1218static int pci9111_do_insn_bits(struct comedi_device *dev, 1219 struct comedi_subdevice *subdevice, 1220 struct comedi_insn *insn, unsigned int *data) 1221{ 1222 unsigned int bits; 1223 1224 /* Only set bits that have been masked */ 1225 /* data[0] = mask */ 1226 /* data[1] = bit state */ 1227 1228 data[0] &= PCI9111_DO_MASK; 1229 1230 bits = subdevice->state; 1231 bits &= ~data[0]; 1232 bits |= data[0] & data[1]; 1233 subdevice->state = bits; 1234 1235 pci9111_do_set_bits(bits); 1236 1237 data[1] = bits; 1238 1239 return 2; 1240} 1241 1242/* ------------------------------------------------------------------ */ 1243/* INITIALISATION SECTION */ 1244/* ------------------------------------------------------------------ */ 1245 1246/* Reset device */ 1247 1248static int pci9111_reset(struct comedi_device *dev) 1249{ 1250 /* Set trigger source to software */ 1251 1252 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true, 1253 true, false); 1254 1255 pci9111_trigger_source_set(dev, software); 1256 pci9111_pretrigger_set(dev, false); 1257 pci9111_autoscan_set(dev, false); 1258 1259 /* Reset 8254 chip */ 1260 1261 dev_private->timer_divisor_1 = 0; 1262 dev_private->timer_divisor_2 = 0; 1263 1264 pci9111_timer_set(dev); 1265 1266 return 0; 1267} 1268 1269/* Attach */ 1270/* - Register PCI device */ 1271/* - Declare device driver capability */ 1272 1273static int pci9111_attach(struct comedi_device *dev, 1274 struct comedi_devconfig *it) 1275{ 1276 struct comedi_subdevice *subdevice; 1277 unsigned long io_base, io_range, lcr_io_base, lcr_io_range; 1278 struct pci_dev *pci_device = NULL; 1279 int error, i; 1280 const struct pci9111_board *board; 1281 1282 if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0) 1283 return -ENOMEM; 1284 /* Probe the device to determine what device in the series it is. */ 1285 1286 printk("comedi%d: " PCI9111_DRIVER_NAME " driver\n", dev->minor); 1287 1288 for_each_pci_dev(pci_device) { 1289 if (pci_device->vendor == PCI_VENDOR_ID_ADLINK) { 1290 for (i = 0; i < pci9111_board_nbr; i++) { 1291 if (pci9111_boards[i].device_id == 1292 pci_device->device) { 1293 /* was a particular bus/slot 1294 * requested? */ 1295 if ((it->options[0] != 0) 1296 || (it->options[1] != 0)) { 1297 /* are we on the wrong 1298 * bus/slot? */ 1299 if (pci_device->bus->number != 1300 it->options[0] 1301 || 1302 PCI_SLOT(pci_device->devfn) 1303 != it->options[1]) { 1304 continue; 1305 } 1306 } 1307 1308 dev->board_ptr = pci9111_boards + i; 1309 board = 1310 (struct pci9111_board *) 1311 dev->board_ptr; 1312 dev_private->pci_device = pci_device; 1313 goto found; 1314 } 1315 } 1316 } 1317 } 1318 1319 printk("comedi%d: no supported board found! (req. bus/slot : %d/%d)\n", 1320 dev->minor, it->options[0], it->options[1]); 1321 return -EIO; 1322 1323found: 1324 1325 printk("comedi%d: found %s (b:s:f=%d:%d:%d) , irq=%d\n", 1326 dev->minor, 1327 pci9111_boards[i].name, 1328 pci_device->bus->number, 1329 PCI_SLOT(pci_device->devfn), 1330 PCI_FUNC(pci_device->devfn), pci_device->irq); 1331 1332 /* TODO: Warn about non-tested boards. */ 1333 1334 /* Read local configuration register base address 1335 * [PCI_BASE_ADDRESS #1]. */ 1336 1337 lcr_io_base = pci_resource_start(pci_device, 1); 1338 lcr_io_range = pci_resource_len(pci_device, 1); 1339 1340 printk 1341 ("comedi%d: local configuration registers at address 0x%4lx [0x%4lx]\n", 1342 dev->minor, lcr_io_base, lcr_io_range); 1343 1344 /* Enable PCI device and request regions */ 1345 if (comedi_pci_enable(pci_device, PCI9111_DRIVER_NAME) < 0) { 1346 printk 1347 ("comedi%d: Failed to enable PCI device and request regions\n", 1348 dev->minor); 1349 return -EIO; 1350 } 1351 /* Read PCI6308 register base address [PCI_BASE_ADDRESS #2]. */ 1352 1353 io_base = pci_resource_start(pci_device, 2); 1354 io_range = pci_resource_len(pci_device, 2); 1355 1356 printk("comedi%d: 6503 registers at address 0x%4lx [0x%4lx]\n", 1357 dev->minor, io_base, io_range); 1358 1359 dev->iobase = io_base; 1360 dev->board_name = board->name; 1361 dev_private->io_range = io_range; 1362 dev_private->is_valid = 0; 1363 dev_private->lcr_io_base = lcr_io_base; 1364 dev_private->lcr_io_range = lcr_io_range; 1365 1366 pci9111_reset(dev); 1367 1368 /* Irq setup */ 1369 1370 dev->irq = 0; 1371 if (pci_device->irq > 0) { 1372 if (request_irq(pci_device->irq, pci9111_interrupt, 1373 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) { 1374 printk("comedi%d: unable to allocate irq %u\n", 1375 dev->minor, pci_device->irq); 1376 return -EINVAL; 1377 } 1378 } 1379 dev->irq = pci_device->irq; 1380 1381 /* TODO: Add external multiplexer setup (according to option[2]). */ 1382 1383 error = alloc_subdevices(dev, 4); 1384 if (error < 0) 1385 return error; 1386 1387 subdevice = dev->subdevices + 0; 1388 dev->read_subdev = subdevice; 1389 1390 subdevice->type = COMEDI_SUBD_AI; 1391 subdevice->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_CMD_READ; 1392 1393 /* TODO: Add external multiplexer data */ 1394 /* if (devpriv->usemux) { subdevice->n_chan = devpriv->usemux; } */ 1395 /* else { subdevice->n_chan = this_board->n_aichan; } */ 1396 1397 subdevice->n_chan = board->ai_channel_nbr; 1398 subdevice->maxdata = board->ai_resolution_mask; 1399 subdevice->len_chanlist = board->ai_channel_nbr; 1400 subdevice->range_table = board->ai_range_list; 1401 subdevice->cancel = pci9111_ai_cancel; 1402 subdevice->insn_read = pci9111_ai_insn_read; 1403 subdevice->do_cmdtest = pci9111_ai_do_cmd_test; 1404 subdevice->do_cmd = pci9111_ai_do_cmd; 1405 subdevice->munge = pci9111_ai_munge; 1406 1407 subdevice = dev->subdevices + 1; 1408 subdevice->type = COMEDI_SUBD_AO; 1409 subdevice->subdev_flags = SDF_WRITABLE | SDF_COMMON; 1410 subdevice->n_chan = board->ao_channel_nbr; 1411 subdevice->maxdata = board->ao_resolution_mask; 1412 subdevice->len_chanlist = board->ao_channel_nbr; 1413 subdevice->range_table = board->ao_range_list; 1414 subdevice->insn_write = pci9111_ao_insn_write; 1415 subdevice->insn_read = pci9111_ao_insn_read; 1416 1417 subdevice = dev->subdevices + 2; 1418 subdevice->type = COMEDI_SUBD_DI; 1419 subdevice->subdev_flags = SDF_READABLE; 1420 subdevice->n_chan = PCI9111_DI_CHANNEL_NBR; 1421 subdevice->maxdata = 1; 1422 subdevice->range_table = &range_digital; 1423 subdevice->insn_bits = pci9111_di_insn_bits; 1424 1425 subdevice = dev->subdevices + 3; 1426 subdevice->type = COMEDI_SUBD_DO; 1427 subdevice->subdev_flags = SDF_READABLE | SDF_WRITABLE; 1428 subdevice->n_chan = PCI9111_DO_CHANNEL_NBR; 1429 subdevice->maxdata = 1; 1430 subdevice->range_table = &range_digital; 1431 subdevice->insn_bits = pci9111_do_insn_bits; 1432 1433 dev_private->is_valid = 1; 1434 1435 return 0; 1436} 1437 1438/* Detach */ 1439 1440static int pci9111_detach(struct comedi_device *dev) 1441{ 1442 /* Reset device */ 1443 1444 if (dev->private != NULL) { 1445 if (dev_private->is_valid) 1446 pci9111_reset(dev); 1447 1448 } 1449 /* Release previously allocated irq */ 1450 1451 if (dev->irq != 0) 1452 free_irq(dev->irq, dev); 1453 1454 if (dev_private != NULL && dev_private->pci_device != NULL) { 1455 if (dev->iobase) 1456 comedi_pci_disable(dev_private->pci_device); 1457 pci_dev_put(dev_private->pci_device); 1458 } 1459 1460 return 0; 1461} 1462 1463MODULE_AUTHOR("Comedi http://www.comedi.org"); 1464MODULE_DESCRIPTION("Comedi low-level driver"); 1465MODULE_LICENSE("GPL"); 1466